[all-commits] [llvm/llvm-project] e833e5: [AArch64][Clang] Update untyped sme intrinsics wit...

[Lukacma via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e833e5276cab9a678b830dd46e87bfba3c700ca9
      https://github.com/llvm/llvm-project/commit/e833e5276cab9a678b830dd46e87bfba3c700ca9
  Author: Lukacma <Marian.Lukac at arm.com>
  Date:   2025-02-06 (Thu, 06 Feb 2025)

  Changed paths:
    M clang/include/clang/Basic/arm_sme.td
    M clang/include/clang/Basic/arm_sve.td
    M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_read.c
    M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_write.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_read.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx2.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_selx4.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx2.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_uzpx4.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx2.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_vector_zipx4.c
    M clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_write.c
    M clang/test/CodeGen/AArch64/sme2p1-intrinsics/acle_sme2p1_movaz.c
    M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_revd.c

  Log Message:
  -----------
  [AArch64][Clang] Update untyped sme intrinsics with fp8 variants (#124543)

This patch adds fp8 variants to the following untyped SME intrinsics
based on
[ACLE](https://github.com/ARM-software/acle/blob/main/main/acle.md):

```
SVREVD
SVSEL_X2
SVSEL_X4
SVZIP_X2
SVZIPQ_X2
SVZIP_X4
SVZIPQ_X4
SVUZP_X2
SVUZPQ_X2
SVUZP_X4
SVUZPQ_X4
SVREAD_ZA8_H
SVREAD_ZA8_V
SVREAD_ZA128
SVWRITE_ZA8_H
SVWRITE_ZA8_V
SVWRITE_ZA128
SVREAD_ZA8_VG2_H
SVREAD_ZA8_VG2_V
SVREAD_ZA8_VG4_H
SVREAD_ZA8_VG4_V
SVREAD_ZA8_VG1x2
SVREAD_ZA8_VG1x4
SVWRITE_ZA8_VG2_H
SVWRITE_ZA8_VG2_V
SVWRITE_ZA8_VG4_H
SVWRITE_ZA8_VG4_V
SVWRITE_ZA8_VG1x2
SVWRITE_ZA8_VG1x4
SVLUTI2_LANE_ZT_X4
SVLUTI2_LANE_ZT
SVLUTI4_LANE_ZT
SVLUTI2_LANE_ZT_X2
SVLUTI4_LANE_ZT_X2
SVREADZ_ZA8_X2_H
SVREADZ_ZA8_X2_V
SVREADZ_ZA8_X4_H
SVREADZ_ZA8_X4_V
SVREADZ_ZA8_H
SVREADZ_ZA8_V
SVREADZ_VG2_B
SVREADZ_VG4_B
```



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