[all-commits] [llvm/llvm-project] c552c6: [AArch64][GlobalISel] Protect against non-reg oper...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c552c6c914290f45bf015c4023c42e40a91e253e
      https://github.com/llvm/llvm-project/commit/c552c6c914290f45bf015c4023c42e40a91e253e
  Author: David Green <david.green at arm.com>
  Date:   2025-02-05 (Wed, 05 Feb 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/combine-addv.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Protect against non-reg operands in matchExtAddvToUdotAddv.

In some situations the first operand to an instruction might not be a register
(for example with intrinsics). We are only interested in extend operations, so
make sure the instruction is one we expect before we attempt to access the
first reg.



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