[all-commits] [llvm/llvm-project] 4287c7: [MLIR][NVVM] Add tcgen05 alloc/dealloc Ops (#125674)

[Durgadoss R via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4287c72404fbd291c01ddff88bfc045ab5c622b8
      https://github.com/llvm/llvm-project/commit/4287c72404fbd291c01ddff88bfc045ab5c622b8
  Author: Durgadoss R <durgadossr at nvidia.com>
  Date:   2025-02-05 (Wed, 05 Feb 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    A mlir/test/Target/LLVMIR/nvvm/tcgen05-alloc.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Add tcgen05 alloc/dealloc Ops (#125674)

PR #124961 adds intrinsics for the tcgen05
alloc/dealloc PTX instructions. This patch
adds NVVM Ops for the same.

Tests are added to verify the lowering to
the corresponding intrinsics in tcgen05-alloc.mlir file.

PTX ISA link:
https://docs.nvidia.com/cuda/parallel-thread-execution/#tcgen05-memory-alloc-manage-instructions

Signed-off-by: Durgadoss R <durgadossr at nvidia.com>



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