[all-commits] [llvm/llvm-project] 44f638: CodeGen][NewPM] Port PostRAScheduler to NPM. (#125...

[Christudasan Devadasan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 44f638f88e1dc867bcd973b87bac1eda800b3b7c
      https://github.com/llvm/llvm-project/commit/44f638f88e1dc867bcd973b87bac1eda800b3b7c
  Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
  Date:   2025-02-05 (Wed, 05 Feb 2025)

  Changed paths:
    A llvm/include/llvm/CodeGen/PostRASchedulerList.h
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/Passes/CodeGenPassBuilder.h
    M llvm/include/llvm/Passes/MachinePassRegistry.def
    M llvm/lib/CodeGen/CodeGen.cpp
    M llvm/lib/CodeGen/PostRASchedulerList.cpp
    M llvm/lib/Passes/PassBuilder.cpp
    M llvm/test/CodeGen/AMDGPU/bundle-latency.mir
    M llvm/test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir
    M llvm/test/CodeGen/AMDGPU/hazard-kill.mir
    M llvm/test/CodeGen/AMDGPU/misched-killflags.mir
    M llvm/test/CodeGen/AMDGPU/movrels-bug.mir
    M llvm/test/CodeGen/AMDGPU/post-ra-sched-kill-bundle-use-inst.mir
    M llvm/test/CodeGen/ARM/vldmia-sched.mir
    M llvm/test/CodeGen/Hexagon/bank-conflict-load.mir
    M llvm/test/CodeGen/Hexagon/bank-conflict.mir
    M llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
    M llvm/test/CodeGen/X86/pr27681.mir

  Log Message:
  -----------
  CodeGen][NewPM] Port PostRAScheduler to NPM. (#125798)



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