[all-commits] [llvm/llvm-project] d9af03: [ARM] Ensure FPU Selection can select mode correct...

[Jack Styles via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d9af03ba80475df5edcab7e4d63004f6115aab3a
      https://github.com/llvm/llvm-project/commit/d9af03ba80475df5edcab7e4d63004f6115aab3a
  Author: Jack Styles <jack.styles at arm.com>
  Date:   2025-02-04 (Tue, 04 Feb 2025)

  Changed paths:
    M clang/test/Preprocessor/arm-target-features.c
    M llvm/lib/TargetParser/ARMTargetParser.cpp
    A llvm/test/MC/ARM/cortex-r52-nofp.s
    M llvm/unittests/TargetParser/TargetParserTest.cpp

  Log Message:
  -----------
  [ARM] Ensure FPU Selection can select mode correctly (#124935)

Previously, when selecting a Single Precision FPU, LLVM would ensure all
elements of the Candidate FPU matched the InputFPU that was given.
However, for cases such as Cortex-R52, there are FPU options where not
all fields match exactly, for example NEON Support or Restrictions on
the Registers available.

This change ensures that LLVM can select the FPU correctly, removing the
requirement for Neon Support and Restrictions for the Candidate FPU to
be the same as the InputFPU.



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