[all-commits] [llvm/llvm-project] cae0d6: [AArch64][SDAG] Detect non-zeroes in truncating bu...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cae0d67cbadaecc3ac0123ae68eededb2f9cd0b1
      https://github.com/llvm/llvm-project/commit/cae0d67cbadaecc3ac0123ae68eededb2f9cd0b1
  Author: David Green <david.green at arm.com>
  Date:   2025-02-03 (Mon, 03 Feb 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/AArch64/fsh.ll
    M llvm/test/CodeGen/AArch64/smul_fix.ll
    M llvm/test/CodeGen/AArch64/umul_fix.ll

  Log Message:
  -----------
  [AArch64][SDAG] Detect non-zeroes in truncating buildvectors in fshl lowering (#123597)

A BUILD_VECTOR can implicity shrink the bits of the operands if the
operand types are not legal. For example a v8i16 constant BUILD_VECTOR
might be represented as v8i16 BUILDVECTOR(i32 1, i32 2, ...).
Unfortunately this means that the constants are not accepted by
matchUnaryPredicateImpl, preventing in this case funnel shifts detecting
that all the operands are non-zero. Add a flag to help it match.



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