[all-commits] [llvm/llvm-project] 83cad6: [MLIR][NVVM] Update Float to TF32 conversion Op (#...

[Srinivasa Ravi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 83cad6805d144d941bdda99d71a6df2cf113a76d
      https://github.com/llvm/llvm-project/commit/83cad6805d144d941bdda99d71a6df2cf113a76d
  Author: Srinivasa Ravi <srinivasar at nvidia.com>
  Date:   2025-02-01 (Sat, 01 Feb 2025)

  Changed paths:
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/test/Target/LLVMIR/nvvm/cvt_tf32.mlir
    M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Update Float to TF32 conversion Op (#125048)

This change updates the Float to TF32 conversion MLIR Op to include
lowering to the new intrinsics introduced in sm_100 through ptx8.6:

- `nvvm_f2tf32_rn_satfinite`
- `nvvm_f2tf32_rn_relu_satfinite`
- `nvvm_f2tf32_rz_satfinite`
- `nvvm_f2tf32_rz_relu_satfinite`

PTX Spec Reference:

https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt



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