[all-commits] [llvm/llvm-project] e6d16f: [AMDGPU] Allow unaligned VGPR for ds_read_b96_tr_b...

[Pravin Jagtap via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e6d16f93b329f2f9618d18d0b99c6060e206cf08
      https://github.com/llvm/llvm-project/commit/e6d16f93b329f2f9618d18d0b99c6060e206cf08
  Author: Pravin Jagtap <Pravin.Jagtap at amd.com>
  Date:   2025-01-31 (Fri, 31 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/test/MC/AMDGPU/gfx950-unsupported.s
    M llvm/test/MC/AMDGPU/gfx950_asm_read_tr.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_ds_read_tr.txt

  Log Message:
  -----------
  [AMDGPU] Allow unaligned VGPR for ds_read_b96_tr_b6 (#125169)

All load transpose instructions follow gfx950 standard of even aligned
VGPR except ds_read_b96_tr_b6, which allows unaligned VGPR.

Co-authored-by: Sirish Pande
[Sirish.Pande at amd.com](mailto:Sirish.Pande at amd.com)



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