[all-commits] [llvm/llvm-project] c5840c: [lldb][AArch64] Add register fields for Guarded Co...

[David Spickett via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c5840cc609a3674cf7453a45946f7e4a2a73590b
      https://github.com/llvm/llvm-project/commit/c5840cc609a3674cf7453a45946f7e4a2a73590b
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2025-01-28 (Tue, 28 Jan 2025)

  Changed paths:
    M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
    M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.h
    M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py

  Log Message:
  -----------
  [lldb][AArch64] Add register fields for Guarded Control Stack registers (#124295)

The features and locked registers hold the same bits, the latter
is a lock for the former. Tested with core files and live processes.

I thought about setting a non-zero lock register in the core file,
however:
* We can be pretty sure it's reading correctly because its between
  the 2 other GCS registers in the same core file note.
* I can't make the test case modify lock bits because userspace
can't clear them (without using ptrace) and we don't know what the libc
has locked
  (probably all feature bits).



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