[all-commits] [llvm/llvm-project] 4a00c8: [AArch64] Allow register offset addressing mode fo...

[Csanád Hajdú via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4a00c84fbb74e6bc3e010d9046324488cd612ad4
      https://github.com/llvm/llvm-project/commit/4a00c84fbb74e6bc3e010d9046324488cd612ad4
  Author: Csanád Hajdú <csanad.hajdu at arm.com>
  Date:   2025-01-28 (Tue, 28 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    A llvm/test/CodeGen/AArch64/arm64-prefetch-addrmode.ll

  Log Message:
  -----------
  [AArch64] Allow register offset addressing mode for prefetch (#124534)

Previously instruction selection failed to generate PRFM instructions
with register offsets because `AArch64ISD::PREFETCH` is not a
`MemSDNode`.



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