[all-commits] [llvm/llvm-project] d4af65: [RISCV] Support multiple memory operands in expand...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d4af658323c6e2492ca1224930488c390a08c720
      https://github.com/llvm/llvm-project/commit/d4af658323c6e2492ca1224930488c390a08c720
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-01-27 (Mon, 27 Jan 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
    A llvm/test/CodeGen/RISCV/zdinx-memoperand.ll

  Log Message:
  -----------
  [RISCV] Support multiple memory operands in expandRV32ZdinxStore.

TailMerge can create stores with multiple memory operands. We
need to split all of them instead of assuming there is only one.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications