[all-commits] [llvm/llvm-project] e06b70: [RISCV][NFC] Remove Redundant Inline Asm Logic (#1...
Mingming Liu via All-commits
all-commits at lists.llvm.org
Mon Jan 27 14:44:06 PST 2025
Branch: refs/heads/users/mingmingl-llvm/spr/nfcprecommit
Home: https://github.com/llvm/llvm-project
Commit: e06b7030303b50556f0a96948d03adb84a90e536
https://github.com/llvm/llvm-project/commit/e06b7030303b50556f0a96948d03adb84a90e536
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][NFC] Remove Redundant Inline Asm Logic (#124202)
This was left over from 408659c5b5c7d745042ae71db344d1ed10601512.
Commit: 0ef39a882bb342982929d2c856d7865de147a3c7
https://github.com/llvm/llvm-project/commit/0ef39a882bb342982929d2c856d7865de147a3c7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineCSE.cpp
Log Message:
-----------
MachineCSE: Remove check for subreg on a def operand (#124095)
There are no subregister defs in SSA.
Commit: 378dcf61014b787b3542b917f6296c9fb5ec490c
https://github.com/llvm/llvm-project/commit/378dcf61014b787b3542b917f6296c9fb5ec490c
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaLookup.cpp
A clang/test/Modules/module-local-hidden-friend-2.cppm
Log Message:
-----------
[C++20] [Modules] Fix may-be incorrect ADL for module local entities (#123931)
Close https://github.com/llvm/llvm-project/issues/123815
See the comments for details. We can't get primary context arbitrarily
since the redecl may have different context and information.
There is a TODO for modules specific case, I'd like to make it after
this PR.
Commit: 6735d527f9945fbf50c14a95cbdd66592472d622
https://github.com/llvm/llvm-project/commit/6735d527f9945fbf50c14a95cbdd66592472d622
Author: Cinhi Young <cyan at cyano.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.h
M llvm/test/CodeGen/Mips/cconv/vector.ll
M llvm/test/CodeGen/Mips/msa/basic_operations.ll
Log Message:
-----------
[MIPS] [MSA] Widen v2i8, v216 and v2i32 vectors (#123040)
- Widen v2i8, v2i16 and v2i32 vectors so they don't cast back and forth,
and make sure that instructions with correct data unit is being used.
- Handle undef indices for VSHF when lowering VECTOR_SHUFFLE (it crashes
if such index is present).
Commit: 9fecb4f9071740f6c1e665940583e9dceae2beb5
https://github.com/llvm/llvm-project/commit/9fecb4f9071740f6c1e665940583e9dceae2beb5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
[CodeGen] Fix a warning
This patch fixes:
llvm/lib/CodeGen/MachineSink.cpp:1667:22: error: unused variable
'Preheader' [-Werror,-Wunused-variable]
Commit: a001cc0e6cdcfa672b8aff9ce6d14782bb96356a
https://github.com/llvm/llvm-project/commit/a001cc0e6cdcfa672b8aff9ce6d14782bb96356a
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/lib/ExecutionEngine/Orc/Core.cpp
Log Message:
-----------
[ORC] Destroy defunct MaterializationUnits outside the session lock.
MaterializationUnits may contain arbitrary resources that need cleanup. We want
to do this outside the JIT's session lock.
This should fix a lock-order-inversion warning in clang-repl (for details see
https://github.com/llvm/llvm-project/issues/124215).
Commit: c9bc242e387f4a4a3dfcd86561f3ec0ca8a72d62
https://github.com/llvm/llvm-project/commit/c9bc242e387f4a4a3dfcd86561f3ec0ca8a72d62
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/Interpreter/simple-exception.cpp
Log Message:
-----------
[clang-repl] The simple-exception test now passes on arm64-darwin.
Commit: 435609b70c8bbf7bc6b73b04ec8852a9c11376ec
https://github.com/llvm/llvm-project/commit/435609b70c8bbf7bc6b73b04ec8852a9c11376ec
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/griddepcontrol.ll
Log Message:
-----------
[LLVM][NVPTX] Add support for griddepcontrol instruction (#123511)
This commit adds support for griddepcontrol PTX instruction with tests
under griddepcontrol.ll
Commit: fd174f0ff3e793fe96a6663b1488ed159cfe042f
https://github.com/llvm/llvm-project/commit/fd174f0ff3e793fe96a6663b1488ed159cfe042f
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/Interpreter/simple-exception.cpp
Log Message:
-----------
[clang-repl] Try to XFAIL testcase on arm32 without affecting arm64 darwin.
See discussion in https://github.com/llvm/llvm-project/commit/4f0325873faccfbe1.
Commit: 02a30049926bac042a7ee33fa587a4446c9c816f
https://github.com/llvm/llvm-project/commit/02a30049926bac042a7ee33fa587a4446c9c816f
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] preadv(64)/pwritev(64) interception. (#124115)
Commit: f3d2e75ead4e9d6e91712945a430cb036a061f3f
https://github.com/llvm/llvm-project/commit/f3d2e75ead4e9d6e91712945a430cb036a061f3f
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] inotify api for Linux interception. (#124177)
Commit: 6db73fa481beb9184ea8f1103e72e7a5c1d82e31
https://github.com/llvm/llvm-project/commit/6db73fa481beb9184ea8f1103e72e7a5c1d82e31
Author: vporpo <vporpodas at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
Log Message:
-----------
[SandboxVec][Scheduler] Fix clear() to clear all state (#124214)
This patch fixes the scheduler's clear() function to also clear the
ReadyList. Not doing so is a bug and results in crashes when the
ReadyList contains stale instructions, because it was never clered.
Commit: 2f39d138dc38a1fdf4754e4e26dd0aeb7409b13d
https://github.com/llvm/llvm-project/commit/2f39d138dc38a1fdf4754e4e26dd0aeb7409b13d
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
Log Message:
-----------
[DirectX] Handle dx.RawBuffer in DXILResourceAccess (#121725)
This adds handling for raw and structured buffers when lowering resource
access via `llvm.dx.resource.getpointer`.
Fixes #121714
Commit: 6330f1e052dbec842e0d12e3d0cc44996e8663d2
https://github.com/llvm/llvm-project/commit/6330f1e052dbec842e0d12e3d0cc44996e8663d2
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a regression in `PointerAlignment: Left` (#124085)
Don't insert a space between a type declaration r_paren and &/&&.
Fixes #124073.
Commit: 3c79a04cc231fc770d40878fc481868d1f312132
https://github.com/llvm/llvm-project/commit/3c79a04cc231fc770d40878fc481868d1f312132
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
Log Message:
-----------
[AMDGPU] Add amdgpu-sw-lower-lds pass to NPM codegen addIRPasses. (#124102)
This PR adds amdgpu-sw-lower-lds pass to
AMDGPUCodeGenPassBuilder::addIRPasses()
Commit: a9c61e0d7655a11f45f8e94b9481193fba11302e
https://github.com/llvm/llvm-project/commit/a9c61e0d7655a11f45f8e94b9481193fba11302e
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/lib/CodeGen/LiveIntervals.cpp
Log Message:
-----------
[NewPM] LiveIntervals: Check dependencies for invalidation (#123563)
Commit: 9dd5aed4edf029d66f0c25e6ae6fae3dbb5870d8
https://github.com/llvm/llvm-project/commit/9dd5aed4edf029d66f0c25e6ae6fae3dbb5870d8
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_loongarch.h
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_relax_align.s
Log Message:
-----------
[JITLink][LoongArch] Support R_LARCH_ALIGN relaxation (#122259)
Linker relaxation is not implemented for jitlink now. But if
relaxation is enabled by clang, R_LARCH_RELAX and
R_LARCH_ALIGN relocations will be emitted.
This commit adapts lld's algorithm to jitlink. Currently, only
relaxing R_LARCH_ALIGN is implemented. Other relaxable
relocs can be implemented in the future.
Without this, interpreting C++ code using clang-repl or running
ir using lli when relaxation is enabled will occur error: `JIT
session error: Unsupported loongarch relocation:102: R_LARCH_ALIGN`.
Similar to https://github.com/llvm/llvm-project/commit/310473c536dd4837934832d1b5454d212f15d5cc but only implement align.
Commit: 212cdc9a377a1b3ac96be0da20212592ebd2c818
https://github.com/llvm/llvm-project/commit/212cdc9a377a1b3ac96be0da20212592ebd2c818
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/Interpreter/simple-exception.cpp
M compiler-rt/lib/orc/macho_platform.cpp
R compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions.cpp
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
R llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.h
R llvm/include/llvm/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.h
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
R llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.cpp
R llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.h
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.h
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/CompileUtils.cpp
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
R llvm/lib/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.cpp
Log Message:
-----------
Revert "[ORC] Enable JIT support for the compact-unwind frame info format..."
This reverts 4f0325873faccfbe171bae4babceb65975ca892e and follow-up patches
(see below) while I investigate some ongoing failures on the buildbots.
---
Revert "[clang-repl] Try to XFAIL testcase on arm32 without affecting arm64
darwin."
This reverts commit fd174f0ff3e793fe96a6663b1488ed159cfe042f.
Revert "[clang-repl] The simple-exception test now passes on arm64-darwin."
This reverts commit c9bc242e387f4a4a3dfcd86561f3ec0ca8a72d62.
Revert "[ORC] Destroy defunct MaterializationUnits outside the session lock."
This reverts commit a001cc0e6cdcfa672b8aff9ce6d14782bb96356a.
Revert "[ORC] Add explicit narrowing casts to fix build errors."
This reverts commit 26fc07d5d88760ad659599184fd10181287d2d9e.
Revert "[ORC] Enable JIT support for the compact-unwind frame info format on
Darwin."
This reverts commit 4f0325873faccfbe171bae4babceb65975ca892e.
Commit: 45d83ae7df65a3c9843270d970119bc97957d830
https://github.com/llvm/llvm-project/commit/45d83ae7df65a3c9843270d970119bc97957d830
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/lib/Dialect/Math/TestExpandMath.cpp
Log Message:
-----------
[mlir] [math] Fix the precision issue of expand math (#120865)
The convertFloorOp pattern incurs precision loss when floating-point
numbers exceed the representable range of int64. This pattern should be
removed.
Fixes https://github.com/llvm/llvm-project/issues/119836
Commit: 8ef171ee831ff030e5aa81a74d68edc133d0cb4f
https://github.com/llvm/llvm-project/commit/8ef171ee831ff030e5aa81a74d68edc133d0cb4f
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
Log Message:
-----------
[msan] Handle horizontal add/subtract intrinsic by applying to shadow (#124159)
Horizontal add (hadd) and subtract (hsub) are currently heuristically
handled by `maybeHandleSimpleNomemIntrinsic()` (via
`handleUnknownIntrinsic()`), which computes the shadow by bitwise OR'ing
the two operands. This has false positives for hadd/hsub shadows. For
example, suppose the shadows for the two operands are 00000000 and
11111111 respectively. The expected shadow for the result is 00001111,
but `maybeHandleSimpleNomemIntrinsic` would compute it as 11111111.
This patch handles horizontal add using
`handleIntrinsicByApplyingToShadow` (from
https://github.com/llvm/llvm-project/pull/114490), which has no false
positives for hadd/hsub: if each pair of adjacent shadow values is zero
(fully initialized), the result will be zero (fully initialized). More
generally, it is precise for hadd/hsub if at least one of the two
adjacent shadow values in each pair is zero.
It does have some false negatives for hadd/hsub: if we add/subtract two
adjacent non-zero shadow values, some bits of the result may incorrectly
be zero. We consider this an acceptable tradeoff for performance. To
make shadow propagation precise, we want the equivalent of "horizontal
OR", but this is not available. Reducing horizontal OR to (permutation
plus bitwise OR) is left as an exercise for the reader.
Commit: b84b717f093bd081f290cedcc4fecb2abec27868
https://github.com/llvm/llvm-project/commit/b84b717f093bd081f290cedcc4fecb2abec27868
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[CostModel] getTypeBasedIntrinsicInstrCost - add default cost approximations for funnel shifts (#124175)
We only had handling for cases where we had argument data.
Commit: f6253f8fe9ff43f2f09f8e743bb095a84829154a
https://github.com/llvm/llvm-project/commit/f6253f8fe9ff43f2f09f8e743bb095a84829154a
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_reloc_addsub.s
Log Message:
-----------
[JITLink][LoongArch] Add label addition and subtraction relocations (#122262)
Commit: ddd2f57b29661f21308eec0400fa92a6d075b0c6
https://github.com/llvm/llvm-project/commit/ddd2f57b29661f21308eec0400fa92a6d075b0c6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-trunc-nowrap.ll
Log Message:
-----------
[X86] Use NSW/NUW flags on ISD::TRUNCATE nodes to improve X86 PACKSS/PACKUS lowering (#123956)
If the NSW/NUW flags are present, then we can assume the source value is within bounds and saturation will not occur with the PACKSS/PACKUS instructions.
Fixes #87485
Commit: 886adf8fb3ba5ec358a9a4fbe87e4da6b3ae8973
https://github.com/llvm/llvm-project/commit/886adf8fb3ba5ec358a9a4fbe87e4da6b3ae8973
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
Log Message:
-----------
[clang][ExprConst] Let diagnostics point to std::allocator calls (#123744)
Instead of the underlying operator new calls. This fixes a longstanding
FIXME comment in cxx2a-constexpr-dynalloc.cpp.
Commit: ee2722fc882ed5dbc7609686bd998b023c6645b2
https://github.com/llvm/llvm-project/commit/ee2722fc882ed5dbc7609686bd998b023c6645b2
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/avx10_2_512bf16intrin.h
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Sema/SemaX86.cpp
M clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt
M llvm/test/MC/X86/avx10.2-bf16-32-att.s
M llvm/test/MC/X86/avx10.2-bf16-32-intel.s
M llvm/test/MC/X86/avx10.2-bf16-64-att.s
M llvm/test/MC/X86/avx10.2-bf16-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (#123335)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: e289cb545adabd8f7b72c0c4a023dcf640823767
https://github.com/llvm/llvm-project/commit/e289cb545adabd8f7b72c0c4a023dcf640823767
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Host/posix/DomainSocket.cpp
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
Log Message:
-----------
[lldb] Remove more workrounds for Android that have been fixed upstream (#124176)
Issues that were fixed 10+ years ago with Bionic libc.
Commit: bfd9bc274586b0261e16e22ac50d50586a0152e2
https://github.com/llvm/llvm-project/commit/bfd9bc274586b0261e16e22ac50d50586a0152e2
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
Log Message:
-----------
[AMDGPU] SIPeepholeSDWA: Disable on existing SDWA instructions (#124131)
This PR reapplies the changes from PR #123942 which had to be reverted
because of a test failure. The test has been adjusted.
Commit: a6cfde62bb89e595db2bf7bb8ae810293d8edf26
https://github.com/llvm/llvm-project/commit/a6cfde62bb89e595db2bf7bb8ae810293d8edf26
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Host/posix/HostInfoPosix.cpp
Log Message:
-----------
[lldb] Check Android API for existence of getgrgid_r() introduced in 24 (#124182)
Commit: eda16991adeb078647b2d239fcf666ddece5c30a
https://github.com/llvm/llvm-project/commit/eda16991adeb078647b2d239fcf666ddece5c30a
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Host/common/Host.cpp
Log Message:
-----------
[lldb] Enable the use of dladdr() on Android (#124187)
dladdr() was introduced 15 years ago.
Commit: 97df7411fd99eb6b2ee54e0eadece490ae7a5a88
https://github.com/llvm/llvm-project/commit/97df7411fd99eb6b2ee54e0eadece490ae7a5a88
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/TestingGuide.rst
Log Message:
-----------
[llvm][Docs] Make it clear where lit test files live (#124121)
As someone on Discord was understandably confused because the build
directory does contain folder structures that look remarkably like the
source directory.
I used this page to explain it but realised that this must be from when
llvm was a separate repository. So `<user home>/llvm` probably was a
common path.
Now it's in llvm-project. So make that obvious in the instructions.
Commit: 24e70e3930724ce499ad05d669bfbc4423c542e0
https://github.com/llvm/llvm-project/commit/24e70e3930724ce499ad05d669bfbc4423c542e0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/exception.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/leap_second.h
M libcxx/include/__chrono/local_info.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/sys_info.h
M libcxx/include/__chrono/time_zone.h
M libcxx/include/__chrono/time_zone_link.h
M libcxx/include/__chrono/tzdb.h
M libcxx/include/__chrono/tzdb_list.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__config
M libcxx/include/__numeric/pstl.h
M libcxx/include/execution
M libcxx/include/iosfwd
M libcxx/include/syncstream
M libcxx/include/version
M libcxx/modules/std/iosfwd.inc
M libcxx/modules/std/syncstream.inc
M libcxx/test/libcxx/experimental/fexperimental-library.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/syncstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/support/test_macros.h
M libcxx/test/tools/clang_tidy_checks/internal_ftm_use.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Switch experimental library macros to 0/1 macros (#124030)
This is a continuation of what's been started in #89178.
As a drive-by, this also changes the PSTL macro to say `EXPERIMENTAL`
instead of `INCOMPLETE`.
Commit: 196f7c2a4f472074668451c5ecc40e82731940f7
https://github.com/llvm/llvm-project/commit/196f7c2a4f472074668451c5ecc40e82731940f7
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/ValueMapper.h
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
Log Message:
-----------
[Utils] Identity map module-level debug info on first use in CloneFunction* (#118627)
Summary:
To avoid cloning module-level debug info (owned by the module rather
than the function), CloneFunction implementation used to eagerly
identity map such debug info into ValueMap's MD map. In larger modules
with meaningful volume of debug info this gets very expensive.
By passing such debug info metadata via an IdentityMD set for the
ValueMapper to map on first use, we get several benefits:
1. Mapping metadata is not cheap, particularly because of tracking. When
cloning a Function we identity map lots of global module-level
metadata to avoid cloning it, while only a fraction of it is actually
used by the function. Mapping on first use is a lot faster for
modules with meaningful amount of debug info.
2. Eagerly identity mapping metadata makes it harder to cache
module-level data (e.g. a set of metadata nodes in a \a DICompileUnit).
With this patch we can cache certain module-level metadata
calculations to speed things up further.
Anecdata from compiling a sample cpp file with full debug info shows that this moderately speeds up
CoroSplitPass which is one of the heavier users of cloning:
| | Baseline | IdentityMD set |
|-----------------|----------|----------------|
| CoroSplitPass | 306ms | 221ms |
| CoroCloner | 101ms | 72ms |
| Speed up | 1x | 1.4x |
Test Plan:
ninja check-llvm-unit
ninja check-llvm
Commit: df3bc54eff3baaa0ad2492b858029bcbf258a5d7
https://github.com/llvm/llvm-project/commit/df3bc54eff3baaa0ad2492b858029bcbf258a5d7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
Log Message:
-----------
[flang] Avoid repeated hash lookups (NFC) (#124230)
Commit: 990837f91de329b1e045f90fadb86ffe21611d9a
https://github.com/llvm/llvm-project/commit/990837f91de329b1e045f90fadb86ffe21611d9a
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/invalid.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
Log Message:
-----------
[mlir][arith][tensor] Disable index type for bitcast (#121455)
Fixes #121397.
Commit: 1fa56038f6ea2b35e7b51d8151cfe7dfcb3abcf3
https://github.com/llvm/llvm-project/commit/1fa56038f6ea2b35e7b51d8151cfe7dfcb3abcf3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
Log Message:
-----------
[CostModel][X86] getIntrinsicInstrCost - lrint/llrint costs can use getCastInstrCost without argument data
We don't use the IntrinsicCostAttributes arguments so, which allows us to use in type-only analysis in a future patch.
Commit: b4ef11d0e20b8263012613697503533fbb2119d6
https://github.com/llvm/llvm-project/commit/b4ef11d0e20b8263012613697503533fbb2119d6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124228)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect Source to be nonnull.
Commit: 148da06628507123f340c68b0ba732c31c3b6de9
https://github.com/llvm/llvm-project/commit/148da06628507123f340c68b0ba732c31c3b6de9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Sema/SemaInternal.h
Log Message:
-----------
[Sema] Migrate away from PointerUnion::dyn_cast (NFC) (#124229)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect UPP.first to be nonnull.
Commit: 1c0af8dced4a38967f3cb2d93fb6576535bc748b
https://github.com/llvm/llvm-project/commit/1c0af8dced4a38967f3cb2d93fb6576535bc748b
Author: gbMattN <146744444+gbMattN at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
A compiler-rt/test/tysan/ignorelist.c
A compiler-rt/test/tysan/ignorelist.h
A compiler-rt/test/tysan/preprocessor.c
Log Message:
-----------
[TySan] Added tests for methods of ignoring instrumentation (#124125)
TySan supports some preprocessor checks and ignorelists, but they are
currently untested. This PR adds some tests to make sure they all work.
@fhahn @AaronBallman, this is based off the discussion in the
documentation PR [#123595]
Commit: 4b6fc4934685c26f223e435d62b02b60544f76d3
https://github.com/llvm/llvm-project/commit/4b6fc4934685c26f223e435d62b02b60544f76d3
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/Contributing.rst
M llvm/docs/DeveloperPolicy.rst
Log Message:
-----------
[llvm][Docs] Clarify the process for requesting a merge on your behalf (#124154)
This makes it more clear what you the author must do, and what reviewers
can expect you to do, before an approved PR can be merged. Spliting out
the email bit into a section also means we can link directly to it in
discussions.
This relies on one of those parties actually reading this, but I plan to
tackle the case where they don't with some new automation.
Commit: 0510d4ea59a185db453b5910f307e1c6e9184589
https://github.com/llvm/llvm-project/commit/0510d4ea59a185db453b5910f307e1c6e9184589
Author: Karlo Basioli <68535415+basioli-k at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel]Fix bazel build after 631a6e0004e57ca85569b99ea411418627925697
Commit: 865104a1042e824254b130c00c7f8ee0e0e0f6c5
https://github.com/llvm/llvm-project/commit/865104a1042e824254b130c00c7f8ee0e0e0f6c5
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
Log Message:
-----------
[AArch64][SME] Change output class of FORM_TRANSPOSED_REG_TUPLE pseudos (#123755)
The FORM_TRANSPOSED_REG_TUPLE pseudo nodes use either the ZPR2Mul2
or ZPR4Mul4 register classes for output. This patch changes the class
so that these can be extended to other multi-vector intrinsics which
instead create a ZPR2/ZPR4 register sequence.
Commit: 77465967130a502eb092a710a2f18be23ef2efff
https://github.com/llvm/llvm-project/commit/77465967130a502eb092a710a2f18be23ef2efff
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr.ll
Log Message:
-----------
[SLP][X86] Add VBMI2 coverage for funnel shift tests
VBMI2 CPUs actually have vector funnel shift instruction support
Commit: aff1242b8ee8b75d68812337f8e408a1405ab00f
https://github.com/llvm/llvm-project/commit/aff1242b8ee8b75d68812337f8e408a1405ab00f
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
Log Message:
-----------
[LV] Align debug location of the widen-phi to the original phi. (#120338)
This patch align the debug location of the widen-phi to the debug
location of original phi.
Split from: #120054
Commit: 3208801aec1867b83335418d84ee09b773ef5b2e
https://github.com/llvm/llvm-project/commit/3208801aec1867b83335418d84ee09b773ef5b2e
Author: David Green <david.green at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Add some bf16 GISel test coverage. NFC
Most of this is mis-compiling with +fullfp16 and should be disabled for GISel.
Commit: f8a56df36e39b01af667f2e7823d5c1d8bab73ee
https://github.com/llvm/llvm-project/commit/f8a56df36e39b01af667f2e7823d5c1d8bab73ee
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
Log Message:
-----------
AMDGPU/GlobalISel: AMDGPURegBankSelect (#112863)
Assign register banks to virtual registers. Does not use generic
RegBankSelect. After register bank selection all register operand of
G_ instructions have LLT and register banks exclusively. If they had
register class, reassign appropriate register bank.
Assign register banks using machine uniformity analysis:
Sgpr - uniform values and some lane masks
Vgpr - divergent, non S1, values
Vcc - divergent S1 values(lane masks)
AMDGPURegBankSelect does not consider available instructions and, in
some cases, G_ instructions with some register bank assignment can't be
inst-selected. This is solved in RegBankLegalize.
Exceptions when uniformity analysis does not work:
S32/S64 lane masks:
- need to end up with sgpr register class after instruction selection
- In most cases Uniformity analysis declares them as uniform
(forced by tablegen) resulting in sgpr S32/S64 reg bank
- When Uniformity analysis declares them as divergent (some phis),
use intrinsic lane mask analyzer to still assign sgpr register bank
temporal divergence copy:
- COPY to vgpr with implicit use of $exec inside of the cycle
- this copy is declared as uniform by uniformity analysis
- make sure that assigned bank is vgpr
Note: uniformity analysis does not consider that registers with vgpr def
are divergent (you can have uniform value in vgpr).
- TODO: implicit use of $exec could be implemented as indicator
that instruction is divergent
Commit: 625e0a40f1a97d181a4641f604495b6aea433bd8
https://github.com/llvm/llvm-project/commit/625e0a40f1a97d181a4641f604495b6aea433bd8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
Log Message:
-----------
[SLP][X86] Add missing SSE2/SSE4 checks from vector rotate tests
Commit: 9bb3c62948d0c6dd3fb233186ae6a79744012b8f
https://github.com/llvm/llvm-project/commit/9bb3c62948d0c6dd3fb233186ae6a79744012b8f
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/test/Driver/fast-math.f90
Log Message:
-----------
[Flang][Driver] Deprecate Ofast (#101701)
This is subject to agreement by the Flang community
(https://discourse.llvm.org/t/rfc-deprecate-ofast-in-flang/80243).
Commit: e6030d389571b3f1b0f0c5a35b7fa45937ed0f6c
https://github.com/llvm/llvm-project/commit/e6030d389571b3f1b0f0c5a35b7fa45937ed0f6c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Use std::allocator calls for Descriptor source (#123900)
... for the dynamic blocks created for operator new calls. This way we
get the type of memory allocated right. As a side-effect, the
diagnostics now point to the std::allocator calls, which is an
improvement.
Commit: 8e702735090388a3231a863e343f880d0f96fecb
https://github.com/llvm/llvm-project/commit/8e702735090388a3231a863e343f880d0f96fecb
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/IRMutator.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/BPF/BPFASpaceCastSimplifyPass.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/DivRemPairs.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopSink.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/Sink.cpp
M llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
M llvm/lib/Transforms/Utils/GuardUtils.cpp
M llvm/lib/Transforms/Utils/Instrumentation.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/tools/llvm-stress/llvm-stress.cpp
M llvm/unittests/Analysis/AssumeBundleQueriesTest.cpp
M llvm/unittests/Analysis/CGSCCPassManagerTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/IR/LegacyPassManagerTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/Support/ScopHelper.cpp
Log Message:
-----------
[NFC][DebugInfo] Use iterator moveBefore at many call-sites (#123583)
As part of the "RemoveDIs" project, BasicBlock::iterator now carries a
debug-info bit that's needed when getFirstNonPHI and similar feed into
instruction insertion positions. Call-sites where that's necessary were
updated a year ago; but to ensure some type safety however, we'd like to
have all calls to moveBefore use iterators.
This patch adds a (guaranteed dereferenceable) iterator-taking
moveBefore, and changes a bunch of call-sites where it's obviously safe
to change to use it by just calling getIterator() on an instruction
pointer. A follow-up patch will contain less-obviously-safe changes.
We'll eventually deprecate and remove the instruction-pointer
insertBefore, but not before adding concise documentation of what
considerations are needed (very few).
Commit: dac49e8ddd5dc0104c238f09cdd532e6fb5c4f1d
https://github.com/llvm/llvm-project/commit/dac49e8ddd5dc0104c238f09cdd532e6fb5c4f1d
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[Arm] Fix generating code with UB in NeonEmitter (#121802)
When generating `arm_neon.h`, NeonEmitter outputs code that
violates strict aliasing rules (C23 6.5 Expressions #7,
C++23 7.2.1 Value category [basic.lval] #11), for example:
bfloat16_t __reint = __p0;
uint32_t __reint1 = (uint32_t)(*(uint16_t *) &__reint) << 16;
__ret = *(float32_t *) &__reint1;
This patch fixed the offending code by replacing it with
a call to `__builtin_bit_cast`.
Commit: 33fc477e6e2614f71541f4287c1d68757b9203b0
https://github.com/llvm/llvm-project/commit/33fc477e6e2614f71541f4287c1d68757b9203b0
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Update `cxx_dr_status.html`
Commit: 965ff7fa309d4408b4ccf5df7e59fec264c905c5
https://github.com/llvm/llvm-project/commit/965ff7fa309d4408b4ccf5df7e59fec264c905c5
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/sm-version.ll
Log Message:
-----------
[NVPTX] Add SM versions for 101 and 120 (#124155)
This patch adds SM and PTX versions for SM
101, 120 and their arch-accelerated variants.
All these are supported in cuda-12.8.
sm120/120a requires ptx8.7 and the rest require ptx8.6.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 0ee037b861f94604907d95d0ff0ff87805b52428
https://github.com/llvm/llvm-project/commit/0ee037b861f94604907d95d0ff0ff87805b52428
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
Log Message:
-----------
AMDGPU/GlobalISel: AMDGPURegBankLegalize (#112864)
Lower G_ instructions that can't be inst-selected with register bank
assignment from AMDGPURegBankSelect based on uniformity analysis.
- Lower instruction to perform it on assigned register bank
- Put uniform value in vgpr because SALU instruction is not available
- Execute divergent instruction in SALU - "waterfall loop"
Given LLTs on all operands after legalizer, some register bank
assignments require lowering while other do not.
Note: cases where all register bank assignments would require lowering
are lowered in legalizer.
AMDGPURegBankLegalize goals:
- Define Rules: when and how to perform lowering
- Goal of defining Rules it to provide high level table-like brief
overview of how to lower generic instructions based on available
target features and uniformity info (uniform vs divergent).
- Fast search of Rules, depends on how complicated Rule.Predicate is
- For some opcodes there would be too many Rules that are essentially
all the same just for different combinations of types and banks.
Write custom function that handles all cases.
- Rules are made from enum IDs that correspond to each operand.
Names of IDs are meant to give brief description what lowering does
for each operand or the whole instruction.
- AMDGPURegBankLegalizeHelper implements lowering algorithms
Since this is the first patch that actually enables -new-reg-bank-select
here is the summary of regression tests that were added earlier:
- if instruction is uniform always select SALU instruction if available
- eliminate back to back vgpr to sgpr to vgpr copies of uniform values
- fast rules: small differences for standard and vector instruction
- enabling Rule based on target feature - salu_float
- how to specify lowering algorithm - vgpr S64 AND to S32
- on G_TRUNC in reg, it is up to user to deal with truncated bits
G_TRUNC in reg is treated as no-op.
- dealing with truncated high bits - ABS S16 to S32
- sgpr S1 phi lowering
- new opcodes for vcc-to-scc and scc-to-vcc copies
- lowering for vgprS1-to-vcc copy (formally this is vgpr-to-vcc G_TRUNC)
- S1 zext and sext lowering to select
- uniform and divergent S1 AND(OR and XOR) lowering - inst-selected into
SALU instruction
- divergent phi with uniform inputs
- divergent instruction with temporal divergent use, source instruction
is defined as uniform(AMDGPURegBankSelect) - missing temporal
divergence lowering
- uniform phi, because of undef incoming, is assigned to vgpr. Will be
fixed in AMDGPURegBankSelect via another fix in machine uniformity
analysis.
Commit: 88136f96452952b85b9c40e185b929e561e6e59f
https://github.com/llvm/llvm-project/commit/88136f96452952b85b9c40e185b929e561e6e59f
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Canonicalize gathers/scatters with trivial offsets (#117939)
Canonicalize gathers/scatters with contiguous (i.e. [0, 1, 2, ...])
offsets into vector masked load/store ops.
Commit: 46a08ce83262767b3aae5c9828fabcd13f2e8a96
https://github.com/llvm/llvm-project/commit/46a08ce83262767b3aae5c9828fabcd13f2e8a96
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidyProfiling.cpp
M clang-tools-extra/clang-tidy/ClangTidyProfiling.h
Log Message:
-----------
[clang-tidy][NFC] simplify `TimerGroup` in `ClangTidyProfiling` (#123958)
`TimerGroup` don't need to use as field of `ClangTidyProfiling`.
We can construct it local during destructing.
Commit: 8e6d6a55108c7979f0392bf8ad3444c92a2474e9
https://github.com/llvm/llvm-project/commit/8e6d6a55108c7979f0392bf8ad3444c92a2474e9
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] improve performance misc-unused-using-decls (#123454)
skip header file before register AST Matchers
it can avoid to matcher lots of ast node when lint header file
Commit: 4831fa8632f6ab89fe2c14b8e7ec09500e43c099
https://github.com/llvm/llvm-project/commit/4831fa8632f6ab89fe2c14b8e7ec09500e43c099
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for load (#112882)
Add IDs for bit width that cover multiple LLTs: B32 B64 etc.
"Predicate" wrapper class for bool predicate functions used to
write pretty rules. Predicates can be combined using &&, || and !.
Lowering for splitting and widening loads.
Write rules for loads to not change existing mir tests from old
regbankselect.
Commit: 5ce349589a4adcc18f5807551bf4b78091746aa8
https://github.com/llvm/llvm-project/commit/5ce349589a4adcc18f5807551bf4b78091746aa8
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroCloner.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[Coro] Prebuild a module-level debug info set and share it between all coroutine clones (#118628)
Summary:
CoroCloner, by calling into CloneFunctionInto, does a lot of repeated
work priming DIFinder and building a list of common module-level debug
info metadata. For programs compiled with full debug info this can get
very expensive.
This diff builds the data once and shares it between all clones.
Anecdata for a sample cpp source file compiled with full debug info:
| | Baseline | IdentityMD set | Prebuilt CommonDI (cur.) |
|-----------------|----------|----------------|--------------------------|
| CoroSplitPass | 306ms | 221ms | 68ms |
| CoroCloner | 101ms | 72ms | 0.5ms |
| CollectCommonDI | - | - | 63ms |
| Speed up | 1x | 1.4x | 4.5x |
Note that CollectCommonDebugInfo happens once *per coroutine* rather than per clone.
Test Plan:
ninja check-llvm-unit
ninja check-llvm
Compiled a sample internal source file, checked time trace output for scope timings.
Commit: b60c118f53e6f7e5328e54dc26b4d6787030c02b
https://github.com/llvm/llvm-project/commit/b60c118f53e6f7e5328e54dc26b4d6787030c02b
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSSAContext.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
Log Message:
-----------
MachineUniformityAnalysis: Improve isConstantOrUndefValuePhi (#112866)
Change existing code for G_PHI to match what LLVM-IR version is doing
via PHINode::hasConstantOrUndefValue. This is not safe for regular PHI
since it may appear with an undef operand and getVRegDef can fail.
Most notably this improves number of values that can be allocated
to sgpr in AMDGPURegBankSelect.
Common case here are phis that appear in structurize-cfg lowering
for cycles with multiple exits:
Undef incoming value is coming from block that reached cycle exit
condition, if other incoming is uniform keep the phi uniform despite
the fact it is joining values from pair of blocks that are entered
via divergent condition branch.
Commit: 57b48987f6c21e369e7bb1626dc79ca74aa34fdb
https://github.com/llvm/llvm-project/commit/57b48987f6c21e369e7bb1626dc79ca74aa34fdb
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/include/lldb/Symbol/Function.h
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Symbol/Function.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-function.s
Log Message:
-----------
[lldb] Use the first address range as the function address (#122440)
This is the behavior expected by DWARF. It also requires some fixups to
algorithms which were storing the addresses of some objects (Blocks and
Variables) relative to the beginning of the function.
There are plenty of things that still don't work in this setups, but
this change is sufficient for the expression evaluator to correctly
recognize the entry point of a function in this case.
Commit: acc13dbe4dcbfeafec24211148683a8b7e9c4cf0
https://github.com/llvm/llvm-project/commit/acc13dbe4dcbfeafec24211148683a8b7e9c4cf0
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[libc][workflow] improve ci coverage with windows-2025 and arm ubuntu (#123745)
Add the following workflows:
- `fullbuild` on aarch64 ubuntu
- `overlay` on windows 2025
- `overlay` on aarch64 ubuntu
`ccache` variant is used on `aarch64` due to
https://github.com/hendrikmuhs/ccache-action/issues/279
Commit: d6e0798a2a7cef94b2457f39c93f7083aaebd29d
https://github.com/llvm/llvm-project/commit/d6e0798a2a7cef94b2457f39c93f7083aaebd29d
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
A llvm/test/CodeGen/Mips/llvm-ir/sdiv-freebsd.ll
Log Message:
-----------
[Mips] Add the missing judgment when processing function handleMFLOSlot (#121463)
In function handleMFLOSlot, we may get a variable LastInstInFunction
with a value of true from function getNextMachineInstr and IInSlot may
be null which would trigger an assert.
So we need to skip this case.
Fix #118223.
Commit: b4e81fd1eb2231b06eaca66e71ecb83cffb88f52
https://github.com/llvm/llvm-project/commit/b4e81fd1eb2231b06eaca66e71ecb83cffb88f52
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/include/clang/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
Log Message:
-----------
[gn] port 4018317407006b2c63
Commit: eb206e9ea84eff0a0596fed2de8316d924f946d1
https://github.com/llvm/llvm-project/commit/eb206e9ea84eff0a0596fed2de8316d924f946d1
Author: Andrea Faulds <andrea.faulds at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/docs/Dialects/GPU.md
M mlir/docs/ReleaseNotes.md
M mlir/docs/SPIRVToLLVMDialectConversion.md
M mlir/lib/ExecutionEngine/VulkanRuntimeWrappers.cpp
M mlir/test/CMakeLists.txt
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-addi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-cmpi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-constants-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-max-min-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-muli-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shli-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrsi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrui-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-sitofp-i32.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-uitofp-i32.mlir
M mlir/test/Integration/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
M mlir/test/Integration/Dialect/Async/CPU/microbench-scf-async-parallel-for.mlir
M mlir/test/Integration/Dialect/Async/CPU/test-async-parallel-for-1d.mlir
M mlir/test/Integration/Dialect/Async/CPU/test-async-parallel-for-2d.mlir
M mlir/test/Integration/Dialect/Complex/CPU/correctness.mlir
M mlir/test/Integration/Dialect/ControlFlow/assert.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-complex-sparse-constant.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/matmul-vs-matvec.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/rank-reducing-subview.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/runtime-verification.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-collapse-tensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-nwc-wcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-nhwc-hwcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-ndhwc-dhwcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-elementwise.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-expand-tensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-matmul-masked-vec.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-one-shot-bufferize.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-padtensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-subtensor-insert-multiple-uses.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-subtensor-insert.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-tensor-e2e.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-tensor-matmul.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Math/CPU/mathtofuncs_ctlz.mlir
M mlir/test/Integration/Dialect/MemRef/cast-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/load-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/print-memref.mlir
M mlir/test/Integration/Dialect/MemRef/reinterpret-cast-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/subview-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/verify-memref.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/block.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/block_majors.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_0.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_0_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_bf16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dual_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/iterator-based-kernel.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/padded_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/reshape_dot.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_abs.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_binary.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cmp.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_dim.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_foreach.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_collapse_shape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex32.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex64.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_constant_to_sparse_tensor.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_1d_nwc_wcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_55.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nchw_fchw.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d_ndhwc_dhwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_block.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_dyn.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_element.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_ptr.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2dense.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2sparse.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_coo_test.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_dilated_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_dot.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_empty.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_expand.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_expand_shape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_foreach_slices.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_generate.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_1d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_loose.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matmul_slice.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matrix_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_mult_elt.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_reduction.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pooling_nhwc.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_re_im.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom_prod.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom_sum.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions_min.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions_prod.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reshape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_push_back.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_sort_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scf_nested.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_select.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_semiring_select.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sign.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sorted_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_storage.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_strided_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_bf16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_c32.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tanh.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tensor_mul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tensor_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_transpose.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_transpose_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_vector_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-hand.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-prune.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-gemm-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec-const.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-mma-2-4-f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sampled-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sddmm-lib.mlir
M mlir/test/Integration/Dialect/Standard/CPU/test-ceil-floor-pos-neg.mlir
M mlir/test/Integration/Dialect/Standard/CPU/test_subview.mlir
M mlir/test/Integration/Dialect/Tosa/CPU/test-fully-connected.mlir
M mlir/test/Integration/Dialect/Tosa/CPU/test-maxpool-dynamic.mlir
M mlir/test/Integration/Dialect/Vector/CPU/0-d-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/broadcast.mlir
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/constant-mask.mlir
M mlir/test/Integration/Dialect/Vector/CPU/contraction.mlir
M mlir/test/Integration/Dialect/Vector/CPU/create-mask-v4i1.mlir
M mlir/test/Integration/Dialect/Vector/CPU/create-mask.mlir
M mlir/test/Integration/Dialect/Vector/CPU/expand.mlir
M mlir/test/Integration/Dialect/Vector/CPU/extract-strided-slice.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/fma.mlir
M mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
M mlir/test/Integration/Dialect/Vector/CPU/index-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/insert-strided-slice.mlir
M mlir/test/Integration/Dialect/Vector/CPU/interleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedload.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-i64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-fp.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-int.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-str.mlir
M mlir/test/Integration/Dialect/Vector/CPU/realloc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f32-reassoc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f64-reassoc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-si4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-ui4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/rewrite-narrow-types.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scan.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shape-cast.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shuffle.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shuffle16x16.mlir
M mlir/test/Integration/Dialect/Vector/CPU/sparse-dot-matvec.mlir
M mlir/test/Integration/Dialect/Vector/CPU/sparse-saxpy-jagged-matvec.mlir
M mlir/test/Integration/Dialect/Vector/CPU/test-deinterleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-to-loops.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-write.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transpose.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f16-f16-accum.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f32.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f16.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32-bare-ptr.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-and.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-maxsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-minsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-op.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-or.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-region.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-xor.mlir
M mlir/test/Integration/GPU/CUDA/alloc-host-shared.mlir
M mlir/test/Integration/GPU/CUDA/assert.mlir
M mlir/test/Integration/GPU/CUDA/async.mlir
M mlir/test/Integration/GPU/CUDA/gpu-to-cubin.mlir
M mlir/test/Integration/GPU/CUDA/multiple-all-reduce.mlir
M mlir/test/Integration/GPU/CUDA/printf.mlir
M mlir/test/Integration/GPU/CUDA/shuffle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/cga_cluster.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x128_stride_noswizzle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir
M mlir/test/Integration/GPU/CUDA/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir
M mlir/test/Integration/GPU/ROCM/printf.mlir
M mlir/test/Integration/GPU/ROCM/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/vecadd.mlir
M mlir/test/Integration/GPU/ROCM/vector-transferops.mlir
M mlir/test/Integration/GPU/SPIRV/double.mlir
M mlir/test/Integration/GPU/SPIRV/simple_add.mlir
M mlir/test/Integration/GPU/SYCL/gpu-addf32-to-spirv.mlir
M mlir/test/Integration/GPU/SYCL/gpu-addi64-to-spirv.mlir
M mlir/test/Integration/GPU/SYCL/gpu-reluf32-to-spirv.mlir
M mlir/test/Integration/GPU/Vulkan/addf.mlir
M mlir/test/Integration/GPU/Vulkan/addf_if.mlir
M mlir/test/Integration/GPU/Vulkan/addi.mlir
M mlir/test/Integration/GPU/Vulkan/addi8.mlir
M mlir/test/Integration/GPU/Vulkan/addui_extended.mlir
M mlir/test/Integration/GPU/Vulkan/mulf.mlir
M mlir/test/Integration/GPU/Vulkan/smul_extended.mlir
M mlir/test/Integration/GPU/Vulkan/subf.mlir
M mlir/test/Integration/GPU/Vulkan/time.mlir
M mlir/test/Integration/GPU/Vulkan/umul_extended.mlir
M mlir/test/Integration/GPU/Vulkan/vector-deinterleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-interleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-shuffle.mlir
M mlir/test/Integration/lit.local.cfg
M mlir/test/lit.cfg.py
M mlir/test/lit.site.cfg.py.in
R mlir/test/mlir-cpu-runner/X86Vector/lit.local.cfg
R mlir/test/mlir-cpu-runner/X86Vector/math-polynomial-approx-avx2.mlir
R mlir/test/mlir-cpu-runner/async-error.mlir
R mlir/test/mlir-cpu-runner/async-func.mlir
R mlir/test/mlir-cpu-runner/async-group.mlir
R mlir/test/mlir-cpu-runner/async-value.mlir
R mlir/test/mlir-cpu-runner/async.mlir
R mlir/test/mlir-cpu-runner/bare-ptr-call-conv.mlir
R mlir/test/mlir-cpu-runner/copy.mlir
R mlir/test/mlir-cpu-runner/expand-arith-ops.mlir
R mlir/test/mlir-cpu-runner/global-constructors.mlir
R mlir/test/mlir-cpu-runner/global-memref.mlir
R mlir/test/mlir-cpu-runner/invalid.mlir
R mlir/test/mlir-cpu-runner/lit.local.cfg
R mlir/test/mlir-cpu-runner/math-polynomial-approx.mlir
R mlir/test/mlir-cpu-runner/memref-reinterpret-cast.mlir
R mlir/test/mlir-cpu-runner/memref-reshape.mlir
R mlir/test/mlir-cpu-runner/sgemm-naive-codegen.mlir
R mlir/test/mlir-cpu-runner/simple.mlir
R mlir/test/mlir-cpu-runner/test-expand-math-approx.mlir
R mlir/test/mlir-cpu-runner/unranked-memref.mlir
R mlir/test/mlir-cpu-runner/utils.mlir
R mlir/test/mlir-cpu-runner/verify-entry-point-result.mlir
R mlir/test/mlir-cpu-runner/verify-flags.mlir
R mlir/test/mlir-cpu-runner/x86-varargs.mlir
A mlir/test/mlir-runner/X86Vector/lit.local.cfg
A mlir/test/mlir-runner/X86Vector/math-polynomial-approx-avx2.mlir
A mlir/test/mlir-runner/async-error.mlir
A mlir/test/mlir-runner/async-func.mlir
A mlir/test/mlir-runner/async-group.mlir
A mlir/test/mlir-runner/async-value.mlir
A mlir/test/mlir-runner/async.mlir
A mlir/test/mlir-runner/bare-ptr-call-conv.mlir
A mlir/test/mlir-runner/copy.mlir
A mlir/test/mlir-runner/expand-arith-ops.mlir
A mlir/test/mlir-runner/global-constructors.mlir
A mlir/test/mlir-runner/global-memref.mlir
A mlir/test/mlir-runner/invalid.mlir
A mlir/test/mlir-runner/lit.local.cfg
A mlir/test/mlir-runner/math-polynomial-approx.mlir
A mlir/test/mlir-runner/memref-reinterpret-cast.mlir
A mlir/test/mlir-runner/memref-reshape.mlir
A mlir/test/mlir-runner/sgemm-naive-codegen.mlir
A mlir/test/mlir-runner/simple.mlir
A mlir/test/mlir-runner/test-expand-math-approx.mlir
A mlir/test/mlir-runner/unranked-memref.mlir
A mlir/test/mlir-runner/utils.mlir
A mlir/test/mlir-runner/verify-entry-point-result.mlir
A mlir/test/mlir-runner/verify-flags.mlir
A mlir/test/mlir-runner/x86-varargs.mlir
M mlir/tools/CMakeLists.txt
R mlir/tools/mlir-cpu-runner/CMakeLists.txt
R mlir/tools/mlir-cpu-runner/mlir-cpu-runner.cpp
A mlir/tools/mlir-runner/CMakeLists.txt
A mlir/tools/mlir-runner/mlir-runner.cpp
Log Message:
-----------
[mlir] Rename mlir-cpu-runner to mlir-runner (#123776)
With the removal of mlir-vulkan-runner (as part of #73457) in
e7e3c45bc70904e24e2b3221ac8521e67eb84668, mlir-cpu-runner is now the
only runner for all CPU and GPU targets, and the "cpu" name has been
misleading for some time already. This commit renames it to mlir-runner.
Commit: a5cc897cdedfdca018a83fac5734ebe086acb817
https://github.com/llvm/llvm-project/commit/a5cc897cdedfdca018a83fac5734ebe086acb817
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port 0ee037b861f9
Commit: 6292a808b3524d9ba6f4ce55bc5b9e547b088dd8
https://github.com/llvm/llvm-project/commit/6292a808b3524d9ba6f4ce55bc5b9e547b088dd8
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/Transforms/Utils/Instrumentation.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopNestAnalysis.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/Transforms/Coroutines/MaterializationUtils.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARC.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/SCCP.cpp
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/MoveAutoInit.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/tools/llvm-reduce/deltas/ReduceBasicBlocks.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/Analysis/ProfileSummaryInfoTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/Transforms/Scalar/LICMTest.cpp
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/CodeGen/LoopGenerators.cpp
M polly/lib/Transform/MaximalStaticExpansion.cpp
Log Message:
-----------
[NFC][DebugInfo] Use iterator-flavour getFirstNonPHI at many call-sites (#123737)
As part of the "RemoveDIs" project, BasicBlock::iterator now carries a
debug-info bit that's needed when getFirstNonPHI and similar feed into
instruction insertion positions. Call-sites where that's necessary were
updated a year ago; but to ensure some type safety however, we'd like to
have all calls to getFirstNonPHI use the iterator-returning version.
This patch changes a bunch of call-sites calling getFirstNonPHI to use
getFirstNonPHIIt, which returns an iterator. All these call sites are
where it's obviously safe to fetch the iterator then dereference it. A
follow-up patch will contain less-obviously-safe changes.
We'll eventually deprecate and remove the instruction-pointer
getFirstNonPHI, but not before adding concise documentation of what
considerations are needed (very few).
---------
Co-authored-by: Stephen Tozer <Melamoto at gmail.com>
Commit: 02c6002d1cd2dabe4b98368f91e7b4395e5ab11d
https://github.com/llvm/llvm-project/commit/02c6002d1cd2dabe4b98368f91e7b4395e5ab11d
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
M lldb/test/API/linux/aarch64/gcs/main.c
Log Message:
-----------
[lldb][AArch64] Add Guarded Control Stack registers (#123720)
The Guarded Control Stack extension implements a shadow stack and the
Linux kernel provides access to 3 registers for it via ptrace.
struct user_gcs {
__u64 features_enabled;
__u64 features_locked;
__u64 gcspr_el0;
};
This commit adds support for reading those from a live process.
The first 2 are pseudo registers based on the real control register and
the 3rd is a real register. This is the stack pointer for the guarded
stack.
I have added a "gcs_" prefix to the "features" registers so that they
have a clear name when shown individually. Also this means they will tab
complete from "gcs", and be next to gcspr_el0 in any sorted lists of
registers.
Guarded Control Stack Registers:
gcs_features_enabled = 0x0000000000000000
gcs_features_locked = 0x0000000000000000
gcspr_el0 = 0x0000000000000000
Testing is more of the usual, where possible I'm writing a register then
doing something in the program to confirm the value was actually sent to
ptrace.
Commit: 11b040192640ef3b1f481124c440f464ed6ec86a
https://github.com/llvm/llvm-project/commit/11b040192640ef3b1f481124c440f464ed6ec86a
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-alias.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected
Log Message:
-----------
[AMDGPU] Restore SP from saved-FP or saved-BP (#124007)
Currently, the AMDGPU backend bumps the Stack Pointer
by fixed size offsets in the prolog of device functions, and
restores it by the same amount in the epilog.
Prolog:
sp += frameSize
Epilog:
sp -= frameSize
If a function has dynamic stack realignment,
Prolog:
sp += frameSize + max_alignment
Epilog:
sp -= frameSize + max_alignment
These calculations are not optimal in case of dynamic
stack realignment, and completely fail in case of
dynamic stack readjustment.
This patch uses the saved Frame Pointer to restore SP.
Prolog:
fp = sp
sp += frameSize
Epilog:
sp = fp
In case of dynamic stack realignment, SP is restored from
the saved Base Pointer.
Prolog:
fp = sp + (max_alignment - 1)
fp = fp & (-max_alignment)
bp = sp
sp += frameSize + max_alignment
Epilog:
sp = bp
(Note: The presence of BP has been enforced in case of any
dynamic stack realignment.)
---------
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 970094d50b08e694c2302f7ee39b1c33d08f2405
https://github.com/llvm/llvm-project/commit/970094d50b08e694c2302f7ee39b1c33d08f2405
Author: Lou <lou.knauer at sipearl.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
A llvm/test/tools/llvm-opt-report/Inputs/scalable.c
A llvm/test/tools/llvm-opt-report/Inputs/scalable.yaml
A llvm/test/tools/llvm-opt-report/scalabe.test
M llvm/tools/llvm-opt-report/OptReport.cpp
Log Message:
-----------
[llvm-opt-report] Show scalable vectorization factors (#123367)
Scalable vectorization factors are printed as "vscale x VF" where VF is
the known minimum number of elements, a integer. Currently,
llvm-opt-report always expects a integer (like for vectorization with
fixed-sized vectors), and does not display any vectorization factor in
the output (just 'V', but without a number).
This patch adds support for scalable vectorization factors and prints
them as "VNx<VF>", so for example "VNx4". The "Nx" is used to
differentiate between fixed-sized and scalable factors, and is
consistent with the way LLVM mangles scalable vectors in other places.
Commit: e5e55c04d6af4ae32c99d574f59e632595abf607
https://github.com/llvm/llvm-project/commit/e5e55c04d6af4ae32c99d574f59e632595abf607
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
Log Message:
-----------
[GlobalMerge][NFC] Skip sorting by profitability when it is not needed (#124146)
We were previously sorting by profitability even if we were choosing to
merge all globals together, which is not impacted by UsedGlobalSet
order.
We can also remove iteration of UsedGlobalSets in reverse order in both
cases. In the first csae, the order does not matter. In the second case,
we just sort by the order we need instead of sorting in the opposite
direction and calling reverse.
This change should only be an improvement on compile time. I have not
measured it, but I think it would never make things worse.
Commit: 77c780d64b950d6850d5ec1ee06cd0c21b38b89e
https://github.com/llvm/llvm-project/commit/77c780d64b950d6850d5ec1ee06cd0c21b38b89e
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port eb206e9ea84eff0a0596fed2de8316d924f946d1
Leave around an alias so users can move at their own pace.
Commit: acde3f722ff3766f6f793884108d342b78623fe4
https://github.com/llvm/llvm-project/commit/acde3f722ff3766f6f793884108d342b78623fe4
Author: Peter Hawkins <phawkins at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/python/mlir/dialects/_ods_common.py
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
Log Message:
-----------
[mlir:python] Compute get_op_result_or_value in PyOpView's constructor. (#123953)
This logic is in the critical path for constructing an operation from
Python. It is faster to compute this in C++ than it is in Python, and it
is a minor change to do this.
This change also alters the API contract of
_ods_common.get_op_results_or_values to avoid calling
get_op_result_or_value on each element of a sequence, since the C++ code
will now do this.
Most of the diff here is simply reordering the code in IRCore.cpp.
Commit: f2b253b9613a858ae3dd5bf5ccbba87b64941688
https://github.com/llvm/llvm-project/commit/f2b253b9613a858ae3dd5bf5ccbba87b64941688
Author: Emma Pilkington <emma.pilkington95 at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
A llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
Log Message:
-----------
[SelectionDAG] Fix an incorrect DebugLoc on a COPY (#122963)
Fixes: SWDEV-502134
Commit: 2068b1ba031e258a6448bea372005d19692c802a
https://github.com/llvm/llvm-project/commit/2068b1ba031e258a6448bea372005d19692c802a
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/test/CodeGen/X86/addcarry.ll
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
M llvm/test/CodeGen/X86/avgflooru-i128.ll
M llvm/test/CodeGen/X86/fmuladd-soft-float.ll
M llvm/test/CodeGen/X86/i128-abi.ll
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
M llvm/test/CodeGen/X86/subcarry.ll
M llvm/test/CodeGen/X86/uadd_sat_vec.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
Log Message:
-----------
[X86] Fix ABI for passing after i128 (#124134)
If we're passing an i128 value and we no longer have enough argument
registers (only r9 unallocated), the value gets passed via the stack.
However, r9 is still allocated as a shadow register, which means that a
following i64 argument will not use it. This doesn't match the x86-64
psABI.
Fix this by making i128 arguments as requiring consecutive registers,
and then adding a custom CC lowering that will allocate both parts of
the i128 at the same time, either to register or to stack, without
reserving a shadow register.
Fixes https://github.com/llvm/llvm-project/issues/123935.
Commit: 9cf52fe1f94fdcd8e27c76f7d33a80eeb2075833
https://github.com/llvm/llvm-project/commit/9cf52fe1f94fdcd8e27c76f7d33a80eeb2075833
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/test/Lower/OpenMP/derived-type-allocatable.f90
Log Message:
-----------
[flang][OpenMP][NFC] test the current private dealloc runtime calls (#124017)
It looks like in most cases we still don't make calls to deallocate
allocatable members of derived types which have been privatized.
This is just intended to add a test for the one case where we do, to
make sure this doesn't regress with my upcoming changes.
Commit: c546b5317c518987a5f45dd4c4d25321a955c758
https://github.com/llvm/llvm-project/commit/c546b5317c518987a5f45dd4c4d25321a955c758
Author: DianQK <dianqk at dianqk.net>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/ValueTracking/implied-condition-samesign.ll
Log Message:
-----------
[ValueTracking] Pass changed predicate `SignedLPred` to `isImpliedByMatchingCmp` (#124271)
Fixes #124267.
Since we are using the new predicate, we should also update the
parameters of `isImpliedByMatchingCmp`.
Commit: a12d7e4b611f0db2525da68f5576beaeeb6c84ac
https://github.com/llvm/llvm-project/commit/a12d7e4b611f0db2525da68f5576beaeeb6c84ac
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
Log Message:
-----------
[SLP] getVectorCallCosts - don't provide scalar argument data for vector IntrinsicCostAttributes (#124254)
getVectorCallCosts determines the cost of a vector intrinsic, based off
an existing scalar intrinsic call - but we were including the scalar
argument data to the IntrinsicCostAttributes, which meant that not only
was the cost calculation not type-only based, it was making incorrect
assumptions about constant values etc.
This also exposed an issue that x86 relied on fallback calculations for
funnel shift costs - this is great when we have the argument data as
that improves the accuracy of uniform shift amounts etc., but meant that
type-only costs would default to Cost=2 for all custom lowered funnel
shifts, which was far too cheap.
This is the reverse of #124129 where we weren't including argument data
when we could.
Fixes #63980
Commit: 6c11b7e689c89ff46e4472810dd555434eab1010
https://github.com/llvm/llvm-project/commit/6c11b7e689c89ff46e4472810dd555434eab1010
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
Log Message:
-----------
[CodeGen] NFC: Change order of checks in MachineInstr->isDead() (#124207)
[[Change-Id:
Ic349022bb99ef91f5396e462ade0366bc772ae02](https://github.com/llvm/llvm-project/pull/123531)](https://github.com/llvm/llvm-project/pull/123531)
moved isDead() from DeadMachineInstrElim to MachineInstr . In the
process of moving, I reordered the checks to improve chances of early
exit, but this has caused a slight increase in compile time.
This PR reverts back to the original order of checks.
Commit: a94226f9e6f5be4d6978134e7813f22b0510f3d4
https://github.com/llvm/llvm-project/commit/a94226f9e6f5be4d6978134e7813f22b0510f3d4
Author: Eric Astor <epastor at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
A llvm/test/tools/llvm-ml/bare_proc_error.asm
A llvm/test/tools/llvm-ml/no_section_error.asm
Log Message:
-----------
[llvm-ml] Remove unsafe getCurrentSegmentOnly() call (#123355)
This call was made unsafe recently, but was not fixed in
db48f1a1764023f8efeb055e343b967d1eb37d19 (the commit that fixed the
parallel code in AsmParser.cpp).
Fixes #123189
Commit: ec66c4af09263e68d800971906e60afc27d54a06
https://github.com/llvm/llvm-project/commit/ec66c4af09263e68d800971906e60afc27d54a06
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] true16 codegen pattern for f16 canonicalize (#122000)
true16 codegen pattern for f16 canonicalize
Commit: 5d2393a222c751723b0906485bf90a28dd4e564b
https://github.com/llvm/llvm-project/commit/5d2393a222c751723b0906485bf90a28dd4e564b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
Log Message:
-----------
[InstCombine] Avoid repeated hash lookups (NFC) (#124243)
Commit: 37bf0a10fb4cee10f4acbb7da453e7c19c8ee599
https://github.com/llvm/llvm-project/commit/37bf0a10fb4cee10f4acbb7da453e7c19c8ee599
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
A llvm/test/Analysis/ScalarEvolution/pr123550.ll
Log Message:
-----------
[SCEV] Add test for #123550 (NFC)
Commit: 256f40d0e6b2beb0e951b0f5f836847223c5695c
https://github.com/llvm/llvm-project/commit/256f40d0e6b2beb0e951b0f5f836847223c5695c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libc/src/stdlib/gpu/free.cpp
M libc/src/stdlib/gpu/malloc.cpp
M libc/test/src/stdlib/CMakeLists.txt
Log Message:
-----------
[libc] Use the NVIDIA device allocator for GPU malloc (#124277)
Summary:
This is a blocker on another patch in the OpenMP runtime. The problem is
that NVIDIA truly doesn't handle RPC-based allocations very well. It
cannot reliably update the MMU while a kernel is running and it will
usually deadlock if called from a separate thread due to internal use of
TLS.
This patch just removes the definition of `malloc` and `free` for NVPTX.
The result here is that they will be undefined, which is the cue for the
`nvlink` linker to define them for us. So, as far as `libc` is concerned
it still implements malloc.
Commit: 7842374103b26933d71a8fe354cd4d8715d55b1c
https://github.com/llvm/llvm-project/commit/7842374103b26933d71a8fe354cd4d8715d55b1c
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Emit nested namespaces in InstrInfoEmitter (#124210)
- Emit C++17 nested namespaces in InstrInfoEmitter.
Commit: cccb55491223cd410cb2f83973377dd75757cb60
https://github.com/llvm/llvm-project/commit/cccb55491223cd410cb2f83973377dd75757cb60
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Host/common/PseudoTerminal.cpp
Log Message:
-----------
[lldb] Remove unused posix_openpt function definition for Android (#124257)
This was for the wrapper function that was in
source/Host/android/LibcGlue.cpp. Android added
support 10+ years ago.
Commit: 3da7de34a2bcfeef73747a9796652f6bff225de3
https://github.com/llvm/llvm-project/commit/3da7de34a2bcfeef73747a9796652f6bff225de3
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/include/flang/Common/api-attrs.h
M flang/runtime/stop.cpp
Log Message:
-----------
[flang][runtime] Disable optimization for traceback related functions. (#124172)
The backtrace may at least print the backtrace name in the call stack,
but this does not happen with the release builds of the runtime.
Surprisingly, specifying "no-omit-frame-pointer" did not work
with GCC, so I decided to fall back to -O0 for these functions.
Commit: a976036a100b7dd459b6cabac96159875fcd513d
https://github.com/llvm/llvm-project/commit/a976036a100b7dd459b6cabac96159875fcd513d
Author: lntue <lntue at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libc/test/src/math/exhaustive/exhaustive_test.h
Log Message:
-----------
[libc][NFC] Remove extra ; in exhaustive_test.h. (#124216)
These cause warnings when running check-libc.
Commit: ba6774f997ee28157b0a3b8816cc76b94ed1da17
https://github.com/llvm/llvm-project/commit/ba6774f997ee28157b0a3b8816cc76b94ed1da17
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
Log Message:
-----------
[mlir][xegpu] Fix verifier diagnostic recursion (#124148)
Uses global diagnostic message in operation verifier to avoid infinite
recursion on a warning.
Emitting diagnostics through the operation under verification creates a
loop where verifier runs again before printing the message.
Commit: d88293d8a2005b19f89a86252c60102cec6c9b01
https://github.com/llvm/llvm-project/commit/d88293d8a2005b19f89a86252c60102cec6c9b01
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-break-down-bitcast.mlir
Log Message:
-----------
[mlir][vector] Disable `BreakDownVectorBitCast` for scalable vectors (#122725)
`BreakDownVectorBitCast` leverages
* `vector.extract_strided_slices` + `vector.insert_strided_slices`
As these Ops do not support extracting scalable sub-vectors (i.e.
extracting/inserting a fraction of a scalable dim), it's best to bail
out.
Commit: 474f5d2aefb44430b89ed72774a3c1d26a0adfb1
https://github.com/llvm/llvm-project/commit/474f5d2aefb44430b89ed72774a3c1d26a0adfb1
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/CodeGen/AArch64/cpu-supports-target.c
M clang/test/CodeGen/AArch64/cpu-supports.c
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/CodeGen/AArch64/fmv-features.c
M clang/test/CodeGen/AArch64/fmv-priority.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
M clang/test/Sema/attr-target-version.c
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/apple.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/lib/Target/AArch64/AArch64FMV.td
Log Message:
-----------
[FMV][AArch64] Remove features predres and ls64. (#124266)
These cannot be detected by reading the ID_AA64ISAR1_EL1 register since
their corresponding bitfields are hidden. Additionally the instructions
that these features enable are unusable from EL0.
ACLE: https://github.com/ARM-software/acle/pull/382
Commit: 5daecd4a3b9c6cca10ab6d44f539adf7310ace23
https://github.com/llvm/llvm-project/commit/5daecd4a3b9c6cca10ab6d44f539adf7310ace23
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Support/AArch64BuildAttributes.cpp
Log Message:
-----------
[Support] Fix namespace after #123990
https://llvm.org/docs/CodingStandards.html#use-namespace-qualifiers-to-implement-previously-declared-functions
Commit: c025b96ef9bb364c79f73fc3afb45c851c2efb17
https://github.com/llvm/llvm-project/commit/c025b96ef9bb364c79f73fc3afb45c851c2efb17
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Symbol::extract : remove unneeded file->lazy check
Commit: 134401deea5e86d646bb99fab39c182cfa8e5292
https://github.com/llvm/llvm-project/commit/134401deea5e86d646bb99fab39c182cfa8e5292
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RPC.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
A offload/test/libc/server.c
Log Message:
-----------
[Offload] Move RPC server handling to a dedicated thread (#112988)
Summary:
Handling the RPC server requires running through list of jobs that the
device has requested to be done. Currently this is handled by the thread
that does the waiting for the kernel to finish. However, this is not
sound on NVIDIA architectures and only works for async launches in the
OpenMP model that uses helper threads.
However, we also don't want to have this thread doing work
unnnecessarily. For this reason we track the execution of kernels and
cause the thread to sleep via a condition variable (usually backed by
some kind of futex or other intelligent sleeping mechanism) so that the
thread will be idle while no kernels are running.
Commit: bd8a8181288c9e16eb90fff78cbbc63b4687963a
https://github.com/llvm/llvm-project/commit/bd8a8181288c9e16eb90fff78cbbc63b4687963a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
Log Message:
-----------
[Offload] Add cuLaunchHostFunc to dynamic cuda
Summary:
This was missing, causing non-directly linked builds to fail.
Commit: 0cd794d4860e376698bb4da24bcdf8cbf331835c
https://github.com/llvm/llvm-project/commit/0cd794d4860e376698bb4da24bcdf8cbf331835c
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/FormatPaper.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/ostream.h
A libcxx/include/__chrono/utc_clock.h
M libcxx/include/chrono
M libcxx/include/module.modulemap
M libcxx/modules/std/chrono.inc
A libcxx/test/benchmarks/utc_clock.bench.cpp
M libcxx/test/libcxx/diagnostics/chrono.nodiscard.verify.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/get_leap_second_info.pass.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/time.clock.utc.members/from_sys.pass.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/time.clock.utc.members/to_sys.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/get_leap_second_info.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/leap_second_info.members.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/from_sys.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/now.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/to_sys.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/types.compile.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/utc_time.ostream.pass.cpp
A libcxx/test/std/time/time.syn/formatter.utc_time.pass.cpp
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
Log Message:
-----------
[libc++][chrono] implements UTC clock. (#90393)
While implementing this feature and its associated LWG issues it turns
out
- LWG3316 Correctly define epoch for utc_clock / utc_timepoint only
added non-normative wording to the standard.
Implements parts of:
- P0355 Extending <chrono> to Calendars and Time Zones
- P1361 Integration of chrono with text formatting
- LWG3359 <chrono> leap second support should allow for negative leap
seconds
Commit: 12f82fbe072382bb78ab1cbdd3fbeb8ed44cbc81
https://github.com/llvm/llvm-project/commit/12f82fbe072382bb78ab1cbdd3fbeb8ed44cbc81
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M compiler-rt/test/profile/Windows/binary-id.c
Log Message:
-----------
[compiler-rt] Fix Windows test after profile summary change (#124318)
Fix a Windows compiler-rt test that
https://github.com/llvm/llvm-project/pull/105915 broke.
Commit: 7293455cf292cfaa263ea04fc1bc2aee4ceab6a6
https://github.com/llvm/llvm-project/commit/7293455cf292cfaa263ea04fc1bc2aee4ceab6a6
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/bindings/interface/SBThreadExtensions.i
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/functionalities/location-list-lookup/TestLocationListLookup.py
M lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
M lldb/test/API/lang/objc/print-obj/TestPrintObj.py
Log Message:
-----------
[lldb] Add SBThread.selected_frame property (#123981)
Adds a `selected_frame` property to `SBThread`. The setter accepts either a frame index (like `SetSelectedFrame`), or a frame object.
Updates a few tests to make use of the new `selected_frame`. While doing so I noticed some of the usage could be cleaned up, so I did that too.
Commit: a9ad601f7c5486919d6fabc5dd3cb6e96f63ac61
https://github.com/llvm/llvm-project/commit/a9ad601f7c5486919d6fabc5dd3cb6e96f63ac61
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
Log Message:
-----------
[RISCV] Use vrsub for select of add and sub of the same operands (#123400)
If we have a (vselect c, a+b, a-b), we can combine this to a+(vselect c,
b, -b). That by itself isn't hugely profitable, but if we reverse the
select, we get a form which matches a masked vrsub.vi with zero. The
result is that we can use a masked vrsub *before* the add instead of a
masked add or sub. This doesn't change the critical path (since we
already had the pass through on the masked second op), but does reduce
register pressure since a, b, and (a+b) don't need to all be alive at
once.
In addition to the vselect form, we can also see the same pattern with a
vector_shuffle encoding the vselect. I explored canonicalizing these to
vselects instead, but that exposes several unrelated missing combines.
Commit: 544a3cb65b6b9b1455f9294d1764f47a7b8673b7
https://github.com/llvm/llvm-project/commit/544a3cb65b6b9b1455f9294d1764f47a7b8673b7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
Log Message:
-----------
[flang][cuda] Handle variable with initialization in device global pass (#124307)
Commit: d9b8120259a546ce7aa9f047566fef29479f59e8
https://github.com/llvm/llvm-project/commit/d9b8120259a546ce7aa9f047566fef29479f59e8
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/COFF/SymbolTable.cpp
M lld/test/COFF/start-lib.ll
Log Message:
-----------
[lld/COFF] Fix -start-lib / -end-lib more after reviews.llvm.org/D116434 (#124294)
This is a follow-up to #120452 in a way.
Since lld/COFF does not yet insert all defined in an obj file before all
undefineds (ELF and MachO do this, see #67445 and things linked from
there), it's possible that:
1. We add an obj file a.obj
2. a.obj contains an undefined that's in b.obj, causing b.obj to be
added
3. b.obj contains an undefined that's in a part of a.obj that's not yet
in the symbol table, causing a recursive load of a.obj, which adds the
symbols in there twice, leading to duplicate symbol errors.
For normal archives, `ArchiveFile::addMember()` has a `seen` check to
prevent this. For start-lib lazy objects, we can just check if the
archive is still lazy at the recursive call.
This bug is similar to issue #59162.
(Eventually, we'll probably want to do what the MachO and ELF ports do.)
Includes a test that caused duplicate symbol diagnostics before this
code change.
Commit: e4009ed3d68ba8d9e78721ce5afc2b3a7edd6f36
https://github.com/llvm/llvm-project/commit/e4009ed3d68ba8d9e78721ce5afc2b3a7edd6f36
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/docs/ConstantInterpreter.rst
M clang/www/OpenProjects.html
Log Message:
-----------
[clang][docs] Update bytecode interpreter docs (#124252)
Just a light update, not adding a lot of new information.
Commit: 825e712959d48f14b47e579871bcf9b5e25fff7a
https://github.com/llvm/llvm-project/commit/825e712959d48f14b47e579871bcf9b5e25fff7a
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
R clang/test/AST/HLSL/ast-dump-comment-cbuffe-tbufferr.hlsl
A clang/test/AST/HLSL/ast-dump-comment-cbuffer-tbuffer.hlsl
A clang/test/AST/HLSL/cbuffer.hlsl
A clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
R clang/test/AST/HLSL/cbuffer_tbuffer.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
Log Message:
-----------
[HLSL] cbuffer: create host layout structs (#122820)
Creates layout struct for `cbuffer` in Sema which will contains only
declarations contributing to the constant buffer layout. Anything else
will be filtered out, such as static variables decls, struct and
function definitions, resources, or empty struct and zero-sized arrays.
If the constant buffer includes a struct that contains any of the above
undesirable declarations, a new version of this struct should be created
with these declarations filtered out as well.
The definition of buffer layout struct will be added to the
HLSLBufferDecl AST node as the last node. Any layout structs for
embedded structures will be added there as well.
Fixes #122553
Commit: 3861b9db882d5637725ceeccb801c2bb837e8fc5
https://github.com/llvm/llvm-project/commit/3861b9db882d5637725ceeccb801c2bb837e8fc5
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 0cd794d4860e
Commit: ab976a17121374ae3407374b2aa6306e95863eb3
https://github.com/llvm/llvm-project/commit/ab976a17121374ae3407374b2aa6306e95863eb3
Author: Stephen Long <63318318+steplong at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
A llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
A llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-exp.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/lit.local.cfg
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
PreISelIntrinsicLowering: Lower llvm.exp/llvm.exp2 to a loop if scalable vec arg (#117568)
Commit: 83df39c649fe1b1dd556d8f2160999c65ce497eb
https://github.com/llvm/llvm-project/commit/83df39c649fe1b1dd556d8f2160999c65ce497eb
Author: junfengd-nv <junfengd at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Transforms/Utils/Inliner.cpp
A mlir/test/Transforms/inlining-recursive-2.mlir
M mlir/test/Transforms/inlining-recursive.mlir
Log Message:
-----------
[mlir][inline] Fix Issue#82401: Infinite loop in MLIR inliner for indirect recursive call. (#124026)
Commit: 3b30f20c60d020e43f5700dae68cf1080158b725
https://github.com/llvm/llvm-project/commit/3b30f20c60d020e43f5700dae68cf1080158b725
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/utc_clock.h
Log Message:
-----------
[libc++][TZDB] Fixes CI.
The commit 24e70e3930724ce499ad05d669bfbc4423c542e0 changed internal
macros which were used in 0cd794d4860e376698bb4da24bcdf8cbf331835c.
This caused build failures on platforms without TZDB support
Commit: 95d993a838863269dc1b90de3808c1e40ac6d5f2
https://github.com/llvm/llvm-project/commit/95d993a838863269dc1b90de3808c1e40ac6d5f2
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Target/LLVMIR/Import/instructions.ll
Log Message:
-----------
[MLIR] Fix import of calls with mismatched variadic types (#124286)
Previously, an indirect call was incorrectly generated when
`llvm::CallBase::getCalledFunction` returned null due to a type mismatch
between the call and the function. This patch updates the code to use
`llvm::CallBase::getCalledOperand` instead.
Commit: 1b1270f30bbdb2c7a310009d0512e167b09bac48
https://github.com/llvm/llvm-project/commit/1b1270f30bbdb2c7a310009d0512e167b09bac48
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/test/Transforms/GlobalOpt/resolve-fmv-ifunc.ll
Log Message:
-----------
[FMV][GlobalOpt] Enable static resolution of non-FMV callers. (#124314)
The undetectable FMV features predres and ls64 have been removed,
therefore the optimization is now re-enabled. The llvm testsuite
Graviton4 bots are expected to remain green.
Commit: d398c0c97aa0bfaeed5647f75bc37c87b8142f79
https://github.com/llvm/llvm-project/commit/d398c0c97aa0bfaeed5647f75bc37c87b8142f79
Author: siya100 <85541510+siya100 at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/cpio.yaml
Log Message:
-----------
[libc][cpio] Add cpio.h header. (#123798)
[libc][docs] add cpio to documentation and include related functi…
These changes ensure that the cpio header is documented properly
with respect to the issue
(https://github.com/llvm/llvm-project/issues/122006 ).
**Changes:**
1. **cpio.yaml**: Created a new YAML file for cpio with functions
and related macros.
2. **CMakeLists.txt**: Added cpio to the documentation
directories.
3. **index.rst**: Included `cpio` in the documentation index.
---------
Co-authored-by: siya <siya at Siya.com>
Commit: 074a25fb2678dacb4f3c6a24d5f907788c858e7a
https://github.com/llvm/llvm-project/commit/074a25fb2678dacb4f3c6a24d5f907788c858e7a
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
A llvm/test/MC/Disassembler/RISCV/vmask-carry-in.txt
A llvm/test/MC/RISCV/rvv/vmask-carry-in.s
Log Message:
-----------
[RISCV][MC] Create an AsmOperand for carry-in vmask (#124317)
Previously we used a fixed assembly string as well as encoding for the
carry-in vector mask, since it will always be there. However, this makes
both AsmParser and disassembler to either create a garbage MCOperand for
the mask or fail to add one as a whole. This wouldn't be a problem for
majority of the cases but tools like llvm-mca who relies on MCInst will
fail to account for the register dependency on these mask operands.
Commit: ae8b560899c00d1792fd87ec591558cd91add2ef
https://github.com/llvm/llvm-project/commit/ae8b560899c00d1792fd87ec591558cd91add2ef
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Transforms/PGOProfile/memprof_loop_unroll.ll
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
Log Message:
-----------
[MemProf] Disable hot hints by default (#124338)
By default we were marking some contexts as hot, and adding hot hints to
unambiguously hot allocations. However, there is not yet support for
cloning to expose hot allocation contexts, and none is planned for the
forseeable future.
While we convert hot contexts to notcold contexts during the cloning
step, their existence was greatly limiting the context trimming
performed when we add the MemProf profile to the IR. This change simply
disables the generation of hot contexts / hints by default, as few
allocations were unambiguously hot.
A subsequent change will address the issue when hot hints are optionally
enabled. See PR124219 for details.
This change resulted in significant overhead reductions for a large
target:
~48% reduction in the per-module ThinLTO bitcode summary sizes
~72% reduction in the distributed ThinLTO bitcode combined summary sizes
~68% reduction in thin link time
~34% reduction in thin link peak memory
Commit: ee054404dfde9913ed47d9bac5ea2be28926f5ad
https://github.com/llvm/llvm-project/commit/ee054404dfde9913ed47d9bac5ea2be28926f5ad
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-launch.fir
Log Message:
-----------
[flang][cuda] Carry over the cuf.proc_attr attribute to gpu.launch_func (#124325)
Commit: df9b31f1e0cdb8096e9d2e0749e473dd815b39f7
https://github.com/llvm/llvm-project/commit/df9b31f1e0cdb8096e9d2e0749e473dd815b39f7
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/Sema/HeuristicResolver.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
Log Message:
-----------
[clang][Sema] Handle undeduced auto types in HeuristicResolver (#124236)
Fixes https://github.com/clangd/clangd/issues/897
Commit: 73b462321c2968a450779f8f6c240f46a1830376
https://github.com/llvm/llvm-project/commit/73b462321c2968a450779f8f6c240f46a1830376
Author: Petr Hosek <phosek at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libc/include/strings.yaml
Log Message:
-----------
[libc] Include size_t type header in strings.h (#124352)
A number of functions in strings.h take size_t as an argument.
Commit: b41987beaedaa6ea78fd8dd11ba8c3b21eb8fa88
https://github.com/llvm/llvm-project/commit/b41987beaedaa6ea78fd8dd11ba8c3b21eb8fa88
Author: vporpo <vporpodas at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
Log Message:
-----------
[SandboxVec][DAG] Fix MemDGNode chain maintenance when move destination is non-mem (#124227)
This patch fixes a bug in the maintenance of the MemDGNode chain of the
DAG. Whenever we move a memory instruction, the DAG gets notified about
the move and maintains the chain of memory nodes. The bug was that if
the destination of the move was not a memory instruction, then the
memory node's next node would end up pointing to itself.
Commit: 425d25f5df4c6814e5551640b810bec53322f3df
https://github.com/llvm/llvm-project/commit/425d25f5df4c6814e5551640b810bec53322f3df
Author: Hiroshi Yamauchi <56735936+hjyamauchi at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/test/CodeGen/AArch64/stack-hazard-windows.ll
A llvm/test/CodeGen/AArch64/wincfi-missing-seh-directives.ll
Log Message:
-----------
[AArch64][WinCFI] Fix a crash due to missing seh directives (#123993)
https://github.com/llvm/llvm-project/issues/123808
Commit: 77c23fd0aa1534abe904c2d5256a6d7879dc3cf7
https://github.com/llvm/llvm-project/commit/77c23fd0aa1534abe904c2d5256a6d7879dc3cf7
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU] Update AMDGPUUsage.rst to document two intrinsics (#123816)
The AMDGPUUsage.rst file is updated to document two intrinsics:
llvm.amdgcn.mov.dpp and llvm.amdgcn.update.dpp.
Commit: 34c6c5e72f48de65a7e332033af9566576c1895d
https://github.com/llvm/llvm-project/commit/34c6c5e72f48de65a7e332033af9566576c1895d
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/PLTCall.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/exceptions-plt.cpp
A bolt/test/runtime/exceptions-plt.cpp
Log Message:
-----------
[BOLT][AArch64] Fix PLT optimization (#124192)
Preserve C++ exception metadata while running PLT optimization on
AArch64.
Commit: 4b209c5d87c8b8eb4bbf2750ea9daa5927a13699
https://github.com/llvm/llvm-project/commit/4b209c5d87c8b8eb4bbf2750ea9daa5927a13699
Author: vporpo <vporpodas at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/SandboxIR/Value.h
M llvm/lib/SandboxIR/Region.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromMetadata.cpp
M llvm/unittests/SandboxIR/PassTest.cpp
M llvm/unittests/SandboxIR/RegionTest.cpp
Log Message:
-----------
[SandboxIR][Region] Add cost modeling to the region (#124354)
This patch implements cost modeling for Region. All instructions that
are added or removed get their cost counted in the Scoreboard. This is
used for checking if the region before or after a transformation is more
profitable.
Commit: 05fd4d5775e2c40c00057d7af195290bc3a39cd3
https://github.com/llvm/llvm-project/commit/05fd4d5775e2c40c00057d7af195290bc3a39cd3
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/test/Lower/CUDA/cuda-devptr.cuf
Log Message:
-----------
[flang][cuda] Perform inlined assignment when field is c_devptr (#124322)
When a field in a derived type is `c_devptr`, keep check if we can do a
memcpy instead of falling back to the runtime assignment.
Many internal CUDA Fortran derived type have a `c_devptr` field and this
would lead to stack overflow on the device if the assignment is
performed by the runtime function.
Commit: cff7ad56babc2e8e7c731b3f60d3c0b4c8aca96f
https://github.com/llvm/llvm-project/commit/cff7ad56babc2e8e7c731b3f60d3c0b4c8aca96f
Author: vporpo <vporpodas at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Utils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
Log Message:
-----------
[SandboxVec][Utils] Implement Utils::verifyFunction() (#124356)
This patch implements a wrapper function for the LLVM IR verifier for
functions, and calls it (flag-guarded) within the bottom-up-vectorizer
for finding IR bugs as soon as they happen.
Commit: d910fbcbd10c5e72d0771dd9607e7133ae51dc70
https://github.com/llvm/llvm-project/commit/d910fbcbd10c5e72d0771dd9607e7133ae51dc70
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[RISCV][NFC] cR Constraint Release Note
Commit: ac75d322801411f496fe5d1155c86453f915ae98
https://github.com/llvm/llvm-project/commit/ac75d322801411f496fe5d1155c86453f915ae98
Author: vporpo <vporpodas at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/cross_bbs.ll
M llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][VecUtils] Filter out instructions not in BB in VecUtils:getLowest() (#124360)
This patch changes the functionality of `VecUtils::getLowest(Vals, BB)`
such that it filters out any instructions in `Vals` that are not in BB.
This is useful when Vals contains instructions from different BBs,
because in that case we are only interested in one BB.
Commit: 4df9c17e5f436702ca4f5439322972b0385d629a
https://github.com/llvm/llvm-project/commit/4df9c17e5f436702ca4f5439322972b0385d629a
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/result_of.h
M libcxx/test/libcxx/ranges/no_specializations.verify.cpp
M libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
Log Message:
-----------
[libc++] Fix tests for clang::no_specializations for C++17 and C++20
Commit: e2005d1461942539f7533a518aa78017074f6bf9
https://github.com/llvm/llvm-project/commit/e2005d1461942539f7533a518aa78017074f6bf9
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/bindings/interface/SBSaveCoreOptionsDocstrings.i
Log Message:
-----------
[LLDB] Reapply #123873 SBSaveCore Docstrings (#124355)
In my last attempt at this (#123873), I didn't realize we needed semi
colons! Also fixed the bug that the feature summary didn't have a type
defined.
CC @JDevlieghere hope you get a laugh at needing to revert doc strings
for breaking the build....
Commit: 241e5d8c5c424155e02e05524e8f731fc524aa40
https://github.com/llvm/llvm-project/commit/241e5d8c5c424155e02e05524e8f731fc524aa40
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmpx_eq_f16 (#124038)
True16 format for v_cmpx_eq_f16.
Also cleaned up some stray gfx11 check line in gfx12 dasm test
Commit: d789915f35a976bb532441915249cd1b165c2fd5
https://github.com/llvm/llvm-project/commit/d789915f35a976bb532441915249cd1b165c2fd5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Bump Runner Version in Containers (#124324)
This patch bumps the runner version to v2.322.0 in the CI containers.
Nothing looks suspicious in the change log, and it is important to keep
the runner up to date or we will end up with containers that cannot
connect to Github due to having a version too old.
Commit: 280c7d719834a828895b8a39f8ea982527fdcc73
https://github.com/llvm/llvm-project/commit/280c7d719834a828895b8a39f8ea982527fdcc73
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
M .ci/monolithic-windows.sh
Log Message:
-----------
[CI] Increase Configurability of Monolithic Windows Build (#124328)
This patch makes it so that the caller of monolithic-windows.sh can set
the maximum number of parallel compile/link jobs in an environment
variable rather than manually specifying it inside of the CMake.
Additionally, the env variable definitions for CC, CXX, and LD are sunk
into the shell script due to those config options being pretty inherent
to what the pipeline is testing.
This is intended to make things more flexible/useable for the new
premerge CI pipeline, particularly as we are looking at using larger
runners and want the increased flexibility to experiment.
Commit: 6409799bdcd86be3ed72e8d172181294d3e5ad09
https://github.com/llvm/llvm-project/commit/6409799bdcd86be3ed72e8d172181294d3e5ad09
Author: vporpo <vporpodas at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Pack from different BBs (#124363)
When the inputs of the pack come from different BBs we need to make sure
we emit the pack instructions at the correct place.
Commit: 48657bf29b01e95749b5ecd8c7f675c14a7948d1
https://github.com/llvm/llvm-project/commit/48657bf29b01e95749b5ecd8c7f675c14a7948d1
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/include/flang/Runtime/CUDA/kernel.h
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/runtime/CUDA/kernel.cpp
M flang/test/Fir/CUDA/cuda-gpu-launch-func.mlir
Log Message:
-----------
[flang][cuda] Handle launch of cooperative kernel (#124362)
Add `CUFLaunchCooperativeKernel` entry points and lower gpu.launch_func
with grid_global attribute to this entry point.
Commit: c725a95e088dea14953c2d891d04429bc50b912e
https://github.com/llvm/llvm-project/commit/c725a95e088dea14953c2d891d04429bc50b912e
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
Log Message:
-----------
[MemProf] Convert Hot contexts to NotCold early (#124219)
While we convert hot contexts to notcold contexts during the cloning
step, their existence was greatly limiting the context trimming
performed when we add the MemProf profile to the IR. To address this,
any hot contexts are converted to notcold contexts immediately after
first checking for unambiguous allocation types, and before checking it
again and before adding metadata while performing context trimming.
Note that hot hints are now disabled by default, however, this avoids
adding unnecessary overhead if they are re-enabled.
Commit: db1ee18eda6329d7577ad019a47822220b3e293d
https://github.com/llvm/llvm-project/commit/db1ee18eda6329d7577ad019a47822220b3e293d
Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
NFC: Typo fix
Change-Id: I08470bc617490558250136ea35a4964003fa9981
Commit: 1b4bd4e1a5120c8bb4daa44787a3bc4559b6b3b4
https://github.com/llvm/llvm-project/commit/1b4bd4e1a5120c8bb4daa44787a3bc4559b6b3b4
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
A bolt/test/AArch64/jump-table-heuristic-fail.s
M bolt/test/AArch64/test-indirect-branch.s
Log Message:
-----------
[BOLT][AArch64] Remove assertions from jump table heuristic (#124372)
The code for jump table detection on AArch64 asserts liberally whenever
the input instruction sequence does not match the expected pattern. As a
result, BOLT fails to process binaries with such sequences instead of
ignoring functions with unknown control flow.
Remove asserts in analyzeIndirectBranchFragment() and mark indirect
jumps as instructions with unknown control flow instead.
Commit: d92bac8a3ebb19106f6bca6b7613a27c52cb48ab
https://github.com/llvm/llvm-project/commit/d92bac8a3ebb19106f6bca6b7613a27c52cb48ab
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Basic/AddressSpaces.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Sema/SemaHLSL.cpp
R clang/test/AST/HLSL/ast-dump-comment-cbuffer-tbuffer.hlsl
A clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
M clang/test/CodeGenHLSL/cbuf.hlsl
M clang/test/CodeGenHLSL/cbuf_in_namespace.hlsl
M clang/test/CodeGenHLSL/static_global_and_function_in_cb.hlsl
M clang/test/SemaTemplate/address_space-dependent.cpp
Log Message:
-----------
[HLSL] Introduce address space `hlsl_constant(2)` for constant buffer declarations (#123411)
Introduces a new address space `hlsl_constant(2)` for constant buffer
declarations.
This address space is applied to declarations inside `cbuffer` block.
Later on, it will also be applied to `ConstantBuffer<T>` syntax and the
default `$Globals` constant buffer.
Clang codegen translates constant buffer declarations to global
variables and loads from `hlsl_constant(2)` address space. More work
coming soon will include addition of metadata that will map these
globals to individual constant buffers and enable their transformation
to appropriate constant buffer load intrinsics later on in an LLVM pass.
Fixes #123406
Commit: 07ed8187acc31ac3f4779da452864a29d48799ac
https://github.com/llvm/llvm-project/commit/07ed8187acc31ac3f4779da452864a29d48799ac
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/OpenMP/assumes_include_nvptx.cpp
M clang/test/OpenMP/nvptx_target_firstprivate_codegen.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/test/Transforms/OpenMP/always_inline_device.ll
M llvm/test/Transforms/OpenMP/attributor_module_slice_reproducer.ll
M llvm/test/Transforms/OpenMP/barrier_removal.ll
M llvm/test/Transforms/OpenMP/bug66687.ll
M llvm/test/Transforms/OpenMP/custom_state_machines.ll
M llvm/test/Transforms/OpenMP/custom_state_machines_pre_lto.ll
M llvm/test/Transforms/OpenMP/custom_state_machines_remarks.ll
M llvm/test/Transforms/OpenMP/deduplication_target.ll
M llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll
M llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold_optnone.ll
M llvm/test/Transforms/OpenMP/global_constructor.ll
M llvm/test/Transforms/OpenMP/globalization_remarks.ll
M llvm/test/Transforms/OpenMP/gpu_kernel_detection_remarks.ll
M llvm/test/Transforms/OpenMP/gpu_state_machine_function_ptr_replacement.ll
M llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
M llvm/test/Transforms/OpenMP/nested_parallelism.ll
M llvm/test/Transforms/OpenMP/parallel_level_fold.ll
M llvm/test/Transforms/OpenMP/remove_globalization.ll
M llvm/test/Transforms/OpenMP/replace_globalization.ll
M llvm/test/Transforms/OpenMP/single_threaded_execution.ll
M llvm/test/Transforms/OpenMP/spmdization.ll
M llvm/test/Transforms/OpenMP/spmdization_assumes.ll
M llvm/test/Transforms/OpenMP/spmdization_constant_prop.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding_two_reaching_kernels.ll
M llvm/test/Transforms/OpenMP/spmdization_indirect.ll
M llvm/test/Transforms/OpenMP/spmdization_no_guarding_two_reaching_kernels.ll
M llvm/test/Transforms/OpenMP/spmdization_remarks.ll
M llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
Log Message:
-----------
[OpenMP] Replace nvvm.annotation usage with kernel calling conventions (#122320)
Specifying a kernel with the `ptx_kernel` or `amdgpu_kernel` calling
convention is a more idiomatic and compile-time performant than using
the `nvvm.annoation !"kernel"` metadata.
Transition OMPIRBuilder to use calling conventions for PTX kernels and
no longer emit `nvvm.annoation`. Update OpenMPOpt to work with kernels
specified via calling convention as well as metadata. Update OpenMP
tests to use the calling conventions.
Commit: 4ea44eb1e292369b0b3f2f8ad4680081558f1e01
https://github.com/llvm/llvm-project/commit/4ea44eb1e292369b0b3f2f8ad4680081558f1e01
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/test/Driver/wasm-toolchain.c
Log Message:
-----------
[WebAssembly] Fix EH feature flags when compiling multiple files (#124374)
#124042 caused a problem that when invoking `clang` with multiple files,
the static `HasRun` variables were set when processing the first file so
the appropriate feature flags were not added from the second file. This
fixes the problem by making those `HasRun` variables just normal
variables within the enclosing function.
Commit: 8e31050bc2e02d7a3c654def7d7af899ce1cdb1d
https://github.com/llvm/llvm-project/commit/8e31050bc2e02d7a3c654def7d7af899ce1cdb1d
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in annotating overloaded co_await decl (#124240)
Fixes #124223.
Commit: 3b35b4c7f9141c59fbac415e335489494b7d507e
https://github.com/llvm/llvm-project/commit/3b35b4c7f9141c59fbac415e335489494b7d507e
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/BuiltinDialectBytecode.td
M mlir/include/mlir/IR/Location.h
M mlir/lib/IR/Location.cpp
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[mlir] Allow fallback from file line col range to loc (#124321)
This was discussed during the original review but I made it stricter
than discussed. Making it a pure view but adding a helper for bytecode
serialization (I could avoid the helper, but it ends up with more logic
and stronger coupling).
Commit: ac1ba1f9dd7013852cd27f514467f57ee0e6ed16
https://github.com/llvm/llvm-project/commit/ac1ba1f9dd7013852cd27f514467f57ee0e6ed16
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
Log Message:
-----------
[CodeGen] Introduce a VirtRegOrUnit class to hold virtual reg or physical reg unit. NFC (#123768)
LiveIntervals and MachineVerifier were previously using Register to
store this, but reg units are different than physical registers. One
important difference is that 0 is a valid reg unit number, but it is not
a valid phyiscal register.
This patch introduces a new VirtRegOrUnit class that is distinct from
Register. It can be be converted to/from a virtual Register or a
MCRegUnit. I've made all conversions explicit and used assertions to
check the validity.
I also fixed a place in MachineVerifier that was ignoring reg unit 0.
Commit: 8a6b44bf4cfe5df3db687a6b9519e99dbce8cf54
https://github.com/llvm/llvm-project/commit/8a6b44bf4cfe5df3db687a6b9519e99dbce8cf54
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/result_of.h
M libcxx/test/libcxx/ranges/no_specializations.verify.cpp
M libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
Log Message:
-----------
Revert "[libc++] Fix tests for clang::no_specializations for C++17 and C++20"
This reverts commit 4df9c17e5f436702ca4f5439322972b0385d629a.
Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/24/builds/4598/steps/10/logs/stdio)
Commit: 1f26ac10ca1bef40a80be8f81a6f109713bc586f
https://github.com/llvm/llvm-project/commit/1f26ac10ca1bef40a80be8f81a6f109713bc586f
Author: mconst <mconst at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/test/CodeGen/X86/huge-stack-offset.ll
M llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
Log Message:
-----------
[X86] Better handling of impossibly large stack frames (#124217)
If you try to create a stack frame of 4 GiB or larger with a 32-bit
stack pointer, we currently emit invalid instructions like `mov eax,
5000000000` (unless you specify `-fstack-clash-protection`, in which
case we emit a trap instead).
The trap seems nicer, so let's do that in all cases. This avoids
emitting invalid instructions, and also fixes the "can't have 32-bit
16GB stack frame" assertion in `X86FrameLowering::emitSPUpdate()` (which
used to be triggerable by user code, but is now correct).
This was originally part of #124041.
@phoebewang
Commit: f607e3fd23ef0019b2f3b289b4d46012400b8db5
https://github.com/llvm/llvm-project/commit/f607e3fd23ef0019b2f3b289b4d46012400b8db5
Author: Valentyn Yukhymenko <valentin.yukhymenko at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/fixed-expansion.cpp
M clang/test/SemaCXX/alias-template.cpp
Log Message:
-----------
[Clang][Sema] Reject declaring an alias template with the same name as its template parameter. (#123533)
The issue occurred because the template parameter scope was skipped
too early, before diagnosing the alias name shadowing.
To fix this, the patch moves it to after LookupName, such that the behavior
remains consistent with the typedef implementation.
Fixes llvm#123423
Commit: c216081e981ea14536024b86df79ddee9fe517e0
https://github.com/llvm/llvm-project/commit/c216081e981ea14536024b86df79ddee9fe517e0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/AST/DeclTemplate.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124388)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect P to be nonnull.
Commit: 186d6546d9c5898a0a32f4616558021d9a908786
https://github.com/llvm/llvm-project/commit/186d6546d9c5898a0a32f4616558021d9a908786
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/Index/FileIndexRecord.cpp
Log Message:
-----------
[Index] Migrate away from PointerUnion::dyn_cast (NFC) (#124389)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect DclInfo.DeclOrMacro to be nonnull.
Commit: 62bd217b5a1cf6b231b2413b5522533986d4e5df
https://github.com/llvm/llvm-project/commit/62bd217b5a1cf6b231b2413b5522533986d4e5df
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaCodeComplete.cpp
Log Message:
-----------
[Sema] Migrate away from PointerUnion::dyn_cast (NFC) (#124391)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect DeclOrIterator to be nonnull.
Commit: 0cc74a8941884d56a4718c28cc5b8ef8dbe17047
https://github.com/llvm/llvm-project/commit/0cc74a8941884d56a4718c28cc5b8ef8dbe17047
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/ModuloSchedule.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#124392)
Commit: 72918fd11dd805b578bbc9c4f36bea3bc96f37b5
https://github.com/llvm/llvm-project/commit/72918fd11dd805b578bbc9c4f36bea3bc96f37b5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
Log Message:
-----------
[GlobalISel] Avoid repeated hash lookups (NFC) (#124393)
Commit: 84d4037488f5b366e76be4fe723e0de7aeee264d
https://github.com/llvm/llvm-project/commit/84d4037488f5b366e76be4fe723e0de7aeee264d
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/result_of.h
M libcxx/test/libcxx/ranges/no_specializations.verify.cpp
M libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
Log Message:
-----------
Reapply "[libc++] Fix tests for clang::no_specializations for C++17 and C++20"
The missing diagnostic pragmas have been added.
This reverts commit 8a6b44bf4cfe5df3db687a6b9519e99dbce8cf54.
Commit: 7974f12b1e3682514bd58b35c5a784f35938fa04
https://github.com/llvm/llvm-project/commit/7974f12b1e3682514bd58b35c5a784f35938fa04
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[HLSL] Suppress a warning in #122820 [-Wunused-but-set-variable]
Commit: 2696e4fb9567d23ce065a067e7f4909b310daf50
https://github.com/llvm/llvm-project/commit/2696e4fb9567d23ce065a067e7f4909b310daf50
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/conjunction.h
Log Message:
-----------
[libc++] Reduce std::conjunction overhead (#124259)
The old and new implementation of `_And` are very close in terms of
performance according to my testing, but the new implementation can also
be used to implement `conjunction`, which make that ~50% faster.
Commit: 52bffdf9f5bb72eb86249a012d08a40c90316dfb
https://github.com/llvm/llvm-project/commit/52bffdf9f5bb72eb86249a012d08a40c90316dfb
Author: David Green <david.green at arm.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
A llvm/test/Transforms/FunctionSpecialization/solver-constant-strictfpmetadata.ll
Log Message:
-----------
[IPSCCP][FuncSpec] Protect against metadata access from call args. (#124284)
Fixes an issue reported from #114964, where metadata arguments were
attempted to be accessed as constants.
Commit: 1a53d4baeb0242e00c494fd0a2b2ce58bcbf28b6
https://github.com/llvm/llvm-project/commit/1a53d4baeb0242e00c494fd0a2b2ce58bcbf28b6
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/CMakeLists.txt
M clang/tools/driver/CMakeLists.txt
M clang/utils/perf-training/CMakeLists.txt
M clang/utils/perf-training/perf-helper.py
Log Message:
-----------
[clang][cmake] Apply bolt optimizations as part of the clang target (#119896)
This change removes the need to call the clang-bolt target in order to
apply bolt optimizations to clang. Now running `ninja clang` will build
a clang with bolt optimizations, and `ninja check-clang` and `ninja
install-clang` will test and install bolt optimized clang too.
The clang-bolt target has been kept for compatibilty reasons, but it is
now just an alias to the clang target.
Also, this new design for applying the bolt optimizations to clang will
be easier to generalize and use to optimize other binaries/libraries in
the project.
---------
Co-authored-by: Amir Ayupov <fads93 at gmail.com>
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: de5ff8ad07ae824b86c5cefcba63f4b66607b759
https://github.com/llvm/llvm-project/commit/de5ff8ad07ae824b86c5cefcba63f4b66607b759
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/docs/TestingLibcxx.rst
M libcxx/test/std/input.output/iostream.format/print.fun/includes.compile.pass.cpp
M libcxx/test/std/input.output/iostream.format/print.fun/no_file_description.pass.cpp
M libcxx/test/std/localization/locale.stdcvt/depr.verify.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.buffer/depr.verify.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/depr.verify.cpp
M libcxx/test/std/strings/basic.string/string.capacity/reserve.deprecated_in_cxx20.verify.cpp
M libcxx/utils/libcxx/test/params.py
Log Message:
-----------
[libc++][test] Improves C++ Standard filtering. (#89499)
Adds a new lit directive to improve C++ Standard filtering. This is
based on the
[Discourse](https://discourse.llvm.org/t/rfc-improving-c-standard-filtering-in-the-lit-tests/78474)
discussion.
Commit: 6383a12e3b4339fa4743bb97da4d51dea6d2e2ea
https://github.com/llvm/llvm-project/commit/6383a12e3b4339fa4743bb97da4d51dea6d2e2ea
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
Log Message:
-----------
[VPlan] Refactor HCFG builder to preserve original vector latch (NFC).
Update HCFG builder to preserve the original latch block of the initial
VPlan, ensuring there is always a latch.
It also skips creating the BranchOnCond for the latch of the top-level
loop, instead of removing it later. Exiting via the latch is controlled
by later recipes.
This further unifies HCFG construction and prepares for use to also
build an initial VPlan (VPlan0) for inner loops.
Commit: 9325a61aa0960595c22867799ebd157c8160fd86
https://github.com/llvm/llvm-project/commit/9325a61aa0960595c22867799ebd157c8160fd86
Author: James Y Knight <jyknight at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
Log Message:
-----------
Revert "[GlobalMerge][NFC] Skip sorting by profitability when it is not needed" (#124411)
Reverts llvm/llvm-project#124146 -- new comparator is not a strict-weak
as required by stable_sort.
Co-authored-by: Michael Maitland <michaeltmaitland at gmail.com>
Commit: 21f04b1458c52ba875a23b58b02cf6b1f8db0661
https://github.com/llvm/llvm-project/commit/21f04b1458c52ba875a23b58b02cf6b1f8db0661
Author: Adam Paszke <adam.paszke at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M mlir/lib/Interfaces/SideEffectInterfaces.cpp
Log Message:
-----------
Hold a queue of iterator ranges (not operations) in wouldOpBeTriviallyDead (#123642)
Ranges let us push the whole blocks onto the queue in constant time. If
one of the first ops in the block is side-effecting we'll be able to
provide the answer quickly. The previous implementation had to walk the
block and queue all the operations only to start traversing them again,
which was a considerable slowdown for compile times of large MLIR
programs in our benchmarks.
---------
Co-authored-by: Jacques Pienaar <jpienaar at google.com>
Commit: 5cb2db3b51c2a9d516d57bd2f07d9899bd5fdae7
https://github.com/llvm/llvm-project/commit/5cb2db3b51c2a9d516d57bd2f07d9899bd5fdae7
Author: vporpo <vporpodas at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Forbid crossing BBs (#124369)
This patch updates the scheduler to forbid scheduling across BBs. It
should eventually be able to handle this, but we disable it for now.
Commit: 485b1ac8a265dcf19c55a98aeefff95158cc63a2
https://github.com/llvm/llvm-project/commit/485b1ac8a265dcf19c55a98aeefff95158cc63a2
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/docs/SandboxIR.md
Log Message:
-----------
[SandboxIR][Docs] C++ highlighting for code block
Commit: 14b44179cb61dd551c911dea54de57b588621005
https://github.com/llvm/llvm-project/commit/14b44179cb61dd551c911dea54de57b588621005
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/include/__format/buffer.h
M libcxx/include/__format/format_functions.h
M libcxx/include/module.modulemap
M libcxx/test/std/utilities/format/format.functions/format_tests.h
Log Message:
-----------
[libc++][format][3/3] Improves formatting performance. (#108990)
This changes the __output_buffer to a new structure. This improves the
performace of std::format, std::format_to, std::format_to_n, and
std::formatted_size.
Commit: 8b6211472793680994f7bc15abb5910d0a916cc5
https://github.com/llvm/llvm-project/commit/8b6211472793680994f7bc15abb5910d0a916cc5
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/macosx/universal/TestUniversal.py
Log Message:
-----------
[lldb] Delete unused lldbutil.print_registers (NFC)
Commit: b178c2d63e0701655046dfd2ead195b36e0df397
https://github.com/llvm/llvm-project/commit/b178c2d63e0701655046dfd2ead195b36e0df397
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
Log Message:
-----------
[SandboxVec][DAG] Fix trim schedule
Fix trimSchedule by skipping instructions without a DAG Node.
Commit: aba0476f23fc2a851792e9d85c25ee34a5ea7ed0
https://github.com/llvm/llvm-project/commit/aba0476f23fc2a851792e9d85c25ee34a5ea7ed0
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/atomic/TestLibCxxAtomic.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/initializerlist/TestInitializerList.py
Log Message:
-----------
[lldb] Delete lldbutil.PrintableRegex (NFC)
Use of this class wasn't making use of the original regex string. Note that `re.Pattern`
has a `pattern` property to access the original regex.
Commit: def50f701f6a2c1e0550bb341fd8b64bed299e72
https://github.com/llvm/llvm-project/commit/def50f701f6a2c1e0550bb341fd8b64bed299e72
Author: Hui <hui.xie1990 at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__flat_map/flat_map.h
A libcxx/include/__flat_map/flat_multimap.h
A libcxx/include/__flat_map/sorted_equivalent.h
A libcxx/include/__flat_map/utils.h
M libcxx/include/__functional/is_transparent.h
M libcxx/include/flat_map
M libcxx/include/module.modulemap
M libcxx/include/version
M libcxx/modules/std/flat_map.inc
A libcxx/test/libcxx/containers/container.adaptors/flat.map/assert.input_range.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.map/assert.sorted_unique.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.multimap/assert.input_range.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.multimap/assert.sorted_equivalent.pass.cpp
R libcxx/test/libcxx/containers/containers.adaptors/flat.map/assert.input_range.pass.cpp
R libcxx/test/libcxx/containers/containers.adaptors/flat.map/assert.sorted_unique.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.map.syn/sorted_equivalent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/empty.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/empty.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.compile.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.verify.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/default_noexcept.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/dtor_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/empty.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/empty.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/size.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/assign_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/compare.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/containers.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.addressof.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct_pmr.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/dtor_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_clears.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_exceptions.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/pmr.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_container.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.erasure/erase_if.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.erasure/erase_if_exceptions.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator_comparison.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator_concept_conformance.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/range_concept_conformance.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/reverse_iterator.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/clear.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/emplace.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/emplace_hint.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/extract.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_cv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_cv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_rv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_rv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_sorted_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_sorted_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/replace.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_exception.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_free.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_member.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/comp.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/keys_values.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/contains.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/contains_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/count.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/count_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/equal_range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/equal_range_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/find.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/find_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/lower_bound.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/lower_bound_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/upper_bound.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/upper_bound_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/helpers.h
A libcxx/test/std/containers/container.adaptors/flat.multimap/incomplete_type.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/op_compare.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/types.compile.pass.cpp
A libcxx/test/std/language.support/support.limits/support.limits.general/flat_map.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] implement `std::flat_multimap` (#113835)
fixes https://github.com/llvm/llvm-project/issues/105190
---------
Co-authored-by: Hui Xie <huixie at Mac.broadband>
Co-authored-by: Hui Xie <huixie at Huis-MacBook-Pro.local>
Commit: d578d0bb135ca337b14aabe6696fe5b0a0932932
https://github.com/llvm/llvm-project/commit/d578d0bb135ca337b14aabe6696fe5b0a0932932
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port def50f701f6a
Commit: 2655ae54db6d7e9276a5ef4208cbeff1ae2ee72c
https://github.com/llvm/llvm-project/commit/2655ae54db6d7e9276a5ef4208cbeff1ae2ee72c
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M mlir/examples/toy/Ch4/mlir/Dialect.cpp
M mlir/examples/toy/Ch5/mlir/Dialect.cpp
M mlir/examples/toy/Ch6/mlir/Dialect.cpp
M mlir/examples/toy/Ch7/mlir/Dialect.cpp
Log Message:
-----------
[mlir] Fix deprecated pointer union casts in toy example (#124422)
Commit: 4bcd8184a093d2d9f0aad1053dbb1367891da6a5
https://github.com/llvm/llvm-project/commit/4bcd8184a093d2d9f0aad1053dbb1367891da6a5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[TargetLowering] Pull similar code out of the forceExpandWideMUL into a helper. NFC (#124371)
These functions have similar code. One of them calculates the 2x width
full product from 2 sources. The other calculates the product from 2
sources that have low and high halves.
This patch introduces a new function that takes HiLHS and HiRHS as
optional values. If they are not null, they will be used in the
calculation of the Hi half. The Signed flag can only be set when
HiLHS/HiRHS are null.
Commit: 5e65f430414dd9df79ca6a1056b4943110ebc14b
https://github.com/llvm/llvm-project/commit/5e65f430414dd9df79ca6a1056b4943110ebc14b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/extracts-non-extendable.ll
Log Message:
-----------
[SLP][NFC]Add a test, producing serie of extrtactelements, building non-extendable tree
Commit: e5b0132d157ad4c9a502dc8c4a61a3a3c83646c2
https://github.com/llvm/llvm-project/commit/e5b0132d157ad4c9a502dc8c4a61a3a3c83646c2
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
Log Message:
-----------
SCEV: add samesign tests for exit-limit computation (#124304)
As the tests demonstrate, computeExitLimitFromICmp needs no additional
changes to compute exit limits from an icmp with samesign.
Commit: 89f2fee9f80658650524ba4fc12f01409e45000e
https://github.com/llvm/llvm-project/commit/89f2fee9f80658650524ba4fc12f01409e45000e
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/fsh.ll
Log Message:
-----------
[InstCombine] Add test for incorrect retention of Range attribute in fshl
Commit: 77c325b646301e394bcd89c2980b4c2da8af49cd
https://github.com/llvm/llvm-project/commit/77c325b646301e394bcd89c2980b4c2da8af49cd
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/COFF/DLL.cpp
M lld/test/COFF/arm64ec-import.test
Log Message:
-----------
[LLD][COFF] Keep hasData true in NullChunk constructor (#124368)
`NullChunk` instances do write data, even if it's always zero. Setting
`hasData` to false causes `Writer::assignAddresses` to ignore them
when calculating `rawSize`. This typically isn't an issue, as null chunks
are usually positioned within a section, and later chunks adjust the
size accordingly.
However, on ARM64EC, the auxiliary IAT is placed at the end of the
`.rdata` section and terminates with a null chunk. As a result, `rawSize`
is never updated to account for it, and space for the null chunk is not
allocated. Consequently, when `NullChunk::writeTo` is called, it receives
an invalid pointer - either pointing to the next section or beyond the
allocated buffer.
Commit: 2131115be5b9d8b39af80973d9b64c0adc41d38d
https://github.com/llvm/llvm-project/commit/2131115be5b9d8b39af80973d9b64c0adc41d38d
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/fsh.ll
Log Message:
-----------
[InstCombine] Drop Range attribute when simplifying 'fshl' based on demanded bits (#124429)
When simplifying operands based on demanded bits, the return value range
of llvm.fshl might change. Keeping the Range attribute might cause
llvm.fshl to generate a poison and lead to miscompile. Drop the Range
attribute similar to `dropPosonGeneratingFlags` elsewhere.
Fix #124387
Commit: 1395cd015f2edf26f8c2567870183d63f4fdd753
https://github.com/llvm/llvm-project/commit/1395cd015f2edf26f8c2567870183d63f4fdd753
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
Log Message:
-----------
[VPlan] Support multi-exit loops in HCFG builder.
Update HCFG construction to support multi-exit loops. If there is no
unique exit block, map the middle block of the initial plan to the exit
block from the latch.
This further unifies HCFG construction and prepares for use to also
build an initial VPlan (VPlan0) for inner loops.
Effectively NFC as this isn't used on the default code path yet.
Commit: 563c7c5539f05e7f8cbb42565c1f24466019f38b
https://github.com/llvm/llvm-project/commit/563c7c5539f05e7f8cbb42565c1f24466019f38b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/APINotes/APINotesManager.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/Frontend/SerializedDiagnosticPrinter.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/tools/libclang/CIndexDiagnostic.cpp
Log Message:
-----------
[clang] Migrate away from PointerUnion::dyn_cast (NFC) (#124425)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
This patch migrates uses of PointerUnion::dyn_cast to
dyn_cast_if_present (see the definition of PointerUnion::dyn_cast).
Note that we cannot use dyn_cast in any of the migrations in this
patch; placing
assert(!X.isNull());
just before any of dyn_cast_if_present in this patch triggers some
failure in check-clang.
Commit: 04d5608057f73cf8deb66ddaeddf2f9254fd864b
https://github.com/llvm/llvm-project/commit/04d5608057f73cf8deb66ddaeddf2f9254fd864b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/AST/DeclTemplate.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124430)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect P to be nonnull.
Commit: 19a6ac18ef3e92017db49668ee365e694157f317
https://github.com/llvm/llvm-project/commit/19a6ac18ef3e92017db49668ee365e694157f317
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/EhFrame.cpp
M lld/test/ELF/invalid-eh-frame2.s
M lld/test/ELF/invalid-eh-frame4.s
M lld/test/ELF/invalid-eh-frame6.s
Log Message:
-----------
[ELF] EhFrame: replace failOn with errOn
These diagnostics are mostly reported by a thread during writeSections.
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1.
Commit: 0f3c2884f3ccbdbe396e4388feb8be716b50dd68
https://github.com/llvm/llvm-project/commit/0f3c2884f3ccbdbe396e4388feb8be716b50dd68
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/AST/ParentMapContext.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124433)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect U to be nonnull.
Commit: d2c7cabe0453d6a6d03c15b7ae1800b53de9e182
https://github.com/llvm/llvm-project/commit/d2c7cabe0453d6a6d03c15b7ae1800b53de9e182
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/Sema/JumpDiagnostics.cpp
Log Message:
-----------
[Sema] Migrate away from PointerUnion::dyn_cast (NFC) (#124434)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect EWC->getObject(i) to be nonnull.
Commit: 4f480481716553aa89142131f49e53e7d53c1998
https://github.com/llvm/llvm-project/commit/4f480481716553aa89142131f49e53e7d53c1998
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/test/ELF/invalid/merge-invalid-size.s
M lld/test/ELF/invalid/merge-writable.s
Log Message:
-----------
[ELF] SHF_MERGE: avoid Fatal
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1.
Commit: c7579bfba5969377f7fb4239cc05d6cd4a077957
https://github.com/llvm/llvm-project/commit/c7579bfba5969377f7fb4239cc05d6cd4a077957
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/Writer.cpp
M lld/test/ELF/stdout.s
Log Message:
-----------
[ELF] -o -: suppress output if disableOutput
So that LLD_IN_TEST=2 ld.lld -o - a.o only writes the output once.
Commit: 7db789b5702714ffb6c96ad53c3136ca0a4300b2
https://github.com/llvm/llvm-project/commit/7db789b5702714ffb6c96ad53c3136ca0a4300b2
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/test/ELF/compressed-input-err.s
M lld/test/ELF/invalid/section-alignment.test
M lld/test/ELF/invalid/section-alignment2.s
Log Message:
-----------
[ELF] Replace a few Fatal with Err
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1. Change a few Fatal to
recoverable Err.
Commit: 6b87f01aaaa9d7c6eef8b66e48f13eb8492c7503
https://github.com/llvm/llvm-project/commit/6b87f01aaaa9d7c6eef8b66e48f13eb8492c7503
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/InputSection.cpp
R lld/test/ELF/merge-string-error.s
M lld/test/ELF/mergeable-errors.s
M lld/test/ELF/relocation-past-merge-end.s
Log Message:
-----------
[ELF] MergeInputSection: replace Fatal with Err
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1. Change a few Fatal to
recoverable Err.
Commit: a9e92beb253d4bbd7636d99f100940534f3a7f36
https://github.com/llvm/llvm-project/commit/a9e92beb253d4bbd7636d99f100940534f3a7f36
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/Driver.cpp
Log Message:
-----------
[ELF] openAuxiliaryFile: open /dev/null if disableOutput and filename is "-"
So that LLD_IN_TEST=2 ld.lld --print-archive-stats=- a.o (and -Map -)
only writes the output once.
Commit: b7195e8e040d57bbf502f34ec84d71bd123f85b8
https://github.com/llvm/llvm-project/commit/b7195e8e040d57bbf502f34ec84d71bd123f85b8
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/test/ELF/basic.s
M lld/test/ELF/stdout.s
Log Message:
-----------
[ELF,test] Add env LLD_IN_TEST=1 to make some tests work if RUN_LLD_MAIN_TWICE
Commit: f21c35d54f8f7af9d0c64b566cabbc4f796a54df
https://github.com/llvm/llvm-project/commit/f21c35d54f8f7af9d0c64b566cabbc4f796a54df
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/Relocations.cpp
M lld/test/ELF/invalid/section-index.test
M lld/test/ELF/invalid/symbol-name.test
Log Message:
-----------
[ELF] Replace some Fatal with Err
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1. Change a few Fatal to
recoverable Err.
Commit: 988978f964fb84cb99c83e6cd260dcc395afb6c2
https://github.com/llvm/llvm-project/commit/988978f964fb84cb99c83e6cd260dcc395afb6c2
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/test/ELF/invalid/bad-reloc-target.test
M lld/test/ELF/lto/cache-warnings.ll
M lld/test/ELF/lto/ltopasses-custom.ll
M lld/test/ELF/lto/verify-invalid.ll
Log Message:
-----------
[ELF,test] Add env LLD_IN_TEST=1 to make some tests work if RUN_LLD_MAIN_TWICE
Commit: f359c1f524bf826eba355b8863a870450eb747b0
https://github.com/llvm/llvm-project/commit/f359c1f524bf826eba355b8863a870450eb747b0
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/Common/ErrorHandler.cpp
Log Message:
-----------
[ELF] Disable error handling script if disableOutput
Fix ELF/error-handling-script-linux.test when LLD_IN_TEST=2 is set.
Commit: 18335f4800ae5491a11e74a574969d716acddce7
https://github.com/llvm/llvm-project/commit/18335f4800ae5491a11e74a574969d716acddce7
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/Driver.cpp
Log Message:
-----------
[ELF] Ignore --time-trace if disableOutput
To avoid prevent generating two JSON for LLD_IN_TEST=2 ld.lld
--time-trace.
Commit: c1f10ef0a5c15f1dccf87ff07699055297c715a5
https://github.com/llvm/llvm-project/commit/c1f10ef0a5c15f1dccf87ff07699055297c715a5
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/test/ELF/invalid/linkorder-invalid-sec.test
Log Message:
-----------
[ELF] SHF_LINK_ORDER: replace Fatal with ErrAlways
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1. Change the Fatal to
ErrAlways (not-recoverable) as subsequent code assumes SHF_LINK_ORDER
sh_link is correct.
Commit: c1ec5beb4ab36c2c4d99ed6d735d217e74364771
https://github.com/llvm/llvm-project/commit/c1ec5beb4ab36c2c4d99ed6d735d217e74364771
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTestTableGen.cpp
Log Message:
-----------
[clang-format] Fix a TableGen crash on comment after l_paren (#124380)
Fixes #124248.
Commit: 9b6990ff2531942d534c9ef7db728af2437c3329
https://github.com/llvm/llvm-project/commit/9b6990ff2531942d534c9ef7db728af2437c3329
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[Github][CI] Add Windows Premerge Job for Testing (#122661)
This patch adds a windows premerge job for testing. We plan to enable
this by default soon once we have evaluated stability and have
reasonable reason to believe the system is reliable.
Commit: 6bb70a94da1b5c53143537f1d2e96602a74331ca
https://github.com/llvm/llvm-project/commit/6bb70a94da1b5c53143537f1d2e96602a74331ca
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Enable builds on Linux/AArch64 (#120786)
Commit: 44b85743498a88cb9fd1281bdfac47c93fcf6fee
https://github.com/llvm/llvm-project/commit/44b85743498a88cb9fd1281bdfac47c93fcf6fee
Author: Palmer <palmercox at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/test/MC/AArch64/basic-a64-instructions.s
Log Message:
-----------
[AArch64] Fix movk parsing with an .equ operand (#124428)
Prior to 5da801386c2b820a4596fc6d8da6b5f4a6da94b4, this code worked:
.equ p4_low_b0, 0x0000
movk x1, p4_low_b0, lsl 16
(The code above is from the isa-l project - I discovered this issue
while trying to compile it with clang 19 on MacOS on aarch64)
That commit fixed a different bug, but accidentally broke the case where
the second operand to movk is not a literal.
In 442f066fc464e953b7783230e95ccf2a67ebfb38, a fix was applied to handle
the case where the second operand is a value like "(Val) >> 16".
However, that didn't appear to fix the test case in this commit. In this
commit, we extend the change to handle the case where the second operand
is a identifier defined by .equ.
Fixes #124427
Commit: 753028bc81c1a556eaaaf45ac77ca0cf4c7a3b4a
https://github.com/llvm/llvm-project/commit/753028bc81c1a556eaaaf45ac77ca0cf4c7a3b4a
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Target/Xtensa/CMakeLists.txt
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.h
M llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
R llvm/lib/Target/Xtensa/XtensaUtils.cpp
R llvm/lib/Target/Xtensa/XtensaUtils.h
Log Message:
-----------
[Xtensa] Move XtensaUtils to MCTargetDesc
PR #121118 attempted to introduce `checkRegister` used by
XtensaDisassembler. Since `checkRegister` and other functions in
XtensaUtils.cpp cannot link against XtensaCodeGen, move them to
XtensaDesc, which can be used by XtensaDisassembler.
Pull Request: https://github.com/llvm/llvm-project/pull/123969
Commit: 37fdde6025c8ead27a7608643b63e0d4498211e2
https://github.com/llvm/llvm-project/commit/37fdde6025c8ead27a7608643b63e0d4498211e2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/lib/CodeGen/MachineOperand.cpp
Log Message:
-----------
[CodeGen] Remove implict conversions from Register to unsigned from MachineOperand. NFC
Commit: f46eb1430992ba1abe246dfd0b4ccf8229fe0ab7
https://github.com/llvm/llvm-project/commit/f46eb1430992ba1abe246dfd0b4ccf8229fe0ab7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.h
Log Message:
-----------
[AMDGPU] Replace unsigned with Register in SIMachineScheduler. NFC
Some of these may eventually need to VirtRegOrUnit.
Commit: ab895ad2bfb6835e8c47d8e616edb6cadaf59b77
https://github.com/llvm/llvm-project/commit/ab895ad2bfb6835e8c47d8e616edb6cadaf59b77
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/lib/AST/DeclTemplate.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124446)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect Pattern to be nonnull.
Commit: f09a6f632584c2b34f8f2d048a5420b040bb1005
https://github.com/llvm/llvm-project/commit/f09a6f632584c2b34f8f2d048a5420b040bb1005
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaAPINotes.cpp
Log Message:
-----------
[Sema] Migrate away from PointerUnion::dyn_cast (NFC) (#124447)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect AnyFunc to be nonnull.
Commit: 850852e9a45f7883bd1a04c2a6b9fceb6dcdaba2
https://github.com/llvm/llvm-project/commit/850852e9a45f7883bd1a04c2a6b9fceb6dcdaba2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#124455)
Commit: 8035d38daab028b8da3cf2b01090b5f0ceacd695
https://github.com/llvm/llvm-project/commit/8035d38daab028b8da3cf2b01090b5f0ceacd695
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/Todo/dispatch.f90
A flang/test/Parser/OpenMP/dispatch.f90
A flang/test/Semantics/OpenMP/dispatch.f90
Log Message:
-----------
[Flang][OpenMP]Add parsing support for DISPATCH construct (#121982)
This allows the Flang parser to accept the !$OMP DISPATCH and related
clauses.
Lowering is currently not implemented. Tests for unparse and parse-tree
dump is provided, and one for checking that the lowering ends in a "not
yet implemented"
---------
Co-authored-by: Kiran Chandramohan <kiran.chandramohan at arm.com>
Commit: 81d38da65e336dfb023df89f1bdc32633ad05fb2
https://github.com/llvm/llvm-project/commit/81d38da65e336dfb023df89f1bdc32633ad05fb2
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
Log Message:
-----------
[LV] Add more tests for narrowing interleave groups for AArch64.
Add additional tests for
https://github.com/llvm/llvm-project/pull/106441.
Commit: dec47b76f406242dfb9d36da4d7adfb171c71104
https://github.com/llvm/llvm-project/commit/dec47b76f406242dfb9d36da4d7adfb171c71104
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/ctlz-codesize.ll
M llvm/test/Analysis/CostModel/X86/ctlz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/ctlz.ll
M llvm/test/Analysis/CostModel/X86/cttz-codesize.ll
M llvm/test/Analysis/CostModel/X86/cttz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/cttz.ll
M llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll
M llvm/test/Transforms/SLPVectorizer/X86/ctlz.ll
M llvm/test/Transforms/SLPVectorizer/X86/cttz.ll
Log Message:
-----------
[CostModel][X86] Update baseline CTTZ/CTLZ costs for x86_64 (#124312)
Followup to #123623 - now that the CMOV has been removed, the throughput has improved, reducing the benefit of vectorization on pre-x86-64-v3 CPUs
Commit: e4514293f99962b47d881d5b40722c6b56a1f425
https://github.com/llvm/llvm-project/commit/e4514293f99962b47d881d5b40722c6b56a1f425
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaLambda.cpp
M clang/test/SemaCXX/cxx1z-constexpr-lambdas.cpp
Log Message:
-----------
[Clang] Correctly determine constexprness of dependent lambdas. (#124468)
We skipped checking if a lambda is constexpr if the parent context was
dependent, even if the lambda itself wasn't (and there is no other
opportunity to establish constexprness)
Fixes #114234
Fixes #97958
Commit: 0c784851c50b6b5b844e6a1f21bbe73efac332d4
https://github.com/llvm/llvm-project/commit/0c784851c50b6b5b844e6a1f21bbe73efac332d4
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/include/llvm/Support/MathExtras.h
Log Message:
-----------
[MathExtras] Favor using the hexadecimal FP constants (#123180)
This just fixes a TODO now that we are using C++17.
Commit: 33ad474c45e6d7a0de7bc75e15e27cf6cb9ff895
https://github.com/llvm/llvm-project/commit/33ad474c45e6d7a0de7bc75e15e27cf6cb9ff895
Author: Manuel Sainz de Baranda y Goñi <manuel at zxe.io>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init-arm.c
M clang/test/Preprocessor/init-csky.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/init-mips.c
M clang/test/Preprocessor/init-ppc.c
M clang/test/Preprocessor/init-ppc64.c
M clang/test/Preprocessor/init-s390x.c
M clang/test/Preprocessor/init-v7k-compat.c
M clang/test/Preprocessor/init-ve.c
M clang/test/Preprocessor/init-x86.c
M clang/test/Preprocessor/init.c
Log Message:
-----------
[Clang] Add predefined macros for integer constants (#123514)
This adds predefined macros for integer constants to implement section 7.18.4 of ISO/IEC 9899:1999 in `<stdint.h>` in a safe way:
```
__INT8_C(c)
__INT16_C(c)
__INT32_C(c)
__INT64_C(c)
__INTMAX_C(c)
__UINT8_C(c)
__UINT16_C(c)
__UINT32_C(c)
__UINT64_C(c)
__UINTMAX_C(c)
```
Which improves compatibility with GCC and makes it trivial to implement
section 7.18.4 of ISO/IEC 9899:1999.
Clang defines `__INT<N>_C_SUFFIX__`, `__UINT<N>_C_SUFFIX__`,
`__INTAX_C_SUFFIX__` and `__UINTMAX_C_SUFFIX__`, but these macros are
useless for this purpose.
Let's say, for example, that `__INT64_C_SUFFIX__` expands to `L` or
`LL`. If the user defines them as a macros, the compiler will produce
errors if `INT64_C` is implemented in `<stdint.h>` using
`__INT64_C_SUFFIX__`:
**minimal-test.c:**
```cpp
#if defined(__clang__) & !defined(__INT64_C)
# pragma clang diagnostic push
# pragma clang diagnostic ignored "-Wreserved-identifier"
# define __PSTDC_INT_C_(literal, suffix) literal##suffix
# define __PSTDC_INT_C(literal, suffix) __PSTDC_INT_C_(literal, suffix)
# define INT64_C(literal) __PSTDC_INT_C(literal, __INT64_C_SUFFIX__)
# pragma clang diagnostic pop
#elif defined(__GNUC__)
# define INT64_C __INT64_C
#endif
typedef __INT64_TYPE__ int64_t;
#define L "Make Clang produce an error"
#define LL "Make Clang produce an error"
int main(int argc, char **argv)
{
(void)argc; (void)argv;
int64_t v = INT64_C(9223372036854775807);
(void)v;
return 0;
}
```
<img width="697" alt="imagen"
src="https://github.com/user-attachments/assets/6df97af6-7cfd-4cf9-85b7-d7c854509325"
/>
**test.c:**
```cpp
#if defined(__clang__) && !defined(__INT8_C)
# pragma clang diagnostic push
# pragma clang diagnostic ignored "-Wreserved-identifier"
# define __PSTDC_INT_C_(literal, suffix) literal##suffix
# define __PSTDC_INT_C(literal, suffix) __PSTDC_INT_C_(literal, suffix)
# define INT8_C(literal) __PSTDC_INT_C(literal, __INT8_C_SUFFIX__)
# define INT16_C(literal) __PSTDC_INT_C(literal, __INT16_C_SUFFIX__)
# define INT32_C(literal) __PSTDC_INT_C(literal, __INT32_C_SUFFIX__)
# define INT64_C(literal) __PSTDC_INT_C(literal, __INT64_C_SUFFIX__)
# define INTMAX_C(literal) __PSTDC_INT_C(literal, __INTMAX_C_SUFFIX__)
# define UINT8_C(literal) __PSTDC_INT_C(literal, __UINT8_C_SUFFIX__)
# define UINT16_C(literal) __PSTDC_INT_C(literal, __UINT16_C_SUFFIX__)
# define UINT32_C(literal) __PSTDC_INT_C(literal, __UINT32_C_SUFFIX__)
# define UINT64_C(literal) __PSTDC_INT_C(literal, __UINT64_C_SUFFIX__)
# define UINTMAX_C(literal) __PSTDC_INT_C(literal, __UINTMAX_C_SUFFIX__)
# pragma clang diagnostic pop
#else
# define INT8_C __INT8_C
# define INT16_C __INT16_C
# define INT32_C __INT32_C
# define INT64_C __INT64_C
# define INTMAX_C __INTMAX_C
# define UINT8_C __UINT8_C
# define UINT16_C __UINT16_C
# define UINT32_C __UINT32_C
# define UINT64_C __UINT64_C
# define UINTMAX_C __UINTMAX_C
#endif
typedef __INT8_TYPE__ int8_t;
typedef __INT16_TYPE__ int16_t;
typedef __INT32_TYPE__ int32_t;
typedef __INT64_TYPE__ int64_t;
typedef __INTMAX_TYPE__ intmax_t;
typedef __UINT8_TYPE__ uint8_t;
typedef __UINT16_TYPE__ uint16_t;
typedef __UINT32_TYPE__ uint32_t;
typedef __UINT64_TYPE__ uint64_t;
typedef __UINTMAX_TYPE__ uintmax_t;
#define L "Make Clang produce an error"
#define LL "Make Clang produce an error"
#define U "Make Clang produce an error"
#define UL "Make Clang produce an error"
#define ULL "Make Clang produce an error"
int main(int argc, char **argv)
{
(void)argc; (void)argv;
int8_t a = INT8_C (127);
int16_t b = INT16_C (32767);
int32_t c = INT32_C (2147483647);
int64_t d = INT64_C (9223372036854775807);
intmax_t e = INTMAX_C (9223372036854775807);
uint8_t f = UINT8_C (255);
uint16_t g = UINT16_C (65535);
uint32_t h = UINT32_C (4294967295);
uint64_t i = UINT64_C (18446744073709551615);
uintmax_t j = UINTMAX_C(18446744073709551615);
(void)a; (void)b; (void)c; (void)d; (void)e;
(void)f; (void)g; (void)h; (void)i; (void)j;
return 0;
}
```
Commit: 2af819fa3d802e55027dcc1408186cb8738f08e6
https://github.com/llvm/llvm-project/commit/2af819fa3d802e55027dcc1408186cb8738f08e6
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/test/Transforms/PGOProfile/memprof.ll
Log Message:
-----------
[MemProf] Add test for hot hints (#124394)
The change in PR124219 required removing one of the tests added for
-memprof-use-hot-hints, since we no longer label any contexts as hot in
metadata, so add a new test that checks the hot attribute instead.
Commit: f8ab91f74f152c8a6d8aaedb8165109c497a618d
https://github.com/llvm/llvm-project/commit/f8ab91f74f152c8a6d8aaedb8165109c497a618d
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
Log Message:
-----------
[LVI][CVP] Add test for trunc bittest. (NFC)
Commit: e8e75e08c9214fe25b56535fc26f5435a875a137
https://github.com/llvm/llvm-project/commit/e8e75e08c9214fe25b56535fc26f5435a875a137
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/BPSectionOrderer.h
Log Message:
-----------
[lld-macho] Remove unneeded functions from BPSectionOrderer. NFC
Commit: ccc066e8d5a742f79b41a0f90ef309d5b9e92c2a
https://github.com/llvm/llvm-project/commit/ccc066e8d5a742f79b41a0f90ef309d5b9e92c2a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/utils/TableGen/MveEmitter.cpp
Log Message:
-----------
[TableGen] Avoid repeated map lookups (NFC) (#124448)
This patch avoids repeated map lookups and constructions of temporary
std::string instances by switching to DenseSet.
Commit: 1c4341d176492da5f276937b84a3d0c959e4cf5b
https://github.com/llvm/llvm-project/commit/1c4341d176492da5f276937b84a3d0c959e4cf5b
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
Log Message:
-----------
[SandboxVec][DAG] Fix interval check without Node
This patch moves the check of whether a node exists before the check of
whether it is contained in the interval.
Commit: fb01a289038c16e13c6133ee602a58254b349411
https://github.com/llvm/llvm-project/commit/fb01a289038c16e13c6133ee602a58254b349411
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/COFF/DLL.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
A lld/test/COFF/arm64x-import.test
Log Message:
-----------
[LLD][COFF] Implement support for hybrid IAT on ARM64X (#124189)
In hybrid images, the PE header references a single IAT for both native
and EC views, merging entries where possible. When merging isn't
feasible, different imports are grouped together, and ARM64X relocations
are emitted as needed.
Commit: 80ab237c1187aa7e8a1f546175887d768fa14e2d
https://github.com/llvm/llvm-project/commit/80ab237c1187aa7e8a1f546175887d768fa14e2d
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/test/COFF/arm64x-import.test
Log Message:
-----------
[LLD][COFF] Add REQUIRE x86 to arm64x-import.test (NFC)
This ensures the disassembler can handle ARM64X binaries correctly. Fixes #124189.
Commit: e278e1b6ece025ace4238748c0f57fda3ca833f9
https://github.com/llvm/llvm-project/commit/e278e1b6ece025ace4238748c0f57fda3ca833f9
Author: Alexey Bader <alexey.bader at intel.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
Log Message:
-----------
[NFC][CodeGen] Fix typos in code comments. (#124382)
This fixes typos in `calcUniqueIDUpdateFlagsAndSize` function.
Commit: c9637afec7ed72904c74c2fc71e990d378f3d7a6
https://github.com/llvm/llvm-project/commit/c9637afec7ed72904c74c2fc71e990d378f3d7a6
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[Clang] Fix createConstexprUnknownAPValues to use zero offset when ceating APValue (#124478)
When implmenting P2280R4 here:
https://github.com/llvm/llvm-project/pull/95474
When creating the APValue to store and constexprUnknown value I used an
offset of CharUnits::One() but it should have been CharUnits::Zero().
This change just adjusts that value.
Commit: bfa7de0df5d8eb8dd284b0f49f10e7f0cd850693
https://github.com/llvm/llvm-project/commit/bfa7de0df5d8eb8dd284b0f49f10e7f0cd850693
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/canonicalize-vars.ll
Log Message:
-----------
X86: Support FCANONICALIZE on f64/f80 for i686 with SSE2 or AVX (#123917)
Currently, FCANONICALIZE is not enabled for f64 with SSE2,
and is not enabled for f80 for 32bit system.
Let's enable them.
Commit: db79fb2a91df31a07f312f8e061936927ac5c506
https://github.com/llvm/llvm-project/commit/db79fb2a91df31a07f312f8e061936927ac5c506
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
Log Message:
-----------
[msan] Add handlers for AVX masked load/store intrinsics (#123857)
This patch adds explicit support for AVX masked load/store intrinsics,
largely by applying the intrinsics to the shadows (but subtly different
to handleIntrinsicByApplyingToShadow()).
We do not reuse the handleMaskedLoad/Store functions. The key challenge
is that the LLVM masked intrinsics require a vector of booleans, while
AVX masked intrinsics use the MSBs of a vector of integers.
X86InstCombineIntrinsic.cpp::simplifyX86MaskedLoad mentions that the x86
backend does not know how to efficiently convert from a vector of
booleans back into the AVX mask format; therefore, they (and we) do not
reduce AVX masked intrinsics into LLVM masked intrinsics.
Commit: 980e86f130eea02bd41b887f4ed896340fc90f6c
https://github.com/llvm/llvm-project/commit/980e86f130eea02bd41b887f4ed896340fc90f6c
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
Log Message:
-----------
[msan] Add avx512-intrinsics.ll and avx512-intrinsics-upgrade.ll test case (#123980)
These are forked from the corresponding files in llvm/test/CodeGen/X86/.
avx512-intrinsics.ll shows that many intrinsics are already
heuristically handled by MSan, and can be used to track refinements to
the intrinsic handling.
avx512-intrinsics-upgrade.ll tests intrinsics that LLVM "auto-upgrades";
for example, @llvm.x86.avx512.mask.store is converted into
@llvm.masked.store (which has the interesting side effect that
MemorySanitizer can already handle it via its existing
handleMaskedStore).
Commit: 84af3ee5124de3385b829c3a9980fd734f0d92e8
https://github.com/llvm/llvm-project/commit/84af3ee5124de3385b829c3a9980fd734f0d92e8
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/InputFiles.cpp
Log Message:
-----------
[ELF] Replace Fatal with Err
Commit: a6044a05cd16d2c5dbca80757a160cba9a2cb037
https://github.com/llvm/llvm-project/commit/a6044a05cd16d2c5dbca80757a160cba9a2cb037
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
Log Message:
-----------
[msan] Fix-forward avx512-intrinsics-upgrade.ll (#124495)
I had added the test in https://github.com/llvm/llvm-project/pull/123980
and contemporaneously added AVX masked store/load intrinsics
(https://github.com/llvm/llvm-project/pull/123857) and forgot to update
the test output for the intersection. This patch fixes the output.
Commit: b9d301cc7e4fe4c442ec15169686fa4a18f5cdfc
https://github.com/llvm/llvm-project/commit/b9d301cc7e4fe4c442ec15169686fa4a18f5cdfc
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
Log Message:
-----------
Revert "[msan] Add handlers for AVX masked load/store intrinsics (#123857)"
This reverts commit db79fb2a91df31a07f312f8e061936927ac5c506.
Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/144/builds/16636/steps/6/logs/FAIL__LLVM__avx512-intrinsics-upgrade_ll)
Commit: b6eeec586fa6c0db4ab1b0e129111e82a97c7283
https://github.com/llvm/llvm-project/commit/b6eeec586fa6c0db4ab1b0e129111e82a97c7283
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
Log Message:
-----------
Revert "[msan] Fix-forward avx512-intrinsics-upgrade.ll (#124495)"
This reverts commit a6044a05cd16d2c5dbca80757a160cba9a2cb037.
Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/144/builds/16636/steps/6/logs/FAIL__LLVM__avx512-intrinsics-upgrade_ll)
Commit: b2647ffbf797dd5a457b6b19faab06956934d067
https://github.com/llvm/llvm-project/commit/b2647ffbf797dd5a457b6b19faab06956934d067
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
R llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
R llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
Log Message:
-----------
Revert "[msan] Add avx512-intrinsics.ll and avx512-intrinsics-upgrade.ll test case (#123980)"
This reverts commit 980e86f130eea02bd41b887f4ed896340fc90f6c.
Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/154/builds/10901/steps/5/logs/FAIL__LLVM__avx512-intrinsics-upgrade_ll)
Commit: 7107f55d82f8d1077d5478e8f58c94851385c06f
https://github.com/llvm/llvm-project/commit/7107f55d82f8d1077d5478e8f58c94851385c06f
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/AST/TemplateBase.cpp
Log Message:
-----------
[clang] NFC: remove redundant dyn_cast
Commit: 0e6b58202ca9c4d1ca814e4bea5bd3f0bac7f329
https://github.com/llvm/llvm-project/commit/0e6b58202ca9c4d1ca814e4bea5bd3f0bac7f329
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/test/ELF/lto/version-script.ll
M lld/test/ELF/lto/version-script2.ll
Log Message:
-----------
[ELF] Improve parseSymbolVersion tests in for compileBitcodeFiles
Otherwise, the tests won't catch a mistake that removes
`parseSymbolVersion`.
Commit: 2a26292388fcab0c857c91b2d08074c33abd37e8
https://github.com/llvm/llvm-project/commit/2a26292388fcab0c857c91b2d08074c33abd37e8
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/ELF/Driver.cpp
Log Message:
-----------
[ELF] Make isExported accurate early
LTO compilation might define symbols not in the symbol table (e.g.
__emutls_v.x in test/ELF/lto/wrap-unreferenced-before-codegen.test).
These symbols have a false `isExported` until
`demoteSymbolsAndComputeIsPreemptible`. This is usually benign as we do
not reference `isExported` that early.
Ensure that `isExported` is correct early. This helps remove a redundant
`isExported` computation in `demoteSymbolsAndComputeIsPreemptible`.
Commit: 1a4d6de1b532149b10522eae5dabce39e5f7c687
https://github.com/llvm/llvm-project/commit/1a4d6de1b532149b10522eae5dabce39e5f7c687
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Remove redundant isExported computation
Commit 2a26292388fcab0c857c91b2d08074c33abd37e8 made `isExported`
accurate except a few linker-synthesized symbols in finalizeSections.
We can collect these linker-synthesized symbols into a vector
and avoid recomputation for other symbols.
Commit: b9efbed468ec18044070eea936c694fb8f6e244b
https://github.com/llvm/llvm-project/commit/b9efbed468ec18044070eea936c694fb8f6e244b
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/ELF/Writer.cpp
R lld/test/ELF/hip-section-layout.s
Log Message:
-----------
Revert "Move HIP fatbin sections farther away from .text"
This reverts commit 048f35037779763963c4b4478a0884e828ea9538.
This reverts commit f7bbc40b0736cc417f57cd039b098b504cf6a71f.
Related to #95949. A developer with no prior lld contribution and very
little AMD contribution sneaked in these application-specific section
order rules we discourage.
Commit: 6805d7e8aa5f2ecea021acbb8c6b4c29ca432e78
https://github.com/llvm/llvm-project/commit/6805d7e8aa5f2ecea021acbb8c6b4c29ca432e78
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/test/tools/llvm-objcopy/ELF/remove-note.test
Log Message:
-----------
[test] Convert remove-note.test from \r\n to \n after #118739
Commit: 9452ee4f750a849148a391ac75eb31220343fa1e
https://github.com/llvm/llvm-project/commit/9452ee4f750a849148a391ac75eb31220343fa1e
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Treat uppercase identifiers after struct as macros (#124397)
This restores the behavior before llvmorg-20-init.
Fixes #94184.
Fixes #117477.
Fixes #122690.
Fixes #123142.
Commit: a01e1d4e044ec0147e04a5af9ca54ede550f5dc1
https://github.com/llvm/llvm-project/commit/a01e1d4e044ec0147e04a5af9ca54ede550f5dc1
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/Sema/HeuristicResolver.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
Log Message:
-----------
[clang][Sema] Handle dependent qualifier in HeuristicResolver::resolveDeclRefExpr() (#124515)
Commit: bd38c4993aa41d89a13cbc4dc457df4d81e410bf
https://github.com/llvm/llvm-project/commit/bd38c4993aa41d89a13cbc4dc457df4d81e410bf
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-frint-frecpx-fsqrt.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (8/11) (#116834)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`FRINTx`, `FRECPX`, and `FSQRT` instructions.
Commit: 351ee30529c054d39ea742c1b9c738c9e70c131b
https://github.com/llvm/llvm-project/commit/351ee30529c054d39ea742c1b9c738c9e70c131b
Author: bernhardu <bernhardu at mailbox.org>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Support some more 6 byte instructions. (#124006)
This patch adds several instructions seen when trying to run a
executable built with ASan with llvm-mingw.
(x86 and x86_64, using the git tip in llvm-project).
Also includes instructions collected by
Roman Pišl and Eric Pouech in the Wine bug reports below.
```
Related: https://github.com/llvm/llvm-project/issues/96270
Co-authored-by: Roman Pišl <rpisl at seznam.cz>
https://bugs.winehq.org/show_bug.cgi?id=50993
https://bugs.winehq.org/attachment.cgi?id=70233
Co-authored-by: Eric Pouech <eric.pouech at gmail.com>
https://bugs.winehq.org/show_bug.cgi?id=52386
https://bugs.winehq.org/attachment.cgi?id=71626
```
Commit: bbf377060adc8607e1187952388c7eeea7cf4933
https://github.com/llvm/llvm-project/commit/bbf377060adc8607e1187952388c7eeea7cf4933
Author: bernhardu <bernhardu at mailbox.org>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Support some more 7 or 8 byte instructions. (#124011)
This patch adds several instructions seen when trying to run a
executable built with ASan with llvm-mingw.
(x86 and x86_64, using the git tip in llvm-project).
Also includes instructions collected by
Roman Pišl and Eric Pouech in the Wine bug reports below.
```
Related: https://github.com/llvm/llvm-project/issues/96270
Co-authored-by: Roman Pišl <rpisl at seznam.cz>
https://bugs.winehq.org/show_bug.cgi?id=50993
https://bugs.winehq.org/attachment.cgi?id=70233
Co-authored-by: Eric Pouech <eric.pouech at gmail.com>
https://bugs.winehq.org/show_bug.cgi?id=52386
https://bugs.winehq.org/attachment.cgi?id=71626
```
Commit: 7211bf48a62bfe3a181013f412f2fa6e112ae99f
https://github.com/llvm/llvm-project/commit/7211bf48a62bfe3a181013f412f2fa6e112ae99f
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/test/Driver/fsave-main-program.f90
M flang/test/Lower/fsave-main-program.f90
Log Message:
-----------
[flang][driver] add negative from of -fsave-main-program (#124110)
Add the `-fno` form for consistency and to make it easy to switch the
default for downstream users.
Commit: 3b5e9eed2f67c1fb6dcf7033e92509ba2b0381e9
https://github.com/llvm/llvm-project/commit/3b5e9eed2f67c1fb6dcf7033e92509ba2b0381e9
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
A llvm/test/CodeGen/NVPTX/convert-sm100.ll
Log Message:
-----------
[NVPTX] Add float to tf32 conversion intrinsics (#124316)
This patch adds the set of f32 -> tf32 cvt intrinsics introduced
in sm100 with ptx8.6. This builds on top of the recent PR #121507.
Tests are verified with a 12.8 ptxas executable.
PTX ISA link:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 87103a016fbfd480e1d3bb8eba23c27a9c74e70d
https://github.com/llvm/llvm-project/commit/87103a016fbfd480e1d3bb8eba23c27a9c74e70d
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/include/clang/Basic/TargetBuiltins.h
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/CodeGen/AArch64/builtin-shufflevector-fp8.c
A clang/test/CodeGen/AArch64/fp8-cast.c
M clang/test/CodeGen/arm-mfp8.c
M clang/test/CodeGenCXX/aarch64-mangle-neon-vectors.cpp
M clang/test/CodeGenCXX/mangle-neon-vectors.cpp
A clang/test/Sema/aarch64-fp8-cast.c
M clang/test/Sema/arm-mfp8.cpp
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[AArch64] Implement NEON FP8 vectors as VectorType (#123603)
Reimplement Neon FP8 vector types using attribute `neon_vector_type`
instead of having them as builtin types.
This allows to implement FP8 Neon intrinsics without the need to add
special cases for these types when using `__builtin_shufflevector`
or bitcast (using C-style cast operator) between vectors, both
extensively used in the generated code in `arm_neon.h`.
Commit: 8f17f51deb12456f25d32b9a42ac1f00feabbfbc
https://github.com/llvm/llvm-project/commit/8f17f51deb12456f25d32b9a42ac1f00feabbfbc
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Fix comments format(NFC) (#124520)
This PR corrects the formatting of comments in Markdown. The previous
format was as follows:
https://mlir.llvm.org/docs/Dialects/TOSA/#tosaerf-mlirtosaerfop
https://mlir.llvm.org/docs/Dialects/TOSA/#tosarescale-mlirtosarescaleop
Commit: 14ffff384740f484b382a1225f4bd01aeebfdc3f
https://github.com/llvm/llvm-project/commit/14ffff384740f484b382a1225f4bd01aeebfdc3f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/AST/TextNodeDumper.cpp
A clang/test/AST/ast-dump-APValue-lvalue.cpp
M clang/test/AST/ast-dump-APValue-todo.cpp
Log Message:
-----------
[clang] Add dump() support for lvalue APValues (#124476)
Add some lvalue information to the `dump()` output of lvalue APValues.
Commit: 43a50deb63453cd3c800f097514d500536f9d436
https://github.com/llvm/llvm-project/commit/43a50deb63453cd3c800f097514d500536f9d436
Author: Samuel Ginzburg <ginzburg.sam at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[MLIR][ROCDL] Add GFX940 SMFMAC (2:4 sparsity) instructions to the ROCDL dialect (#124435)
# Overview
This PR adds 2:4 structured sparsity (sparse A, dense B) matrix multiply
instructions to ROCDL.
# Testing
I've added tests to Dialect/mlir and Target/mlir
Commit: ac87d6b03642eca3901a7776d73be368299402e9
https://github.com/llvm/llvm-project/commit/ac87d6b03642eca3901a7776d73be368299402e9
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/test/Lower/Intrinsics/ieee_next.f90
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fold `arith.cmpi eq, %val, %one : i1` -> `%val` and `arith.cmpi ne, %val, %zero : i1 -> %val` (#124436)
https://alive2.llvm.org/ce/z/dNZMdC
Commit: ddbfe6f7d2075a828fa9e8e5f5734bf881cda13a
https://github.com/llvm/llvm-project/commit/ddbfe6f7d2075a828fa9e8e5f5734bf881cda13a
Author: Robert Dazi <14996868+v01dXYZ at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ExprCXX.h
M clang/lib/Sema/TreeTransform.h
A clang/test/SemaCXX/array-type-trait-with-template.cpp
Log Message:
-----------
[Sema] Fix __array_rank instantiation (#124491)
The type being queried was left as a template type parameter, making the
whole expression as dependent and thus not eligible to static_assert.
Fixes #123498
Co-authored-by: v01dxyz <v01dxyz at v01d.xyz>
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: b7286dbef9dc1986860d29e390b092599e1d7db5
https://github.com/llvm/llvm-project/commit/b7286dbef9dc1986860d29e390b092599e1d7db5
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
Log Message:
-----------
Reland "[LoopVectorize] Add support for reverse loops in isDereferenceableAndAlignedInLoop #96752" (#123616)
The last attempt failed a sanitiser build because we were
creating a reference to a null Predicates pointer in
isDereferenceableAndAlignedInLoop. This was exposed by
the unit test IsDerefReadOnlyLoop in
unittests/Analysis/LoadsTest.cpp. I fixed this by falling
back on getConstantMaxBackedgeTakenCount if Predicates is
null - see line 316 in llvm/lib/Analysis/Loads.cpp. There
are no other changes.
Commit: b8d921003d1f20819b897b066e02d22787f11550
https://github.com/llvm/llvm-project/commit/b8d921003d1f20819b897b066e02d22787f11550
Author: David Truby <david.truby at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/test/HLFIR/unroll-loops.fir
M flang/test/Integration/unroll-loops.f90
Log Message:
-----------
[flang][NFC] Restrict -funroll-loops tests to known working targets (#123939)
If -funroll-loops tests are not restricted to specific targets the tests
may behave differently based on the host platform. This patch restricts
the tests to aarch64 and x86_64, and removes the PowerPC XFAIL.
Commit: 98e52db4a5e57f919bb70312f9ca7deb16ee6fcb
https://github.com/llvm/llvm-project/commit/98e52db4a5e57f919bb70312f9ca7deb16ee6fcb
Author: David Truby <david.truby at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/test/HLFIR/unroll-loops.fir
M flang/test/Integration/unroll-loops.f90
Log Message:
-----------
Revert "[flang][NFC] Restrict -funroll-loops tests to known working targets" (#124536)
Reverts llvm/llvm-project#123939
Commit: 6087c3049656bbaef51fffb48e2404e86f7e0d3f
https://github.com/llvm/llvm-project/commit/6087c3049656bbaef51fffb48e2404e86f7e0d3f
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lldb/source/Host/common/Host.cpp
Log Message:
-----------
[lldb] Simplify preprocessor conditional (#124522)
The long list of defines is just a very elaborate way to say "not
windows".
Commit: cfdd7d736a94aa65a23eb41258d9d6712cdb2b0d
https://github.com/llvm/llvm-project/commit/cfdd7d736a94aa65a23eb41258d9d6712cdb2b0d
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] sched cpu affinity for linux interception. (#124194)
Commit: e21b80464a44ef6491e44517ac59892c10ba2d6c
https://github.com/llvm/llvm-project/commit/e21b80464a44ef6491e44517ac59892c10ba2d6c
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] socketpair interception. (#124107)
Commit: d8ad1eef8ffeb4ef5474f0e38d6d340d82c53572
https://github.com/llvm/llvm-project/commit/d8ad1eef8ffeb4ef5474f0e38d6d340d82c53572
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-flogb.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (7/11) (#116833)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`FLOGB` instructions.
Commit: b31e9747d0866ff97a1cd4a608b7eade31c0aa0b
https://github.com/llvm/llvm-project/commit/b31e9747d0866ff97a1cd4a608b7eade31c0aa0b
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
M lldb/test/API/linux/aarch64/gcs/main.c
Log Message:
-----------
[lldb][AArch64] Fix expression evaluation with Guarded Control Stacks (#123918)
When the Guarded Control Stack (GCS) is enabled, returns cause the
processor to validate that the address at the location pointed to by
gcspr_el0 matches the one in the link register.
```
ret (lr=A) << pc
| GCS |
+=====+
| A |
| B | << gcspr_el0
Fault: tried to return to A when you should have returned to B.
```
Therefore when an expression wrapper function tries to return to the
expression return address (usually `_start` if there is a libc), it
would fault.
```
ret (lr=_start) << pc
| GCS |
+============+
| user_func1 |
| user_func2 | << gcspr_el0
Fault: tried to return to _start when you should have returned to user_func2.
```
To fix this we must push that return address to the GCS in
PrepareTrivialCall. This value is then consumed by the final return and
the expression completes as expected.
If for some reason that fails, we will manually restore the value of
gcspr_el0, because it turns out that PrepareTrivialCall
does not restore registers if it fails at all. So for now I am handling
gcspr_el0 specifically, but I have filed
https://github.com/llvm/llvm-project/issues/124269 to address the
general problem.
(the other things PrepareTrivialCall does are exceedingly likely to not
fail, so we have never noticed this)
```
ret (lr=_start) << pc
| GCS |
+============+
| user_func1 |
| user_func2 |
| _start | << gcspr_el0
No fault, we return to _start as normal.
```
The gcspr_el0 register will be restored after expression evaluation so
that the program can continue correctly.
However, due to restrictions in the Linux GCS ABI, we will not restore
the enable bit of gcs_features_enabled. Re-enabling GCS via ptrace is
not supported because it requires memory to be allocated by the kernel.
We could disable GCS if the expression enabled GCS, however this would
use up that state transition that the program might later rely on. And
generally it is cleaner to ignore the enable bit, rather than one state
transition of it.
We will also not restore the GCS entry that was overwritten with the
expression's return address. On the grounds that:
* This entry will never be used by the program. If the program branches,
the entry will be overwritten. If the program returns, gcspr_el0 will
point to the entry before the expression return address and that entry
will instead be validated.
* Any expression that calls functions will overwrite even more entries,
so the user needs to be aware of that anyway if they want to preserve
the contents of the GCS for inspection.
* An expression could leave the program in a state where restoring the
value makes the situation worse. Especially if we ever support this in
bare metal debugging.
I will later document all this on
https://lldb.llvm.org/use/aarch64-linux.html.
Tests have been added for:
* A function call that does not interact with GCS.
* A call that does, and disables it (we do not re-enable it).
* A call that does, and enables it (we do not disable it again).
* Failure to push an entry to the GCS stack.
Commit: ef54e0bbfbef59932a59a1640f1f9e14b70cc41b
https://github.com/llvm/llvm-project/commit/ef54e0bbfbef59932a59a1640f1f9e14b70cc41b
Author: David Green <david.green at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
Log Message:
-----------
[AArch64] Avoid generating LDAPUR on certain cores (#124274)
On the CPUs listed below, we want to avoid LDAPUR for performance
reasons. Add a tuning feature to disable them when using:
-mcpu=neoverse-v2
-mcpu=neoverse-v3
-mcpu=cortex-x3
-mcpu=cortex-x4
-mcpu=cortex-x925
Commit: 347fb208c1e390a4f108e566efc81bd945837307
https://github.com/llvm/llvm-project/commit/347fb208c1e390a4f108e566efc81bd945837307
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M libclc/clc/include/clc/relational/relational.h
M libclc/clc/lib/generic/relational/clc_isequal.cl
M libclc/clc/lib/generic/relational/clc_isgreater.cl
M libclc/clc/lib/generic/relational/clc_isgreaterequal.cl
M libclc/clc/lib/generic/relational/clc_isless.cl
M libclc/clc/lib/generic/relational/clc_islessequal.cl
M libclc/clc/lib/generic/relational/clc_islessgreater.cl
M libclc/clc/lib/generic/relational/clc_isnotequal.cl
Log Message:
-----------
[libclc] Optimize CLC vector relational builtins (#124537)
Clang knows how to perform relational operations on OpenCL vectors, so
we don't need to use the Clang builtins. The builtins we were using
didn't support vector types, so we were previously scalarizing.
This commit generates the same LLVM fcmp operations as before, just
without the scalarization.
Commit: e9e06bea8661ddd474557a0db2cdc8770a55b66f
https://github.com/llvm/llvm-project/commit/e9e06bea8661ddd474557a0db2cdc8770a55b66f
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
Log Message:
-----------
[lldb][AArch64][NFC] Move a comment in GCS tests
Got put in the wrong place during a rebase.
Commit: d7e561b913d2a75c7c1807bf1c1e0bddc270a2b3
https://github.com/llvm/llvm-project/commit/d7e561b913d2a75c7c1807bf1c1e0bddc270a2b3
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/test/Lower/OpenMP/loop-directive.f90
Log Message:
-----------
[flang][OpenMP] Support `bind` clause code-gen for standalone `loop`s (#122674)
Extends rewriting of `loop` directives by supporting `bind` clause for
standalone directives. This follows both the spec and the current state
of clang as follows:
* No `bind` or `bind(thread)`: the `loop` is rewritten to `simd`.
* `bind(parallel)`: the `loop` is rewritten to `do`.
* `bind(teams)`: the `loop` is rewritten to `distribute`.
This is a follow-up PR for
https://github.com/llvm/llvm-project/pull/122632, only the latest commit
in this PR is relevant to the PR.
Commit: e7592d83e0ac58f61cfe8dcf61bcc8e7a8bd67b3
https://github.com/llvm/llvm-project/commit/e7592d83e0ac58f61cfe8dcf61bcc8e7a8bd67b3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[Offload][NFC] Make sure the thread is not running already
Commit: 86705eb6242b5e2d6153708ddedffbfc95491756
https://github.com/llvm/llvm-project/commit/86705eb6242b5e2d6153708ddedffbfc95491756
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/huge-stack-offset.ll
Log Message:
-----------
[X86] huge-stack-offset.ll - add gnux32 test coverage
This should match x86 for the basic implementation, but its useful to check it actually runs correctly.
Commit: 3684ec425904424fc4dc80c8661f82bc676d7197
https://github.com/llvm/llvm-project/commit/3684ec425904424fc4dc80c8661f82bc676d7197
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/include/flang/Tools/TargetSetup.h
M flang/runtime/exceptions.cpp
Log Message:
-----------
[flang] IEEE underflow control for Arm (#124170)
Update IEEE_SUPPORT_UNDERFLOW_CONTROL, IEEE_GET_UNDERFLOW_MODE, and
IEEE_SET_UNDERFLOW_MODE code for Arm.
Commit: 3a4376b8f90686f754ee51b296a064ab03c12895
https://github.com/llvm/llvm-project/commit/3a4376b8f90686f754ee51b296a064ab03c12895
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/pointer-phis.ll
M llvm/test/Transforms/LoopDistribute/pointer-phi-in-loop.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected
Log Message:
-----------
LAA: handle 0 return from getPtrStride correctly (#124539)
getPtrStride returns 0 when the PtrScev is loop-invariant, and this is
not an erroneous value: it returns std::nullopt to communicate that it
was not able to find a valid pointer stride. In analyzeLoop, we call
getPtrStride with a value_or(0) conflating the zero return value with
std::nullopt. Fix this, handling loop-invariant loads correctly.
Commit: f07505849c8e683bf8f444e205d3dd3284759b7d
https://github.com/llvm/llvm-project/commit/f07505849c8e683bf8f444e205d3dd3284759b7d
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M offload/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[Offload] Fix server thread from being shut down if unused
Commit: 54928a10c8dba7c07c6224c1ead5c02a335890e6
https://github.com/llvm/llvm-project/commit/54928a10c8dba7c07c6224c1ead5c02a335890e6
Author: Dipesh Sharma <76941383+dipeshs809 at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/LangOptions.h
M clang/lib/Basic/Targets/OSTargets.cpp
A clang/test/Preprocessor/deprecate-threads-macro-definition-msvc1939.c
M clang/test/Preprocessor/init-aarch64.c
Log Message:
-----------
[clang] __STDC_NO_THREADS__ is no longer necessary for VS 2022 1939 and above (#117149)
Since `__STDC_NO_THREADS__` is a reserved identifier,
- If `MSVC version < 17.9`
- C version < C11(201112L)
- When `<threads.h>` is unavailable `!__has_include(<threads.h>)` is
`__has_include` is defined.
Closes #115529
Commit: f95a8bde3425ada0ef004186eb8ccda6e723241c
https://github.com/llvm/llvm-project/commit/f95a8bde3425ada0ef004186eb8ccda6e723241c
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[AArch64] Refactor implementation of FP8 types (NFC) (#123604)
- The FP8 scalar type (`__mfp8`) was described as a vector type
- The FP8 vector types were described/assumed to have integer element
type (the element type ought to be `__mfp8`)
- Add support for `m` type specifier (denoting `__mfp8`) in
`DecodeTypeFromStr` and create builtin function prototypes using that
specifier, instead of `int8_t`
Commit: f1d5e70a00fbc80f42977800e9299353b06d48cb
https://github.com/llvm/llvm-project/commit/f1d5e70a00fbc80f42977800e9299353b06d48cb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Do not check poison values for corresponding vectorized entries
No need to check poison values if they have been vectorized and/or mark
them as vectorized, it should work only for instructions.
Commit: eaa5897534cbd263d0cdbf780f72133c2fe8d8d4
https://github.com/llvm/llvm-project/commit/eaa5897534cbd263d0cdbf780f72133c2fe8d8d4
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M libclc/clc/include/clc/relational/relational.h
M libclc/clc/lib/generic/relational/clc_isordered.cl
M libclc/clc/lib/generic/relational/clc_isunordered.cl
Log Message:
-----------
[libclc] Optimize CLC vector is(un)ordered builtins (#124546)
These are similar to 347fb208, but these builtins are expressed in terms
of other builtins. The LLVM IR generated features the same fcmp ord/uno
comparisons as before, but consistently in vector form.
Commit: 561132e71b29d9b747dfda1509f715847852f77b
https://github.com/llvm/llvm-project/commit/561132e71b29d9b747dfda1509f715847852f77b
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Decl.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
Log Message:
-----------
[Clang] Fix immediate escalation of template function specializations. (#124404)
We record whether an expression is immediate escalating in the
FunctionScope.
However, that only happen when parsing or transforming an expression.
This might not happen when transforming a non dependent expression.
This patch fixes that by considering a function immediate when
instantiated from an immediate function.
Fixes #123405
Commit: 081723b9db84e78d7dd240b46af2aeb3b51b00be
https://github.com/llvm/llvm-project/commit/081723b9db84e78d7dd240b46af2aeb3b51b00be
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp
M lldb/source/Plugins/SymbolFile/PDB/PDBASTParser.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/unittests/Symbol/TestTypeSystemClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
Log Message:
-----------
[lldb][TypeSystem] Ensure that ParmVarDecls have the correct DeclContext (#124279)
While sifting through this part of the code I noticed that when we parse
C++ methods, `DWARFASTParserClang` creates two sets of `ParmVarDecls`,
one in `ParseChildParameters` and once in `AddMethodToCXXRecordType`.
The former is unused when we're dealing with methods. Moreover, the
`ParmVarDecls` we created in `ParseChildParameters` were created with an
incorrect `clang::DeclContext` (namely the DeclContext of the function,
and not the function itself). In Clang, there's
`ParmVarDecl::setOwningFunction` to adjust the DeclContext of a
parameter if the parameter was created before the FunctionDecl. But we
never used it.
This patch removes the `ParmVarDecl` creation from
`ParseChildParameters` and instead creates a
`TypeSystemClang::CreateParameterDeclarations` that ensures we set the
DeclContext correctly.
Note there is one differences in how `ParmVarDecl`s would be created
now: we won't set a ClangASTMetadata entry for any of the parameters. I
don't think this was ever actually useful for parameter DIEs anyway.
This wasn't causing any concrete issues (that I know of), but was quite
surprising. And this way of setting the parameters seems easier to
reason about (in my opinion).
Commit: 5c5bbffe75caaaefdc68305e85a625a057b09159
https://github.com/llvm/llvm-project/commit/5c5bbffe75caaaefdc68305e85a625a057b09159
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
[clang][ASTImporter] Import source location of explicit object parameter instead of copying it (#124305)
We used to copy the `SourceLocation` instead of importing it, which
isn't correct since the `SourceManager`'s of the source and target
ASTContext might differ.
Also adds test that confirms that we import the explicit object
parameter location for `ParmVarDecl`s. This is how Clang determines
whether a parameter `isExplicitObjectParamater`. The LLDB expression
evaluator relies on this for calling "explicit object member functions".
Commit: 1f5335c1db5d54b4465677c224b48e0ffc78e6d9
https://github.com/llvm/llvm-project/commit/1f5335c1db5d54b4465677c224b48e0ffc78e6d9
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
M mlir/test/Dialect/Linalg/fuse-with-reshape-by-collapsing.mlir
M mlir/test/Dialect/Linalg/fusion-push-reshape.mlir
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
M mlir/test/Dialect/Tensor/bufferize.mlir
Log Message:
-----------
Make index computation used divsi/remsi (#124390)
The index computation is meant to be signed. Using unsigned could lead
to subtle errors. Fix places where some index math was using unsigned
operations.
Signed-off-by: MaheshRavishankar <mahesh.ravishankar at gmail.com>
Commit: 27c917307563eae93c7fef9c3944e56e1f5b5f6d
https://github.com/llvm/llvm-project/commit/27c917307563eae93c7fef9c3944e56e1f5b5f6d
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/include/clang/AST/ExprCXX.h
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
Log Message:
-----------
[Clang] Remove unnecessary Decl transform & profiles for SizeOfPackExpr (#124533)
We used to always transform the pattern declaration for SizeOfPackExpr
to ensure the constraint expression's profile produced the desired
result. However, this approach failed to handle pack expansions when the
pack referred to function parameters. In such cases, the function
parameters were formerly expanded to 1 to avoid building Subst* nodes
(see e6974daa7). That workaround caused us to transform a pack without a
proper ArgumentPackSubstitutionIndex, leading to crashes when
transforming the pattern.
It turns out that profiling the pattern for partially substituted
SizeOfPackExprs is unnecessary because their transformed forms are also
profiled within the partial arguments.
Fixes https://github.com/llvm/llvm-project/issues/124161
Commit: 092372da15e5165be14cdbb7cac3cf4976fd82d0
https://github.com/llvm/llvm-project/commit/092372da15e5165be14cdbb7cac3cf4976fd82d0
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
M mlir/lib/Dialect/Tensor/IR/TensorInferTypeOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/lib/Interfaces/InferTypeOpInterface.cpp
M mlir/test/Dialect/Linalg/resolve-shaped-type-result-dims.mlir
M mlir/test/Dialect/Tensor/fold-empty-op.mlir
Log Message:
-----------
[mlir][Tensor] Rework `ReifyRankedShapedTypeInterface` implementation for `tensor.expand_shape` op. (#113501)
The op carries the output-shape directly. This can be used directly.
Also adds a method to get the shape as a `SmallVector<OpFoldResult>`.
Signed-off-by: MaheshRavishankar <mahesh.ravishankar at gmail.com>
Commit: 62340ff8d844fc02cd1bd34ff6235f1f0e1e464f
https://github.com/llvm/llvm-project/commit/62340ff8d844fc02cd1bd34ff6235f1f0e1e464f
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmpx_xx_f16 (#123419)
A bulk commit of true16 support for v_cmpx_xx_f16 instructions
including:
v_cmpx_f_f16
v_cmpx_le_f16
v_cmpx_gt_f16
v_cmpx_lg_f16
v_cmpx_ge_f16
v_cmpx_o_f16
v_cmpx_u_f16
v_cmpx_nge_f16
v_cmpx_nlg_f16
v_cmpx_ngt_f16
v_cmpx_nle_f16
v_cmpx_neq_f16
v_cmpx_nlt_f16
v_cmpx_t_f16
v_cmpx_eq_f16 is not in this patch and will be added in the following
patch
Commit: 5aafc6d58f3405662902cee006be11e599801b88
https://github.com/llvm/llvm-project/commit/5aafc6d58f3405662902cee006be11e599801b88
Author: Christian Clauss <cclauss at me.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M polly/docs/Architecture.rst
M polly/docs/doxygen.cfg.in
M polly/include/polly/CodeGen/RuntimeDebugBuilder.h
M polly/include/polly/DependenceInfo.h
M polly/include/polly/ScopInfo.h
M polly/include/polly/Support/SCEVAffinator.h
M polly/include/polly/Support/ScopHelper.h
M polly/lib/Analysis/ScopBuilder.cpp
M polly/lib/Analysis/ScopDetectionDiagnostic.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
M polly/lib/CodeGen/Utils.cpp
M polly/lib/Support/SCEVAffinator.cpp
M polly/lib/Support/ScopHelper.cpp
M polly/lib/Transform/DeLICM.cpp
M polly/lib/Transform/ManualOptimizer.cpp
M polly/lib/Transform/MatmulOptimizer.cpp
M polly/lib/Transform/ScheduleOptimizer.cpp
M polly/lib/Transform/ScheduleTreeTransform.cpp
M polly/test/CodeGen/LoopParallelMD/do_not_mutate_debug_info.ll
M polly/test/CodeGen/multiple-codegens.ll
M polly/test/CodeGen/multiple-scops-in-a-row.ll
M polly/test/CodeGen/reduction_2.ll
M polly/test/CodeGen/scalar-store-from-same-bb.ll
M polly/test/CodeGen/test-invalid-operands-for-select.ll
M polly/test/DeLICM/load-in-cond-inf-loop.ll
M polly/test/DeLICM/pr41656.ll
M polly/test/DeLICM/pr48783.ll
M polly/test/DeLICM/reject_outofquota.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions_2.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions_3.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions_4.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts-after-delicm.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts-after-delicm_2.ll
M polly/test/ScopDetect/scev_remove_max.ll
M polly/test/ScopDetectionDiagnostics/ReportLoopHasNoExit.ll
M polly/test/ScopInfo/NonAffine/non_affine_loop_used_later.ll
M polly/test/ScopInfo/allow-all-parameters-dereferencable.ll
M polly/test/ScopInfo/invariant_same_loop_bound_multiple_times-1.ll
M polly/test/ScopInfo/invariant_same_loop_bound_multiple_times-2.ll
M polly/test/ScopInfo/multidim_gep_pointercast2.ll
M polly/test/ScopInfo/multidim_many_references.ll
M polly/test/ScopInfo/scalar_to_array.ll
M polly/test/ScopInfo/zero_ext_of_truncate.ll
M polly/test/create_ll.sh
M polly/utils/pyscop/isl.py
M polly/www/changelog.html
M polly/www/get_started.html
M polly/www/index.html
M polly/www/projects.html
M polly/www/publications.html
Log Message:
-----------
[Polly] Fix typos discovered by codespell (#124545)
Patch created using the following command line:
```bash
codespell polly --skip="*.pdf,polly/lib/External/*" --write-changes \
--ignore-words-list=couter,createor,distribues,doble,identty,indention,indx,olt,ore,padd,sais,te,theses
```
Commit: e14962a39cc6476bebba65e5639b74b0318c7fc3
https://github.com/llvm/llvm-project/commit/e14962a39cc6476bebba65e5639b74b0318c7fc3
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
Log Message:
-----------
[NFC][DebugInfo] Use iterators for instruction insertion in more places (#124291)
As part of the "RemoveDIs" work to eliminate debug intrinsics, we're
replacing methods that use Instruction*'s as positions with iterators.
This patch changes some more complex call-sites, those crossing file
boundaries and where I've had to perform some minor rewrites.
Commit: 212f344b84b400c0a9dedfa3c1ec6af9d9d30223
https://github.com/llvm/llvm-project/commit/212f344b84b400c0a9dedfa3c1ec6af9d9d30223
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/add2.ll
Log Message:
-----------
[InstCombine] Handle constant expression result in tryFactorization()
If IRBuilder folds the result to a constant expression, don't try
to set nowrap flags on it.
Fixes https://github.com/llvm/llvm-project/issues/124526.
Commit: 559287575b5b747cfc01652adb647ee5516aa626
https://github.com/llvm/llvm-project/commit/559287575b5b747cfc01652adb647ee5516aa626
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
Log Message:
-----------
[GlobalMerge][NFC] Reland "Skip sorting by profitability when it is not needed"
Relands #124146 but without changes to the sorting algorithm and the following
reverse.
Commit: 1eb4e9f88b827f9adbcdd5f385f75406aa604812
https://github.com/llvm/llvm-project/commit/1eb4e9f88b827f9adbcdd5f385f75406aa604812
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/runtime/exceptions.cpp
Log Message:
-----------
[flang] arm build fix (#124562)
Commit: 20f72d19fc58a394df765d407d9008a381e02b91
https://github.com/llvm/llvm-project/commit/20f72d19fc58a394df765d407d9008a381e02b91
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/runtime/exceptions.cpp
Log Message:
-----------
Revert "[flang] arm build fix" (#124569)
Reverts llvm/llvm-project#124562
Commit: 3322ba493ad7d203cdd6c545b7d9d9589c44357f
https://github.com/llvm/llvm-project/commit/3322ba493ad7d203cdd6c545b7d9d9589c44357f
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/include/flang/Tools/TargetSetup.h
M flang/runtime/exceptions.cpp
Log Message:
-----------
Revert "[flang] IEEE underflow control for Arm" (#124570)
Reverts llvm/llvm-project#124170
Commit: 1e2d5f7943d09d658a5fbacf661d2c6c361f857c
https://github.com/llvm/llvm-project/commit/1e2d5f7943d09d658a5fbacf661d2c6c361f857c
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/test/Transforms/generic-loop-rewriting-todo.mlir
M flang/test/Transforms/generic-loop-rewriting.mlir
Log Message:
-----------
[NFC][mlir][OpenMP] Remove mentions of `target` from generic `loop` rewrite (#124528)
This removes mentions of `target` from the generic `loop` rewrite pass
since there is not need for it anyway. It is enough to detect `loop`'s
nesting within `teams` or `parallel` directives.
Commit: e492083f55d98144ba9a049450cb429d7fd52510
https://github.com/llvm/llvm-project/commit/e492083f55d98144ba9a049450cb429d7fd52510
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/test/Dialect/OpenACC/ops.mlir
Log Message:
-----------
[OpenACC] Add AutomaticAllocationScope to recipe ops (#124337)
The recipe operations should have AutomaticAllocationScope so recipes can
be converted using operators that require parent ops to have
AutomaticAllocationScope
Commit: f95f10c7e65b9abd9b4e2ed71190d08565952ec0
https://github.com/llvm/llvm-project/commit/f95f10c7e65b9abd9b4e2ed71190d08565952ec0
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-urecpe-ursqrte-sqabs-sqneg.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (9/11) (#116835)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`URECPE`, `URSQRTE`, `SQABS` and `SQNEG` instructions.
Commit: cb6f021af2354761357684ffa26ebbe718615244
https://github.com/llvm/llvm-project/commit/cb6f021af2354761357684ffa26ebbe718615244
Author: Luke Lau <luke at igalia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
Log Message:
-----------
[RISCV][VLOPT] Remove unnecessary passthru restriction (#124549)
We currently check for passthrus in two places, on the instruction to
reduce in isCandidate, and on the users in checkUsers.
We cannot reduce the VL if an instruction has a user that's a passthru,
because the user will read elements past VL in the tail.
However it's fine to reduce an instruction if it itself contains a
non-undef passthru. Since the VL can only be reduced, not increased, the
previous tail will always remain the same.
Commit: 178f47143a3b3c547df6d1f07e9707792f5d9fd4
https://github.com/llvm/llvm-project/commit/178f47143a3b3c547df6d1f07e9707792f5d9fd4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/reduction.ll
M llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
M llvm/test/Transforms/PhaseOrdering/X86/hsub.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
M llvm/test/Transforms/VectorCombine/X86/load-inseltpoison.ll
Log Message:
-----------
[CostModel][X86] getShuffleCost - shuffles with only one defined element are always cheap (#124412)
If we're just moving a single element around inside a 128-bit lane (probably as an alternative to extracting it), we can assume this is cheap as a single PSRLDQ/PSHUFD/SHUFPS.
I've got the horrid feeling we're moving towards matching all SSE shuffle patterns inside the cost model, but I'm going to do my best to avoid this for now :|
Commit: 16e9601e193e026d7f3f27e87f0adb81acf5969b
https://github.com/llvm/llvm-project/commit/16e9601e193e026d7f3f27e87f0adb81acf5969b
Author: ssijaric-nv <ssijaric at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/test/Fir/boxproc.fir
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
[Flang] Adjust the trampoline size for AArch64 and PPC (#118678)
Set the trampoline size to match that in compiler-rt/lib/builtins/trampoline_setup.c
and AArch64 and PPC lowering.
Commit: 7f24b9acd189e12e1289d47f7dc6fe0dfffbcbcc
https://github.com/llvm/llvm-project/commit/7f24b9acd189e12e1289d47f7dc6fe0dfffbcbcc
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Support multiple jobs in metrics container (#124457)
This patch makes it so that the metrics script can support multiple jobs
in a single workflow. This is needed so that we do not crash on an
assertion now that the windows job has been enabled within the premerge
workflow.
Commit: ad2b2aa50bc8516970387420097b1fe2b0613c2c
https://github.com/llvm/llvm-project/commit/ad2b2aa50bc8516970387420097b1fe2b0613c2c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/vector-trunc-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/vector-trunc.ll
Log Message:
-----------
[PhaseOrdering] vector-trunc.ll - use -passes="default<O2>" to allow DOS to correctly evaluate the RUN command
Necessary for running update_test_checks.py on windows
Commit: 1bb784a7489e901fd46ce9b77cdc0ab8840a4f3d
https://github.com/llvm/llvm-project/commit/1bb784a7489e901fd46ce9b77cdc0ab8840a4f3d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-minimal.ll
Log Message:
-----------
[LowerMatrixIntrinsics] multiply-minimal.ll - use -passes="..." to allow DOS to correctly evaluate the RUN command
Necessary for running update_test_checks.py on windows
Commit: 749443a307e8e47a25a5552cbeb27f69845e6ce8
https://github.com/llvm/llvm-project/commit/749443a307e8e47a25a5552cbeb27f69845e6ce8
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/SandboxIR/Instruction.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[NFC][DebugInfo] Mop up final instruction-insertion call sites (#124289)
These are the final places in the monorepo that make use of instruction
insertion for methods like insertBefore and moveBefore. As part of the
RemoveDIs project, instead use iterators for insertion. (see:
https://discourse.llvm.org/t/rfc-instruction-api-changes-needed-to-eliminate-debug-intrinsics-from-ir/68939
).
Commit: 09a29fcc8dbbb2cc1c0fdf26ef4f8fafab4e03d9
https://github.com/llvm/llvm-project/commit/09a29fcc8dbbb2cc1c0fdf26ef4f8fafab4e03d9
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
Log Message:
-----------
[VPlan] Don't collect live-ins in collectUsersInExitBlocks. (NFC) (#123819)
Live-ins don't need to be handled, other than adding to the exit phi
recipe. Do that early and assert that otherwise the exit value is
defined in the vector loop region.
This should enable simply skipping other exit values that do not need
further fixing, e.g. if handling the exit value from the early exit
directly in handleUncountableEarlyExit.
PR: https://github.com/llvm/llvm-project/pull/123819
Commit: 5f5cdf40382f06a8c417c42ec591f97aa76eeb67
https://github.com/llvm/llvm-project/commit/5f5cdf40382f06a8c417c42ec591f97aa76eeb67
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
[lldb][TypeSystemClang] CreateParameterDeclarations: don't specify SmallVector size
This was causing Ubuntu buildbot failures:
```
/home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp: In member function ‘llvm::SmallVector<clang::ParmVarDecl*> lldb_private::TypeSystemClang::CreateParameterDeclarations(clang::FunctionDecl*, const clang::FunctionProtoType&, const llvm::SmallVector<llvm::StringRef>&)’:
/home/buildbot/buildbot-root/cross-project-tests-sie-ubuntu-dwarf5/llvm-project/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp:7728:10: error: could not convert ‘params’ from ‘SmallVector<[...],12>’ to ‘SmallVector<[...],6>’
7728 | return params;
| ^~~~~~
| |
| SmallVector<[...],12>
```
It's unclear why 12 was chosen here. Given we don't set the
size in other places where we parse parameters, this patch
just removes the constant.
Commit: 81d18ad86419fc612c7071e888d11aa923eaeb8a
https://github.com/llvm/llvm-project/commit/81d18ad86419fc612c7071e888d11aa923eaeb8a
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
M llvm/include/llvm/IR/BasicBlock.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
M llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/SCCP.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
M llvm/lib/Transforms/Utils/IRNormalizer.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
Log Message:
-----------
[NFC][DebugInfo] Make some block-start-position methods return iterators (#124287)
As part of the "RemoveDIs" work to eliminate debug intrinsics, we're
replacing methods that use Instruction*'s as positions with iterators. A
number of these (such as getFirstNonPHIOrDbg) are sufficiently
infrequently used that we can just replace the pointer-returning version
with an iterator-returning version, hopefully without much/any
disruption.
Thus this patch has getFirstNonPHIOrDbg and
getFirstNonPHIOrDbgOrLifetime return an iterator, and updates all
call-sites. There are no concerns about the iterators returned being
converted to Instruction*'s and losing the debug-info bit: because the
methods skip debug intrinsics, the iterator head bit is always false
anyway.
Commit: 6ff86f2c0a5b58b07921ee895f0d16d8cd3d4015
https://github.com/llvm/llvm-project/commit/6ff86f2c0a5b58b07921ee895f0d16d8cd3d4015
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/amdgpu-toolchain.c
Log Message:
-----------
[AMDGPU] Use the AMDGPUToolChain when targeting C/C++ directly (#99687)
Summary:
The `getToolChain` pass uses the triple to determine which toolchain to
create. Currently the `amdgcn-amd-amdhsa` triple maps to the
`ROCmToolChain` which uses things expected to be provided by `ROCm`.
This is neded for OpenCL, but directly targeting C++ does not want this
since it's primarily being used for creating GPU runtime code. As far as
I know I'm the only user of this, so this shouldn't change anything.
Unfortunately, there's no good logic for detercting this, so I simply
checked ahead of time if the input is either `foo.cl` or `-x cl foo.c`
to choose between the two. This allows us to use the AMDGPU target
normally, as otherwise it will error without passing `-nogpulib`.
Commit: 38b3f45a811282511c014cffd09a8ae2a96435ba
https://github.com/llvm/llvm-project/commit/38b3f45a811282511c014cffd09a8ae2a96435ba
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M offload/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[Offload] Fix offload-info interface
Summary:
The offload info tool doesn't initialize things properly, just check
this first instead.
Commit: c3a0fcc982061f9a69cfc1199dc91bd1fc3158c0
https://github.com/llvm/llvm-project/commit/c3a0fcc982061f9a69cfc1199dc91bd1fc3158c0
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M libclc/clc/lib/generic/relational/clc_all.cl
M libclc/clc/lib/generic/relational/clc_any.cl
Log Message:
-----------
[libclc] Optimize CLC vector any/all builtins (#124568)
By using the vector reduction buitins we can avoid scalarization.
Targets that don't support vector reductions will scalarize later on
anyway. The vector reduction builtins should be well-enough supported by
the middle-end to be a generic solution.
This produces conceptually equivalent code: all vector elements are
OR'd/AND'd together and the final scalar is bit-shifted and masked to
produce the final result.
The 'normalize' builtin uses 'all' so its code has similarly improved in
places.
Commit: 038b42ba5b47b1aa2d47ef5706a713f6bfbbc37c
https://github.com/llvm/llvm-project/commit/038b42ba5b47b1aa2d47ef5706a713f6bfbbc37c
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/docs/ModFiles.md
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Evaluate/type.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Semantics/tools.cpp
A flang/test/Semantics/modfile71.F90
Log Message:
-----------
[flang] Safer hermetic module file reading (#121002)
When a hermetic module file is read, use a new scope to hold its
dependent modules so that they don't conflict with any modules in the
global scope.
Commit: 34b139594aa20fe712bc2ad68544632b3e4d8512
https://github.com/llvm/llvm-project/commit/34b139594aa20fe712bc2ad68544632b3e4d8512
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Coroutines/CoroInstr.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/MergedLoadStoreMotion.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[NFC][DebugInfo] Switch more call-sites to using iterator-insertion (#124283)
To finalise the "RemoveDIs" work removing debug intrinsics, we're
updating call sites that insert instructions to use iterators instead.
This set of changes are those where it's not immediately obvious that
just calling getIterator to fetch an iterator is correct, and one or two
places where more than one line needs to change.
Overall the same rule holds though: iterators generated for the start of
a block such as getFirstNonPHIIt need to be passed into insert/move
methods without being unwrapped/rewrapped, everything else can use
getIterator.
Commit: 512b44d5e1534ef60b5db7a99818e1021cf6064c
https://github.com/llvm/llvm-project/commit/512b44d5e1534ef60b5db7a99818e1021cf6064c
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/test/Semantics/atomic01.f90
M flang/test/Semantics/atomic02.f90
M flang/test/Semantics/atomic03.f90
M flang/test/Semantics/atomic04.f90
M flang/test/Semantics/atomic05.f90
M flang/test/Semantics/atomic06.f90
M flang/test/Semantics/atomic07.f90
M flang/test/Semantics/atomic08.f90
M flang/test/Semantics/atomic09.f90
M flang/test/Semantics/atomic10.f90
M flang/test/Semantics/atomic11.f90
Log Message:
-----------
[flang] Define ATOMIC_ADD as an intrinsic procedure (#122993)
This one appears to have been omitted when other ATOMIC_xxx intrinsic
procedures were defined. There's already tests for it, but they
apparently work even when ATOMIC_ADD must be interpreted as an external
procedure with an implicit interface. Extend the tests with INTRINSIC
NONE(EXTERNAL, TYPE) statements to ensure that they require the
intrinsic interpretation.
Commit: 2625510ef8094457413661ef0ce2651844f584d2
https://github.com/llvm/llvm-project/commit/2625510ef8094457413661ef0ce2651844f584d2
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/include/flang/Semantics/tools.h
M flang/lib/Semantics/check-coarray.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Semantics/call04.f90
M flang/test/Semantics/critical02.f90
M flang/test/Semantics/doconcurrent01.f90
M flang/test/Semantics/event01b.f90
M flang/test/Semantics/event02b.f90
M flang/test/Semantics/sync-stat-list.f90
Log Message:
-----------
[flang] Refine EVENT_TYPE/LOCK_TYPE usage checks (#123244)
The event variable in an EVENT POST/WAIT statement can be a coarray
reference, and need not be an entire coarray.
Variables and potential subobject components with EVENT_TYPE/LOCK_TYPE
must be coarrays, unless they are potential subobjects nested within
coarrays or pointers.
Commit: 4e231014c1980d64812a0322223a4759798d1be3
https://github.com/llvm/llvm-project/commit/4e231014c1980d64812a0322223a4759798d1be3
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-rev.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (10/11) (#116836)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`RBIT`, `REVB`, `REVH`, `REVW`, and `REVD` instructions.
Commit: 73f9034036c942058827877a657d72071dd766e7
https://github.com/llvm/llvm-project/commit/73f9034036c942058827877a657d72071dd766e7
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Evaluate/fold-implementation.h
A flang/test/Evaluate/fold-arr-char-component.f90
Log Message:
-----------
[flang] Fix failure to fold character array (#123418)
When a character component reference is applied to a constant array of
derived type, ensure that the length of the resulting character array is
properly defined.
Fixes https://github.com/llvm/llvm-project/issues/123362.
Commit: 73db9ee1e87b4cfccbc9d67d2b47d9476f92413f
https://github.com/llvm/llvm-project/commit/73db9ee1e87b4cfccbc9d67d2b47d9476f92413f
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/Sema/attr-cpuspecific.c
M clang/test/Sema/attr-target-mv.c
M clang/test/Sema/attr-target-version.c
Log Message:
-----------
[clang][Sema][FMV] Add a note to the 'cannot become multiversioned' diagnostic (#124364)
... pointing out the previous declaration.
Commit: 210e675cfd7be3d7e0d93c29368acd27b51f9a17
https://github.com/llvm/llvm-project/commit/210e675cfd7be3d7e0d93c29368acd27b51f9a17
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Semantics/resolve-labels.cpp
A flang/test/Semantics/label19.f90
Log Message:
-----------
[flang] Accept CHANGE TEAM/END TEAM as branch target (#123822)
It is valid to jump to a CHANGE TEAM statement from anywhere in the
containing executable part, and valid to jump to an END TEAM statement
from within the construct.
Commit: b16c989697208795f6428432f9ab05c5535b6085
https://github.com/llvm/llvm-project/commit/b16c989697208795f6428432f9ab05c5535b6085
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/call13.f90
Log Message:
-----------
[flang] Fix check for coarray actual passed to implicit interface (#123836)
The check for a coarray actual argument being passed to a procedure with
an implicit interface was incorrect, yielding false positives for
coindexed objects. Fix.
Commit: 3ac00784ac3cd8b435c0c6be36f81f786ca5e489
https://github.com/llvm/llvm-project/commit/3ac00784ac3cd8b435c0c6be36f81f786ca5e489
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/bug123538.f90
Log Message:
-----------
[flang] Fix crash on erroneous program (#123843)
Catch and report multiple initializations of the same procedure pointer
rather than assuming that control wouldn't reach a given point in name
resolution in that case.
Fixes https://github.com/llvm/llvm-project/issues/123538.
Commit: f5ddb1012de1c7c7c958aa288932caead9607b07
https://github.com/llvm/llvm-project/commit/f5ddb1012de1c7c7c958aa288932caead9607b07
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/bug123534.f90
Log Message:
-----------
[flang] Fix crash in module file generation (#123859)
An assertion in module file generation didn't allow for a case that has
arisen in a test; remove it, extend commentary, and add a regression
test.
Fixes https://github.com/llvm/llvm-project/issues/123534.
Commit: ec6b2c63d93d8f8edeafcc7330d0b2349463d73d
https://github.com/llvm/llvm-project/commit/ec6b2c63d93d8f8edeafcc7330d0b2349463d73d
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Evaluate/fold-implementation.h
A flang/test/Evaluate/bug123766.f90
Log Message:
-----------
[flang] Fold character array constructor with unknown length (#123983)
When a character array constructor does not have an explicit type with a
constant length, the compiler can still fold it if all of its elements
are constants. These array constructors will have been wrapped up in the
internal %SET_LENGTH operation, which will determine the final length of
the folded value, so use the maximum length of the constant elements as
the length of the folded array constructor.
Fixes https://github.com/llvm/llvm-project/issues/123766.
Commit: d1d952c206efc3a651270c69331b180330ac3efc
https://github.com/llvm/llvm-project/commit/d1d952c206efc3a651270c69331b180330ac3efc
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Common/default-kinds.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/test/Semantics/kinds04_q10.f90
Log Message:
-----------
[flang] Interpret 'Q' exponent letter as kind=16 even on x86 (#124158)
The compiler was interpreting 'Q' as an exponent letter in a literal
real constant as meaning real(kind=10) on x86-64, which is the legacy
80387 80-bit extended precision floating-point type. It turns out that
'Q' means kind=16 with all other compilers, even for x86-64 targets.
Change to conform.
Commit: c596aae47ad8cfaee0fe4af3c104cb89a1125ac5
https://github.com/llvm/llvm-project/commit/c596aae47ad8cfaee0fe4af3c104cb89a1125ac5
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/bind-c06.f90
Log Message:
-----------
[flang] Catch assumed-length interoperability error (#124179)
An assumed-length character dummy argument is interoperable only if it
is neither a pointer nor allocatable.
Commit: b0fab14e9ca24a9160581ea26c19661c6f3a053f
https://github.com/llvm/llvm-project/commit/b0fab14e9ca24a9160581ea26c19661c6f3a053f
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/call38.f90
Log Message:
-----------
[flang] Fix spurious error in character sequence association (#124204)
When an allocatable or pointer was being associated as a storage
sequence with a dummy argument, the checks were using the actual storage
size of the allocatable or pointer's descriptor, not the size of the
storage that it references.
Fixes https://github.com/llvm/llvm-project/issues/123807.
Commit: 873426bea3dd67d80dd10650e64e91c69796614f
https://github.com/llvm/llvm-project/commit/873426bea3dd67d80dd10650e64e91c69796614f
Author: John Harrison <harjohn at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/OutputRedirector.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Ensure the IO forwarding threads are managed by the DAP object lifecycle. (#122783)
This moves the ownership of the threads that forward stdout/stderr to
the DAP object itself to ensure that the threads are joined and that the
forwarding is cleaned up when the DAP connection is disconnected.
This is part of a larger refactor to allow lldb-dap to run in a
listening mode and accept multiple connections.
This reverts the previous revert and now that the underlying Windows
issue was fixed by 3ea2b546a8d17014d3ecf05356ecfaadf26ed846.
Commit: fee393e4ea2b53139ee7924e3aa818433d70cfc7
https://github.com/llvm/llvm-project/commit/fee393e4ea2b53139ee7924e3aa818433d70cfc7
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/runtime/io-api.cpp
Log Message:
-----------
[flang][runtime] Don't crash on ASYNCHRONOUS='NO' in child I/O (#124208)
When ASYNCHRONOUS='NO' appears in a data transfer statement control item
list, don't crash if it isn't appropriate for the kind of I/O under way
(such as child I/O).
Fixes https://github.com/llvm/llvm-project/issues/124135.
Commit: e252c402104bd7c23341748663e1a182451c2ec8
https://github.com/llvm/llvm-project/commit/e252c402104bd7c23341748663e1a182451c2ec8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/include/flang/Evaluate/shape.h
M flang/lib/Evaluate/shape.cpp
A flang/test/Evaluate/bug124191.f90
Log Message:
-----------
[flang] Fix spurious error due to bad expression shape calculation (#124323)
GetShape() needed to be called with a FoldingContext in order to
properly construct an extent expression for the shape of an array
constructor whose elements (nested in an implied DO loop) were not
scalars.
Fixes https://github.com/llvm/llvm-project/issues/124191.
Commit: 08c364280a790cb2a80fff86beb5ea69782ce667
https://github.com/llvm/llvm-project/commit/08c364280a790cb2a80fff86beb5ea69782ce667
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Evaluate/tools.cpp
M flang/test/Semantics/complex01.f90
Log Message:
-----------
[flang] Improve error message on bad complex literal. (#124331)
A complex literal constant can have one BOZ component, since the type
and value of the literal can be determined by converting the BOZ value
to the type of the other component. But a complex literal constant with
two BOZ components doesn't have a well-defined type. The error message
was confusing in the case; emit a better one.
Fixes https://github.com/llvm/llvm-project/issues/124201.
Commit: b80965efc1ea3f30cbdac090d869b1000fca5d2b
https://github.com/llvm/llvm-project/commit/b80965efc1ea3f30cbdac090d869b1000fca5d2b
Author: Josh Stone <jistone at redhat.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Support/MemAlloc.cpp
Log Message:
-----------
[Support] Report OOM from `allocate_buffer` (#85449)
Previously, it called `::operator new` which may throw `std::bad_alloc`,
regardless of whether LLVM itself was built with exception handling, and
this can cause safety issues if outside code has destructors that will
call back into LLVM. Now we use `::operator new(..., nothrow)` and call
`llvm::report_bad_alloc_error` when allocation fails, which will abort
when LLVM is built without exceptions.
Ref: https://github.com/llvm/llvm-project/issues/85281
Commit: e7de6036983641ccf0fb45afd3eb96ff962525aa
https://github.com/llvm/llvm-project/commit/e7de6036983641ccf0fb45afd3eb96ff962525aa
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineCMov - pull out repeated getValueType calls. NFC.
Commit: 44c9e46fce12badae8cd3f5bd53fe1c2b1248940
https://github.com/llvm/llvm-project/commit/44c9e46fce12badae8cd3f5bd53fe1c2b1248940
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineFunction.cpp
Log Message:
-----------
[InstrRef] Fix mismatch between LiveDebugValues and salvageCopySSA (#124233)
The LiveDebugValues pass and the instruction selector (which calls
salvageCopySSA) need to be consistent on what they consider a copy
instruction. With https://github.com/llvm/llvm-project/pull/75184, the
definition of what a copy instruction is was narrowed for AArch64 to
exclude a w->x ORR and treat it as a zero-extend rather than a copy
However, to make sure LiveDebugValues still treats a w->x ORR as a copy,
the new function, isCopyLikeInstr was created. We need to make sure that
salvageCopySSA also calls that function.
This patch addresses this mismatch.
Commit: 1e89355dadce13a162882b58a0e7f181669ba65f
https://github.com/llvm/llvm-project/commit/1e89355dadce13a162882b58a0e7f181669ba65f
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Treat `f<N | M>(a)` as template function call (#124438)
Fixes #123144.
Commit: 19f052443df05df373ef1c695055886db16de376
https://github.com/llvm/llvm-project/commit/19f052443df05df373ef1c695055886db16de376
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
Log Message:
-----------
[Clang] fix test on 32 bits target after 561132e (#124593)
Commit: 99bd2e3f123baf9a14acc9b31ee0f557288118a6
https://github.com/llvm/llvm-project/commit/99bd2e3f123baf9a14acc9b31ee0f557288118a6
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_neon_incl.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_cvt.c
A clang/test/Sema/aarch64-fp8-intrinsics/acle_neon_fp8_cvt.c
M clang/utils/TableGen/NeonEmitter.cpp
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/neon-fp8-cvt.ll
Log Message:
-----------
[AArch64] Add Neon FP8 conversion intrinsics (#123612)
The patch adds the following intrinsics:
bfloat16x8_t vcvt1_bf16_mf8_fpm(mfloat8x8_t vn, fpm_t fpm)
bfloat16x8_t vcvt1_low_bf16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm)
bfloat16x8_t vcvt2_bf16_mf8_fpm(mfloat8x8_t vn, fpm_t fpm)
bfloat16x8_t vcvt2_low_bf16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm)
bfloat16x8_t vcvt1_high_bf16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm)
bfloat16x8_t vcvt2_high_bf16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm)
float16x8_t vcvt1_f16_mf8_fpm(mfloat8x8_t vn, fpm_t fpm)
float16x8_t vcvt1_low_f16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm)
float16x8_t vcvt2_f16_mf8_fpm(mfloat8x8_t vn, fpm_t fpm)
float16x8_t vcvt2_low_f16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm)
float16x8_t vcvt1_high_f16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm)
float16x8_t vcvt2_high_f16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm)
mfloat8x8_t vcvt_mf8_f32_fpm(float32x4_t vn, float32x4_t vm, fpm_t fpm)
mfloat8x16_t vcvt_high_mf8_f32_fpm(mfloat8x8_t vd, float32x4_t vn,
float32x4_t vm, fpm_t fpm)
mfloat8x8_t vcvt_mf8_f16_fpm(float16x4_t vn, float16x4_t vm, fpm_t fpm)
mfloat8x16_t vcvtq_mf8_f16_fpm(float16x8_t vn, float16x8_t vm, fpm_t
fpm)
Co-Authored-By: Caroline Concatto <caroline.concatto at arm.com>
Commit: 658f8500c84fcdcfbf5470ae7b4f732ef4a3c32f
https://github.com/llvm/llvm-project/commit/658f8500c84fcdcfbf5470ae7b4f732ef4a3c32f
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Remove obsolete mlir-cpu-runner alias
Commit: 88cca8ea209bb034eaec6af09a0227fb8cc7303e
https://github.com/llvm/llvm-project/commit/88cca8ea209bb034eaec6af09a0227fb8cc7303e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M libcxx/include/__locale
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/fuchsia.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/src/iostream.cpp
M libcxx/src/locale.cpp
M libcxx/src/support/win32/locale_win32.cpp
Log Message:
-----------
[libc++] Add more missing bits to the locale base API (#122531)
This patch adds the following pieces to the locale base API:
- __setlocale (for std::setlocale)
- __lconv_t (for std::lconv)
- _LIBCPP_FOO_MASK and _LIBCPP_LC_ALL
This should be sufficient to implement all of the platform-agnostic
localization support in libc++ without relying directly on any public
API names from the C library. This makes it possible to port libc++ to
platforms that don't provide the usual locale APIs.
Commit: 7b1becd940cb93f8b63c9872e1af7431dea353d1
https://github.com/llvm/llvm-project/commit/7b1becd940cb93f8b63c9872e1af7431dea353d1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
A libc/cmake/caches/gpu.cmake
M libc/docs/gpu/building.rst
Log Message:
-----------
[libc] Add CMake cache file for the GPU build (#124589)
Summary:
This introduces libc cache files and adds one for building the GPU
support. The cache files will set defaults for these arguments which can
be overridden if the user needs to. They also serve as documentation for
how the builid is expected to look.
Commit: 610e33a547751019ff514d34f95f72d58118249c
https://github.com/llvm/llvm-project/commit/610e33a547751019ff514d34f95f72d58118249c
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M polly/include/polly/CodeGen/IslExprBuilder.h
M polly/lib/CodeGen/IslExprBuilder.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
Log Message:
-----------
[Polly] Ensure i1 preload condition
If the preload condition is a constant, ExprBuilder::create returns an
integer of the native integer while an i1 is expected. Cast the result
to i1 if that happens.
Fixes #123932
Commit: 1782168c527bbb9756c96a95f82397b5952d32b4
https://github.com/llvm/llvm-project/commit/1782168c527bbb9756c96a95f82397b5952d32b4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
Log Message:
-----------
[X86] Fix a warning
This patch fixes:
llvm/lib/Target/X86/X86TargetTransformInfo.cpp:1583:47: error:
comparison of integers of different signs: 'size_t' (aka 'unsigned
long') and 'typename iterator_traits<const int *>::difference_type'
(aka 'long') [-Werror,-Wsign-compare]
Commit: 754b94638e8935e1c1ed6121e0037fdae8b3c63c
https://github.com/llvm/llvm-project/commit/754b94638e8935e1c1ed6121e0037fdae8b3c63c
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lld/test/ELF/archive-thin-missing-member.s
M lld/test/ELF/arm-thumb-thunk-v6m-xo.s
M lld/test/ELF/arm-thunk-section-too-large.s
M lld/test/ELF/arm-thunk-toolargesection.s
M lld/test/ELF/arm-v5-reloc-error.s
M lld/test/ELF/bad-archive.s
M lld/test/ELF/fatlto/fatlto.invalid.s
M lld/test/ELF/invalid-cie-reference.s
M lld/test/ELF/invalid/comdat-broken.test
M lld/test/ELF/invalid/data-encoding.test
M lld/test/ELF/invalid/dynamic-section-broken.test
M lld/test/ELF/invalid/invalid-elf.test
M lld/test/ELF/invalid/invalid-file-class.test
M lld/test/ELF/invalid/sht-group-wrong-section.test
M lld/test/ELF/invalid/sht-group.test
M lld/test/ELF/invalid/symtab-sh-info.s
M lld/test/ELF/invalid/verneed-shared.test
M lld/test/ELF/lto/bitcode-nodatalayout.ll
M lld/test/ELF/lto/bitcode-wrapper.ll
M lld/test/ELF/unsupported-emachine.test
M lld/test/lit.cfg.py
Log Message:
-----------
[lld] Support RUN_LLD_MAIN_TWICE for the ELF port (#124441)
This enables the LLD_IN_TEST=2 testing mode for
```
path/to/llvm-lit -sv --param RUN_LLD_MAIN_TWICE=1 lld/test/ELF
```
When `Fatal` is called, `RunSafely` will return false.
For the first invocation in LLD_IN_TEST=2 mode, `inTestOutputDisabled`
is true and lld will not write to stdout/stderr, making many tests fail.
(This essentially discourages `Fatal` calls in the source code.)
Add XFAIL: main-run-twice to these tests similar to
https://reviews.llvm.org/D112898 for Mach-O
```
comment="This test intentionally checks for fatal errors, and fatal errors aren't supported for testing when main is run twice."
xargs </tmp/0 sed -Ei "1s/(;|#|\/\/) REQUIRES: .*/\0\n\1 "$comment"\n\1 XFAIL: main-run-twice/;t;1s/^/# "$comment"\n# XFAIL: main-run-twice\n/"
```
Commit: 5d6d982df61d16b6d498e6d59dd91c059679d3d8
https://github.com/llvm/llvm-project/commit/5d6d982df61d16b6d498e6d59dd91c059679d3d8
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-ext.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (11/11) (#116837)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`SXTB`, `UXTB`, `SXTH`, `UXTH`, `SXTW`, and `UXTW` instructions.
Commit: dc6411d3e1ab903750a4c80571ee0ebd7e26a62c
https://github.com/llvm/llvm-project/commit/dc6411d3e1ab903750a4c80571ee0ebd7e26a62c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/AST/Decl.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124502)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect TemplateOrSpecialization to be nonnull.
Commit: 4075915ebdfc7b69381388c96781e6abfa5f4407
https://github.com/llvm/llvm-project/commit/4075915ebdfc7b69381388c96781e6abfa5f4407
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaDeclCXX.cpp
Log Message:
-----------
[Sema] Migrate away from PointerUnion::dyn_cast (NFC) (#124503)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect U.first to be nonnull.
Commit: 5d2434166787e36312f037538119d3820c5af5e6
https://github.com/llvm/llvm-project/commit/5d2434166787e36312f037538119d3820c5af5e6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lld/MachO/ObjC.cpp
M lld/MachO/Writer.cpp
Log Message:
-----------
[lld] Migrate away from PointerUnion::dyn_cast (NFC) (#124504)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
This patch migrates uses of PointerUnion::dyn_cast to
dyn_cast_if_present (see the definition of PointerUnion::dyn_cast).
Note that we cannot use dyn_cast in any of the migrations in this
patch; placing
assert(!X.isNull());
just before any of dyn_cast_if_present in this patch triggers some
failure in check-lld.
Commit: e0c5a8553d62124c983e3d8bdc3ea31ed1ea0b96
https://github.com/llvm/llvm-project/commit/e0c5a8553d62124c983e3d8bdc3ea31ed1ea0b96
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[memprof] Migrate away from PointerUnion::dyn_cast (NFC) (#124505)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses cast
because we know which alternative to expect in the ternary expression.
Commit: 817e777296a508356f55d5e1a06cba714c0fe13b
https://github.com/llvm/llvm-project/commit/817e777296a508356f55d5e1a06cba714c0fe13b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#124506)
Commit: 4e812756745e59e02dca12abaed50638b5eb273f
https://github.com/llvm/llvm-project/commit/4e812756745e59e02dca12abaed50638b5eb273f
Author: Meng Zhuo <mengzhuo1203 at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M compiler-rt/lib/tsan/go/buildgo.sh
Log Message:
-----------
[tsan] Add support for linux/riscv64 in lib/tsan/go/buildgo.sh (#124557)
Commit: d1139b32d251c1e258abeb6556d5fff045d7ae12
https://github.com/llvm/llvm-project/commit/d1139b32d251c1e258abeb6556d5fff045d7ae12
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] true16 codegen pats for v_mad_u16 (#124000)
true16 codegen pats for v_mad_u16 (mul+add)
Commit: e77d428e46d94e1be6e5f38205b01d3f528d5e3f
https://github.com/llvm/llvm-project/commit/e77d428e46d94e1be6e5f38205b01d3f528d5e3f
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
Log Message:
-----------
[AMDGPU] Do not remat instructions with PhysReg uses (#124366)
This blocks rematerialization during scheduling if the instruction has a
non accepted PhysReg use.
Currently, there aren't any checks like this in place, and we may create
invalid code: https://godbolt.org/z/xjPjdcorf
Commit: 1bcf44be4c6a01407d608cd7bd17571dc31dbcf5
https://github.com/llvm/llvm-project/commit/1bcf44be4c6a01407d608cd7bd17571dc31dbcf5
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[MLOpt] Add tf_xla_runtime to LLVMDevelopmentExport (#124610)
We need to use tf on assert builds, thus requires it to be export as
well.
Signed-off-by: Peter Rong <PeterRong at meta.com>
Commit: 539b2e06542f7c099885533e4472e6fb3084aa96
https://github.com/llvm/llvm-project/commit/539b2e06542f7c099885533e4472e6fb3084aa96
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Fix catch block type in wasm64 (#124381)
`try_table`'s `catch` or `catch_ref`'s target block's return type should
be `i64` and `(i64, exnref)` in case of wasm64.
Commit: aa34a6ab299027ac31929173287e42db0dbdb06b
https://github.com/llvm/llvm-project/commit/aa34a6ab299027ac31929173287e42db0dbdb06b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll
Log Message:
-----------
[RISCV] Add register allocation hints for lui/auipc+addi fusion. (#123860)
Spotted the auipc case while looking at code for P550. I'm not sure this
is the right long term fix. We're still missing rematerialization
opportunities for these pairs so a pseudo might be better. That would
interfere with folding auipc+add into load/store addressing though.
Fixes #76779.
Commit: 2e5a5237daf82a657561c490845c406e13657311
https://github.com/llvm/llvm-project/commit/2e5a5237daf82a657561c490845c406e13657311
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
M flang/test/Integration/debug-cyclic-derived-type-3.f90
Log Message:
-----------
[flang][debug] Avoid redundant debug data generation for derived types. (#124473)
Since https://github.com/llvm/llvm-project/pull/122770, we have seen
that compile time have become extremely slow for cyclic derived types.
In #122770, we made the criteria to cache a derived type very strict. As
a result, some types which are safe to cache were also being
re-generated every type they were required. This increased the compile
time and also the size of the debug info.
Please see the description of PR# 122770. We decided that when
processing `t1`, the type generated for `t2` and `t3` were not safe to
cached. But our algorithm also denied caching to `t1` which as top level
type was safe.
```
type t1
type(t2), pointer :: p1
end type
type t2
type(t3), pointer :: p2
end type
type t3
type(t1), pointer :: p3
end type
```
I have tinkered the check a bit so that top level type is always cached.
To detect a top level type, we use a depth counter that get incremented
before call to `convertRecordType` and decremented after it returns.
After this change, the following
[file](https://github.com/fujitsu/compiler-test-suite/blob/main/Fortran/0394/0394_0031.f90)
from Fujitsu get compiled around 40s which is same as it was before
#122770.
The smaller testcase present in issue #124049 takes less than half a
second. I also added check to make sure that duplicate entries of the
`DICompositeType` are not present in the IR.
Fixes #124049 and #123960.
Commit: 1e9b60cfa4316246f9fe325ec57daf185120d34e
https://github.com/llvm/llvm-project/commit/1e9b60cfa4316246f9fe325ec57daf185120d34e
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/event_query.f90
Log Message:
-----------
[flang] Recognize and check EVENT_QUERY (#123429)
Recognize the intrinsic subroutine EVENT_QUERY and enforce semantic
requirements on calls to it.
Commit: d732c86c928271cf3a829d95a1fcc560894ab8e4
https://github.com/llvm/llvm-project/commit/d732c86c928271cf3a829d95a1fcc560894ab8e4
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/include/flang/Evaluate/characteristics.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/call08.f90
Log Message:
-----------
[flang] Don't take corank from actual intrinsic argument (#124029)
When constructing the characteristics of a particular reference to an
intrinsic procedure that was passed a non-coindexed reference to local
coarray data as an actual argument, don't add the corank of the actual
argument to those characteristics.
Also clean up the TypeAndShape characteristics class a little; the
Attr::Coarray is redundant since the corank() accessor can be used to
the same effect.
Commit: 08a18efc664a85b4db8ca46ac986ec2d154ae433
https://github.com/llvm/llvm-project/commit/08a18efc664a85b4db8ca46ac986ec2d154ae433
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/docs/Status/Cxx23Papers.csv
Log Message:
-----------
[libc++][doc] Update the release notes for LLVM 20. (#124403)
This is a preparation for the upcoming LLVM 20 release.
Commit: c4c76eabb88f8ee5b92fa9a84452875b0cb67d0d
https://github.com/llvm/llvm-project/commit/c4c76eabb88f8ee5b92fa9a84452875b0cb67d0d
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/include/flang/Tools/TargetSetup.h
M flang/runtime/exceptions.cpp
Log Message:
-----------
[flang] IEEE underflow control for Arm (#124617)
Update IEEE_SUPPORT_UNDERFLOW_CONTROL, IEEE_GET_UNDERFLOW_MODE, and
IEEE_SET_UNDERFLOW_MODE code for Arm.
Commit: a85b2dc45a5f1312d6ee5e2522c24e81a086bf60
https://github.com/llvm/llvm-project/commit/a85b2dc45a5f1312d6ee5e2522c24e81a086bf60
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/include/clang/AST/ASTLambda.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
Log Message:
-----------
[Clang] only inherit the parent eval context inside of lambdas (#124426)
As we create defaul constructors lazily, we should not inherit from the
parent evaluation context.
However, we need to make an exception for lambdas (in particular their
conversion operators, which are also implicitly defined).
As a drive-by, we introduce a generic way to query whether a function is
a member of a lambda.
This fixes a regression introduced by baf6bd3.
Fixes #118000
Commit: 285009f202ca8bfcc6b607eba0e919867559e725
https://github.com/llvm/llvm-project/commit/285009f202ca8bfcc6b607eba0e919867559e725
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGObjCRuntime.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[NFC][DebugInfo] Rewrite more call-sites to insert with iterators (#124288)
As part of the "RemoveDIs" work to eliminate debug intrinsics, we're
replacing methods that use Instruction*'s as positions with iterators. The
call-sites updated in this patch are those where the dyn_cast_or_null cast
utility doesn't compose well with iterator insertion. It can distinguish
between nullptr and a "present" (non-null) Instruction pointer, but not
between a legal and illegal instruction iterator. This can lead to
end-iterator dereferences and thus crashes.
We can improve this in the future (as parent-pointers can now be accessed
from ilist nodes), but for the moment, add explicit tests for end()
iterators at the five call sites affected by this.
Commit: bd5d361c059814435bab24189e79e01d94c7039d
https://github.com/llvm/llvm-project/commit/bd5d361c059814435bab24189e79e01d94c7039d
Author: Chao Chen <chao.chen at intel.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/test/Dialect/Vector/linearize.mlir
Log Message:
-----------
[mlir][vector] add support for linearizing vector.bitcast in VectorLinearize (#123110)
This PR adds support for converting Vector::BitCastOp working on ND
(N >1) vectors into the same op working on linearized (1D) vectors.
Commit: e734f01bffb87d035d9037ade8d8ba1e96639c2b
https://github.com/llvm/llvm-project/commit/e734f01bffb87d035d9037ade8d8ba1e96639c2b
Author: André Brand <andre.brand at mailbox.org>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
A clang/test/SemaCXX/member-enum-declarations.cpp
Log Message:
-----------
[clang] Prevent duplicated instantiation of enumerators of unscoped member enumerations (#124407)
This commit addresses a bug occurring when an unscoped member enumeration
of a class template is introduced with an opaque-enum-declaration and later
redeclared with an enum-specifier (per C++23 [class.mem] p6).
Previously, the enumerators, or EnumConstantDecl, of the enum-specifier
were instantiated at both declarations, leading to different issues:
* erroneous ambiguities when referencing the enumerators,
* duplicated diagnostics in the enumerator-list.
The issue is resolved by ensuring that enumerators are instantiated only
at the first instantiated declaration, analogous to nested classes.
Fixes #124405
Commit: 0cbb1d5673dd76112460a109c8c2af6c32c5a16d
https://github.com/llvm/llvm-project/commit/0cbb1d5673dd76112460a109c8c2af6c32c5a16d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
Log Message:
-----------
[GlobalMerge] Use constructor to set all bits in BitVector. NFC (#124375)
The constructor has an optional bool for the starting value for each
bit. Use that instead of calling set().
Commit: c24e5f982e2791768aeea8b1fb55e951f80aad75
https://github.com/llvm/llvm-project/commit/c24e5f982e2791768aeea8b1fb55e951f80aad75
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
Log Message:
-----------
[GlobalMerge] Fix inaccurate debug print. (#124377)
This message was not updated when MinSize was added.
Commit: 3bf8e671dbc808a3317a25c37017af7aa843d581
https://github.com/llvm/llvm-project/commit/3bf8e671dbc808a3317a25c37017af7aa843d581
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
M libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.tests.h
Log Message:
-----------
[libc++][format] Add tests for flat_(|multi)map formatting (#124418)
These types should be formattable out-of-the-box. This patch validates
that is true.
Commit: 804b81d39f2d50743fd2090aed72dad29f5fb388
https://github.com/llvm/llvm-project/commit/804b81d39f2d50743fd2090aed72dad29f5fb388
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_neon_incl.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_fdot.c
A clang/test/Sema/aarch64-fp8-intrinsics/acle_neon_fp8_fdot.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/fp8-neon-fdot.ll
Log Message:
-----------
[AArch64] Add FP8 Neon intrinsics for dot-product (#123613)
This patch adds the following intrinsics:
float16x4_t vdot_f16_mf8_fpm(float16x4_t vd, mfloat8x8_t vn, mfloat8x8_t
vm, fpm_t fpm)
float16x8_t vdotq_f16_mf8_fpm(float16x8_t vd, mfloat8x16_t vn,
mfloat8x16_t vm, fpm_t fpm)
float16x4_t vdot_lane_f16_mf8_fpm(float16x4_t vd, mfloat8x8_t vn,
mfloat8x8_t vm, __builtin_constant_p(lane), fpm_t fpm)
float16x4_t vdot_laneq_f16_mf8_fpm(float16x4_t vd, mfloat8x8_t vn,
mfloat8x16_t vm, __builtin_constant_p(lane), fpm_t fpm)
float16x8_t vdotq_lane_f16_mf8_fpm(float16x8_t vd, mfloat8x16_t vn,
mfloat8x8_t vm, __builtin_constant_p(lane), fpm_t fpm)
float16x8_t vdotq_laneq_f16_mf8_fpm(float16x8_t vd, mfloat8x16_t vn,
mfloat8x16_t vm, __builtin_constant_p(lane), fpm_t fpm)
float32x2_t vdot_f32_mf8_fpm(float32x2_t vd, mfloat8x8_t vn, mfloat8x8_t
vm, fpm_t fpm)
float32x4_t vdotq_f32_mf8_fpm(float32x4_t vd, mfloat8x16_t vn,
mfloat8x16_t vm, fpm_t fpm)
float32x2_t vdot_lane_f32_mf8_fpm(float32x2_t vd, mfloat8x8_t vn,
mfloat8x8_t vm, __builtin_constant_p(lane), fpm_t fpm)
float32x2_t vdot_laneq_f32_mf8_fpm(float32x2_t vd, mfloat8x8_t vn,
mfloat8x16_t vm, __builtin_constant_p(lane), fpm_t fpm)
float32x4_t vdotq_lane_f32_mf8_fpm(float32x4_t vd, mfloat8x16_t vn,
mfloat8x8_t vm, __builtin_constant_p(lane), fpm_t fpm)
float32x4_t vdotq_laneq_f32_mf8_fpm(float32x4_t vd, mfloat8x16_t vn,
mfloat8x16_t vm, __builtin_constant_p(lane), fpm_t fpm)
Commit: ad9da92cf6f735747ef04fd56937e1d76819e503
https://github.com/llvm/llvm-project/commit/ad9da92cf6f735747ef04fd56937e1d76819e503
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/unittests/Transforms/Utils/UnrollLoopTest.cpp
Log Message:
-----------
[LoopUnroll] Add RuntimeUnrollMultiExit to loop unroll options (NFC) (#124462)
Add an extra knob to RuntimeUnrollMultiExit to let backends control
whether to allow multi-exit unrolling on a per-loop basis.
This gives backends more fine-grained control on deciding if multi-exit
unrolling is profitable for a given loop and uarch. Similar to
4226e0a0c75.
PR: https://github.com/llvm/llvm-project/pull/124462
Commit: 5815a311050ae218ebcda53adeee24ed96851943
https://github.com/llvm/llvm-project/commit/5815a311050ae218ebcda53adeee24ed96851943
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
A clang/test/CodeGenCXX/gh119046.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
Log Message:
-----------
[Clang] call HandleImmediateInvocation before checking for immediate escacalating expressions (#124414)
HandleImmediateInvocation can call MarkExpressionAsImmediateEscalating
and should always be called before
CheckImmediateEscalatingFunctionDefinition.
However, we were not doing that in `ActFunctionBody`.
We simply move CheckImmediateEscalatingFunctionDefinition to
PopExpressionEvaluationContext.
Fixes #119046
Commit: 713482fccf82d33c5c4ddb24538958617e1eb957
https://github.com/llvm/llvm-project/commit/713482fccf82d33c5c4ddb24538958617e1eb957
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/invariant-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-neg-off.ll
Log Message:
-----------
[VPlan] Use State.get to extract lane mask for BranchOnMask.
Simplifies the code slightly and avoids redundant extracts/broadcasts if
the operand is live-in or already scalar.
Commit: 6578790076fed5467bf613e48f7a0ad2f50f041a
https://github.com/llvm/llvm-project/commit/6578790076fed5467bf613e48f7a0ad2f50f041a
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
Reapply "[Fuchsia][cmake] Allow using FatLTO when building runtimes" (#119252) (#121820)
The previous failures were addressed with CMake changes in #121819
Commit: aca08a8515d48baff48328df5d54300fc7180bea
https://github.com/llvm/llvm-project/commit/aca08a8515d48baff48328df5d54300fc7180bea
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/include/llvm/Target/Target.td
M llvm/lib/TableGen/Main.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/test/TableGen/BitsInit.td
A llvm/test/TableGen/BitsInitErrors.td
M llvm/test/TableGen/HwModeSelect.td
M llvm/utils/TableGen/Common/CodeGenHwModes.cpp
M mlir/test/mlir-tblgen/attr-or-type-builder-invalid.td
Log Message:
-----------
[TableGen] Add assert to validate `Objects` list for `HwModeSelect` (#123794)
- Bail out of TableGen if any asserts fail before running the backend.
- Add asserts to validate that the `Objects` and `Modes` lists for
various `HwModeSelect` subclasses are of same length.
- Eliminate equivalent check in CodeGenHWModes.cpp
Commit: b707d52fc557d24c4269987a80dc270e7adad942
https://github.com/llvm/llvm-project/commit/b707d52fc557d24c4269987a80dc270e7adad942
Author: Jens Reidel <adrian at travitia.xyz>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M compiler-rt/lib/safestack/safestack_platform.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
Log Message:
-----------
[compiler-rt][Mips] Properly guard references to _ABIN32 (#124492)
When targeting ABIO32 (mips32), _ABIN32 is undefined and the
preprocessor directives cause compile errors. Guard references to
_ABIN32 with defined(_ABIN32), just like the references to _ABIO32.
Signed-off-by: Jens Reidel <adrian at travitia.xyz>
Commit: 5d1c596ab47b9412bb36bdfb0520d9af1343a5ce
https://github.com/llvm/llvm-project/commit/5d1c596ab47b9412bb36bdfb0520d9af1343a5ce
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for minimummaximum/max/min/max3/min3 (#124184)
true16 support for gfx12 instructions including:
v_minimummaximum_f16
v_maximumminimum_f16
v_maximum_f16
v_minimum_f16
v_maximum3_f16
v_minimum3_f16
Commit: c310b4e7bd2a6e736fbcd8d4885ff46b45ab9977
https://github.com/llvm/llvm-project/commit/c310b4e7bd2a6e736fbcd8d4885ff46b45ab9977
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/test/Headers/__cpuidex_conflict.c
R clang/test/Preprocessor/builtin_aux_info.cpp
Log Message:
-----------
Revert "[Clang] __has_builtin should return false for aux triple builtins (#121839) (#124626)
This reverts commit 1c28b9237382b093f477479c993c80181922ca6a.
Breaks CUDA on ARM, see
[here](https://github.com/llvm/llvm-project/pull/121839#issuecomment-2616858927).
Commit: 5a81a559d69fb84e1e8ef623ac4b642081c14c51
https://github.com/llvm/llvm-project/commit/5a81a559d69fb84e1e8ef623ac4b642081c14c51
Author: David Green <david.green at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx950.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.read.tr.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.buffer.atomic.fadd_rtn_errors.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[GISel] Explicitly disable BF16 tablegen patterns. (#124113)
We currently have an issue where bf16 patters can be used to match fp16
types, as GISel does not know about the difference between the two. This
patch explicitly disables them to make sure that they are never used.
The opposite can also happen too, where fp16 patterns are used for
operators that should be bf16. So this also changes any operations with
bf16 types to now cause a fallback to SDAG.
The pass setup for GISel has been slightly adjusted to make sure that a
verify pass does not get added between AMD-SDAG and SIFixSGPRCopiesPass,
which otherwise can cause verifier issues when falling back.
Commit: 3b2b7ec07d970b225b63af9e96d7a9c09334cd27
https://github.com/llvm/llvm-project/commit/3b2b7ec07d970b225b63af9e96d7a9c09334cd27
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
A llvm/test/CodeGen/AMDGPU/promote-alloca-invariant-marks.ll
Log Message:
-----------
[AMDGPU] Handle invariant marks in `AMDGPUPromoteAllocaPass` (#124607)
Fixes SWDEV-509327.
Commit: a7a4c16c672bdd8e245af533a1f170522e26e42a
https://github.com/llvm/llvm-project/commit/a7a4c16c672bdd8e245af533a1f170522e26e42a
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorShapeCast.cpp
M mlir/test/Dialect/Vector/vector-shape-cast-lowering-transforms.mlir
Log Message:
-----------
[mlir][Vector] Support efficient shape cast lowering for n-D vectors (#123497)
This PR implements a generalization of the existing more efficient
lowering of shape casts from 2-D to 1D and 1-D to 2-D vectors. This
significantly reduces code size and generates more performant code for
n-D shape casts that make their way to LLVM/SPIR-V.
Commit: a79a78990eb35a71f2f9ec9824de2be28e03711f
https://github.com/llvm/llvm-project/commit/a79a78990eb35a71f2f9ec9824de2be28e03711f
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
M .ci/metrics/metrics.py
M .ci/monolithic-windows.sh
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/premerge.yaml
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/PLTCall.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/exceptions-plt.cpp
A bolt/test/AArch64/jump-table-heuristic-fail.s
M bolt/test/AArch64/test-indirect-branch.s
A bolt/test/runtime/exceptions-plt.cpp
M clang-tools-extra/clang-tidy/ClangTidyProfiling.cpp
M clang-tools-extra/clang-tidy/ClangTidyProfiling.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang/CMakeLists.txt
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/ConstantInterpreter.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/ASTLambda.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/include/clang/Basic/AddressSpaces.h
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_neon_incl.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaInternal.h
M clang/lib/APINotes/APINotesManager.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/ParentMapContext.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Frontend/SerializedDiagnosticPrinter.cpp
M clang/lib/Headers/avx10_2_512bf16intrin.h
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Index/FileIndexRecord.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Sema/HeuristicResolver.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/AST/ByteCode/new-delete.cpp
R clang/test/AST/HLSL/ast-dump-comment-cbuffe-tbufferr.hlsl
A clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
A clang/test/AST/HLSL/cbuffer.hlsl
A clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
R clang/test/AST/HLSL/cbuffer_tbuffer.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
A clang/test/AST/ast-dump-APValue-lvalue.cpp
M clang/test/AST/ast-dump-APValue-todo.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/fixed-expansion.cpp
A clang/test/CodeGen/AArch64/builtin-shufflevector-fp8.c
M clang/test/CodeGen/AArch64/cpu-supports-target.c
M clang/test/CodeGen/AArch64/cpu-supports.c
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/CodeGen/AArch64/fmv-features.c
M clang/test/CodeGen/AArch64/fmv-priority.c
A clang/test/CodeGen/AArch64/fp8-cast.c
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_cvt.c
A clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_fdot.c
M clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/arm-mfp8.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGenCXX/aarch64-mangle-neon-vectors.cpp
M clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
A clang/test/CodeGenCXX/gh119046.cpp
M clang/test/CodeGenCXX/mangle-neon-vectors.cpp
M clang/test/CodeGenHLSL/cbuf.hlsl
M clang/test/CodeGenHLSL/cbuf_in_namespace.hlsl
M clang/test/CodeGenHLSL/static_global_and_function_in_cb.hlsl
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/wasm-toolchain.c
M clang/test/Headers/__cpuidex_conflict.c
A clang/test/Modules/module-local-hidden-friend-2.cppm
M clang/test/OpenMP/assumes_include_nvptx.cpp
M clang/test/OpenMP/nvptx_target_firstprivate_codegen.cpp
R clang/test/Preprocessor/builtin_aux_info.cpp
A clang/test/Preprocessor/deprecate-threads-macro-definition-msvc1939.c
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init-arm.c
M clang/test/Preprocessor/init-csky.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/init-mips.c
M clang/test/Preprocessor/init-ppc.c
M clang/test/Preprocessor/init-ppc64.c
M clang/test/Preprocessor/init-s390x.c
M clang/test/Preprocessor/init-v7k-compat.c
M clang/test/Preprocessor/init-ve.c
M clang/test/Preprocessor/init-x86.c
M clang/test/Preprocessor/init.c
A clang/test/Sema/aarch64-fp8-cast.c
A clang/test/Sema/aarch64-fp8-intrinsics/acle_neon_fp8_cvt.c
A clang/test/Sema/aarch64-fp8-intrinsics/acle_neon_fp8_fdot.c
M clang/test/Sema/arm-mfp8.cpp
M clang/test/Sema/attr-cpuspecific.c
M clang/test/Sema/attr-target-mv.c
M clang/test/Sema/attr-target-version.c
M clang/test/SemaCXX/alias-template.cpp
A clang/test/SemaCXX/array-type-trait-with-template.cpp
M clang/test/SemaCXX/cxx1z-constexpr-lambdas.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
A clang/test/SemaCXX/member-enum-declarations.cpp
M clang/test/SemaTemplate/address_space-dependent.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/tools/driver/CMakeLists.txt
M clang/tools/libclang/CIndexDiagnostic.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestTableGen.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/perf-training/CMakeLists.txt
M clang/utils/perf-training/perf-helper.py
M clang/www/OpenProjects.html
M clang/www/cxx_dr_status.html
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/apple.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/orc/macho_platform.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/safestack/safestack_platform.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
M compiler-rt/lib/tsan/go/buildgo.sh
R compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions.cpp
M compiler-rt/test/profile/Windows/binary-id.c
A compiler-rt/test/tysan/ignorelist.c
A compiler-rt/test/tysan/ignorelist.h
A compiler-rt/test/tysan/preprocessor.c
M flang/docs/ModFiles.md
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Common/api-attrs.h
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/shape.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/CUDA/kernel.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Semantics/tools.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Common/default-kinds.cpp
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-coarray.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-labels.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Semantics/tools.cpp
M flang/runtime/CUDA/kernel.cpp
M flang/runtime/exceptions.cpp
M flang/runtime/io-api.cpp
M flang/runtime/stop.cpp
M flang/test/Driver/fast-math.f90
M flang/test/Driver/fsave-main-program.f90
A flang/test/Evaluate/bug123766.f90
A flang/test/Evaluate/bug124191.f90
A flang/test/Evaluate/fold-arr-char-component.f90
M flang/test/Fir/CUDA/cuda-gpu-launch-func.mlir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Fir/boxproc.fir
M flang/test/Integration/debug-cyclic-derived-type-3.f90
M flang/test/Lower/CUDA/cuda-devptr.cuf
M flang/test/Lower/Intrinsics/ieee_next.f90
A flang/test/Lower/OpenMP/Todo/dispatch.f90
M flang/test/Lower/OpenMP/derived-type-allocatable.f90
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/fsave-main-program.f90
A flang/test/Parser/OpenMP/dispatch.f90
A flang/test/Semantics/OpenMP/dispatch.f90
M flang/test/Semantics/atomic01.f90
M flang/test/Semantics/atomic02.f90
M flang/test/Semantics/atomic03.f90
M flang/test/Semantics/atomic04.f90
M flang/test/Semantics/atomic05.f90
M flang/test/Semantics/atomic06.f90
M flang/test/Semantics/atomic07.f90
M flang/test/Semantics/atomic08.f90
M flang/test/Semantics/atomic09.f90
M flang/test/Semantics/atomic10.f90
M flang/test/Semantics/atomic11.f90
M flang/test/Semantics/bind-c06.f90
A flang/test/Semantics/bug123534.f90
A flang/test/Semantics/bug123538.f90
M flang/test/Semantics/call04.f90
M flang/test/Semantics/call08.f90
M flang/test/Semantics/call13.f90
M flang/test/Semantics/call38.f90
M flang/test/Semantics/complex01.f90
M flang/test/Semantics/critical02.f90
M flang/test/Semantics/doconcurrent01.f90
M flang/test/Semantics/event01b.f90
M flang/test/Semantics/event02b.f90
M flang/test/Semantics/event_query.f90
M flang/test/Semantics/kinds04_q10.f90
A flang/test/Semantics/label19.f90
A flang/test/Semantics/modfile71.F90
M flang/test/Semantics/sync-stat-list.f90
M flang/test/Transforms/generic-loop-rewriting-todo.mlir
M flang/test/Transforms/generic-loop-rewriting.mlir
A libc/cmake/caches/gpu.cmake
M libc/docs/CMakeLists.txt
M libc/docs/gpu/building.rst
M libc/docs/headers/index.rst
M libc/include/strings.yaml
M libc/src/stdlib/gpu/free.cpp
M libc/src/stdlib/gpu/malloc.cpp
M libc/test/src/math/exhaustive/exhaustive_test.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/utils/docgen/cpio.yaml
M libclc/clc/include/clc/relational/relational.h
M libclc/clc/lib/generic/relational/clc_all.cl
M libclc/clc/lib/generic/relational/clc_any.cl
M libclc/clc/lib/generic/relational/clc_isequal.cl
M libclc/clc/lib/generic/relational/clc_isgreater.cl
M libclc/clc/lib/generic/relational/clc_isgreaterequal.cl
M libclc/clc/lib/generic/relational/clc_isless.cl
M libclc/clc/lib/generic/relational/clc_islessequal.cl
M libclc/clc/lib/generic/relational/clc_islessgreater.cl
M libclc/clc/lib/generic/relational/clc_isnotequal.cl
M libclc/clc/lib/generic/relational/clc_isordered.cl
M libclc/clc/lib/generic/relational/clc_isunordered.cl
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/FormatPaper.csv
M libcxx/docs/TestingLibcxx.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/exception.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/leap_second.h
M libcxx/include/__chrono/local_info.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/sys_info.h
M libcxx/include/__chrono/time_zone.h
M libcxx/include/__chrono/time_zone_link.h
M libcxx/include/__chrono/tzdb.h
M libcxx/include/__chrono/tzdb_list.h
A libcxx/include/__chrono/utc_clock.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__config
M libcxx/include/__flat_map/flat_map.h
A libcxx/include/__flat_map/flat_multimap.h
A libcxx/include/__flat_map/sorted_equivalent.h
A libcxx/include/__flat_map/utils.h
M libcxx/include/__format/buffer.h
M libcxx/include/__format/format_functions.h
M libcxx/include/__functional/is_transparent.h
M libcxx/include/__locale
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/fuchsia.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/include/__numeric/pstl.h
M libcxx/include/__type_traits/conjunction.h
M libcxx/include/__type_traits/result_of.h
M libcxx/include/chrono
M libcxx/include/execution
M libcxx/include/flat_map
M libcxx/include/iosfwd
M libcxx/include/module.modulemap
M libcxx/include/syncstream
M libcxx/include/version
M libcxx/modules/std/chrono.inc
M libcxx/modules/std/flat_map.inc
M libcxx/modules/std/iosfwd.inc
M libcxx/modules/std/syncstream.inc
M libcxx/src/iostream.cpp
M libcxx/src/locale.cpp
M libcxx/src/support/win32/locale_win32.cpp
A libcxx/test/benchmarks/utc_clock.bench.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.map/assert.input_range.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.map/assert.sorted_unique.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.multimap/assert.input_range.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.multimap/assert.sorted_equivalent.pass.cpp
R libcxx/test/libcxx/containers/containers.adaptors/flat.map/assert.input_range.pass.cpp
R libcxx/test/libcxx/containers/containers.adaptors/flat.map/assert.sorted_unique.pass.cpp
M libcxx/test/libcxx/diagnostics/chrono.nodiscard.verify.cpp
M libcxx/test/libcxx/experimental/fexperimental-library.compile.pass.cpp
M libcxx/test/libcxx/ranges/no_specializations.verify.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/get_leap_second_info.pass.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/time.clock.utc.members/from_sys.pass.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/time.clock.utc.members/to_sys.pass.cpp
M libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.map.syn/sorted_equivalent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/empty.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/empty.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.compile.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.verify.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/default_noexcept.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/dtor_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/empty.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/empty.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/size.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/assign_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/compare.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/containers.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.addressof.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct_pmr.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/dtor_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_clears.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_exceptions.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/pmr.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_container.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.erasure/erase_if.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.erasure/erase_if_exceptions.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator_comparison.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator_concept_conformance.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/range_concept_conformance.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/reverse_iterator.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/clear.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/emplace.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/emplace_hint.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/extract.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_cv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_cv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_rv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_rv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_sorted_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_sorted_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/replace.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_exception.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_free.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_member.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/comp.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/keys_values.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/contains.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/contains_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/count.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/count_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/equal_range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/equal_range_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/find.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/find_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/lower_bound.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/lower_bound_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/upper_bound.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/upper_bound_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/helpers.h
A libcxx/test/std/containers/container.adaptors/flat.multimap/incomplete_type.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/op_compare.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/types.compile.pass.cpp
M libcxx/test/std/input.output/iostream.format/print.fun/includes.compile.pass.cpp
M libcxx/test/std/input.output/iostream.format/print.fun/no_file_description.pass.cpp
A libcxx/test/std/language.support/support.limits/support.limits.general/flat_map.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/syncstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/localization/locale.stdcvt/depr.verify.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.buffer/depr.verify.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/depr.verify.cpp
M libcxx/test/std/strings/basic.string/string.capacity/reserve.deprecated_in_cxx20.verify.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/get_leap_second_info.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/leap_second_info.members.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/from_sys.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/now.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/to_sys.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/types.compile.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/utc_time.ostream.pass.cpp
A libcxx/test/std/time/time.syn/formatter.utc_time.pass.cpp
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
M libcxx/test/std/utilities/format/format.functions/format_tests.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.tests.h
M libcxx/test/support/test_macros.h
M libcxx/test/tools/clang_tidy_checks/internal_ftm_use.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/params.py
M lld/COFF/Chunks.cpp
M lld/COFF/DLL.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
M lld/COFF/SymbolTable.cpp
M lld/Common/ErrorHandler.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Writer.cpp
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/BPSectionOrderer.h
M lld/MachO/ObjC.cpp
M lld/MachO/Writer.cpp
M lld/test/COFF/arm64ec-import.test
A lld/test/COFF/arm64x-import.test
M lld/test/COFF/start-lib.ll
M lld/test/ELF/archive-thin-missing-member.s
M lld/test/ELF/arm-thumb-thunk-v6m-xo.s
M lld/test/ELF/arm-thunk-section-too-large.s
M lld/test/ELF/arm-thunk-toolargesection.s
M lld/test/ELF/arm-v5-reloc-error.s
M lld/test/ELF/bad-archive.s
M lld/test/ELF/basic.s
M lld/test/ELF/compressed-input-err.s
M lld/test/ELF/fatlto/fatlto.invalid.s
R lld/test/ELF/hip-section-layout.s
M lld/test/ELF/invalid-cie-reference.s
M lld/test/ELF/invalid-eh-frame2.s
M lld/test/ELF/invalid-eh-frame4.s
M lld/test/ELF/invalid-eh-frame6.s
M lld/test/ELF/invalid/bad-reloc-target.test
M lld/test/ELF/invalid/comdat-broken.test
M lld/test/ELF/invalid/data-encoding.test
M lld/test/ELF/invalid/dynamic-section-broken.test
M lld/test/ELF/invalid/invalid-elf.test
M lld/test/ELF/invalid/invalid-file-class.test
M lld/test/ELF/invalid/linkorder-invalid-sec.test
M lld/test/ELF/invalid/merge-invalid-size.s
M lld/test/ELF/invalid/merge-writable.s
M lld/test/ELF/invalid/section-alignment.test
M lld/test/ELF/invalid/section-alignment2.s
M lld/test/ELF/invalid/section-index.test
M lld/test/ELF/invalid/sht-group-wrong-section.test
M lld/test/ELF/invalid/sht-group.test
M lld/test/ELF/invalid/symbol-name.test
M lld/test/ELF/invalid/symtab-sh-info.s
M lld/test/ELF/invalid/verneed-shared.test
M lld/test/ELF/lto/bitcode-nodatalayout.ll
M lld/test/ELF/lto/bitcode-wrapper.ll
M lld/test/ELF/lto/cache-warnings.ll
M lld/test/ELF/lto/ltopasses-custom.ll
M lld/test/ELF/lto/verify-invalid.ll
M lld/test/ELF/lto/version-script.ll
M lld/test/ELF/lto/version-script2.ll
R lld/test/ELF/merge-string-error.s
M lld/test/ELF/mergeable-errors.s
M lld/test/ELF/relocation-past-merge-end.s
M lld/test/ELF/stdout.s
M lld/test/ELF/unsupported-emachine.test
M lld/test/lit.cfg.py
M lldb/bindings/interface/SBSaveCoreOptionsDocstrings.i
M lldb/bindings/interface/SBThreadExtensions.i
M lldb/include/lldb/Symbol/Function.h
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/source/Host/common/Host.cpp
M lldb/source/Host/common/PseudoTerminal.cpp
M lldb/source/Host/posix/DomainSocket.cpp
M lldb/source/Host/posix/HostInfoPosix.cpp
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/PDBASTParser.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/source/Symbol/Function.cpp
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/atomic/TestLibCxxAtomic.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/initializerlist/TestInitializerList.py
M lldb/test/API/functionalities/location-list-lookup/TestLocationListLookup.py
M lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
M lldb/test/API/lang/objc/print-obj/TestPrintObj.py
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
M lldb/test/API/linux/aarch64/gcs/main.c
M lldb/test/API/macosx/universal/TestUniversal.py
M lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-function.s
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/OutputRedirector.h
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/unittests/Symbol/TestTypeSystemClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
M llvm/CMakeLists.txt
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/Contributing.rst
M llvm/docs/DeveloperPolicy.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SandboxIR.md
M llvm/docs/TestingGuide.rst
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_loongarch.h
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
R llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.h
R llvm/include/llvm/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.h
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/SandboxIR/Utils.h
M llvm/include/llvm/SandboxIR/Value.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/Coroutines/CoroInstr.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/Instrumentation.h
A llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/include/llvm/Transforms/Utils/ValueMapper.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/LoopNestAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/MachineSSAContext.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
R llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.cpp
R llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.h
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.h
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/CompileUtils.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
R llvm/lib/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/IRMutator.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/SandboxIR/Instruction.cpp
M llvm/lib/SandboxIR/Region.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/MemAlloc.cpp
M llvm/lib/TableGen/Main.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64FMV.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.h
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/BPF/BPFASpaceCastSimplifyPass.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.h
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp
M llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/Target/Xtensa/CMakeLists.txt
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.h
M llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
R llvm/lib/Target/Xtensa/XtensaUtils.cpp
R llvm/lib/Target/Xtensa/XtensaUtils.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/Coroutines/CoroCloner.h
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/MaterializationUtils.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/IPO/SCCP.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARC.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/DivRemPairs.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/LoopSink.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/MergedLoadStoreMotion.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SCCP.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/Sink.cpp
M llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
M llvm/lib/Transforms/Utils/GuardUtils.cpp
M llvm/lib/Transforms/Utils/IRNormalizer.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/Instrumentation.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
A llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
M llvm/lib/Transforms/Utils/MoveAutoInit.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromMetadata.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Analysis/CostModel/X86/ctlz-codesize.ll
M llvm/test/Analysis/CostModel/X86/ctlz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/ctlz.ll
M llvm/test/Analysis/CostModel/X86/cttz-codesize.ll
M llvm/test/Analysis/CostModel/X86/cttz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/cttz.ll
M llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll
M llvm/test/Analysis/CostModel/X86/reduction.ll
M llvm/test/Analysis/LoopAccessAnalysis/pointer-phis.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
A llvm/test/Analysis/ScalarEvolution/pr123550.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
M llvm/test/Analysis/ValueTracking/implied-condition-samesign.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
A llvm/test/CodeGen/AArch64/fp8-neon-fdot.ll
M llvm/test/CodeGen/AArch64/fptrunc.ll
A llvm/test/CodeGen/AArch64/neon-fp8-cvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/stack-hazard-windows.ll
A llvm/test/CodeGen/AArch64/wincfi-missing-seh-directives.ll
A llvm/test/CodeGen/AArch64/zeroing-forms-ext.ll
A llvm/test/CodeGen/AArch64/zeroing-forms-flogb.ll
A llvm/test/CodeGen/AArch64/zeroing-forms-frint-frecpx-fsqrt.ll
A llvm/test/CodeGen/AArch64/zeroing-forms-rev.ll
A llvm/test/CodeGen/AArch64/zeroing-forms-urecpe-ursqrte-sqabs-sqneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx950.ll
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-alias.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.read.tr.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.buffer.atomic.fadd_rtn_errors.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-invariant-marks.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
M llvm/test/CodeGen/Mips/cconv/vector.ll
A llvm/test/CodeGen/Mips/llvm-ir/sdiv-freebsd.ll
M llvm/test/CodeGen/Mips/msa/basic_operations.ll
A llvm/test/CodeGen/NVPTX/convert-sm100.ll
A llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/sm-version.ll
M llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/X86/addcarry.ll
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
M llvm/test/CodeGen/X86/avgflooru-i128.ll
M llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/CodeGen/X86/canonicalize-vars.ll
M llvm/test/CodeGen/X86/fmuladd-soft-float.ll
M llvm/test/CodeGen/X86/huge-stack-offset.ll
M llvm/test/CodeGen/X86/i128-abi.ll
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
M llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
M llvm/test/CodeGen/X86/subcarry.ll
M llvm/test/CodeGen/X86/uadd_sat_vec.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
M llvm/test/CodeGen/X86/vector-trunc-nowrap.ll
A llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_relax_align.s
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_reloc_addsub.s
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
M llvm/test/MC/AArch64/basic-a64-instructions.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
A llvm/test/MC/Disassembler/RISCV/vmask-carry-in.txt
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt
A llvm/test/MC/RISCV/rvv/vmask-carry-in.s
M llvm/test/MC/X86/avx10.2-bf16-32-att.s
M llvm/test/MC/X86/avx10.2-bf16-32-intel.s
M llvm/test/MC/X86/avx10.2-bf16-64-att.s
M llvm/test/MC/X86/avx10.2-bf16-64-intel.s
M llvm/test/TableGen/BitsInit.td
A llvm/test/TableGen/BitsInitErrors.td
M llvm/test/TableGen/HwModeSelect.td
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
A llvm/test/Transforms/FunctionSpecialization/solver-constant-strictfpmetadata.ll
M llvm/test/Transforms/GlobalOpt/resolve-fmv-ifunc.ll
M llvm/test/Transforms/InstCombine/add2.ll
M llvm/test/Transforms/InstCombine/fsh.ll
M llvm/test/Transforms/LoopDistribute/pointer-phi-in-loop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invariant-replicate-region.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-neg-off.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-minimal.ll
M llvm/test/Transforms/OpenMP/always_inline_device.ll
M llvm/test/Transforms/OpenMP/attributor_module_slice_reproducer.ll
M llvm/test/Transforms/OpenMP/barrier_removal.ll
M llvm/test/Transforms/OpenMP/bug66687.ll
M llvm/test/Transforms/OpenMP/custom_state_machines.ll
M llvm/test/Transforms/OpenMP/custom_state_machines_pre_lto.ll
M llvm/test/Transforms/OpenMP/custom_state_machines_remarks.ll
M llvm/test/Transforms/OpenMP/deduplication_target.ll
M llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll
M llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold_optnone.ll
M llvm/test/Transforms/OpenMP/global_constructor.ll
M llvm/test/Transforms/OpenMP/globalization_remarks.ll
M llvm/test/Transforms/OpenMP/gpu_kernel_detection_remarks.ll
M llvm/test/Transforms/OpenMP/gpu_state_machine_function_ptr_replacement.ll
M llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
M llvm/test/Transforms/OpenMP/nested_parallelism.ll
M llvm/test/Transforms/OpenMP/parallel_level_fold.ll
M llvm/test/Transforms/OpenMP/remove_globalization.ll
M llvm/test/Transforms/OpenMP/replace_globalization.ll
M llvm/test/Transforms/OpenMP/single_threaded_execution.ll
M llvm/test/Transforms/OpenMP/spmdization.ll
M llvm/test/Transforms/OpenMP/spmdization_assumes.ll
M llvm/test/Transforms/OpenMP/spmdization_constant_prop.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding_two_reaching_kernels.ll
M llvm/test/Transforms/OpenMP/spmdization_indirect.ll
M llvm/test/Transforms/OpenMP/spmdization_no_guarding_two_reaching_kernels.ll
M llvm/test/Transforms/OpenMP/spmdization_remarks.ll
M llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Transforms/PGOProfile/memprof_loop_unroll.ll
M llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
M llvm/test/Transforms/PhaseOrdering/X86/hsub.ll
M llvm/test/Transforms/PhaseOrdering/vector-trunc-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/vector-trunc.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-exp.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/lit.local.cfg
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr.ll
M llvm/test/Transforms/SLPVectorizer/X86/ctlz.ll
M llvm/test/Transforms/SLPVectorizer/X86/cttz.ll
A llvm/test/Transforms/SLPVectorizer/X86/extracts-non-extendable.ll
M llvm/test/Transforms/SandboxVectorizer/cross_bbs.ll
M llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
M llvm/test/Transforms/VectorCombine/X86/load-inseltpoison.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected
A llvm/test/tools/llvm-ml/bare_proc_error.asm
A llvm/test/tools/llvm-ml/no_section_error.asm
M llvm/test/tools/llvm-objcopy/ELF/remove-note.test
A llvm/test/tools/llvm-opt-report/Inputs/scalable.c
A llvm/test/tools/llvm-opt-report/Inputs/scalable.yaml
A llvm/test/tools/llvm-opt-report/scalabe.test
M llvm/tools/llvm-opt-report/OptReport.cpp
M llvm/tools/llvm-reduce/deltas/ReduceBasicBlocks.cpp
M llvm/tools/llvm-stress/llvm-stress.cpp
M llvm/unittests/Analysis/AssumeBundleQueriesTest.cpp
M llvm/unittests/Analysis/CGSCCPassManagerTest.cpp
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/Analysis/ProfileSummaryInfoTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/LegacyPassManagerTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/SandboxIR/PassTest.cpp
M llvm/unittests/SandboxIR/RegionTest.cpp
M llvm/unittests/Transforms/Scalar/LICMTest.cpp
M llvm/unittests/Transforms/Utils/UnrollLoopTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/utils/TableGen/Common/CodeGenHwModes.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/include/clang/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M mlir/docs/Dialects/GPU.md
M mlir/docs/ReleaseNotes.md
M mlir/docs/SPIRVToLLVMDialectConversion.md
M mlir/examples/toy/Ch4/mlir/Dialect.cpp
M mlir/examples/toy/Ch5/mlir/Dialect.cpp
M mlir/examples/toy/Ch6/mlir/Dialect.cpp
M mlir/examples/toy/Ch7/mlir/Dialect.cpp
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
M mlir/include/mlir/IR/BuiltinDialectBytecode.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/include/mlir/IR/Location.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/lib/Dialect/Tensor/IR/TensorInferTypeOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorShapeCast.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/ExecutionEngine/VulkanRuntimeWrappers.cpp
M mlir/lib/IR/Location.cpp
M mlir/lib/Interfaces/InferTypeOpInterface.cpp
M mlir/lib/Interfaces/SideEffectInterfaces.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Transforms/Utils/Inliner.cpp
M mlir/python/mlir/dialects/_ods_common.py
M mlir/test/CMakeLists.txt
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/invalid.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
M mlir/test/Dialect/Linalg/fuse-with-reshape-by-collapsing.mlir
M mlir/test/Dialect/Linalg/fusion-push-reshape.mlir
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
M mlir/test/Dialect/Linalg/resolve-shaped-type-result-dims.mlir
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
M mlir/test/Dialect/Tensor/bufferize.mlir
M mlir/test/Dialect/Tensor/fold-empty-op.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/vector-break-down-bitcast.mlir
M mlir/test/Dialect/Vector/vector-shape-cast-lowering-transforms.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-addi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-cmpi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-constants-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-max-min-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-muli-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shli-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrsi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrui-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-sitofp-i32.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-uitofp-i32.mlir
M mlir/test/Integration/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
M mlir/test/Integration/Dialect/Async/CPU/microbench-scf-async-parallel-for.mlir
M mlir/test/Integration/Dialect/Async/CPU/test-async-parallel-for-1d.mlir
M mlir/test/Integration/Dialect/Async/CPU/test-async-parallel-for-2d.mlir
M mlir/test/Integration/Dialect/Complex/CPU/correctness.mlir
M mlir/test/Integration/Dialect/ControlFlow/assert.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-complex-sparse-constant.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/matmul-vs-matvec.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/rank-reducing-subview.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/runtime-verification.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-collapse-tensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-nwc-wcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-nhwc-hwcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-ndhwc-dhwcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-elementwise.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-expand-tensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-matmul-masked-vec.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-one-shot-bufferize.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-padtensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-subtensor-insert-multiple-uses.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-subtensor-insert.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-tensor-e2e.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-tensor-matmul.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Math/CPU/mathtofuncs_ctlz.mlir
M mlir/test/Integration/Dialect/MemRef/cast-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/load-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/print-memref.mlir
M mlir/test/Integration/Dialect/MemRef/reinterpret-cast-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/subview-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/verify-memref.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/block.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/block_majors.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_0.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_0_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_bf16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dual_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/iterator-based-kernel.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/padded_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/reshape_dot.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_abs.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_binary.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cmp.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_dim.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_foreach.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_collapse_shape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex32.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex64.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_constant_to_sparse_tensor.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_1d_nwc_wcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_55.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nchw_fchw.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d_ndhwc_dhwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_block.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_dyn.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_element.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_ptr.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2dense.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2sparse.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_coo_test.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_dilated_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_dot.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_empty.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_expand.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_expand_shape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_foreach_slices.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_generate.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_1d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_loose.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matmul_slice.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matrix_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_mult_elt.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_reduction.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pooling_nhwc.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_re_im.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom_prod.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom_sum.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions_min.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions_prod.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reshape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_push_back.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_sort_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scf_nested.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_select.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_semiring_select.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sign.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sorted_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_storage.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_strided_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_bf16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_c32.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tanh.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tensor_mul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tensor_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_transpose.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_transpose_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_vector_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-hand.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-prune.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-gemm-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec-const.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-mma-2-4-f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sampled-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sddmm-lib.mlir
M mlir/test/Integration/Dialect/Standard/CPU/test-ceil-floor-pos-neg.mlir
M mlir/test/Integration/Dialect/Standard/CPU/test_subview.mlir
M mlir/test/Integration/Dialect/Tosa/CPU/test-fully-connected.mlir
M mlir/test/Integration/Dialect/Tosa/CPU/test-maxpool-dynamic.mlir
M mlir/test/Integration/Dialect/Vector/CPU/0-d-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/broadcast.mlir
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/constant-mask.mlir
M mlir/test/Integration/Dialect/Vector/CPU/contraction.mlir
M mlir/test/Integration/Dialect/Vector/CPU/create-mask-v4i1.mlir
M mlir/test/Integration/Dialect/Vector/CPU/create-mask.mlir
M mlir/test/Integration/Dialect/Vector/CPU/expand.mlir
M mlir/test/Integration/Dialect/Vector/CPU/extract-strided-slice.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/fma.mlir
M mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
M mlir/test/Integration/Dialect/Vector/CPU/index-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/insert-strided-slice.mlir
M mlir/test/Integration/Dialect/Vector/CPU/interleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedload.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-i64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-fp.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-int.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-str.mlir
M mlir/test/Integration/Dialect/Vector/CPU/realloc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f32-reassoc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f64-reassoc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-si4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-ui4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/rewrite-narrow-types.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scan.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shape-cast.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shuffle.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shuffle16x16.mlir
M mlir/test/Integration/Dialect/Vector/CPU/sparse-dot-matvec.mlir
M mlir/test/Integration/Dialect/Vector/CPU/sparse-saxpy-jagged-matvec.mlir
M mlir/test/Integration/Dialect/Vector/CPU/test-deinterleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-to-loops.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-write.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transpose.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f16-f16-accum.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f32.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f16.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32-bare-ptr.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-and.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-maxsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-minsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-op.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-or.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-region.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-xor.mlir
M mlir/test/Integration/GPU/CUDA/alloc-host-shared.mlir
M mlir/test/Integration/GPU/CUDA/assert.mlir
M mlir/test/Integration/GPU/CUDA/async.mlir
M mlir/test/Integration/GPU/CUDA/gpu-to-cubin.mlir
M mlir/test/Integration/GPU/CUDA/multiple-all-reduce.mlir
M mlir/test/Integration/GPU/CUDA/printf.mlir
M mlir/test/Integration/GPU/CUDA/shuffle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/cga_cluster.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x128_stride_noswizzle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir
M mlir/test/Integration/GPU/CUDA/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir
M mlir/test/Integration/GPU/ROCM/printf.mlir
M mlir/test/Integration/GPU/ROCM/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/vecadd.mlir
M mlir/test/Integration/GPU/ROCM/vector-transferops.mlir
M mlir/test/Integration/GPU/SPIRV/double.mlir
M mlir/test/Integration/GPU/SPIRV/simple_add.mlir
M mlir/test/Integration/GPU/SYCL/gpu-addf32-to-spirv.mlir
M mlir/test/Integration/GPU/SYCL/gpu-addi64-to-spirv.mlir
M mlir/test/Integration/GPU/SYCL/gpu-reluf32-to-spirv.mlir
M mlir/test/Integration/GPU/Vulkan/addf.mlir
M mlir/test/Integration/GPU/Vulkan/addf_if.mlir
M mlir/test/Integration/GPU/Vulkan/addi.mlir
M mlir/test/Integration/GPU/Vulkan/addi8.mlir
M mlir/test/Integration/GPU/Vulkan/addui_extended.mlir
M mlir/test/Integration/GPU/Vulkan/mulf.mlir
M mlir/test/Integration/GPU/Vulkan/smul_extended.mlir
M mlir/test/Integration/GPU/Vulkan/subf.mlir
M mlir/test/Integration/GPU/Vulkan/time.mlir
M mlir/test/Integration/GPU/Vulkan/umul_extended.mlir
M mlir/test/Integration/GPU/Vulkan/vector-deinterleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-interleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-shuffle.mlir
M mlir/test/Integration/lit.local.cfg
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
A mlir/test/Transforms/inlining-recursive-2.mlir
M mlir/test/Transforms/inlining-recursive.mlir
M mlir/test/lib/Dialect/Math/TestExpandMath.cpp
M mlir/test/lit.cfg.py
M mlir/test/lit.site.cfg.py.in
R mlir/test/mlir-cpu-runner/X86Vector/lit.local.cfg
R mlir/test/mlir-cpu-runner/X86Vector/math-polynomial-approx-avx2.mlir
R mlir/test/mlir-cpu-runner/async-error.mlir
R mlir/test/mlir-cpu-runner/async-func.mlir
R mlir/test/mlir-cpu-runner/async-group.mlir
R mlir/test/mlir-cpu-runner/async-value.mlir
R mlir/test/mlir-cpu-runner/async.mlir
R mlir/test/mlir-cpu-runner/bare-ptr-call-conv.mlir
R mlir/test/mlir-cpu-runner/copy.mlir
R mlir/test/mlir-cpu-runner/expand-arith-ops.mlir
R mlir/test/mlir-cpu-runner/global-constructors.mlir
R mlir/test/mlir-cpu-runner/global-memref.mlir
R mlir/test/mlir-cpu-runner/invalid.mlir
R mlir/test/mlir-cpu-runner/lit.local.cfg
R mlir/test/mlir-cpu-runner/math-polynomial-approx.mlir
R mlir/test/mlir-cpu-runner/memref-reinterpret-cast.mlir
R mlir/test/mlir-cpu-runner/memref-reshape.mlir
R mlir/test/mlir-cpu-runner/sgemm-naive-codegen.mlir
R mlir/test/mlir-cpu-runner/simple.mlir
R mlir/test/mlir-cpu-runner/test-expand-math-approx.mlir
R mlir/test/mlir-cpu-runner/unranked-memref.mlir
R mlir/test/mlir-cpu-runner/utils.mlir
R mlir/test/mlir-cpu-runner/verify-entry-point-result.mlir
R mlir/test/mlir-cpu-runner/verify-flags.mlir
R mlir/test/mlir-cpu-runner/x86-varargs.mlir
A mlir/test/mlir-runner/X86Vector/lit.local.cfg
A mlir/test/mlir-runner/X86Vector/math-polynomial-approx-avx2.mlir
A mlir/test/mlir-runner/async-error.mlir
A mlir/test/mlir-runner/async-func.mlir
A mlir/test/mlir-runner/async-group.mlir
A mlir/test/mlir-runner/async-value.mlir
A mlir/test/mlir-runner/async.mlir
A mlir/test/mlir-runner/bare-ptr-call-conv.mlir
A mlir/test/mlir-runner/copy.mlir
A mlir/test/mlir-runner/expand-arith-ops.mlir
A mlir/test/mlir-runner/global-constructors.mlir
A mlir/test/mlir-runner/global-memref.mlir
A mlir/test/mlir-runner/invalid.mlir
A mlir/test/mlir-runner/lit.local.cfg
A mlir/test/mlir-runner/math-polynomial-approx.mlir
A mlir/test/mlir-runner/memref-reinterpret-cast.mlir
A mlir/test/mlir-runner/memref-reshape.mlir
A mlir/test/mlir-runner/sgemm-naive-codegen.mlir
A mlir/test/mlir-runner/simple.mlir
A mlir/test/mlir-runner/test-expand-math-approx.mlir
A mlir/test/mlir-runner/unranked-memref.mlir
A mlir/test/mlir-runner/utils.mlir
A mlir/test/mlir-runner/verify-entry-point-result.mlir
A mlir/test/mlir-runner/verify-flags.mlir
A mlir/test/mlir-runner/x86-varargs.mlir
M mlir/test/mlir-tblgen/attr-or-type-builder-invalid.td
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/tools/CMakeLists.txt
R mlir/tools/mlir-cpu-runner/CMakeLists.txt
R mlir/tools/mlir-cpu-runner/mlir-cpu-runner.cpp
A mlir/tools/mlir-runner/CMakeLists.txt
A mlir/tools/mlir-runner/mlir-runner.cpp
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RPC.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
A offload/test/libc/server.c
M polly/docs/Architecture.rst
M polly/docs/doxygen.cfg.in
M polly/include/polly/CodeGen/IslExprBuilder.h
M polly/include/polly/CodeGen/RuntimeDebugBuilder.h
M polly/include/polly/DependenceInfo.h
M polly/include/polly/ScopInfo.h
M polly/include/polly/Support/SCEVAffinator.h
M polly/include/polly/Support/ScopHelper.h
M polly/lib/Analysis/ScopBuilder.cpp
M polly/lib/Analysis/ScopDetectionDiagnostic.cpp
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/CodeGen/IslExprBuilder.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
M polly/lib/CodeGen/LoopGenerators.cpp
M polly/lib/CodeGen/Utils.cpp
M polly/lib/Support/SCEVAffinator.cpp
M polly/lib/Support/ScopHelper.cpp
M polly/lib/Transform/DeLICM.cpp
M polly/lib/Transform/ManualOptimizer.cpp
M polly/lib/Transform/MatmulOptimizer.cpp
M polly/lib/Transform/MaximalStaticExpansion.cpp
M polly/lib/Transform/ScheduleOptimizer.cpp
M polly/lib/Transform/ScheduleTreeTransform.cpp
M polly/test/CodeGen/LoopParallelMD/do_not_mutate_debug_info.ll
M polly/test/CodeGen/multiple-codegens.ll
M polly/test/CodeGen/multiple-scops-in-a-row.ll
M polly/test/CodeGen/reduction_2.ll
M polly/test/CodeGen/scalar-store-from-same-bb.ll
M polly/test/CodeGen/test-invalid-operands-for-select.ll
M polly/test/DeLICM/load-in-cond-inf-loop.ll
M polly/test/DeLICM/pr41656.ll
M polly/test/DeLICM/pr48783.ll
M polly/test/DeLICM/reject_outofquota.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions_2.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions_3.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions_4.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts-after-delicm.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts-after-delicm_2.ll
M polly/test/ScopDetect/scev_remove_max.ll
M polly/test/ScopDetectionDiagnostics/ReportLoopHasNoExit.ll
M polly/test/ScopInfo/NonAffine/non_affine_loop_used_later.ll
M polly/test/ScopInfo/allow-all-parameters-dereferencable.ll
M polly/test/ScopInfo/invariant_same_loop_bound_multiple_times-1.ll
M polly/test/ScopInfo/invariant_same_loop_bound_multiple_times-2.ll
M polly/test/ScopInfo/multidim_gep_pointercast2.ll
M polly/test/ScopInfo/multidim_many_references.ll
M polly/test/ScopInfo/scalar_to_array.ll
M polly/test/ScopInfo/zero_ext_of_truncate.ll
M polly/test/create_ll.sh
M polly/utils/pyscop/isl.py
M polly/www/changelog.html
M polly/www/get_started.html
M polly/www/index.html
M polly/www/projects.html
M polly/www/publications.html
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
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