[all-commits] [llvm/llvm-project] aa34a6: [RISCV] Add register allocation hints for lui/auip...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: aa34a6ab299027ac31929173287e42db0dbdb06b
      https://github.com/llvm/llvm-project/commit/aa34a6ab299027ac31929173287e42db0dbdb06b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-01-27 (Mon, 27 Jan 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
    M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll

  Log Message:
  -----------
  [RISCV] Add register allocation hints for lui/auipc+addi fusion. (#123860)

Spotted the auipc case while looking at code for P550. I'm not sure this
is the right long term fix. We're still missing rematerialization
opportunities for these pairs so a pseudo might be better. That would
interfere with folding auipc+add into load/store addressing though.

Fixes #76779.



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