[all-commits] [llvm/llvm-project] 4f40b0: [X86][AVX10.2-SATCVT][NFC] Remove NE from intrinsi...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Mon Jan 27 07:02:38 PST 2025
Branch: refs/heads/users/alexey-bataev/spr/slpreduce-number-of-alternate-instruction-where-possible
Home: https://github.com/llvm/llvm-project
Commit: 4f40b07533eabceeaf56fb89d27b020c6f7aae7e
https://github.com/llvm/llvm-project/commit/4f40b07533eabceeaf56fb89d27b020c6f7aae7e
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/Headers/avx10_2_512satcvtintrin.h
M clang/lib/Headers/avx10_2satcvtintrin.h
M clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
M clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
M llvm/test/MC/X86/avx10.2satcvt-32-att.s
M llvm/test/MC/X86/avx10.2satcvt-32-intel.s
M llvm/test/MC/X86/avx10.2satcvt-64-att.s
M llvm/test/MC/X86/avx10.2satcvt-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2-SATCVT][NFC] Remove NE from intrinsic and instruction name (#123275)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: 1df50e6245cbc04f3b28de3c40127ad61d46b43b
https://github.com/llvm/llvm-project/commit/1df50e6245cbc04f3b28de3c40127ad61d46b43b
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Don't link with --build-id when -static (#123930)
Users of the PlayStation SDK aren't given the means to create or run
static executables. Uses of `-static` are limited a few specialized
cases within SIE. A `--build-id` isn't wanted in those cases.
SIE tracker: TOOLCHAIN-16704
Commit: a2063ba7ffdbbb4faf5da5f32739ab761c2e4289
https://github.com/llvm/llvm-project/commit/a2063ba7ffdbbb4faf5da5f32739ab761c2e4289
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
Log Message:
-----------
[clangd][NFC] Delete a pessimizing move
Commit: a7a8694c5a23c04322f22bf8ce5685cb4b1dddc3
https://github.com/llvm/llvm-project/commit/a7a8694c5a23c04322f22bf8ce5685cb4b1dddc3
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
Log Message:
-----------
Remove references to mips within Android (#123856)
Commit: 70a16b90ff391ff82ef54d4ae6ffcb5eb50162a0
https://github.com/llvm/llvm-project/commit/70a16b90ff391ff82ef54d4ae6ffcb5eb50162a0
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/Driver/linker-wrapper-image.c
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
Log Message:
-----------
[HIP] Support managed variables using the new driver (#123437)
Summary:
Previously, managed variables didn't work in rdc mode using the new
driver because we just didn't register them. This was previously ignored
because we didn't have enough space in the current struct format. This
patch amends that by just emitting a struct pair for the two variables
and using the single pointer.
In the future, a more extensible entry format would be nice, but that
can be done later.
Commit: 4170d6123c51e088fde0ce8c11008b442077fa00
https://github.com/llvm/llvm-project/commit/4170d6123c51e088fde0ce8c11008b442077fa00
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
Log Message:
-----------
[gn] port 6aeffcdb9130
Commit: d0a89e71791736d67d5a5d77fce184f106dc3d3e
https://github.com/llvm/llvm-project/commit/d0a89e71791736d67d5a5d77fce184f106dc3d3e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[gn] fix mistake in d7fb4a275c98f
Commit: c938436f7120872d2e2f72272b7adf2913d91783
https://github.com/llvm/llvm-project/commit/c938436f7120872d2e2f72272b7adf2913d91783
Author: Danial Klimkin <dklimkin at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
Log Message:
-----------
Revert "[GISel] Add more FP opcodes to CSE (#123624)" (#123954)
This reverts commit 43177b524ee06dfc09cbc357ff277d4f53f5dc15.
Commit: aa580c2ec5eb4217c945a47a561181be7e7b1032
https://github.com/llvm/llvm-project/commit/aa580c2ec5eb4217c945a47a561181be7e7b1032
Author: qt-tatiana <tatiana.borisova at qt.io>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-integer-sign-comparison.rst
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-integer-sign-comparison-qt.cpp
Log Message:
-----------
[clang-tidy] Add `EnableQtSupport` option to modernize-use-integer-sign-comprison (#122127)
- add an option `EnableQtSupport`, that makes C++17 `q20::cmp_*`
alternative available for Qt-based applications.
Commit: 93d35ad5f53a69606eac0dabb8ceef066ce4d407
https://github.com/llvm/llvm-project/commit/93d35ad5f53a69606eac0dabb8ceef066ce4d407
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
R llvm/test/CodeGen/AMDGPU/power-sched-no-cycle.mir
Log Message:
-----------
AMDGPU: Delete FillMFMAShadowMutation (#123861)
No test changes with this removed and it appears to
be obsolete.
Commit: 6b486f458fe40919577d9249fa754daa913795d1
https://github.com/llvm/llvm-project/commit/6b486f458fe40919577d9249fa754daa913795d1
Author: flopop01 <florin.popa at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Preprocessor/arm-target-features.c
Log Message:
-----------
[Clang][Arch] Disable mve.fp when explicit -mfpu option (#123028)
Commit: b0d35cf22e15be5c62835d689f3c7e301d9f22cd
https://github.com/llvm/llvm-project/commit/b0d35cf22e15be5c62835d689f3c7e301d9f22cd
Author: Joshua Cranmer <joshua.cranmer at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SSAUpdater.h
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
Log Message:
-----------
[SSAUpdater] Avoid scanning basic blocks to find instruction order. (#123803)
This fixes a compile-time regression caused by #116645, where an entry
basic block with a very large number of allocas and other instructions
caused SROA to take ~100× its expected runtime, as every alloca (with ~2
uses) now calls this method to find the order of those few instructions,
rescanning the very large basic block every single time.
Since this code was originally written, Instructions now have ordering
numbers available to determine relative order without unnecessarily
scanning the basic block.
Commit: 58c6d440f8c24ef1532d12e50302e290e1907a87
https://github.com/llvm/llvm-project/commit/58c6d440f8c24ef1532d12e50302e290e1907a87
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/cmake/config-ix.cmake
M llvm/include/llvm/Config/config.h.cmake
M llvm/lib/Support/Unix/DynamicLibrary.inc
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Unix/Signals.inc
M llvm/lib/Support/Unix/Unix.h
M llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/config.h
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
[CMake] Remove HAVE_DLFCN_H and HAVE_DLADDR (#123879)
It is sufficient to just use `HAVE_DLOPEN`.
Commit: 5a9b74d20d5f3b7f92c01d68d28778108dfb1308
https://github.com/llvm/llvm-project/commit/5a9b74d20d5f3b7f92c01d68d28778108dfb1308
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp:309:7: error:
variable 'errs' set but not used [-Werror,-Wunused-but-set-variable]
Commit: 75ce2dc475b12c12419904cd67b9d12b79a66242
https://github.com/llvm/llvm-project/commit/75ce2dc475b12c12419904cd67b9d12b79a66242
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
M llvm/lib/Target/AArch64/AArch64Processors.td
Log Message:
-----------
[llvm][AArch64] apple-m4 does not have FEAT_{SPEv1p2,SEL2,MPAM} (#123827)
This commit addresses some uncertainty raised in 84fa1755a5b7845ddaeaa513a3786013c76c9c88 as to which features Apple M4 has.
Commit: fa6f88af102cb79a0371725b487e929cb0bcfcb2
https://github.com/llvm/llvm-project/commit/fa6f88af102cb79a0371725b487e929cb0bcfcb2
Author: Petr Kurapov <petr.a.kurapov at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
Log Message:
-----------
[MLIR][XeGPU] Allow some nd ops to have argument shapes mismatch for … (#120566)
…the distributed IR case.
This patch allows `nd_load` and `nd_store` to preserve the tensor
descriptor shape during distribution to SIMT. The validation now expects
the distributed instruction to retain the `sg_map` attribute and uses it
to verify the consistency.
Commit: 13d09dfad6d1f6a15721688822ce33b74b44a8d8
https://github.com/llvm/llvm-project/commit/13d09dfad6d1f6a15721688822ce33b74b44a8d8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[X86] Simplify ArrayRef construction. NFC (#123899)
I think the std::begin/end were to work around an old gcc bug. Hopefully
we don't need them anymore.
Commit: 9e6494c0fb29dfb5d4d2b7bf3ed7af261efee034
https://github.com/llvm/llvm-project/commit/9e6494c0fb29dfb5d4d2b7bf3ed7af261efee034
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
Log Message:
-----------
[CodeGen] Rename RegisterMaskPair to VRegMaskOrUnit. NFC (#123799)
This holds a physical register unit or virtual register and mask.
While I was here I've used emplace_back and removed an unneeded use of a
template.
Commit: f63e8ed16ef1fd2deb80cd88b5ca9d5b631b1c36
https://github.com/llvm/llvm-project/commit/f63e8ed16ef1fd2deb80cd88b5ca9d5b631b1c36
Author: Ilya Biryukov <ibiryukov at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/AST/Attr.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTRecordReader.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/Modules/preferred_name.cppm
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
Revert "[Modules] Delay deserialization of preferred_name attribute at r… (#122726)"
This reverts commit c3ba6f378ef80d750e2278560c6f95a300114412.
We are seeing performance regressions of up to 40% on some compilations
with this patch, we will investigate and reland after fixing performance
issues.
Commit: 16298e4cf23d351fcd789fd027d8a30d9329fa81
https://github.com/llvm/llvm-project/commit/16298e4cf23d351fcd789fd027d8a30d9329fa81
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/var-permute-256.ll
Log Message:
-----------
[X86] var-permute-256.ll - regenerate VPTERNLOG comments
Commit: 603529b29eb5441fe7d32f8d154a0ed876038ef2
https://github.com/llvm/llvm-project/commit/603529b29eb5441fe7d32f8d154a0ed876038ef2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
Log Message:
-----------
[X86] add/sub signed sat vec tests - regenerate VPTERNLOG comments
Commit: e6c7d6a56a850228ccb7b1659e383dd5a55e7bdb
https://github.com/llvm/llvm-project/commit/e6c7d6a56a850228ccb7b1659e383dd5a55e7bdb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
Log Message:
-----------
[X86] avx512-broadcast-unfold.ll - regenerate VPTERNLOG comments
Commit: bb754f2c98ddeeadf75f21e6fbc6bd03898f008c
https://github.com/llvm/llvm-project/commit/bb754f2c98ddeeadf75f21e6fbc6bd03898f008c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512-intrinsics.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
Log Message:
-----------
[X86] avx512 intrinsics tests - regenerate VPTERNLOG comments
Commit: a25f2cb3e6953691fade076c8e0ccebf1016d3d9
https://github.com/llvm/llvm-project/commit/a25f2cb3e6953691fade076c8e0ccebf1016d3d9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
Log Message:
-----------
[X86] vector rotate tests - regenerate VPTERNLOG comments
Commit: 44f316811016e677ca3e6c6237619e71bae28986
https://github.com/llvm/llvm-project/commit/44f316811016e677ca3e6c6237619e71bae28986
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
M llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll
M llvm/test/CodeGen/X86/vector-reduce-and-scalar.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
Log Message:
-----------
[X86] vector reduction tests - regenerate VPTERNLOG comments
Commit: 2476417232cdf2e1fce1a1df466b0995cdf559c5
https://github.com/llvm/llvm-project/commit/2476417232cdf2e1fce1a1df466b0995cdf559c5
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/Transforms/Instrumentation/LowerAllowCheckPass.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
Reapply "[sanitizer][NFCI] Add Options parameter to LowerAllowCheckPass" (#122833) (#122994)
This reverts commit 1515caf7a59dc20cb932b724b2ef5c1d1a593427
(https://github.com/llvm/llvm-project/pull/122833) i.e., relands
7d8b4eb0ead277f41ff69525ed807f9f6e227f37
(https://github.com/llvm/llvm-project/pull/122765), with LowerAllowCheckPass::Options moved inside the callback to fix a stack use-after-scope error.
---------
Co-authored-by: Vitaly Buka <vitalybuka at gmail.com>
Commit: f3c3a9b8829760b730b6651e460f9035065dd4c5
https://github.com/llvm/llvm-project/commit/f3c3a9b8829760b730b6651e460f9035065dd4c5
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libc/CMakeLists.txt
Log Message:
-----------
[libc][cmake] error if user disables sanitizers but wants scudo (#123834)
I found this out the hard way...though we don't suggest in our docs setting or
unsetting COMPILER_RT_BUILD_SANITIZERS, I had this explicitly disabled in a
cmake script I was using to setup an llvm-libc based sysroot. While the libc
compiled, hello world failed to link due to missing references to malloc at
link time. Though I had set the cmake variables to opt into using scudo,
apparently explicitly disabling sanitizers will still prevent scudo from being
built... Check for this at configure time and stop the build then.
Commit: ddb8607fe8b0b74a6d89c79d4fcc158673ac765a
https://github.com/llvm/llvm-project/commit/ddb8607fe8b0b74a6d89c79d4fcc158673ac765a
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
Log Message:
-----------
[libc][docs] disable pthreads docs (#123824)
Having a target named pthreads is breaking when multiple runtimes are enabled.
Disable this target for now so that the builds go back to green (and sites get
updated).
Link: https://github.com/llvm/llvm-zorg/issues/359#issuecomment-2600285688
Link: #122006
Link: #122497
Link: #123821
Commit: 8e79ade49d68c49aeb8ba008b59f559b86d22765
https://github.com/llvm/llvm-project/commit/8e79ade49d68c49aeb8ba008b59f559b86d22765
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libc/src/__support/macros/null_check.h
M libc/test/src/math/smoke/nan_test.cpp
M libc/test/src/math/smoke/nanf128_test.cpp
M libc/test/src/math/smoke/nanf16_test.cpp
M libc/test/src/math/smoke/nanf_test.cpp
M libc/test/src/math/smoke/nanl_test.cpp
Log Message:
-----------
[libc][LIBC_ADD_NULL_CHECKS] replace volatile deref with __builtin_trap (#123401)
Also, update the unit tests that were checking for SIGSEGV to not check for a
specific signal.
To further improve this check, it may be worth:
- renaming the configuration option/macro/docs to be clearer about intent.
- swap __builtin_trap for __builtin_unreachable, removing the preprocessor
variants of LIBC_CRASH_ON_NULLPTR, then unconditionally using
`-fsanitize=unreachable -fsanitize-trap=unreachable` in cmake flags when
LIBC_ADD_NULL_CHECKS is enabled.
- building with `-fno-delete-null-pointer-checks` when LIBC_ADD_NULL_CHECKS (or
when some larger yet to be added hardening config) is enabled.
Link: #111546
Commit: f78359cf43cb990f66412059383cdd95ab6e6ec4
https://github.com/llvm/llvm-project/commit/f78359cf43cb990f66412059383cdd95ab6e6ec4
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td
A mlir/include/mlir/Dialect/SPIRV/IR/SPIRVPrimitiveOps.td
M mlir/test/Dialect/SPIRV/IR/availability.mlir
A mlir/test/Dialect/SPIRV/IR/primitive-ops.mlir
A mlir/test/Target/SPIRV/primitive-ops.mlir
Log Message:
-----------
[mlir][spirv] Add definition for OpEmitVertex and OpEndPrimitive (#123759)
This is hopefully the first patch in the series of patches adding some
missing SPIR-V ops to MLIR over the next weeks/months, starting with
something simple: `OpEmitVertex` and `OpEndPrimitive`. Since the ops
have no input and outputs, and the only condition is "This instruction
must only be used when only one stream is present.", which I don't think
can be validate at the instruction level in isolation, I set
`hasVerifier` to 0. I hope I didn't miss anything, but I'm more than
happy to address any comments.
Commit: 511dc261ab94da7db6e67b05cdcef9dcff44798a
https://github.com/llvm/llvm-project/commit/511dc261ab94da7db6e67b05cdcef9dcff44798a
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
Log Message:
-----------
[lldb][DWARFASTParserClang][NFCI] Factor out CV-qualifier/is_static parsing from ParseChildParameters (#123951)
This patch continues simplifying `ParseChildParameters` by moving out
the logic that parses the first parameter of a function DIE into a
helper function. Since with GCC (and lately Clang) function declarations
have `DW_AT_object_pointer`s, we should be able to check for the
attribute's existence to determine if a function is static (and also
deduce CV-qualifiers from it). This will be useful for cases where the
object parameter is explicit (which is possible since C++23).
This should be NFC. I added a FIXME to places where we assume an
implicit object parameter (which will be addressed in a follow-up
patch).
We used to guard parsing of the CV-qualifiers of the "this" parameter
with a `encoding_mask & Type::eEncodingIsPointerUID`, which is
incorrect, because `eEncodingIsPointerUID` cannot be used as a bitmask
directly (see https://github.com/llvm/llvm-project/issues/120856). This
patch corrects this, but it should still be NFC because any parameter in
C++ called "this" *is* an implicit object parameter.
Commit: b1943f40e74dcfe4ebd6213e1a8a01403bd5ffa9
https://github.com/llvm/llvm-project/commit/b1943f40e74dcfe4ebd6213e1a8a01403bd5ffa9
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
Log Message:
-----------
[BranchFolding] Remove getBranchDebugLoc() (#114613)
Commit: a56ba1fab07b2c9b1d0287bdf56cdad4d54a5f33
https://github.com/llvm/llvm-project/commit/a56ba1fab07b2c9b1d0287bdf56cdad4d54a5f33
Author: goldsteinn <35538541+goldsteinn at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/ScalarEvolution/cycled_phis.ll
M llvm/test/Analysis/ScalarEvolution/unknown_phis.ll
M llvm/test/Transforms/InstCombine/known-phi-recurse.ll
M llvm/test/Transforms/SimplifyCFG/switch-branch-fold-indirectbr-102351.ll
Log Message:
-----------
[ValueTracking] Handle recursive select/PHI in ComputeKnownBits (#114689)
Finish porting #114008 to `KnownBits` (Follow up to #113707).
Commit: afcbcae668f1d8061974247f2828190173aef742
https://github.com/llvm/llvm-project/commit/afcbcae668f1d8061974247f2828190173aef742
Author: Anchu Rajendran S <asudhaku at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] inscan reduction modifier and scan op mlir support (#114737)
Scan directive allows to specify scan reductions within an worksharing
loop, worksharing loop simd or simd directive which should have an
`InScan` modifier associated with it. This change adds the mlir support
for the same.
Related PR: [Parsing and Semantic Support for
scan](https://github.com/llvm/llvm-project/pull/102792)
Commit: 9f83c4ed1c8d09bf4c246ec6dd758bde1756f60c
https://github.com/llvm/llvm-project/commit/9f83c4ed1c8d09bf4c246ec6dd758bde1756f60c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][cuda] Allocate descriptor in managed memory on rebox block argument (#123971)
Another case where the descriptor must be allocated with the CUF runtime
and not a simple alloca instruction.
Commit: 7bf188fa991338e981e8dff120a4ed341ad7f4bd
https://github.com/llvm/llvm-project/commit/7bf188fa991338e981e8dff120a4ed341ad7f4bd
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGExprCXX.cpp
Log Message:
-----------
[NFC] Minor fix to tryEmitAbstract type in EmitCXXNewAllocSize (#123433)
In EmitCXXNewAllocSize, when handling a constant array size, we were
calling tryEmitAbstract with the type of the object being allocated rather
than the expected type of the array size. This worked out because the
allocated type was always a pointer and tryEmitAbstract only ends up
using the size of the type to extend or truncate the constant, and in this
case the destination type should be size_t, which is usually the same
width as the pointer. This change fixes the type, but it makes no
functional difference with the current constant emitter implementation.
Commit: b40739a6e90cfb000b49de819251c1581fd5ee50
https://github.com/llvm/llvm-project/commit/b40739a6e90cfb000b49de819251c1581fd5ee50
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/MC/MCELFStreamer.h
R llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/lib/MC/MCELFStreamer.cpp
R llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
Revert "[LLVM][Clang][AArch64] Implement AArch64 build attributes (#118771)"
This reverts commit d7fb4a275c98f4035d1083b5eb3edd2ffb2da00e.
Buildbots failing:
https://lab.llvm.org/buildbot/#/builders/169/builds/7671
https://lab.llvm.org/buildbot/#/builders/65/builds/11046
Commit: 195a1fc5b05d7a42b2e3fa383edb9a7e8b34a9c5
https://github.com/llvm/llvm-project/commit/195a1fc5b05d7a42b2e3fa383edb9a7e8b34a9c5
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CXX/temp/temp.res/temp.dep/temp.dep.type/p4.cpp
Log Message:
-----------
Reapply "[Clang][Sema] Use the correct lookup context when building overloaded 'operator->' in the current instantiation (#104458)" (#109422)
Reapplies #104458, fixing a bug that occurs when a class member access expression calls an `operator->` operator function that returns a non-dependent class type.
Commit: 137d706739653304294adef84ed758e3e498d975
https://github.com/llvm/llvm-project/commit/137d706739653304294adef84ed758e3e498d975
Author: Julian Nagele <j.nagele at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
Log Message:
-----------
[SCEV] Do not attempt to collect loop guards for loops without predecessor. (#123662)
Attempting to collect loop guards for loops without a predecessor can
lead to non-terminating recursion trying to construct a SCEV.
Fixes https://github.com/llvm/llvm-project/issues/122913.
Commit: 146ee98caa9ab1f717216b08cfe72bd1ab2e0b8b
https://github.com/llvm/llvm-project/commit/146ee98caa9ab1f717216b08cfe72bd1ab2e0b8b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
Log Message:
-----------
[RISCV] Remove duplicate WriteRes<WriteJalr for MIPSP8700. (#123865)
We had two WriteRes for WriteJalr with difference latencies. Drop the
duplicate and change the latency of Jal to 1 based on review feedback
Commit: ec15b242505a46ea7d195a6520fb869a80a2cd10
https://github.com/llvm/llvm-project/commit/ec15b242505a46ea7d195a6520fb869a80a2cd10
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CMakeLists.txt
M llvm/test/Other/crash-stack-trace.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
Log Message:
-----------
[llvm][Support] Only enable backtrace test when it's enabled (#123852)
rdar://138554797
Commit: 589593254eede2f624f29390dc1018725e536505
https://github.com/llvm/llvm-project/commit/589593254eede2f624f29390dc1018725e536505
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOpt] Reorganize visit order and worklist management (#123973)
This implements a suggestion by Craig in PR #123878. We can move the
worklist management out of the per-instruction work and do it once at
the end of scanning all the instructions. This should reduce repeat
visitation of the same instruction when no changes can be made.
Note that this does not remove the inherent O(N^2) in the algorithm.
We're still potentially visiiting every user of every def.
I also included a guard for unreachable blocks since that had been
mentioned as a possible cause. It seems we've rulled that out, but
guarding for this case is still a good idea.
Commit: 340706f311e088f51002593b8cc7291500ca024e
https://github.com/llvm/llvm-project/commit/340706f311e088f51002593b8cc7291500ca024e
Author: Stefan Pintilie <stefanp at ca.ibm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
Log Message:
-----------
[PowerPC] Fix saving of Link Register when using ROP Protect (#123101)
An optimization was added that tries to move the uses of the mflr
instruction away from the instruction itself. However, this doesn't work
when we are using the hashst instruction because that instruction needs
to be run before the stack frame is obtained.
This patch disables moving instructions away from the mflr in the case
where ROP protection is being used.
---------
Co-authored-by: Lei Huang <lei at ca.ibm.com>
Commit: 1687aa2a996f4059f275c83d5db635d43165d36c
https://github.com/llvm/llvm-project/commit/1687aa2a996f4059f275c83d5db635d43165d36c
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
A llvm/test/CodeGen/RISCV/rvv/vlopt-same-vl.ll
Log Message:
-----------
[RISCV][VLOPT] Don't reduce the VL is the same as CommonVL (#123878)
This fixes the slowdown in #123862.
Commit: 5ede7b6a6bc22aee86e592835ccc4eaa9459e5cd
https://github.com/llvm/llvm-project/commit/5ede7b6a6bc22aee86e592835ccc4eaa9459e5cd
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CXX/temp/temp.res/temp.dep/temp.dep.type/p4.cpp
Log Message:
-----------
Revert "Reapply "[Clang][Sema] Use the correct lookup context when building overloaded 'operator->' in the current instantiation (#104458)"" (#123982)
Reverts llvm/llvm-project#109422
Commit: 7ad8a3da4771ce8abbd146611124104d42a4e63e
https://github.com/llvm/llvm-project/commit/7ad8a3da4771ce8abbd146611124104d42a4e63e
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[MemProf] Simplify edge iterations (NFC) (#123469)
Remove edge iterator parameters from the various helpers that move edges
onto other nodes, and their associated iterator update code, and instead
iterate over copies of the edge lists in the caller loops. This also
avoids the need to increment these iterators at every early loop
continue.
This simplifies the code, makes it less error prone when updating, and
in particular, facilitates adding handling of recursive contexts.
There were no measurable compile time and memory overhead effects for a
large target.
Commit: 3057d0f14af5e073be3b7c7942dfff2a975ac4cb
https://github.com/llvm/llvm-project/commit/3057d0f14af5e073be3b7c7942dfff2a975ac4cb
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
Log Message:
-----------
Android defaults to pic (#123955)
Commit: 7e622b61320543b3706711609f1f32fd9ea3788d
https://github.com/llvm/llvm-project/commit/7e622b61320543b3706711609f1f32fd9ea3788d
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeConv2D.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-conv2d.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[TOSA] Change PadOp padding to tosa.shape (#123133)
This patch changes PadOp's padding input to type !tosa.shape<2 * rank>,
(where rank is the rank of the PadOp's input), instead of a <rank x 2>
tensor.
This patch is also a part of TOSA v1.0 effort:
https://discourse.llvm.org/t/rfc-tosa-dialect-increment-to-v1-0/83708
This patch updates the PadOp to match all against the TOSA v1.0 form.
Original Authors include:
@Tai78641
@wonjeon
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: 719f0d92538c917306004e541f38c79717d0c07d
https://github.com/llvm/llvm-project/commit/719f0d92538c917306004e541f38c79717d0c07d
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
Log Message:
-----------
[HLSL] Fix global resource initialization (#123394)
Create separate resource initialization function for each resource and
add them to CodeGenModule's `CXXGlobalInits` list.
Fixes #120636 and addresses this [comment
](https://github.com/llvm/llvm-project/pull/119755/files#r1894093603).
Commit: 1cf0af3d321e3aca57e348b9c0675d153c7b6968
https://github.com/llvm/llvm-project/commit/1cf0af3d321e3aca57e348b9c0675d153c7b6968
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmpx_class_f16 (#123251)
True16 format for v_cmpx_class_f16. Update VOPCX_CLASS t16 and fake16
pseudo.
Commit: 18e9d3dbe5386dd3b88df7e3352f81498cfa6182
https://github.com/llvm/llvm-project/commit/18e9d3dbe5386dd3b88df7e3352f81498cfa6182
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmpx_xx_u/i16 (#123424)
A bulk commit of true16 support for v_cmp_xx_i/u16 instructions
including:
v_cmpx_lt_i16
v_cmpx_eq_i16
v_cmpx_le_i16
v_cmpx_gt_i16
v_cmpx_ne_i16
v_cmpx_ge_i16
v_cmpx_lt_u16
v_cmpx_eq_u16
v_cmpx_le_u16
v_cmpx_gt_u16
v_cmpx_ne_u16
v_cmpx_ge_u16
Commit: 213e03ca1174177370715a8776a6423ee29b10ca
https://github.com/llvm/llvm-project/commit/213e03ca1174177370715a8776a6423ee29b10ca
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Decl.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
Log Message:
-----------
[Clang] Fix handling of immediate escalation for inherited constructors (#112860)
Fixes #112677
Commit: c6e7b4a61ab8718d9ac9d1d32f7d2d0cd0b19a7f
https://github.com/llvm/llvm-project/commit/c6e7b4a61ab8718d9ac9d1d32f7d2d0cd0b19a7f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.cpp
Log Message:
-----------
[flang][cuda][NFC] Add kernel name in translation error (#123987)
Commit: 2656928d0ca78e38c91315020876755e46ccecbf
https://github.com/llvm/llvm-project/commit/2656928d0ca78e38c91315020876755e46ccecbf
Author: Deric Cheung <cheung.deric at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
A clang/test/CodeGenHLSL/builtins/reflect.hlsl
A clang/test/CodeGenSPIRV/Builtins/reflect.c
A clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
A clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
A llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
Log Message:
-----------
Reland "[HLSL] Implement the `reflect` HLSL function" (#123853)
This PR relands
[#122992](https://github.com/llvm/llvm-project/pull/122992).
Some machines were failing to run the `reflect-error.ll` test due to the
RUN lines
```llvm
; RUN: not %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o /dev/null 2>&1 -filetype=obj %}
; RUN: not %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o /dev/null 2>&1 -filetype=obj %}
```
which failed when `spirv-tools` was not present on the machine due to
running the command `not` without any arguments.
These RUN lines have been removed since they don't actually test
anything new compared to the other two RUN lines due to the expected
error during instruction selection.
```llvm
; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s
; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s
```
Commit: 8fb42300a02c887740825cd1b60fc4fcd8d2f933
https://github.com/llvm/llvm-project/commit/8fb42300a02c887740825cd1b60fc4fcd8d2f933
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/RecursiveASTVisitor.h
A clang/include/clang/AST/StmtSYCL.h
M clang/include/clang/AST/StmtVisitor.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Sema/SemaSYCL.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-entry-point.cpp
M clang/test/SemaSYCL/sycl-kernel-entry-point-attr-appertainment.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[SYCL] AST support for SYCL kernel entry point functions. (#122379)
A SYCL kernel entry point function is a non-member function or a static
member function declared with the `sycl_kernel_entry_point` attribute.
Such functions define a pattern for an offload kernel entry point
function to be generated to enable execution of a SYCL kernel on a
device. A SYCL library implementation orchestrates the invocation of
these functions with corresponding SYCL kernel arguments in response to
calls to SYCL kernel invocation functions specified by the SYCL 2020
specification.
The offload kernel entry point function (sometimes referred to as the
SYCL kernel caller function) is generated from the SYCL kernel entry
point function by a transformation of the function parameters followed
by a transformation of the function body to replace references to the
original parameters with references to the transformed ones. Exactly how
parameters are transformed will be explained in a future change that
implements non-trivial transformations. For now, it suffices to state
that a given parameter of the SYCL kernel entry point function may be
transformed to multiple parameters of the offload kernel entry point as
needed to satisfy offload kernel argument passing requirements.
Parameters that are decomposed in this way are reconstituted as local
variables in the body of the generated offload kernel entry point
function.
For example, given the following SYCL kernel entry point function
definition:
```
template<typename KernelNameType, typename KernelType>
[[clang::sycl_kernel_entry_point(KernelNameType)]]
void sycl_kernel_entry_point(KernelType kernel) {
kernel();
}
```
and the following call:
```
struct Kernel {
int dm1;
int dm2;
void operator()() const;
};
Kernel k;
sycl_kernel_entry_point<class kernel_name>(k);
```
the corresponding offload kernel entry point function that is generated
might look as follows (assuming `Kernel` is a type that requires
decomposition):
```
void offload_kernel_entry_point_for_kernel_name(int dm1, int dm2) {
Kernel kernel{dm1, dm2};
kernel();
}
```
Other details of the generated offload kernel entry point function, such
as its name and calling convention, are implementation details that need
not be reflected in the AST and may differ across target devices. For
that reason, only the transformation described above is represented in
the AST; other details will be filled in during code generation.
These transformations are represented using new AST nodes introduced
with this change. `OutlinedFunctionDecl` holds a sequence of
`ImplicitParamDecl` nodes and a sequence of statement nodes that
correspond to the transformed parameters and function body.
`SYCLKernelCallStmt` wraps the original function body and associates it
with an `OutlinedFunctionDecl` instance. For the example above, the AST
generated for the `sycl_kernel_entry_point<kernel_name>` specialization
would look as follows:
```
FunctionDecl 'sycl_kernel_entry_point<kernel_name>(Kernel)'
TemplateArgument type 'kernel_name'
TemplateArgument type 'Kernel'
ParmVarDecl kernel 'Kernel'
SYCLKernelCallStmt
CompoundStmt
<original statements>
OutlinedFunctionDecl
ImplicitParamDecl 'dm1' 'int'
ImplicitParamDecl 'dm2' 'int'
CompoundStmt
VarDecl 'kernel' 'Kernel'
<initialization of 'kernel' with 'dm1' and 'dm2'>
<transformed statements with redirected references of 'kernel'>
```
Any ODR-use of the SYCL kernel entry point function will (with future
changes) suffice for the offload kernel entry point to be emitted. An
actual call to the SYCL kernel entry point function will result in a
call to the function. However, evaluation of a `SYCLKernelCallStmt`
statement is a no-op, so such calls will have no effect other than to
trigger emission of the offload kernel entry point.
Additionally, as a related change inspired by code review feedback,
these changes disallow use of the `sycl_kernel_entry_point` attribute
with functions defined with a _function-try-block_. The SYCL 2020
specification prohibits the use of C++ exceptions in device functions.
Even if exceptions were not prohibited, it is unclear what the semantics
would be for an exception that escapes the SYCL kernel entry point
function; the boundary between host and device code could be an implicit
noexcept boundary that results in program termination if violated, or
the exception could perhaps be propagated to host code via the SYCL
library. Pending support for C++ exceptions in device code and clear
semantics for handling them at the host-device boundary, this change
makes use of the `sycl_kernel_entry_point` attribute with a function
defined with a _function-try-block_ an error.
Commit: 517334bdb83deaae3be6fbc4fa5f1d721b01c0f0
https://github.com/llvm/llvm-project/commit/517334bdb83deaae3be6fbc4fa5f1d721b01c0f0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[TableGen] Add maps from Write/ReadType to the parent WriteRes/ReadAdvance. NFC (#123876)
Use this to improve performance of SubtargetEmitter::findWriteResources
and SubtargetEmitter::findReadAdvance. Now we can do a map lookup
instead of a linear search through all WriteRes/ReadAdvance records.
This reduces the build time of RISCVGenSubtargetInfo.inc on my
machine from 43 seconds to 10 seconds.
Commit: ac94fade6075fec89eb29c7dedf01ef59601e61d
https://github.com/llvm/llvm-project/commit/ac94fade6075fec89eb29c7dedf01ef59601e61d
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/unittests/Target/SPIRV/SPIRVAPITest.cpp
Log Message:
-----------
[SPIR-V] Rename internal command line flags for optimization level and mtriple used when passing options into the translate API call (#123975)
Rename internal command line flags for optimization level and mtriple
used when passing options into the translate API call.
Commit: 68c6b2e18809342e3747d50eb0dc84246393941b
https://github.com/llvm/llvm-project/commit/68c6b2e18809342e3747d50eb0dc84246393941b
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
Log Message:
-----------
[ASTMatchers][NFC] use `Matcher<QualType>` instead of `DynTypedMatcher` in `TypeLocTypeMatcher` (#123450)
There are no template in `TypeLocTypeMatcher`. So we do not need to use
`DynTypedMatcher` which can improve performance
Commit: a2c683b665e99831c5d6343a9afeeae2877b393a
https://github.com/llvm/llvm-project/commit/a2c683b665e99831c5d6343a9afeeae2877b393a
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/test/COFF/arm64x-export.test
Log Message:
-----------
[LLD][COFF] Use EC symbol table for exports defined in module definition files (#123849)
Commit: 4e9d5a3a307b362529583969e59070bc17909f23
https://github.com/llvm/llvm-project/commit/4e9d5a3a307b362529583969e59070bc17909f23
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Options.td
M lld/test/COFF/arm64x-export.test
Log Message:
-----------
[LLD][COFF] Add support for the -defArm64Native argument (#123850)
MSVC ignores the `/defArm64Native` argument on non-ARM64X targets.
It is also ignored if the `/def` option is not specified.
Commit: a77250fd782530f42a90f8562bcef0eb26abb010
https://github.com/llvm/llvm-project/commit/a77250fd782530f42a90f8562bcef0eb26abb010
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/CAPI/ir.c
M mlir/test/python/ir/location.py
Log Message:
-----------
[mlir] Add C and Python interface for file range (#123276)
Plumbs through creating file ranges to C and Python.
Commit: 223bd0ca81f871beb31d40b4f02753493c30b5b2
https://github.com/llvm/llvm-project/commit/223bd0ca81f871beb31d40b4f02753493c30b5b2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/copy_cvref.h
Log Message:
-----------
[libc++] Avoid unnecessary instantiations for __copy_cvref_t (#123718)
This changes the implementation of `__copy_cvref_t` to only template the
implementation class on the `_From` parameter, avoiding instantiations
for every combination of `_From` and `_To`.
Commit: 27ccc99c4f4300115aa0d619e8e4693f18b2af9d
https://github.com/llvm/llvm-project/commit/27ccc99c4f4300115aa0d619e8e4693f18b2af9d
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOpt] Minor worklist invariant cleanup [NFC] (#123989)
In retrospect, this probably should have been rolled into #123973. It
seemed more involved when I first decided to split. :)
Commit: e0ae8890460d6c6a90dd27fe6762128b2161000b
https://github.com/llvm/llvm-project/commit/e0ae8890460d6c6a90dd27fe6762128b2161000b
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/docs/SandboxIR.md
Log Message:
-----------
[SandboxIR][Doc] Add Quick start notes (#123992)
Commit: 630177ccdde44b0dd8faa13b34002d15c4b0af8d
https://github.com/llvm/llvm-project/commit/630177ccdde44b0dd8faa13b34002d15c4b0af8d
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] Fix madvise/posix_madvise for macOs. (#124020)
only bsd and linux intercept these syscalls.
Fix #123601
Commit: 939f2900d03c6ab0a89ba619ff25c8542bd11a5a
https://github.com/llvm/llvm-project/commit/939f2900d03c6ab0a89ba619ff25c8542bd11a5a
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] getsockopt/setsockopt interception. (#124004)
Commit: fd087135efe1b62b506c3caef3fef83242a8e504
https://github.com/llvm/llvm-project/commit/fd087135efe1b62b506c3caef3fef83242a8e504
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
Log Message:
-----------
[SandboxVec][Legality] Diamond reuse multi input (#123426)
This patch implements the diamond pattern where we are vectorizing
toward the top of the diamond from both edges, but the second edge may
use elements from a different vector or just scalar values. This
requires some additional packing code (see lit test).
Commit: 64360899c76cb2e687ef1fcea617ef455e8a2621
https://github.com/llvm/llvm-project/commit/64360899c76cb2e687ef1fcea617ef455e8a2621
Author: Yeoul Na <yeoul_na at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/docs/BoundsSafety.rst
A clang/docs/BoundsSafetyAdoptionGuide.rst
M clang/docs/index.rst
Log Message:
-----------
[BoundsSafety][Doc] Add BoundsSafetyAdoptionGuide.rst (#120674)
This adds an instruction to adopt `-fbounds-safety` using the preview
implementation available in the fork of llvm-project.
Commit: a939a9fd53d98f33b94f9121646d5906a2b9f598
https://github.com/llvm/llvm-project/commit/a939a9fd53d98f33b94f9121646d5906a2b9f598
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
A lldb/test/API/tools/lldb-dap/progress/Makefile
A lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
A lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
A lldb/test/API/tools/lldb-dap/progress/main.cpp
M lldb/tools/lldb-dap/ProgressEvent.cpp
M lldb/tools/lldb-dap/ProgressEvent.h
Log Message:
-----------
[LLDB-DAP] Send Progress update message over DAP (#123837)
When testing my SBProgress DAP PR (#123826), I noticed Progress update
messages aren't sent over DAP. This patch adds the lldb progress event's
message to the body when sent over DAP.
Before
Now
Tested with my [progress tester
command](https://gist.github.com/Jlalond/48d85e75a91f7a137e3142e6a13d0947),
testing 10 events 5 seconds apart 1-10
Commit: 6e498bc2cd765f4c421d32d610bdc0effec62b42
https://github.com/llvm/llvm-project/commit/6e498bc2cd765f4c421d32d610bdc0effec62b42
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
A flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/CUDA/pointer.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Handle simple device pointer allocation (#123996)
Commit: 98de5dfe6a8cbb70f21de545acec4710a77294ed
https://github.com/llvm/llvm-project/commit/98de5dfe6a8cbb70f21de545acec4710a77294ed
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/Attributes.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/IR/Attributes.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/OperationSupport.cpp
Log Message:
-----------
[mlir] Add NamedAttribute ctor taking StringRef. NFC. (#123974)
This is a small QoL improvement so that we don't have to go through
helpers when building `NamedAttribute`s.
Commit: 2dc1c95595e409c74a8a3d743afb7898e1af3255
https://github.com/llvm/llvm-project/commit/2dc1c95595e409c74a8a3d743afb7898e1af3255
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][VecUtils] Implement VecUtils::getLowest() (#124024)
VecUtils::getLowest(Valse) returns the lowest instruction in the BB among Vals.
If the instructions are not in the same BB, or if none of them is an
instruction it returns nullptr.
Commit: 96dbd0006c3c4c9de5f1fe4f3bbac3c74acac436
https://github.com/llvm/llvm-project/commit/96dbd0006c3c4c9de5f1fe4f3bbac3c74acac436
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
Log Message:
-----------
[RISCV] Re-generate test checks so we pick up implicit on whole register moves. NFC
Commit: 9fbf5cfebcd770fbe0e453f36ee7c74809339f18
https://github.com/llvm/llvm-project/commit/9fbf5cfebcd770fbe0e453f36ee7c74809339f18
Author: Ben Langmuir <blangmuir at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/CodeGen/BackendUtil.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
A clang/test/Modules/gmodules-codegenopts.c
Log Message:
-----------
[clang][modules] Partially revert 48d0eb518 to fix -gmodules output (#124003)
With the changes in 48d0eb518, the CodeGenOptions used to emit .pcm
files with -fmodule-format=obj (-gmodules) were the ones from the
original invocation, rather than the ones specifically crafted for
outputting the pcm. This was causing the pcm to be written with only the
debug info and without the __clangast section in some cases (e.g. -O2).
This unforunately was not covered by existing tests, because compiling
and loading a module within a single compilation load the ast content
from the in-memory module cache rather than reading it from the pcm file
that was written. This broke bootstrapping a build of clang with modules
enabled on Darwin.
rdar://143418834
Commit: 8f45452c5309d0ae59dd383de6dae1aa4eabbb9c
https://github.com/llvm/llvm-project/commit/8f45452c5309d0ae59dd383de6dae1aa4eabbb9c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Restrict jobs based on owner instead of repo (#123797)
Not really any functional change, just a clean up that could make it
easier to share snippets with other repos.
Commit: 8110af75b1500be2313e523a2d2da6bb7806b700
https://github.com/llvm/llvm-project/commit/8110af75b1500be2313e523a2d2da6bb7806b700
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/pack.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Fix codegen when packing constants. (#124033)
Before this patch packing a bundle of constants would crash because
`getInsertPointAfterInstrs()` expected instructions. This patch fixes
this.
Commit: d5457e4c1619e5dbeefd49841e284cbc24d35cb4
https://github.com/llvm/llvm-project/commit/d5457e4c1619e5dbeefd49841e284cbc24d35cb4
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/test/Index/crash-recovery-modules.m
Log Message:
-----------
[NFC][Index] Disable LSAN on crash recovery tests (#124035)
Avoiding leaks in such cases is very hard.
There are similar suppression in other Index tests.
Commit: eaaac050588ec67afcdbb347df5597458a9b10d1
https://github.com/llvm/llvm-project/commit/eaaac050588ec67afcdbb347df5597458a9b10d1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaSYCL.cpp
Log Message:
-----------
[Sema] Fix a warning
This patch fixes:
clang/lib/Sema/SemaSYCL.cpp:428:25: error: unused variable 'SKI'
[-Werror,-Wunused-variable]
Commit: a9d2834508e276d0a3cc09ac549132b56796e87f
https://github.com/llvm/llvm-project/commit/a9d2834508e276d0a3cc09ac549132b56796e87f
Author: Hua Tian <akiratian at tencent.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
A llvm/test/CodeGen/Hexagon/swp-ws-live-intervals-issue123165.mir
Log Message:
-----------
[llvm][CodeGen] Fix the issue caused by live interval checking in window scheduler (#123184)
At some corner cases, the cloned MI still retains an old slot index,
which leads to the compiler crashing. This patch update the slot index
map before delete the recycled MI.
https://github.com/llvm/llvm-project/issues/123165
Commit: 847acbbc529133b2300721a809751891200f37f5
https://github.com/llvm/llvm-project/commit/847acbbc529133b2300721a809751891200f37f5
Author: epitavy <32581827+epitavy at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/examples/ExceptionDemo/CMakeLists.txt
M llvm/examples/ExceptionDemo/ExceptionDemo.cpp
Log Message:
-----------
[ExceptionDemo] Transition example from MCJIT to ORC and fix errors (#92504)
ExceptionDemo has been broken for some time. This patch fixes the
compilation errors and moves the example from MCJIT to ORC.
Commit: 23d2a1862a8b60cf5a04ffabdf5c1ea776120d04
https://github.com/llvm/llvm-project/commit/23d2a1862a8b60cf5a04ffabdf5c1ea776120d04
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove unnecessary check for null TargetInstrInfo (#123929)
This can never happen.
Commit: d3aea77f50a2215a9fa50c1bfa5f4b9717d8e928
https://github.com/llvm/llvm-project/commit/d3aea77f50a2215a9fa50c1bfa5f4b9717d8e928
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Move transformMaskAfterShuffle into BaseShuffleAnalysis and use it as much as possible. (#123896)
Commit: 1042ddc31b594511657ff70a82d71e2d037e2e35
https://github.com/llvm/llvm-project/commit/1042ddc31b594511657ff70a82d71e2d037e2e35
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[gn] port ec15b242505
Commit: 6f69adeed6728e49c16d47bdde658285f49c8ed7
https://github.com/llvm/llvm-project/commit/6f69adeed6728e49c16d47bdde658285f49c8ed7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove null TargetRegisterInfo check (#123933)
This cannot happen. Also simplify the LaneBitmask check from !none
to any.
Commit: 2646e2d487027e61c4e3cba5ceecfd95cedce0fe
https://github.com/llvm/llvm-project/commit/2646e2d487027e61c4e3cba5ceecfd95cedce0fe
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Stop allocating tiny helper classes (NFC) (#123936)
This was allocating tiny helper classes for every instruction
visited. We can just dispatch over the cases in the visitor
function instead.
Commit: ba70368f1380f8d22494fc8c100d2ab894a3cf94
https://github.com/llvm/llvm-project/commit/ba70368f1380f8d22494fc8c100d2ab894a3cf94
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
A clang/test/Driver/loongarch-relax-features.c
Log Message:
-----------
[Clang][Driver] Support linker relaxation options for LoongArch (#123587)
This commit completed four tasks:
- Add `-mrelax/-mno-relax` options support for LoongArch in clang
driver.
- Print error for `-gsplit-dwarf` with LoongArch linker relaxation
(`-mrelax`).
- Pass `-X` to linker to discard a plethora of `.L` symbols due to
linker relaxation.
- Forward `--no-relax` option to linker.
Commit: 15c2d4baf17292b4966d335846b30c50063f0265
https://github.com/llvm/llvm-project/commit/15c2d4baf17292b4966d335846b30c50063f0265
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove check for subreg index on a def operand (#123943)
This is looking at operand 0 of a REG_SEQUENCE, which can never
have a subregister index.
Commit: 9cefa3e6fccf30959433b96a8a275417b1429f4e
https://github.com/llvm/llvm-project/commit/9cefa3e6fccf30959433b96a8a275417b1429f4e
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan] Generalize handleIntrinsicByApplyingToShadow by adding bitcasting (#123474)
`handleIntrinsicByApplyingToShadow` (introduced in
https://github.com/llvm/llvm-project/pull/114490) requires that the
intrinsic supports integer-ish operands; this is not the case for all
intrinsics. This patch generalizes the function to bitcast the shadow
arguments to be the same type as the original intrinsic, thus
guaranteeing that the intrinsic exists. Additionally, it casts the
computed shadow to be an appropriate shadow type.
This function assumes that the intrinsic will handle arbitrary
bit-patterns (for example, if the intrinsic accepts floats for var1, we
assume that it works normally even if inputs are NaNs etc.).
Commit: ba3e6f0f0f2bebeb2b82e976ea1b5df007784862
https://github.com/llvm/llvm-project/commit/ba3e6f0f0f2bebeb2b82e976ea1b5df007784862
Author: Luke Lau <luke at igalia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOPT] Remove dead passthru check in getOperandLog2EEW. NFC (#123911)
We already bail if the user is tied in checkUsers, which is true for all
passthrus. Remove the check in getOperandLog2EEW so that it only worries
about computing the OperandInfo, and leaves the passthru correctness to
checkUsers.
Commit: 0fe8e70c6609ff86cd40fbb45a85a8ed04c153c2
https://github.com/llvm/llvm-project/commit/0fe8e70c6609ff86cd40fbb45a85a8ed04c153c2
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
R clang/test/CodeGenHLSL/builtins/reflect.hlsl
R clang/test/CodeGenSPIRV/Builtins/reflect.c
R clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
R clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
R llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
Log Message:
-----------
Revert "Reland "[HLSL] Implement the `reflect` HLSL function"" (#124046)
Reverts llvm/llvm-project#123853
The introduction of `reflect-error.ll` surfaced a bug with the use of
`report_fatal_error` in `SPIRVInstructionSelector` that was propagated
into the pr. This has caused a build-bot breakage, and the work to solve
the underlying issue is tracked here:
https://github.com/llvm/llvm-project/issues/124045. We can re-apply this
commit when the underlying issue is resolved.
Commit: 3ef90f843fee74ff811ef88246734475f50e2073
https://github.com/llvm/llvm-project/commit/3ef90f843fee74ff811ef88246734475f50e2073
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Target/Cpp/switch.mlir
Log Message:
-----------
[emitc] Fix the translation switchop with argument of expressionop (#123701)
Now a `emitc.switch` with argument of `emitc.expression` wouldn't emit
its argument to cpp. This patch fix it.
Commit: b46fcb9fa32f24660b1b8858d5c4cbdb76ef9d8b
https://github.com/llvm/llvm-project/commit/b46fcb9fa32f24660b1b8858d5c4cbdb76ef9d8b
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Implement CWG 2628 "Implicit deduction guides should propagate constraints" (#111143)
Closes https://github.com/llvm/llvm-project/issues/98592
Commit: 652ff20140d79544db4dfa21314fc62c3c9182e5
https://github.com/llvm/llvm-project/commit/652ff20140d79544db4dfa21314fc62c3c9182e5
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/module/cudadevice.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Semantics/cuf-device-procedures01.cuf
Log Message:
-----------
[flang][cuda] Adding atomicadd as a cudadevice intrinsic and converting it LLVM dialect (#123840)
With these changes, CUF atomic operations are handled as cudadevice
intrinsics and are converted straight to the LLVM dialect with the
`llvm.atomicrw` operation.
I am only submitting changes for `atomicadd` to gather feedback. If we
are to proceed with these changes I will add support for all other
applicable atomic operations following this pattern.
Commit: 892a804d93d44ddfd7cd351852fe6aef32d4dcd0
https://github.com/llvm/llvm-project/commit/892a804d93d44ddfd7cd351852fe6aef32d4dcd0
Author: Akshay Deodhar <adeodhar at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
Log Message:
-----------
[NVPTX] Stop using 16-bit CAS instructions from PTX (#120220)
Increases minimum CAS size from 16 bit to 32 bit, for better SASS
codegen.
When atomics are emulated using atom.cas.b16, the SASS generated
includes 2 (nested) emulation loops. When emulated using an atom.cas.b32
loop, the SASS too has a single emulation loop. Using 32 bit CAS thus
results in better codegen.
Commit: 1c5d971e425ff080dffd4d9a9a7734ead042d323
https://github.com/llvm/llvm-project/commit/1c5d971e425ff080dffd4d9a9a7734ead042d323
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[Signals] Exclude dladdr for AIX after #123879
Widely supported but missing on AIX
https://www.austingroupbugs.net/view.php?id=993
Commit: 75750722737e9128500b81363ba66c62fea1e4fe
https://github.com/llvm/llvm-project/commit/75750722737e9128500b81363ba66c62fea1e4fe
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets.s
Log Message:
-----------
[llvm-exegesis] Disable exhaustive tests on Windows
When looking at the slowest lit tests, I'm seeing these four tests take
two to eight minutes. Test coverage on Linux should be sufficient for
the functionality on top of it not really being useful on Windows at
all.
This was observed when hacking on the new premerge in a windows VM.
Commit: 19834b4623fd1e7ae5185ed76031b407c3fa7a47
https://github.com/llvm/llvm-project/commit/19834b4623fd1e7ae5185ed76031b407c3fa7a47
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mscq.c
M clang/test/Preprocessor/init-loongarch.c
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
A llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg-128.ll
Log Message:
-----------
[LoongArch] Support sc.q instruction for 128bit cmpxchg operation (#116771)
Two options for clang
-mno-scq: Disable sc.q instruction.
-mscq: Enable sc.q instruction.
The default is -mno-scq.
Commit: 0bcf34e422683b900ed504c5e4605038b257f1ee
https://github.com/llvm/llvm-project/commit/0bcf34e422683b900ed504c5e4605038b257f1ee
Author: MagentaTreehouse <99200384+MagentaTreehouse at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/AST/UnresolvedSet.h
Log Message:
-----------
[Clang] [NFC] Mark `UnresolvedSetImpl`'s move operations as defaulted (#97930)
Commit: d80b814c010580b0fd02c1b1a9521a0b640a358a
https://github.com/llvm/llvm-project/commit/d80b814c010580b0fd02c1b1a9521a0b640a358a
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[LoongArch] Summary llvm20 release notes
Commit: 3c7a878d919c6483c9e78a3ed4578d4ee2f54408
https://github.com/llvm/llvm-project/commit/3c7a878d919c6483c9e78a3ed4578d4ee2f54408
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[LoongArch] Summary clang20 release notes
Commit: aa273fd83eccb55215f4cb18285f8462a1013f5c
https://github.com/llvm/llvm-project/commit/aa273fd83eccb55215f4cb18285f8462a1013f5c
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/docs/ReleaseNotes.rst
Log Message:
-----------
[LoongArch] Update lld20 release notes
Commit: 163935a48df69bde944fae2b4581541dab30c730
https://github.com/llvm/llvm-project/commit/163935a48df69bde944fae2b4581541dab30c730
Author: quic_hchandel <165007698+hchandel at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcilo-aliases-valid.s
A llvm/test/MC/RISCV/xqcilo-invalid.s
A llvm/test/MC/RISCV/xqcilo-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcilo (Large Offset Load Store) extension (#123881)
This extension adds eight 48 bit load store instructions.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
---------
Co-authored-by: Harsh Chandel <hchandel at qti.qualcomm.com>
Commit: de209fa11b5455155228bcdba012b6074388b917
https://github.com/llvm/llvm-project/commit/de209fa11b5455155228bcdba012b6074388b917
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineJumpTableInfo.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
A llvm/lib/CodeGen/StaticDataSplitter.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
A llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
[CodeGen] Introduce Static Data Splitter pass (#122183)
https://discourse.llvm.org/t/rfc-profile-guided-static-data-partitioning/83744
proposes to partition static data sections.
This patch introduces a codegen pass. This patch produces jump table
hotness in the in-memory states (machine jump table info and entries).
Target-lowering and asm-printer consume the states and produce `.hot`
section suffix. The follow up PR
https://github.com/llvm/llvm-project/pull/122215 implements such
changes.
---------
Co-authored-by: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Commit: d15f3e828d3d3335aa9b92b9013a590b71e56b92
https://github.com/llvm/llvm-project/commit/d15f3e828d3d3335aa9b92b9013a590b71e56b92
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/deep-loop-nest.ll
Log Message:
-----------
[LoopInterchange] Constrain LI within supported loop nest depth (#118656)
This patch is an extension to #115128.
After profiling LLVM test-suite, I see a lot of loop nest of depth more
than `MaxLoopNestDepth` which is 10. Early exit for them would save
compile-time as it would avoid computing DependenceInfo and CacheCost.
Please see 'bound-max-depth' branch on compile-time-tracker.
Commit: 646f034e4e228f9d5d6a0142210e5e28f2ea7872
https://github.com/llvm/llvm-project/commit/646f034e4e228f9d5d6a0142210e5e28f2ea7872
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port de209fa11b54
Commit: daa18205c6f0a3b5dd62ba2e65948e1a9182a60f
https://github.com/llvm/llvm-project/commit/daa18205c6f0a3b5dd62ba2e65948e1a9182a60f
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/OpenMP/copyin.f90
Log Message:
-----------
[Flang][OpenMP] Fix copyin allocatable lowering to MLIR (#122097)
Fixes https://github.com/llvm/llvm-project/issues/113191
Issue: [flang][OpenMP] Runtime segfault when an allocatable variable is
used with copyin
Rootcause: The value of the threadprivate variable is not being copied
from the primary thread to the other threads within a parallel region.
As a result it tries to access a null pointer inside a parallel region
which causes segfault.
Fix: When allocatables used with copyin clause need to ensure that, on
entry to any parallel region each thread’s copy of a variable will
acquire the allocation status of the primary thread, before copying the
value of a threadprivate variable of the primary thread to the
threadprivate variable of each other member of the team.
Commit: ea49d474fd355a9fdc3d549c4f927b970181f4c9
https://github.com/llvm/llvm-project/commit/ea49d474fd355a9fdc3d549c4f927b970181f4c9
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
Specify triple for llc test
Commit: 5d8390d48e5c03235b3c83748e4a2eec0a19ae65
https://github.com/llvm/llvm-project/commit/5d8390d48e5c03235b3c83748e4a2eec0a19ae65
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
Temporarily disable test on Fuchsia
Commit: c3dfd34e54c1cb9e0e6c7472a6d30d03a63f6f0a
https://github.com/llvm/llvm-project/commit/c3dfd34e54c1cb9e0e6c7472a6d30d03a63f6f0a
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Add unreachable before catch destinations (#123915)
When `try_table`'s catch clause's destination has a return type, as in
the case of catch with a concrete tag, catch_ref, and catch_all_ref. For
example:
```wasm
block exnref
try_table (catch_all_ref 0)
...
end_try_table
end_block
... use exnref ...
```
This code is not valid because the block's body type is not exnref. So
we add an unreachable after the 'end_try_table' to make the code valid
here:
```wasm
block exnref
try_table (catch_all_ref 0)
...
end_try_table
unreachable ;; Newly added
end_block
```
Because 'unreachable' is a terminator we also need to split the BB.
---
We need to handle the same thing for unwind mismatch handling. In the
code below, we create a "trampoline BB" that will be the destination for
the nested `try_table`~`end_try_table` added to fix a unwind mismatch:
```wasm
try_table (catch ... )
block exnref
...
try_table (catch_all_ref N)
some code
end_try_table
...
end_block ;; Trampoline BB
throw_ref
end_try_table
```
While the `block` added for the trampoline BB has the return type
`exnref`, its body, which contains the nested `try_table` and other
code, wouldn't have the `exnref` return type. Most times it didn't
become a problem because the block's body ended with something like `br`
or `return`, but that may not always be the case, especially when there
is a loop. So we add an `unreachable` to make the code valid here too:
```wasm
try_table (catch ... )
block exnref
...
try_table (catch_all_ref N)
some code
end_try_table
...
unreachable ;; Newly added
end_block ;; Trampoline BB
throw_ref
end_try_table
```
In this case we just append the `unreachable` at the end of the layout
predecessor BB. (This was tricky to do in the first (non-mismatch) case
because there `end_try_table` and `end_block` were added in the
beginning of an EH pad in `placeTryTableMarker` and moving
`end_try_table` and the new `unreachable` to the previous BB caused
other problems.)
---
This adds many `unreaachable`s to the output, but this adds
`unreachable` to only a few places to see if this is working. The
FileCheck lines in `exception.ll` and `cfg-stackify-eh.ll` are already
heavily redacted to only leave important control-flow instructions, so I
don't think it's worth adding `unreachable`s everywhere.
Commit: ba174855203403f6c3e2a46bdd79dbb3e27ac6a4
https://github.com/llvm/llvm-project/commit/ba174855203403f6c3e2a46bdd79dbb3e27ac6a4
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/test/CodeCompletion/member-access.cpp
Log Message:
-----------
[clang][CodeComplete] Use HeuristicResolver to resolve DependentNameTypes (#123818)
Fixes https://github.com/clangd/clangd/issues/1249
Commit: 220004d2f8692e3a224dc75f7a7c6001711d3d58
https://github.com/llvm/llvm-project/commit/220004d2f8692e3a224dc75f7a7c6001711d3d58
Author: Alan Li <me at alanli.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
Log Message:
-----------
[GISel] Add more FP opcodes to CSE (#123949)
Resubmit, previously PR has compilation issues.
Commit: 3fb8c5b43195d6e11ff0557d07e75700343d369f
https://github.com/llvm/llvm-project/commit/3fb8c5b43195d6e11ff0557d07e75700343d369f
Author: mconst <mconst at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
M llvm/test/CodeGen/X86/stack-clash-huge.ll
Log Message:
-----------
[X86] Fix invalid instructions on x32 with large stack frames (#124041)
`X86FrameLowering::emitSPUpdate()` assumes that 64-bit targets use a
64-bit stack pointer, but that's not true on x32.
When checking the stack pointer size, we need to look at
`Uses64BitFramePtr` rather than `Is64Bit`. This avoids generating
invalid instructions like `add esp, rcx`.
For impossibly-large stack frames (4 GiB or larger with a 32-bit stack
pointer), we were also generating invalid instructions like `mov eax,
5000000000`. The inline stack probe code already had a check for that
situation; I've moved the check into `emitSPUpdate()`, so any attempt to
allocate a 4 GiB stack frame with a 32-bit stack pointer will now trap
rather than adjusting ESP by the wrong amount. This also fixes the
"can't have 32-bit 16GB stack frame" assertion, which used to be
triggerable by user code but is now correct.
To help catch situations like this in the future, I've added
`-verify-machineinstrs` to the stack clash tests that generate large
stack frames.
This fixes the expensive-checks buildbot failure caused by #113219.
Commit: 8eb99bbe6e8878bfd73fb301899ced6bb5dfff38
https://github.com/llvm/llvm-project/commit/8eb99bbe6e8878bfd73fb301899ced6bb5dfff38
Author: Martin Storsjö <martin at martin.st>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/test/COFF/empty-section-decl.yaml
M llvm/include/llvm/Object/COFF.h
R llvm/test/Object/coff-sec-sym.test
Log Message:
-----------
Reland [LLD] [COFF] Fix linking MSVC generated implib header objects (#123916)
ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b tried to fix cases when LLD
links what seems to be import library header objects from MSVC. However,
the fix seems incorrect; the review at https://reviews.llvm.org/D133627
concluded that if this (treating this kind of symbol as a common symbol)
is what link.exe does, it's fine.
However, this is most probably not what link.exe does. The symbol
mentioned in the commit message of
ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b would be a common symbol with a
size of around 3 GB; this is not what might have been intended.
That commit tried to avoid running into the error ".idata$4 should not
refer to special section 0"; that issue is fixed for a similar style of
section symbols in 4a4a8a1476b1386b523dc5b292ba9a5a6748a9cf.
Therefore, revert ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b and extend
the fix from 4a4a8a1476b1386b523dc5b292ba9a5a6748a9cf to also work for
the section symbols in MSVC generated import libraries.
The main detail about them, is that for symbols of type
IMAGE_SYM_CLASS_SECTION, the Value field is not an offset, but it is an
optional set of flags, corresponding to the Characteristics of the
section header (although it may be empty).
This is a reland of a previous version of this commit, earlier merged in
9457418e66766d8fafc81f85eb8045986220ca3e / #122811. The previous version
failed tests when run with address sanitizer. The issue was that the
synthesized coff_symbol_generic object actually will be used to access a
full coff_symbol16 or coff_symbol32 struct, see
DefinedCOFF::getCOFFSymbol. Therefore, we need to make a copy of the
full size of either of them.
Commit: cd5694ecea2da1990365f46f9737be1b29d94f0c
https://github.com/llvm/llvm-project/commit/cd5694ecea2da1990365f46f9737be1b29d94f0c
Author: Chandler Carruth <chandlerc at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M llvm/include/llvm/Option/OptTable.h
M llvm/lib/Option/OptTable.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/unittests/Option/OptionMarshallingTest.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
Log Message:
-----------
[StrTable] Switch the option parser to `llvm::StringTable` (#123308)
Now that we have a dedicated abstraction for string tables, switch the
option parser library's string table over to it rather than using a raw
`const char*`. Also try to use the `StringTable::Offset` type rather
than a raw `unsigned` where we can to avoid accidental increments or
other issues.
This is based on review feedback for the initial switch of options to a
string table. Happy to tweak or adjust if desired here.
Commit: 2b67eceeef6e04ae5a4093bec9a0f0b048c70958
https://github.com/llvm/llvm-project/commit/2b67eceeef6e04ae5a4093bec9a0f0b048c70958
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Driver/arm-mfpu.c
M clang/test/Driver/linux-as.c
Log Message:
-----------
Android no longer supports arm < 7 (#123952)
Commit: 2a51a0d39a659feeeee57b6d1d768bf08d378c5e
https://github.com/llvm/llvm-project/commit/2a51a0d39a659feeeee57b6d1d768bf08d378c5e
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
Log Message:
-----------
Remove reference to android-mips (#124021)
Commit: 091741a880c2df9d3d161068a12655d289633eee
https://github.com/llvm/llvm-project/commit/091741a880c2df9d3d161068a12655d289633eee
Author: Paweł Bylica <pawel at ethereum.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerFlags.def
Log Message:
-----------
[libfuzzer] Clarify -max_len behavior on bigger files (#123095)
Commit: 70d7c847fd1b73c8bb453eac11a4a1ae03bb0d86
https://github.com/llvm/llvm-project/commit/70d7c847fd1b73c8bb453eac11a4a1ae03bb0d86
Author: Hongren Zheng <i at zenithal.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/docs/DefiningDialects/Assembly.md
Log Message:
-----------
[mlir][docs] Add usage/example of OpAsmOpInterface (#123610)
This is part of
https://discourse.llvm.org/t/rfc-introduce-opasm-type-attr-interface-for-pretty-print-in-asmprinter/83792.
OpAsmOpInterface controls the SSA Name/Block Name and Default Dialect
Prefix. This PR adds the usage of them by existing examples in MLIR.
Commit: 4b0df28a68a4ed4ec5829fb4d8722a0e701d1796
https://github.com/llvm/llvm-project/commit/4b0df28a68a4ed4ec5829fb4d8722a0e701d1796
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
Log Message:
-----------
[clang][Tooling] Prefer <atomic> for atomic_* family in C++
Commit: 778138114e9e42e28fcb51c0a38224e667a3790c
https://github.com/llvm/llvm-project/commit/778138114e9e42e28fcb51c0a38224e667a3790c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
Log Message:
-----------
[SDAG] Use BatchAAResults for querying alias analysis (AA) results (#123934)
Once we get to SelectionDAG the IR should not be changing anymore, so we
can use BatchAAResults rather than AAResults to cache AA queries.
This should be a NFC change for targets that enable AA during codegen
(such as AArch64), but also give a nice compile-time improvement in some
cases. See:
https://github.com/llvm/llvm-project/pull/123787#issuecomment-2606797041
Note: This follows Nikita's suggestion on #123787.
Commit: d7c14c8f976fd291984e0c7eed75dd3331b1ed6d
https://github.com/llvm/llvm-project/commit/d7c14c8f976fd291984e0c7eed75dd3331b1ed6d
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/examples/BrainF/BrainF.cpp
M llvm/include/llvm/FuzzMutate/OpDescriptor.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/InlineAsm.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/tools/bugpoint/Miscompilation.cpp
Log Message:
-----------
[IR] Replace of PointerType::getUnqual(Type) with opaque version (NFC) (#123909)
Follow up to https://github.com/llvm/llvm-project/issues/123569
Commit: 9fd92634749c75b39be829c22240567ccda3ffce
https://github.com/llvm/llvm-project/commit/9fd92634749c75b39be829c22240567ccda3ffce
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxxabi/src/abort_message.cpp
Log Message:
-----------
[libc++abi] Remove support for Android 4 and older (#124054)
Commit: 6bc68d0fe94e7fbdec40e1306bf8db1b0db3110c
https://github.com/llvm/llvm-project/commit/6bc68d0fe94e7fbdec40e1306bf8db1b0db3110c
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/__cxx03/__locale_dir/locale_base_api/android.h
M libcxx/include/__locale_dir/locale_base_api/android.h
M libcxx/src/verbose_abort.cpp
Log Message:
-----------
[libc++] Remove support for Android 4 and older (#124062)
Commit: 0429bfea49615882e89ee2350ffde777ce77fb95
https://github.com/llvm/llvm-project/commit/0429bfea49615882e89ee2350ffde777ce77fb95
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/common_reference.h
M libcxx/include/__type_traits/datasizeof.h
M libcxx/include/__type_traits/is_always_bitcastable.h
M libcxx/include/__type_traits/make_signed.h
M libcxx/include/__type_traits/make_unsigned.h
M libcxx/include/__type_traits/remove_cvref.h
M libcxx/include/__type_traits/type_list.h
Log Message:
-----------
[libc++] Remove a few unused includes (#124025)
Commit: ee99c4d4845db66c4daa2373352133f4b237c942
https://github.com/llvm/llvm-project/commit/ee99c4d4845db66c4daa2373352133f4b237c942
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/MC/MCELFStreamer.h
A llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/lib/MC/MCELFStreamer.cpp
A llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[LLVM][Clang][AArch64] Implement AArch64 build attributes (#123990)
- Added support for AArch64-specific build attributes.
- Print AArch64 build attributes to assembly.
- Emit AArch64 build attributes to ELF.
Specification: https://github.com/ARM-software/abi-aa/pull/230
Commit: 7fb97bee9269f0d4239908ac8def70be696991c6
https://github.com/llvm/llvm-project/commit/7fb97bee9269f0d4239908ac8def70be696991c6
Author: Stephen Senran Zhang <zsrkmyn at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/eq.ll
M llvm/test/Transforms/ConstraintElimination/ne.ll
M llvm/test/Transforms/ConstraintElimination/pr105785.ll
Log Message:
-----------
[ConstraintElimination] Add eq/ne facts to signed constraint system (#121423)
Facts of eq/ne were added to unsigned system only, causing some missing
optimizations. This patch adds eq/ne facts to both signed & unsigned
constraint system.
Fixes #117961.
Commit: 08195f31ab1c484ad59dea125bfd61316a07eee8
https://github.com/llvm/llvm-project/commit/08195f31ab1c484ad59dea125bfd61316a07eee8
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/streambuf
Log Message:
-----------
[libc++] Inline basic_streambuf functions (#123379)
Most of the `basic_streambuf` functions are really simple, which makes
most of the implementation when they are out of line boilerplate.
Commit: 8388040fc9e75d49cd000b3371e2610c6c3548ba
https://github.com/llvm/llvm-project/commit/8388040fc9e75d49cd000b3371e2610c6c3548ba
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/ops.mlir
Log Message:
-----------
[mlir][tosa] Add NaN Propagation Mode Support (#121951)
The TOSA-V1.0 specification adds "nan propagation" modes as attributes
for several operators. Adjust the ODS definitions of the relevant
operations to include this attribute.
The defined modes are "PROPAGATE" and "IGNORE" and the PROPAGATE mode is
set by default.
MAXIMUM, MINIMUM, REDUCE_MAX, REDUCE_MIN, MAX_POOL, CLAMP, and ARGMAX
support this attribute.
Signed-off-by: Jack Frankland <jack.frankland at arm.com>
Co-authored-by: TatWai Chong <tatwai.chong at arm.com>
Commit: 19306351a2c45e266fa11b41eb1362b20b6ca56d
https://github.com/llvm/llvm-project/commit/19306351a2c45e266fa11b41eb1362b20b6ca56d
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/test/Modules/empty.modulemap
Log Message:
-----------
[clang][Modules] Raise empty.modulemap expected size to <70KB to fix RISC-V failure (#123959)
I'm not sure why the test is larger for RISC-V than other targets, but
we saw this before with #111360.
The file is just over the current 60KB limit:
```
62772 /home/asb/llvm-project/build/stage2/tools/clang/test/Modules/Output/empty.modulemap.tmp/base.pcm
```
Commit: cad6bbade0d7dc57b9c43d9ed8c38260345d50bf
https://github.com/llvm/llvm-project/commit/cad6bbade0d7dc57b9c43d9ed8c38260345d50bf
Author: Dmitry Polukhin <34227995+dmpolukhin at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/Headers/crash-instantiated-in-scope-cxx-modules5.cpp
Log Message:
-----------
[C++20][Modules] Fix crash/compiler error due broken AST links (#123648)
Summary:
This PR fixes bugreport
https://github.com/llvm/llvm-project/issues/122493 The root problem is
the same as before lambda function and DeclRefExpr references a variable
that does not belong to the same module as the enclosing function body.
Therefore iteration over the function body doesn’t visit the VarDecl.
Before this change RelatedDeclsMap was created only for canonical decl
but in reality it has to be done for the definition of the function that
does not always match the canonical decl.
Test Plan: check-clang
Commit: 2e6cc79f816d942ab09d6a310cd925c1da148aa9
https://github.com/llvm/llvm-project/commit/2e6cc79f816d942ab09d6a310cd925c1da148aa9
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Migrate CpAsyncOp to intrinsics (#123789)
Intrinsics are available for the 'cpSize'
variants also. So, this patch migrates the Op
to lower to the intrinsics for all cases.
* Update the existing tests to check the lowering to intrinsics.
* Add newer cp_async_zfill tests to verify the lowering for the 'cpSize'
variants.
* Tidy-up CHECK lines in cp_async() function in nvvmir.mlir (NFC)
PTX spec link:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-async
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: cb714e74cc0efd5bfdb3e5e80978239425bd83d4
https://github.com/llvm/llvm-project/commit/cb714e74cc0efd5bfdb3e5e80978239425bd83d4
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
A llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size-too-big.mir
Log Message:
-----------
[DebugInfo][InstrRef] Avoid producing broken DW_OP_deref_sizes (#123967)
We use variable locations such as DBG_VALUE $xmm0 as shorthand to refer
to "the low lane of $xmm0", and this is reflected in how DWARF is
interpreted too. However InstrRefBasedLDV tries to be smart and
interprets such a DBG_VALUE as a 128-bit reference. We then issue a
DW_OP_deref_size of 128 bits to the stack, which isn't permitted by
DWARF (it's larger than a pointer).
Solve this for now by not using DW_OP_deref_size if it would be illegal.
Instead we'll use DW_OP_deref, and the consumer will load the variable
type from the stack, which should be correct.
There's still a risk of imprecision when LLVM decides to use smaller or
larger value types than the source-variable type, which manifests as
too-little or too-much memory being read from the stack. However we
can't solve that without putting more type information in debug-info.
fixes #64093
Commit: ad6d808906075c3386bbeada3c37d8d3e6afe248
https://github.com/llvm/llvm-project/commit/ad6d808906075c3386bbeada3c37d8d3e6afe248
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
Log Message:
-----------
[lldb][DWARFASTParserClang] Make C++ method parsing aware of explicit object parameters (#124096)
LLDB deduces the CV-qualifiers and storage class of a C++ method from
the object parameter. Currently it assumes that parameter is implicit
(and is a pointer type with the name "this"). This isn't true anymore in
C++23 with explicit object parameters. To support those we can simply
check the `DW_AT_object_pointer` of the subprogram DIE (works for both
declarations and definitions) when searching for the object parameter.
We can also remove the check for `eEncodingIsPointerUID`, because in C++
an artificial parameter called `this` is only ever the implicit object
parameter (at least for all the major compilers).
Commit: fa7f0e582bc25a91d89dab7c488a1619060f9bef
https://github.com/llvm/llvm-project/commit/fa7f0e582bc25a91d89dab7c488a1619060f9bef
Author: Abhilash Majumder <30946547+abhilash1910 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
Log Message:
-----------
[NVPTX] Add Bulk Copy Prefetch Intrinsics (#123226)
This patch adds NVVM intrinsics and NVPTX codegen for:
- cp.async.bulk.prefetch.L2.* variants
- These intrinsics optionally support cache_hints as indicated by the
boolean flag argument.
- Lit tests are added for all combinations of these intrinsics in
cp-async-bulk.ll.
- The generated PTX is verified with a 12.3 ptxas executable.
- Added docs for these intrinsics in NVPTXUsage.rst file.
PTX Spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-async-bulk-prefetch
Co-authored-by: abmajumder <abmajumder at nvidia.com>
Commit: 17756aa9c9d2f54a29dba3a2805f217cc1723ff0
https://github.com/llvm/llvm-project/commit/17756aa9c9d2f54a29dba3a2805f217cc1723ff0
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang] [Release Notes] Implicit lifetimes are a C++23 feature
Commit: a8020930a8174d84da04fa91b6fef244207f42f5
https://github.com/llvm/llvm-project/commit/a8020930a8174d84da04fa91b6fef244207f42f5
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
Log Message:
-----------
Revert "[lldb][DWARFASTParserClang] Make C++ method parsing aware of explicit object parameters" (#124100)
Reverts llvm/llvm-project#124096
Broke linux CI:
```
Note: This is test shard 7 of 42.
[==========] Running 1 test from 1 test suite.
[----------] Global test environment set-up.
[----------] 1 test from DWARFASTParserClangTests
[ RUN ] DWARFASTParserClangTests.TestParseSubroutine_ExplicitObjectParameter
Expected<T> must be checked before access or destruction.
Expected<T> value was in success state. (Note: Expected<T> values in success mode must still be checked prior to being destroyed).
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0 SymbolFileDWARFTests 0x0000560271ee5ba7
1 SymbolFileDWARFTests 0x0000560271ee3a2c
2 SymbolFileDWARFTests 0x0000560271ee63ea
3 libc.so.6 0x00007f3e54e5b050
4 libc.so.6 0x00007f3e54ea9e2c
5 libc.so.6 0x00007f3e54e5afb2 gsignal + 18
6 libc.so.6 0x00007f3e54e45472 abort + 211
7 SymbolFileDWARFTests 0x0000560271e79d51
8 SymbolFileDWARFTests 0x0000560271e724f7
9 SymbolFileDWARFTests 0x0000560271f39e2c
10 SymbolFileDWARFTests 0x0000560271f3b368
11 SymbolFileDWARFTests 0x0000560271f3c053
12 SymbolFileDWARFTests 0x0000560271f4cf67
13 SymbolFileDWARFTests 0x0000560271f4c18a
14 SymbolFileDWARFTests 0x0000560271f2561c
15 libc.so.6 0x00007f3e54e4624a
16 libc.so.6 0x00007f3e54e46305 __libc_start_main + 133
17 SymbolFileDWARFTests 0x0000560271e65161
```
Commit: 05fbc3830d05878a0521a3e07aa1e469905ce732
https://github.com/llvm/llvm-project/commit/05fbc3830d05878a0521a3e07aa1e469905ce732
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Move VPBlockUtils to VPlanUtils.h (NFC)
Nothing in VPlan.h directly uses VPBlockUtils.h. Move it out to the more
appropriate VPlanUtils.h to reduce the size of the widely included VPlan.h.
Commit: 4bcdb26dac4cdadd7f8850a5f9b2e775b73aaf7f
https://github.com/llvm/llvm-project/commit/4bcdb26dac4cdadd7f8850a5f9b2e775b73aaf7f
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
Log Message:
-----------
Revert "[lldb][test] Remove compiler version check and use regex" (#124101)
Reverts llvm/llvm-project#123393
This is causing `TestVectorOfVectorsFromStdModule.py` to fail on the the
macOS clang-15 matrix bot.
Commit: 4f26edd5e9eb3b6cea19e15ca8fb2c8416b82fa8
https://github.com/llvm/llvm-project/commit/4f26edd5e9eb3b6cea19e15ca8fb2c8416b82fa8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/lib/Support/YAMLTraits.cpp
Log Message:
-----------
[NFC][YAML] Add `IO::error()` (#123475)
For #123280
Commit: 1311b36acea0ac0d94c23452fcb0109bb18373cb
https://github.com/llvm/llvm-project/commit/1311b36acea0ac0d94c23452fcb0109bb18373cb
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[llvm][Support] Put back filename into FileToRemoveList (#124065)
Prevents avoidable memory leaks.
Looks like exchange added in aa1333a91f8d8a060bcf5b14aa32a6e8bab74e8c
didn't take "continue" into account.
```
==llc==2150782==ERROR: LeakSanitizer: detected memory leaks
Direct leak of 10 byte(s) in 1 object(s) allocated from:
#0 0x5f1b0f9ac14a in strdup llvm-project/compiler-rt/lib/asan/asan_interceptors.cpp:593:3
#1 0x5f1b1768428d in FileToRemoveList llvm-project/llvm/lib/Support/Unix/Signals.inc:105:55
```
Commit: 636bc72f672712cb848729c0f130d8b42c86f1cb
https://github.com/llvm/llvm-project/commit/636bc72f672712cb848729c0f130d8b42c86f1cb
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
Log Message:
-----------
Reland "[lldb][DWARFASTParserClang] Make C++ method parsing aware of explicit object parameters" (#124100)"
This reverts commit a8020930a8174d84da04fa91b6fef244207f42f5.
Relands original commit but fixing the unit-test to consume the
`llvm::Expected` error object.
Commit: 3ea2b546a8d17014d3ecf05356ecfaadf26ed846
https://github.com/llvm/llvm-project/commit/3ea2b546a8d17014d3ecf05356ecfaadf26ed846
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Host/windows/PipeWindows.cpp
Log Message:
-----------
[lldb/windows] Make "anonymous" pipe names more unique (#123905)
Using a "random" name for an "anonymous" pipe seems to be the state of
the art on windows (according to stack overflow, new windows versions
may have something better, but it involves calling kernel APIs directly
and generally a lot of dark magic).
The problem with the current method was that is does not produce unique
names if one has two copies of the pipe code in the same process, which
is what happened with #120457 (because liblldb only exposes the public
api, and we've started using the pipe code in lldb-dap as well).
This patch works around the problem by adding the address of the counter
variable to the pipe name.
Replicating the multiple-copies setup in a test would be very difficult,
which is why I'm not adding a test for this scenario.
Commit: 0236cb689550ed2dac406443c652efb723cb2602
https://github.com/llvm/llvm-project/commit/0236cb689550ed2dac406443c652efb723cb2602
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Target/UnixSignals.cpp
M lldb/test/API/commands/frame/diagnose/array/TestArray.py
M lldb/test/API/commands/frame/diagnose/bad-reference/TestBadReference.py
M lldb/test/API/commands/frame/diagnose/complicated-expression/TestComplicatedExpression.py
M lldb/test/API/commands/frame/diagnose/dereference-argument/TestDiagnoseDereferenceArgument.py
M lldb/test/API/commands/frame/diagnose/dereference-function-return/TestDiagnoseDereferenceFunctionReturn.py
M lldb/test/API/commands/frame/diagnose/dereference-this/TestDiagnoseDereferenceThis.py
M lldb/test/API/commands/frame/diagnose/inheritance/TestDiagnoseInheritance.py
M lldb/test/API/commands/frame/diagnose/local-variable/TestLocalVariable.py
M lldb/test/API/commands/frame/diagnose/virtual-method-call/TestDiagnoseDereferenceVirtualMethodCall.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
M lldb/unittests/Signals/UnixSignalsTest.cpp
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb] Enable "frame diagnose" on linux (#123217)
.. by changing the signal stop reason format :facepalm:
The reason this did not work is because the code in
`StopInfo::GetCrashingDereference` was looking for the string "address="
to extract the address of the crash. Macos stop reason strings have the
form
```
EXC_BAD_ACCESS (code=1, address=0xdead)
```
while on linux they look like:
```
signal SIGSEGV: address not mapped to object (fault address: 0xdead)
```
Extracting the address from a string sounds like a bad idea, but I
suppose there's some value in using a consistent format across
platforms, so this patch changes the signal format to use the equals
sign as well. All of the diagnose tests pass except one, which appears
to fail due to something similar #115453 (disassembler reports
unrelocated call targets).
I've left the tests disabled on windows, as the stop reason reporting
code works very differently there, and I suspect it won't work out of
the box. If I'm wrong -- the XFAIL will let us know.
Commit: 6f684816e25d8b4e5fb2cbc7d0560d608a8bd938
https://github.com/llvm/llvm-project/commit/6f684816e25d8b4e5fb2cbc7d0560d608a8bd938
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/__compare/compare_three_way_result.h
M libcxx/include/__config
M libcxx/include/__format/format_arg.h
M libcxx/include/__ranges/range_adaptor.h
M libcxx/include/__type_traits/add_cv_quals.h
M libcxx/include/__type_traits/add_lvalue_reference.h
M libcxx/include/__type_traits/add_pointer.h
M libcxx/include/__type_traits/add_rvalue_reference.h
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/alignment_of.h
M libcxx/include/__type_traits/conditional.h
M libcxx/include/__type_traits/conjunction.h
M libcxx/include/__type_traits/decay.h
M libcxx/include/__type_traits/disjunction.h
M libcxx/include/__type_traits/enable_if.h
M libcxx/include/__type_traits/extent.h
M libcxx/include/__type_traits/has_unique_object_representation.h
M libcxx/include/__type_traits/has_virtual_destructor.h
M libcxx/include/__type_traits/integral_constant.h
M libcxx/include/__type_traits/invoke.h
M libcxx/include/__type_traits/is_abstract.h
M libcxx/include/__type_traits/is_aggregate.h
M libcxx/include/__type_traits/is_arithmetic.h
M libcxx/include/__type_traits/is_array.h
M libcxx/include/__type_traits/is_assignable.h
M libcxx/include/__type_traits/is_base_of.h
M libcxx/include/__type_traits/is_bounded_array.h
M libcxx/include/__type_traits/is_class.h
M libcxx/include/__type_traits/is_compound.h
M libcxx/include/__type_traits/is_const.h
M libcxx/include/__type_traits/is_constructible.h
M libcxx/include/__type_traits/is_convertible.h
M libcxx/include/__type_traits/is_destructible.h
M libcxx/include/__type_traits/is_empty.h
M libcxx/include/__type_traits/is_enum.h
M libcxx/include/__type_traits/is_execution_policy.h
M libcxx/include/__type_traits/is_final.h
M libcxx/include/__type_traits/is_floating_point.h
M libcxx/include/__type_traits/is_function.h
M libcxx/include/__type_traits/is_fundamental.h
M libcxx/include/__type_traits/is_implicit_lifetime.h
M libcxx/include/__type_traits/is_integral.h
M libcxx/include/__type_traits/is_literal_type.h
M libcxx/include/__type_traits/is_member_pointer.h
M libcxx/include/__type_traits/is_nothrow_assignable.h
M libcxx/include/__type_traits/is_nothrow_constructible.h
M libcxx/include/__type_traits/is_nothrow_convertible.h
M libcxx/include/__type_traits/is_nothrow_destructible.h
M libcxx/include/__type_traits/is_null_pointer.h
M libcxx/include/__type_traits/is_object.h
M libcxx/include/__type_traits/is_pod.h
M libcxx/include/__type_traits/is_pointer.h
M libcxx/include/__type_traits/is_polymorphic.h
M libcxx/include/__type_traits/is_reference.h
M libcxx/include/__type_traits/is_same.h
M libcxx/include/__type_traits/is_scalar.h
M libcxx/include/__type_traits/is_signed.h
M libcxx/include/__type_traits/is_standard_layout.h
M libcxx/include/__type_traits/is_swappable.h
M libcxx/include/__type_traits/is_trivial.h
M libcxx/include/__type_traits/is_trivially_assignable.h
M libcxx/include/__type_traits/is_trivially_constructible.h
M libcxx/include/__type_traits/is_trivially_copyable.h
M libcxx/include/__type_traits/is_trivially_destructible.h
M libcxx/include/__type_traits/is_unbounded_array.h
M libcxx/include/__type_traits/is_union.h
M libcxx/include/__type_traits/is_unsigned.h
M libcxx/include/__type_traits/is_void.h
M libcxx/include/__type_traits/is_volatile.h
M libcxx/include/__type_traits/make_signed.h
M libcxx/include/__type_traits/make_unsigned.h
M libcxx/include/__type_traits/negation.h
M libcxx/include/__type_traits/rank.h
M libcxx/include/__type_traits/remove_all_extents.h
M libcxx/include/__type_traits/remove_const.h
M libcxx/include/__type_traits/remove_cv.h
M libcxx/include/__type_traits/remove_cvref.h
M libcxx/include/__type_traits/remove_extent.h
M libcxx/include/__type_traits/remove_pointer.h
M libcxx/include/__type_traits/remove_reference.h
M libcxx/include/__type_traits/remove_volatile.h
M libcxx/include/__type_traits/type_identity.h
M libcxx/include/__type_traits/underlying_type.h
M libcxx/include/__type_traits/unwrap_ref.h
M libcxx/include/execution
M libcxx/include/variant
A libcxx/test/libcxx/algorithms/no_specializations.verify.cpp
A libcxx/test/libcxx/language.support/no_specializations.verify.cpp
A libcxx/test/libcxx/ranges/no_specializations.verify.cpp
A libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/format/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/no_specializations.verify.cpp
Log Message:
-----------
[libc++] Use [[clang::no_specializations]] to diagnose invalid user specializations (#118167)
Some templates in the standard library are illegal to specialize for users
(even if the specialization contains user-defined types). The [[clang::no_specializations]]
attribute allows marking such base templates so that the compiler will
diagnose if users try adding a specialization.
Commit: 9705500582b9c2b2e1dd6de14f03a94d270a9250
https://github.com/llvm/llvm-project/commit/9705500582b9c2b2e1dd6de14f03a94d270a9250
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libclc/amdgpu/lib/SOURCES
R libclc/amdgpu/lib/math/nextafter.cl
M libclc/clc/include/clc/clcmacro.h
A libclc/clc/include/clc/math/binary_decl_with_scalar_second_arg.inc
A libclc/clc/include/clc/math/clc_nextafter.h
M libclc/clc/include/clc/relational/clc_isnan.h
A libclc/clc/include/clc/shared/binary_decl.inc
M libclc/clc/lib/clspv/SOURCES
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_nextafter.cl
M libclc/clc/lib/spirv/SOURCES
M libclc/clc/lib/spirv64/SOURCES
M libclc/clspv/lib/SOURCES
R libclc/clspv/lib/math/nextafter.cl
R libclc/clspv/lib/math/nextafter.inc
R libclc/generic/include/clc/math/binary_decl.inc
M libclc/generic/include/clc/math/fmax.h
M libclc/generic/include/clc/math/fmin.h
R libclc/generic/include/math/clc_nextafter.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/nextafter.cl
R libclc/ptx/lib/SOURCES
R libclc/ptx/lib/math/nextafter.cl
Log Message:
-----------
[libclc] Move nextafter to the CLC library (#124097)
There were two implementations of this - one that implemented nextafter
in software, and another that called a clang builtin. No in-tree targets
called the builtin, so all targets build the software version. The
builtin version has been removed, and the software version has been
renamed to be the "default".
This commit also optimizes nextafter, to avoid scalarization as much as
possible. Note however that the (CLC) relational builtins still
scalarize; those will be optimized in a separate commit.
Since nextafter is used by some convert_type builtins, the diff to IR
codegen is not limited to the builtin itself.
Commit: e069518f82bc3699dc4fc81bbc99ae4a6d44449e
https://github.com/llvm/llvm-project/commit/e069518f82bc3699dc4fc81bbc99ae4a6d44449e
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/implied-via-division.ll
Log Message:
-----------
SCEV: cover a codepath in isImpliedCondBalancedTypes (#123070)
The code that checks a predicate against a swapped predicate in
isImpliedCondBalancedTypes is not covered by any existing test, within
any Analysis or Transform. Fix this by adding a test to SCEV.
Commit: 0e944a30954e666cba2bf17497fafe835e4b3519
https://github.com/llvm/llvm-project/commit/0e944a30954e666cba2bf17497fafe835e4b3519
Author: Tuomas Kärnä <tuomas.karna at intel.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
Log Message:
-----------
[SCFToGPU] Convert scf.parallel+scf.reduce to gpu.all_reduce (#122782)
Support reductions in SCFToGPU: `scf.parallel` and `scf.reduce` op
combination is now converted to a `gpu.all_reduce` op.
Commit: 90e9895a9373b3d83eefe15b34d2dc83c7bcc88f
https://github.com/llvm/llvm-project/commit/90e9895a9373b3d83eefe15b34d2dc83c7bcc88f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/test/CodeGen/X86/bit_ceil.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/pr89877.ll
M llvm/test/CodeGen/X86/pr90847.ll
M llvm/test/CodeGen/X86/pr92569.ll
M llvm/test/CodeGen/X86/scheduler-backtracking.ll
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/tools/llvm-mca/X86/BtVer2/clear-super-register-1.s
Log Message:
-----------
[X86] Handle BSF/BSR "zero-input pass through" behaviour (#123623)
Intel docs have been updated to be similar to AMD and now describe
BSF/BSR as not changing the destination register if the input value was
zero, which allows us to support CTTZ/CTLZ zero-input cases by setting
the destination to support a NumBits result (BSR is a bit messy as it
has to be XOR'd to create a CTLZ result). VIA/Zhaoxin x86_64 CPUs have also
been confirmed to match this behaviour.
This patch adjusts the X86ISD::BSF/BSR nodes to take a "pass through"
argument for zero-input cases, by default this is set to UNDEF to match
existing behaviour, but it can be set to a suitable value if supported.
There are still some limits to this - its only supported for x86_64
capable processors (and I've only enabled it for x86_64 codegen), and
Intel CPUs sometimes zero the upper 32-bits of a pass through register
when used for BSR32/BSF32 with a zero source value (i.e. the whole
64bits may not get passed through).
Fixes #122004
Commit: 0c66644270abc1455e92301a44232b9af75fafc6
https://github.com/llvm/llvm-project/commit/0c66644270abc1455e92301a44232b9af75fafc6
Author: Danial Klimkin <dklimkin at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel]Fix bazel build past 2e6cc79f816d942ab09d6a310cd925c1da148aa9 (#124112)
Split target under LLVMIR/Transforms to avoid deps loop.
Commit: 590e5e20b12f9fd956d0ba7de83aa2ab44c9faeb
https://github.com/llvm/llvm-project/commit/590e5e20b12f9fd956d0ba7de83aa2ab44c9faeb
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/M68k/pipeline.ll
Log Message:
-----------
[M68k] Fix llc pass test after 3630d9ef65b30af7e4ca78e668649bbc48b5be66
Commit: d3d605b7cdee132929d32f8b71b01641eb1d6d37
https://github.com/llvm/llvm-project/commit/d3d605b7cdee132929d32f8b71b01641eb1d6d37
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/FileCheck/FileCheckImpl.h
Log Message:
-----------
[FileCheck] Use move semantics instead of std::swap. NFC. (#123304)
This code was using a pre-move-semantics trick of using std::swap to
avoid expensive vector copies.
Commit: fb3fa41aee4733e549620a4aa444525aacb075f7
https://github.com/llvm/llvm-project/commit/fb3fa41aee4733e549620a4aa444525aacb075f7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
Log Message:
-----------
MachineRegisterInfo: Use variable for TRI
Commit: 6fdaaafd89d7cbc15dafe3ebf1aa3235d148aaab
https://github.com/llvm/llvm-project/commit/6fdaaafd89d7cbc15dafe3ebf1aa3235d148aaab
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
Log Message:
-----------
[AMDGPU] SIPeepholeSDWA: Disable on existing SDWA instructions (#123942)
This is meant as a short-term workaround for an invalid conversion in
this pass that occurs because existing SDWA selections are not correctly
taken into account during the conversion.
See the draft PR #123221 for an attempt to fix the actual issue.
---------
Co-authored-by: Frederik Harwath <fharwath at amd.com>
Commit: d8eb4ac41d881a19bea7673d753ba92e6a11f5d6
https://github.com/llvm/llvm-project/commit/d8eb4ac41d881a19bea7673d753ba92e6a11f5d6
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Support/Threading.h
Log Message:
-----------
[Support] Remove ciso646 include (#123578)
This header has been removed in C++20 and causes a large amount of
deprecation spam when building against libstdc++ 15 in C++17 mode.
As far as I understand, we just need to include *some* STL header to get
access to the version macros, and as this header also includes
<optional> nowadays we can just drop the <cstd646> include entirely.
Commit: ff55c9bc63ddd1bbe13376c25ae1fc327e3d5da2
https://github.com/llvm/llvm-project/commit/ff55c9bc63ddd1bbe13376c25ae1fc327e3d5da2
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
A llvm/test/CodeGen/AMDGPU/lower-indirect-lds-references.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
Log Message:
-----------
[llvm][amdgpu] Handle indirect refs to LDS GVs during LDS lowering (#124089)
Fixes #123800
Extends LDS lowering by allowing it to discover transitive
indirect/escpaing references to LDS GVs.
For example, given the following input:
```llvm
@lds_item_to_indirectly_load = internal addrspace(3) global ptr undef, align 8
%store_type = type { i32, ptr }
@place_to_store_indirect_caller = internal addrspace(3) global %store_type undef, align 8
define amdgpu_kernel void @offloading_kernel() {
store ptr @indirectly_load_lds, ptr addrspace(3) getelementptr inbounds nuw (i8, ptr addrspace(3) @place_to_store_indirect_caller, i32 0), align 8
call void @call_unknown()
ret void
}
define void @call_unknown() {
%1 = alloca ptr, align 8
%2 = call i32 %1()
ret void
}
define void @indirectly_load_lds() {
call void @directly_load_lds()
ret void
}
define void @directly_load_lds() {
%2 = load ptr, ptr addrspace(3) @lds_item_to_indirectly_load, align 8
ret void
}
```
With the above input, prior to this patch, LDS lowering failed to lower
the reference to `@lds_item_to_indirectly_load` because:
1. it is indirectly called by a function whose address is taken in the
kernel.
2. we did not check if the kernel indirectly makes any calls to unknown
functions (we only checked the direct calls).
Co-authored-by: Jon Chesterfield <jonathan.chesterfield at amd.com>
Commit: 92b839e9c82450a3c465d349de73818e6aad59f3
https://github.com/llvm/llvm-project/commit/92b839e9c82450a3c465d349de73818e6aad59f3
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[gn] fix mistake in ee99c4d4845db
Commit: e28e93550a74752714db6fffe50233aa96e536a5
https://github.com/llvm/llvm-project/commit/e28e93550a74752714db6fffe50233aa96e536a5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
Log Message:
-----------
AMDGPU: Make vector_shuffle legal for v2i32 with v_pk_mov_b32 (#123684)
For VALU shuffles, this saves an instruction in some case.
Commit: 0c71fdd1575b826cbb3c252ee0b15fc84559abec
https://github.com/llvm/llvm-project/commit/0c71fdd1575b826cbb3c252ee0b15fc84559abec
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Driver/cuda-cross-compiling.c
Log Message:
-----------
[NVPTX] Fix ctor / dtor lowering when NVPTX target is not enabled (#124116)
Summary:
We pass the `-nvptx-lower-global-ctor-dtor` option to support the `libc`
like use-case which needs global constructors sometimes. This only
affects the backend. If the NVPTX target is not enabled this option will
be unknown which prevents you from compiling generic IR for this.
Commit: 99d450e9f51683bad608bf801e1b29e5c54b8917
https://github.com/llvm/llvm-project/commit/99d450e9f51683bad608bf801e1b29e5c54b8917
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
R llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
R llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
Log Message:
-----------
Revert "[AMDGPU] SIPeepholeSDWA: Disable on existing SDWA instructions (#123942)"
This reverts commit 6fdaaafd89d7cbc15dafe3ebf1aa3235d148aaab.
Breaks check-llvm, see
https://github.com/llvm/llvm-project/pull/123942#issuecomment-2609861953
Commit: 4d3a5309248e167021913736dfd5276ee536f4ce
https://github.com/llvm/llvm-project/commit/4d3a5309248e167021913736dfd5276ee536f4ce
Author: Danial Klimkin <dklimkin at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel]Fix(2) bazel build past 2e6cc79f816d942ab09d6a310cd925c1da148aa9 (#124118)
Fix caused link errors downstream.
Commit: 25653e558c292e9582d8132134af47a1af55499b
https://github.com/llvm/llvm-project/commit/25653e558c292e9582d8132134af47a1af55499b
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/Headers/avx10_2_512convertintrin.h
M clang/lib/Headers/avx10_2convertintrin.h
M clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
M clang/test/CodeGen/X86/avx10_2convert-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt
M llvm/test/MC/X86/avx10.2convert-32-att.s
M llvm/test/MC/X86/avx10.2convert-32-intel.s
M llvm/test/MC/X86/avx10.2convert-64-att.s
M llvm/test/MC/X86/avx10.2convert-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[AVX10.2] Update convert chapter intrinsic and mnemonics names (#123656)
Intel spec for avx10.2
(https://cdrdv2.intel.com/v1/dl/getContent/828965) has been updated.
This PR changes relevant names from the "AVX10 CONVERT INSTRUCTIONS"
chapter .
Commit: 1f0964f81e5ae90e1c50fcdd103ec9c838b995e0
https://github.com/llvm/llvm-project/commit/1f0964f81e5ae90e1c50fcdd103ec9c838b995e0
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/Contributing.rst
Log Message:
-----------
[llvm][Docs] Clarify finding maintainers
By noting where the files are to be found, and adding some
whitespace to break up large blocks.
(the merge on behalf bit needs a refresh but this will go
into review later after this)
Commit: 26b61e143b7e6117b57df2b58bbcb146a6f0f4d4
https://github.com/llvm/llvm-project/commit/26b61e143b7e6117b57df2b58bbcb146a6f0f4d4
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
Log Message:
-----------
[LoopVectorizer] Propagate underlying instruction to the cloned instances of VPPartialReductionRecipes (#123638)
Commit: 6206f5444fc0732e6495703c75a67f1f90f5b418
https://github.com/llvm/llvm-project/commit/6206f5444fc0732e6495703c75a67f1f90f5b418
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/abs_i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.mir
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/pr51516.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
Log Message:
-----------
[AMDGPU] Occupancy w.r.t. workgroup size range is also a range (#123748)
Occupancy (i.e., the number of waves per EU) depends, in addition to
register usage, on per-workgroup LDS usage as well as on the range of
possible workgroup sizes. Mirroring the latter, occupancy should
therefore be expressed as a range since different group sizes generally
yield different achievable occupancies.
`getOccupancyWithLocalMemSize` currently returns a scalar occupancy
based on the maximum workgroup size and LDS usage. With respect to the
workgroup size range, this scalar can be the minimum, the maximum, or
neither of the two of the range of achievable occupancies. This commit
fixes the function by making it compute and return the range of
achievable occupancies w.r.t. workgroup size and LDS usage; it also
renames it to `getOccupancyWithWorkGroupSizes` since it is the range of
workgroup sizes that produces the range of achievable occupancies.
Computing the achievable occupancy range is surprisingly involved.
Minimum/maximum workgroup sizes do not necessarily yield maximum/minimum
occupancies i.e., sometimes workgroup sizes inside the range yield the
occupancy bounds. The implementation finds these sizes in constant time;
heavy documentation explains the rationale behind the sometimes
relatively obscure calculations.
As a justifying example, consider a target with 10 waves / EU, 4 EUs/CU,
64-wide waves. Also consider a function with no LDS usage and a flat
workgroup size range of [513,1024].
- A group of 513 items requires 9 waves per group. Only 4 groups made up
of 9 waves each can fit fully on a CU at any given time, for a total of
36 waves on the CU, or 9 per EU. However, filling as much as possible
the remaining 40-36=4 wave slots without decreasing the number of groups
reveals that a larger group of 640 items yields 40 waves on the CU, or
10 per EU.
- Similarly, a group of 1024 items requires 16 waves per group. Only 2
groups made up of 16 waves each can fit fully on a CU ay any given time,
for a total of 32 waves on the CU, or 8 per EU. However, removing as
many waves as possible from the groups without being able to fit another
equal-sized group on the CU reveals that a smaller group of 896 items
yields 28 waves on the CU, or 7 per EU.
Therefore the achievable occupancy range for this function is not [8,9]
as the group size bounds directly yield, but [7,10].
Naturally this change causes a lot of test churn as instruction
scheduling is driven by achievable occupancy estimates. In most unit
tests the flat workgroup size range is the default [1,1024] which,
ignoring potential LDS limitations, would previously produce a scalar
occupancy of 8 (derived from 1024) on a lot of targets, whereas we now
consider the maximum occupancy to be 10 in such cases. Most tests are
updated automatically and checked manually for sanity. I also manually
changed some non-automatically generated assertions when necessary.
Fixes #118220.
Commit: c3b40c7ea215487ffc3b9d146f3f8f9a7ac8d407
https://github.com/llvm/llvm-project/commit/c3b40c7ea215487ffc3b9d146f3f8f9a7ac8d407
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/uadd_sat_vec.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
Log Message:
-----------
[X86] Regenerate test checks (NFC)
Regenerate some tests for the new vpternlog printing.
Commit: f61d93ffc456d94df729529642ea180b40ef9d19
https://github.com/llvm/llvm-project/commit/f61d93ffc456d94df729529642ea180b40ef9d19
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/HLFIR/elemental-intrinsics.f90
M flang/test/Lower/Intrinsics/acos.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/trigonometric-intrinsics.f90
Log Message:
-----------
[Flang] Generate math.acos op for non-precise acos intrinsic calls (#123641)
This patch changes the codgegn for non-precise acos calls to generate
math.acos ops. This wasn't done before because the math dialect did not
have a acos operation at the time.
Commit: 6fe0fc60341b05bf30ccc16012dab9eeb55a338d
https://github.com/llvm/llvm-project/commit/6fe0fc60341b05bf30ccc16012dab9eeb55a338d
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/ARM/ARMCallingConv.cpp
Log Message:
-----------
[CallingConv] Return ArrayRef from AllocateRegBlock() (NFC) (#124120)
Instead of returning the first register, return the ArrayRef containing
the whole block.
Existing users rely on the fact that the register block only contains
adjacently-numbered registers and it's possible to get the remaining
registers in the block by just incrementing the register. Returning an
ArrayRef allows more generic usage with non-adjacent registers.
Commit: e1aa1e43decf9275175845bea970ef6d7c2b1af6
https://github.com/llvm/llvm-project/commit/e1aa1e43decf9275175845bea970ef6d7c2b1af6
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/test/ThinLTO/X86/devirt_check.ll
Log Message:
-----------
[WPD]Provide branch weight for checking mode. (#124084)
Checking mode aims to help diagnose and confirm undefined behavior. In
most cases, source code don't cast pointers between unrelated types for
virtual calls, so we expect direct calls in the frequent branch and
debug trap in the unlikely branch.
This way, the overhead of checking mode is not higher than an indirect
call promotion for a hot callsite as long as the callsite doesn't run the debug trap
branch.
Commit: 96410edd4748a78e6b736eef8a5ff1ca4bb29be5
https://github.com/llvm/llvm-project/commit/96410edd4748a78e6b736eef8a5ff1ca4bb29be5
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
mark test as unsupported as I investigate test failure on certain environments
Commit: cb426b18c2f683ed3b4be325f257d62976d22f00
https://github.com/llvm/llvm-project/commit/cb426b18c2f683ed3b4be325f257d62976d22f00
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXIL.td
Log Message:
-----------
[NFC][DirectX] Clean-up of `DXIL.td` (#124005)
- Runs clang-format on `DXIL.td`
Note: this does not include the suggested formatting changes to `defset
list<DXILOpClasses> OpClasses` as it does not enforce the formatting
that is primarily used elsewhere
- Reorders currently defined `DXIL` ops by opcode in ascending order to
be consistent with other definitions
This is a small cleanup moved to be separate from
[#115912](https://github.com/llvm/llvm-project/issues/115912) for
reviewability.
Commit: 4bd0440bd2a653644987dddf8ec8d9d1f258ce31
https://github.com/llvm/llvm-project/commit/4bd0440bd2a653644987dddf8ec8d9d1f258ce31
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
A llvm/test/MC/RISCV/rvv/xsfvfwmacc-invalid.s
A llvm/test/MC/RISCV/rvv/xsfvqmacc-invalid.s
Log Message:
-----------
[RISCV] Add RVVConstraint to SiFive custom matrix multiply instructions. (#124055)
The instructions don't allow the vs1 encoded register to overlap vd.
Confusingly these instructions order their operands vd, vs1, vs2 while
every other vector instruction is vd, vs2, vs1. So we need to use
VS2Constraint for this since it checks the first operand after vd.
2 of the 3 extensions have instruction that produce a result with
EMUL=2*LMUL. This makes them subject to the widening constraints for
vs2. So for these extensions we use WidenV which includes VS2Constraint.
Commit: 1937a36209bc5f3636e7c98a1638ee9f082b4d2b
https://github.com/llvm/llvm-project/commit/1937a36209bc5f3636e7c98a1638ee9f082b4d2b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Add @earlyclobber to SiFive custom matrix multiply instruction. (#124060)
All of these have a constraint that vd and vs1 cannot overlap. Some of
them have an additional widening constraint for vs2. We should use
earlyclobber to protect this.
This is unlikely to be an issue in practice due to the instrinsic being
ternary so vd is also a source. The intrinsic has a different type for
this source than the other sources. You would have to do something crazy
to get the register allocator to overlap the registers.
Commit: df299958e64c73d73b427afc70b960ec039586ac
https://github.com/llvm/llvm-project/commit/df299958e64c73d73b427afc70b960ec039586ac
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
Log Message:
-----------
[mlir] Fix warnings
This patch fixes:
mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp:403:5: error:
'ClampRange' may not intend to support class template argument
deduction [-Werror,-Wctad-maybe-unsupported]
mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp:404:5: error:
'ClampRange' may not intend to support class template argument
deduction [-Werror,-Wctad-maybe-unsupported]
Commit: bca6dbd3a241f4a2cb6cfa5ed4c2f94cf76d3f17
https://github.com/llvm/llvm-project/commit/bca6dbd3a241f4a2cb6cfa5ed4c2f94cf76d3f17
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/i128-abi.ll
Log Message:
-----------
[X86] Add additional i128 abi test (NFC)
Commit: 7db4ba3916d33e57fb5244214f4873bf74e273f0
https://github.com/llvm/llvm-project/commit/7db4ba3916d33e57fb5244214f4873bf74e273f0
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
Log Message:
-----------
[GlobalMerge][NFC] Fix inaccurate comments (#124136)
I was studying the code here and realized that the comments were talking
about grouping by basic blocks when the code was grouping by Function.
Fix the comments so they reflect what the code is actually doing.
Commit: fa299294c068b1857d8d7ee74a512080898f194d
https://github.com/llvm/llvm-project/commit/fa299294c068b1857d8d7ee74a512080898f194d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Modernize code base in several places
Commit: e622468f164f6ba223e6862d8235eea5f555f927
https://github.com/llvm/llvm-project/commit/e622468f164f6ba223e6862d8235eea5f555f927
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/AST/JSONNodeDumper.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124074)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect CO to be nonnull.
Commit: 113e1fdc8c7f9085d5a48ca16b270cf53e9f189d
https://github.com/llvm/llvm-project/commit/113e1fdc8c7f9085d5a48ca16b270cf53e9f189d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
[CodeGen] Migrate away from PointerUnion::dyn_cast (NFC) (#124076)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect Pos to be nonnull.
Commit: d05008363d4ed87b1350701831032ea5070d5b98
https://github.com/llvm/llvm-project/commit/d05008363d4ed87b1350701831032ea5070d5b98
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Target/DynamicRegisterInfo.cpp
Log Message:
-----------
[lldb] Avoid repeated map lookups (NFC) (#124077)
Commit: bb019dd165ceeb5b9c9e4a0bf3c9ee9bc886e7fc
https://github.com/llvm/llvm-project/commit/bb019dd165ceeb5b9c9e4a0bf3c9ee9bc886e7fc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineLoopUtils.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#124078)
Commit: bda39a6067833c9353adbc42bddb1b5808bcf44b
https://github.com/llvm/llvm-project/commit/bda39a6067833c9353adbc42bddb1b5808bcf44b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
Log Message:
-----------
[ExecutionEngine] Include <map> (#124083)
This patch reinstates an include of <map>, fixing a build failure
caused by:
commit 1f4d91ecb8529678a3d3919d7523743bd21942ca
Author: Kazu Hirata <kazu at google.com>
Date: Tue Nov 19 19:41:59 2024 -0800
[ExecutionEngine] Remove unused includes (NFC) (#116749)
---------
Co-authored-by: h-vetinari <h.vetinari at gmx.com>
Commit: 7ddeea359811ec49a07db948bbf3f6b6c915f675
https://github.com/llvm/llvm-project/commit/7ddeea359811ec49a07db948bbf3f6b6c915f675
Author: Acim Maravic <Acim.Maravic at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
Log Message:
-----------
[LLVM][AMDGPU] MC support for ds_bpermute_fi_b32 (#124108)
Added assembler/disassembler support for ds_bpermute_fi_b32 instruction,
as well as tests.
Commit: d8cd8d56ea980d9a9c1e70bcc2dd7207d1236f94
https://github.com/llvm/llvm-project/commit/d8cd8d56ea980d9a9c1e70bcc2dd7207d1236f94
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/min_max.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
Log Message:
-----------
[SLP] getSpillCost - fully populate IntrinsicCostAttributes to improve cost analysis. (#124129)
We were only constructing the IntrinsicCostAttributes with the arg type info, and not the args themselves, preventing more detailed cost analysis (constant / uniform args etc.)
Just pass the whole IntrinsicInst to the constructor and let it resolve everything it can.
Noticed while having yet another attempt at #63980
Commit: 2f76e2b27d9ddd4fa0a1098f77b96fa51905bdb1
https://github.com/llvm/llvm-project/commit/2f76e2b27d9ddd4fa0a1098f77b96fa51905bdb1
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/fno-plt.c
Log Message:
-----------
[Driver] -fno-plt: warn for unsupported targets
-fno-plt is an ELF specific option that is only implemented for x86 (for
a long time) and AArch64 (#78890). GCC doesn't bother to give a
diagnostic on Windows. -fno-plt is somewhat popular and we've been
ignoring it for unsupported targets for a while, so just report a
warning for unsupported targets.
Pull Request: https://github.com/llvm/llvm-project/pull/124081
Commit: 082b148041ec8bb5024246da3a33e8246dc5e01b
https://github.com/llvm/llvm-project/commit/082b148041ec8bb5024246da3a33e8246dc5e01b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
Log Message:
-----------
[TableGen] Pass CodeGenProcModel reference instead of index to addWriteRes/addReadAdvance. NFC
2 of the 3 callers of each of these already had a reference they
converted to index. Use that reference and make the one caller
that only has an index responsible for looking up the reference from it.
Commit: 1a8f49fdda5b14ccc894aacee653f19130df3a30
https://github.com/llvm/llvm-project/commit/1a8f49fdda5b14ccc894aacee653f19130df3a30
Author: Scott Todd <scott.todd0 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIRPython.cmake
Log Message:
-----------
[mlir][python][cmake] Allow skipping nanobind compile options changes. (#123997)
Context:
https://github.com/llvm/llvm-project/pull/107103#discussion_r1925834532
This code is brittle, especially when called from a superproject that
adds the `nanobind-*` target in a different source directory:
```cmake
get_property(all_targets DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} PROPERTY BUILDSYSTEM_TARGETS)
```
The changes here do help with my downstream build, but I'm not sure if
using the `MLIR_DISABLE_CONFIGURE_PYTHON_DEV_PACKAGES` option introduced
in https://github.com/llvm/llvm-project/pull/117934 is the right fix
given that the option is currently scoped directly to one location with
a matching name:
https://github.com/llvm/llvm-project/blob/7ad8a3da4771ce8abbd146611124104d42a4e63e/mlir/cmake/modules/MLIRDetectPythonEnv.cmake#L4-L5
Some other solutions to consider:
1. Search through an explicit list of target names using `if (TARGET)`
2. Iterate over _all_ targets in the project, not just the targets in
the current directory, using code like
https://stackoverflow.com/a/62311397
3. Iterate over targets in the directory known to MLIR
(`llvm-project/mlir/python`)
4. Move this `target_compile_options` setup into
`mlir_configure_python_dev_packages` (I started on this, but that runs
into similar issues where the target is defined in a different
directory)
Commit: 8c138bee6e5afc963e77644a1b92e4b228ca34ad
https://github.com/llvm/llvm-project/commit/8c138bee6e5afc963e77644a1b92e4b228ca34ad
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/pointer.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Handle pointer allocation with source (#124070)
Commit: caf0540b91b0fee31353dc7049ae836e0f814cff
https://github.com/llvm/llvm-project/commit/caf0540b91b0fee31353dc7049ae836e0f814cff
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
Log Message:
-----------
[LoopVectorizer] Add support for chaining partial reductions (#120272)
Chaining partial reductions, where multiple partial reductions share an
accumulator, allow for more values to be combined together as part of
the reduction without discarding the semantics of the partial reduction
itself.
Commit: a2453097e3b4010162efacb4e7edcb121da8607f
https://github.com/llvm/llvm-project/commit/a2453097e3b4010162efacb4e7edcb121da8607f
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/test/profile/Linux/Inputs/instrprof-value-merge.c
M compiler-rt/test/profile/Linux/binary-id.c
M compiler-rt/test/profile/Linux/profile-version.c
M llvm/lib/IR/ProfileSummary.cpp
M llvm/test/tools/llvm-profdata/cs-sample-nested-profile.test
M llvm/test/tools/llvm-profdata/general.proftext
M llvm/test/tools/llvm-profdata/sample-summary.test
M llvm/test/tools/llvm-profdata/suppl-instr-with-sample.test
M llvm/test/tools/llvm-profdata/vtable-value-prof.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Add block percent to detailed summary (#105915)
Commit: e00f1f843610416f18a2fe4779c19310e808a1a4
https://github.com/llvm/llvm-project/commit/e00f1f843610416f18a2fe4779c19310e808a1a4
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/test/ELF/gnustack.s
Log Message:
-----------
[ELF] Error for executable .note.GNU-stack unless -z execstack or -r
.note.GNU-stack with the SHF_EXECINSTR flag requires an executable
stack. This is exceedingly rare. We report an error to force
the user to explicitly request an executable stack.
Close #121234
Pull Request: https://github.com/llvm/llvm-project/pull/124068
Commit: 6d4e72abb85a4b302204dee881894271a84dd322
https://github.com/llvm/llvm-project/commit/6d4e72abb85a4b302204dee881894271a84dd322
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/Transforms/GVN/vscale.ll
A llvm/test/Transforms/NewGVN/vscale.ll
Log Message:
-----------
[GVN] Add extra vscale tests with different types. NFC
Commit: 3d72619d751994f3b2b13c1fbb38f5f2541ea0ae
https://github.com/llvm/llvm-project/commit/3d72619d751994f3b2b13c1fbb38f5f2541ea0ae
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/scalable-vector-struct.ll
Log Message:
-----------
[InstCombine] Add a test for splitting scalable structs. NFC
Commit: e0622245967514c27b538cc10e04184323c5f96e
https://github.com/llvm/llvm-project/commit/e0622245967514c27b538cc10e04184323c5f96e
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/test/Transforms/inlining-recursive-self.mlir
M mlir/test/Transforms/inlining-recursive.mlir
Log Message:
-----------
[test] Remove misleading ''
Commit: ed512710a5e855a029a05f399335e03db0e704bd
https://github.com/llvm/llvm-project/commit/ed512710a5e855a029a05f399335e03db0e704bd
Author: hidekisaito <hidekido at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M offload/plugins-nextgen/common/include/MemoryManager.h
Log Message:
-----------
[Offload] Make MemoryManager threshold ENV var size_t type. (#124063)
Commit: 6a97897d5c159a52975bac19ac22c7913672c549
https://github.com/llvm/llvm-project/commit/6a97897d5c159a52975bac19ac22c7913672c549
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang-tools-extra/modularize/CoverageChecker.cpp
Log Message:
-----------
[NFC][modules] Create objects on the stack (#124034)
`ClangTool` change to fix memory leak.
`FixedCompilationDatabase` changed just to makes it simpler.
Commit: c7e6ca76cb4be7b1707cb583cf4aa4d458b312aa
https://github.com/llvm/llvm-project/commit/c7e6ca76cb4be7b1707cb583cf4aa4d458b312aa
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Add dump() method for ScheduleData struct type for better debugging
Commit: 66e49e38aeed92c48ba175f31e12b07a8c526d11
https://github.com/llvm/llvm-project/commit/66e49e38aeed92c48ba175f31e12b07a8c526d11
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/test/ObjectYAML/MachO/section_data.yaml
M llvm/test/tools/yaml2obj/ELF/custom-fill.yaml
Log Message:
-----------
[YAML] Don't validate `Fill::Size` after error (#123280)
Size is required, so we don't know if it's in
uninitialized state after the previous error.
Triggers msan on llvm/test/tools/yaml2obj/ELF/custom-fill.yaml NOSIZE
test.
We have `Fill` Section with Pattern, but no size. Before the fix it
produced error:
```
YAML:169:5: error: missing required key 'Size'
- Type: Fill
^
YAML:169:5: error: "Size" can't be 0 when "Pattern" is not empty
- Type: Fill
```
The same applies to `MachOYAML::Section` fields `content` and `size`.
However `MachOYAML::Section` matches size first, so on error,
content is not set anyway. Added error checking just in case.
Commit: ff17a4136dedba004d901a571c4fae501affd051
https://github.com/llvm/llvm-project/commit/ff17a4136dedba004d901a571c4fae501affd051
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/include/lldb/Host/Time.h
M lldb/source/Host/CMakeLists.txt
R lldb/source/Host/android/LibcGlue.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/posix/HostInfoPosix.cpp
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
Log Message:
-----------
[lldb] Remove support and workarounds for Android 4 and older (#124047)
Commit: 5a7d92f7a09d5580a298c2982bd42918b7ec492c
https://github.com/llvm/llvm-project/commit/5a7d92f7a09d5580a298c2982bd42918b7ec492c
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/test/CodeGen/AArch64/cpu-supports-target.c
Log Message:
-----------
[NFC] Remove invalid features from test and autogenerate checks. (#124130)
Commit: e0cd57decb3aa9eb911b62306b8f8ac88fd97ffd
https://github.com/llvm/llvm-project/commit/e0cd57decb3aa9eb911b62306b8f8ac88fd97ffd
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/lib/asan/tests/asan_test.cpp
M compiler-rt/lib/lsan/lsan_common_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_getauxval.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
Log Message:
-----------
[compiler-rt] Remove support and workarounds for Android 4 and older (#124056)
Commit: 6045146014151a8f63a60612445de9ff6af47626
https://github.com/llvm/llvm-project/commit/6045146014151a8f63a60612445de9ff6af47626
Author: Alex Prabhat Bara <50404684+alexprabhat99 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/include/pthread.yaml
Log Message:
-----------
[libc] change return type of pthread_setspecific to int in generated header (#124072)
Fixes: #124032
Commit: 02906931654460ca04a4b74f6aef65b542c73d2d
https://github.com/llvm/llvm-project/commit/02906931654460ca04a4b74f6aef65b542c73d2d
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/tools/llvm-profdata/general.proftext
Log Message:
-----------
[llvm-profdata] XFAIL broken test on windows (#124165)
XFAIL `llvm/test/tools/llvm-profdata/general.proftext` after it was
accidentally broken by
https://github.com/llvm/llvm-project/pull/105915/. I will follow up to
get this fixed.
Commit: db6b7a84e6e4949569e756f46357d9f54ad16a03
https://github.com/llvm/llvm-project/commit/db6b7a84e6e4949569e756f46357d9f54ad16a03
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/benchmarks/distributions/README.md
M libc/benchmarks/gpu/CMakeLists.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/printf_behavior.rst
M libc/docs/dev/undefined_behavior.rst
M libc/docs/gpu/rpc.rst
M libc/docs/platform_support.rst
M libc/fuzzing/__support/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/stdfix.yaml
M libc/include/sys/uio.yaml
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/spin_lock.h
M libc/src/__support/time/windows/CMakeLists.txt
M libc/src/math/nvptx/CMakeLists.txt
M libc/src/stdlib/CMakeLists.txt
M libc/test/src/__support/File/CMakeLists.txt
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/stdfix/CMakeLists.txt
M libc/test/src/sys/resource/CMakeLists.txt
M libc/test/src/sys/select/CMakeLists.txt
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/wait/CMakeLists.txt
M libc/test/src/unistd/CMakeLists.txt
M libc/utils/docgen/aio.yaml
M libc/utils/docgen/net/if.yaml
M libc/utils/docgen/netinet/in.yaml
M libc/utils/docgen/sys/resource.yaml
M libc/utils/docgen/sys/stat.yaml
M libc/utils/docgen/sys/time.yaml
M libc/utils/docgen/sys/wait.yaml
M libc/utils/docgen/termios.yaml
M libc/utils/mathtools/worst_case.sollya
Log Message:
-----------
[libc][NFC] Strip all training whitespace and missing newlines (#124163)
Commit: 2f6b0b4a8522b540de07c9ebd3446433e7d99eb6
https://github.com/llvm/llvm-project/commit/2f6b0b4a8522b540de07c9ebd3446433e7d99eb6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
Log Message:
-----------
[RISCV] Add SiFive sf.vqmacc tests to vmv-copy.mir. NFC (#124075)
The vqmaccu.2x8x2 test is currently being miscompiled. We need to use a
whole register move instead of vmv.v.v. The input has VL elements with
EEW=8 EMUL=4. The output has VL/4 elements with EEW=32 EMUL=4. We can't
use the original VL or input SEW for a vmv.v.v.
Commit: bec4c7f5f7fb044dbc7b134a00f4cf29b5cb2b48
https://github.com/llvm/llvm-project/commit/bec4c7f5f7fb044dbc7b134a00f4cf29b5cb2b48
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/test/Transforms/InstCombine/scalable-vector-struct.ll
Log Message:
-----------
[InstCombine] Unpack scalable struct loads/stores. (#123986)
This teaches unpackLoadToAggregate and unpackStoreToAggregate to unpack
scalable structs to individual loads/stores with insertvalues /
extractvalues. The gep used for the offsets uses an i8 ptradd as opposed
to a struct gep, as the geps for scalable structs are not supported and
we canonicalize to i8.
Commit: 3dec24d2a284e98c8a12b8ec9d0a80a657b2d992
https://github.com/llvm/llvm-project/commit/3dec24d2a284e98c8a12b8ec9d0a80a657b2d992
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
Stats are sorted before they are printed. Try fixing test failure by checking stats in its print order.
Commit: 6d5697f7cb4e933d2f176c46b7ac05a9cbaeb8b6
https://github.com/llvm/llvm-project/commit/6d5697f7cb4e933d2f176c46b7ac05a9cbaeb8b6
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
A llvm/test/CodeGen/SystemZ/pr124001.ll
Log Message:
-----------
[SystemZ] Fix ICE with i128->i64 uaddo carry chain
We can only optimize a uaddo_carry via specialized instruction
if the carry was produced by another uaddo(_carry) instruction;
there is already a check for that.
However, i128 uaddo(_carry) use a completely different mechanism;
they indicate carry in a vector register instead of the CC flag.
Thus, we must also check that we don't mix those two - that check
has been missing.
Fixes: https://github.com/llvm/llvm-project/issues/124001
Commit: 0d0190815d8f273e9d87c29b4779b81412b31e91
https://github.com/llvm/llvm-project/commit/0d0190815d8f273e9d87c29b4779b81412b31e91
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/test/CodeGen/X86/tail-dup-pred-succ-size.mir
Log Message:
-----------
[TailDup] Allow large number of predecessors/successors without phis. (#116072)
This adjusts the threshold logic added in #78582 to only trigger for
cases where there are actually phis to duplicate in either TailBB or in
one of the successors.
In cases there are no phis, we only have to pay the cost of extra edges,
but have no explosion in PHI related instructions.
This improves performance of Python on some inputs by 2-3% on Apple
Silicon CPUs.
PR: https://github.com/llvm/llvm-project/pull/116072
Commit: 1c28b9237382b093f477479c993c80181922ca6a
https://github.com/llvm/llvm-project/commit/1c28b9237382b093f477479c993c80181922ca6a
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/test/Headers/__cpuidex_conflict.c
A clang/test/Preprocessor/builtin_aux_info.cpp
Log Message:
-----------
[Clang] __has_builtin should return false for aux triple builtins (#121839)
Currently, `__has_builtin` will return true when passed a builtin that
is only supported on the aux target. I found this when `__has_builtin`
was called with an X86 builtin but the current target was SPIR-V.
We should instead return false for aux builtins.
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: a6211a64dc22b11daa6f01122350a7287a593159
https://github.com/llvm/llvm-project/commit/a6211a64dc22b11daa6f01122350a7287a593159
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
Log Message:
-----------
[gn build] Port ff17a4136ded
Commit: 4cf1fe240589d3f2a8a8332abf3f71a18bdba027
https://github.com/llvm/llvm-project/commit/4cf1fe240589d3f2a8a8332abf3f71a18bdba027
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
Log Message:
-----------
[lldb] Add missing operations to GetOpcodeDataSize (#120163)
The improved error reporting in #120162 revealed that we were missing
opcodes in GetOpcodeDataSize. I changed the function to remove the
default case and switch over the enum type which will cause the compiler
to emit a warning if there are unhandled operations in the future.
rdar://139705570
Commit: 775d0f36f74851172f84074d90cde29e181b3edd
https://github.com/llvm/llvm-project/commit/775d0f36f74851172f84074d90cde29e181b3edd
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Utils/VNCoercion.cpp
M llvm/test/Transforms/GVN/vscale.ll
Log Message:
-----------
[GVN] Handle scalable vectors with the same size in VNCoercion (#123984)
This allows us to forward to a load even if the types do not match
(nxv4i32 vs nxv2i64 for example). Scalable types are allowed in
canCoerceMustAliasedValueToLoad so long as the size (minelts *
scalarsize) is the same, and some follow-on code is adjusted to make
sure it handles scalable sizes correctly. Methods like
analyzeLoadFromClobberingWrite and analyzeLoadFromClobberingStore still
do nothing for scalable vectors, as Offsets and mismatching types are
not supported.
Commit: c9b7303b9b18129c4ee6b56aaa2a0a9f59be2d09
https://github.com/llvm/llvm-project/commit/c9b7303b9b18129c4ee6b56aaa2a0a9f59be2d09
Author: Karlo Basioli <68535415+basioli-k at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
Add [[maybe_unused]] to a variable used only in assert in VPlan.h (#124173)
Commit: c3ecbe6792bbbda12b5a70273048643496b63484
https://github.com/llvm/llvm-project/commit/c3ecbe6792bbbda12b5a70273048643496b63484
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
Disable the test again.
* https://lab.llvm.org/buildbot/#/builders/127/builds/2148/steps/7/logs/stdio shows a failure.
Commit: 4018317407006b2c632fbb75729de624a2426439
https://github.com/llvm/llvm-project/commit/4018317407006b2c632fbb75729de624a2426439
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/include/clang/Basic/Attributes.h
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/CMakeLists.txt
M clang/lib/Basic/Attributes.cpp
M clang/lib/Lex/PPDirectives.cpp
A clang/test/Preprocessor/macro-reserved-attrs-cxx11.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Clang] restrict use of attribute names reserved by the C++ standard (#106036)
Fixes #92196
https://eel.is/c++draft/macro.names#2
> A translation unit shall not #define or #undef names lexically
identical to keywords, to the identifiers listed in Table
[4](https://eel.is/c++draft/lex.name#tab:lex.name.special), or to the
[attribute-token](https://eel.is/c++draft/dcl.attr.grammar#nt:attribute-token)s
described in [[dcl.attr]](https://eel.is/c++draft/dcl.attr), except that
the names likely and unlikely may be defined as function-like macros
([[cpp.replace]](https://eel.is/c++draft/cpp.replace))[.](https://eel.is/c++draft/macro.names#2.sentence-1)
Commit: d17e4ca7e02b6c4118df9170d10c4e68aee7da0a
https://github.com/llvm/llvm-project/commit/d17e4ca7e02b6c4118df9170d10c4e68aee7da0a
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel][NFC] Add td_library for downstream use (#124156)
This will allow td_library/gentbl_cc_library in other packages to use
these td files.
Commit: cb981cc540ba7e16f973e925a80b5bcb337381cc
https://github.com/llvm/llvm-project/commit/cb981cc540ba7e16f973e925a80b5bcb337381cc
Author: Alex Prabhat Bara <alexpbara at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/include/wchar.yaml
Log Message:
-----------
[libc] added btowc to wchar.h generated header (#124168)
Fixes: #124152
Commit: c118864223c6309378cd704f3406533474c2759f
https://github.com/llvm/llvm-project/commit/c118864223c6309378cd704f3406533474c2759f
Author: Yi Qian <68618497+yiqian1 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[MLIR][ROCDL]Add MFMA_*_F8F6F4 instructions to the ROCDL dialect (#123830)
This PR adds mfma.scale.f32.32x32x64.f8f6f4 and
mfma.scale.f32.16x16x128.f8f6f4 to the ROCDL dialect. They are converted
to the corresponding intrinsics in the mlir-to-llvmir pass.
Commit: 24b137365004f0916f9ed64bc5859d8b80585ca1
https://github.com/llvm/llvm-project/commit/24b137365004f0916f9ed64bc5859d8b80585ca1
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/unistd.yaml
Log Message:
-----------
[libc][docs] Add Unistd header's page to the status of implementations doc (#123068)
These changes ensure that the unistd header is documented properly with
respect to the issue ( https://github.com/llvm/llvm-project/issues/122006 ) .
Commit: e10d551aa482ee185a80216b2670a2947a8bdeb0
https://github.com/llvm/llvm-project/commit/e10d551aa482ee185a80216b2670a2947a8bdeb0
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/tools/mlir-pdll/mlir-pdll.cpp
Log Message:
-----------
[mlir][PDLL] Allow (and ignore) `-D` tablegen macros. (#124166)
Similar to #91329, `mlir-pdll` is a tool used in tablegen macros that
unregisters from common flags, including `-D` macros. Because a macro
may be used globally, e.g. configured via `LLVM_TABLEGEN_FLAGS`, we want
this tool to just ignore the macro instead of a fatal failure due to the
unrecognized flag.
Commit: c4ca87ee78fa4f1978e018e6e3a260ac9aea399d
https://github.com/llvm/llvm-project/commit/c4ca87ee78fa4f1978e018e6e3a260ac9aea399d
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/test/tools/yaml2obj/ELF/section-type.yaml
Log Message:
-----------
[yaml2obj] Don't use uninitialized Type (#123274)
Alternative to #123137
With -DMACHINE=EM_NONE, machine specific
sections, like SHT_ARM_EXIDX, will fall to parse
and set `Type`.
This triggers msan on
```
yaml2obj llvm-project/llvm/test/tools/yaml2obj/ELF/mips-abi-flags.yaml -DMACHINE=EM_NONE
```
Commit: 7a831eb924e34e9c5e62f3b5a8e0db0278284f84
https://github.com/llvm/llvm-project/commit/7a831eb924e34e9c5e62f3b5a8e0db0278284f84
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove unused VPLane::getNumCachedLanes. (NFC)
The function isn't used, remove it.
Commit: 0b7cbd23a043ea4c14bd13ccd737049d38f64b5d
https://github.com/llvm/llvm-project/commit/0b7cbd23a043ea4c14bd13ccd737049d38f64b5d
Author: thetruestblue <bblueconway at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
Log Message:
-----------
[Darwin][Sanitizers][CrashReporter] Adopt initializer for Crash Reporter Annotations struct (#123978)
An initializer for the Crash Reporter Annotatoins struct was added in
version 5. For the simplicity of not needing to always update the struct
in subsequent versions, this patchs checks for the initializer before
attempting to redefine the struct on its own.
Note -- we have an existing test for this that is disabled by default,
it is inherently flakey due to the nature of crash reporter. But we can
run that when making crash reporter related changes.
rdar://136156203
Commit: e19261faf5c771bd7951b987abe8de698469e9f1
https://github.com/llvm/llvm-project/commit/e19261faf5c771bd7951b987abe8de698469e9f1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
Log Message:
-----------
[TableGen] Add a SmallPtrSet to track WriteRes that are referenced by some ReadAdvance. NFC (#124160)
Use this to remove a linear scan from CodeGenProcModel::hasReadOfWrite.
This reduces build time of RISCVGenSubtargetInfo.inc on by machine from
~6 seconds to ~3 seconds.
Commit: e30a4fc3e20bf5d9cc2f5bfcb61b4eb0e686a193
https://github.com/llvm/llvm-project/commit/e30a4fc3e20bf5d9cc2f5bfcb61b4eb0e686a193
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/LoongArch/smul-with-overflow.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/Thumb/smul_fix.ll
M llvm/test/CodeGen/Thumb/smul_fix_sat.ll
M llvm/test/CodeGen/Thumb/umul_fix.ll
M llvm/test/CodeGen/Thumb/umul_fix_sat.ll
M llvm/test/CodeGen/X86/muloti.ll
M llvm/test/CodeGen/X86/smul-with-overflow.ll
M llvm/test/CodeGen/X86/smul_fix_sat.ll
M llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/xmulo.ll
Log Message:
-----------
[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)
We have two forceExpandWideMUL functions. One takes the low and high
half of 2 inputs and calculates the low and high half of their product.
This does not calculate the full 2x width product.
The other signature takes 2 inputs and calculates the low and high half
of their full 2x width product. Previously it did this by sign/zero
extending the inputs to create the high bits and then calling the other
function.
We can instead copy the algorithm from the other function and use the
Signed flag to determine whether we should do SRA or SRL. This avoids
the need to multiply the high part of the inputs and add them to the
high half of the result. This improves the generated code for signed
multiplication.
This should improve the performance of #123262. I don't know yet how
close we will get to gcc.
Commit: 76ed4b1cec57ad26433e4808697d6c4d042d4b22
https://github.com/llvm/llvm-project/commit/76ed4b1cec57ad26433e4808697d6c4d042d4b22
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/TableGen/Record.cpp
Log Message:
-----------
[TableGen] Add StringInit pools to RecordKeeperImpl::dumpAllocationStats. (#124164)
Remove duplicate print of TheBitsInitPool.
I don't know who or what uses this information. I happened to notice
TheBitsInitPool was printed twice which lead to auditing the whole list.
Commit: f2942b90778670d9ad974d025c779fc96afa737c
https://github.com/llvm/llvm-project/commit/f2942b90778670d9ad974d025c779fc96afa737c
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
Log Message:
-----------
[CodeGen] NFC: Move isDead to MachineInstr (#123531)
Provide isDead interface for access to ad-hoc isDead queries.
LivePhysRegs is optional: if not provided, pessimistically check
deadness of a single MI without doing the LivePhysReg walk; if provided
it is assumed to be at the position of MI.
Commit: 1688c8719fca43e285bfa3900062a2248295a9af
https://github.com/llvm/llvm-project/commit/1688c8719fca43e285bfa3900062a2248295a9af
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
s/requires/REQUIRES to fix the test on release build
Commit: 3ed28bbf195d5fe93c8711d09abc8bda7c73963e
https://github.com/llvm/llvm-project/commit/3ed28bbf195d5fe93c8711d09abc8bda7c73963e
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Generate CXX11AttributeInfo.inc for 4018317407006b2c632fbb75729de624a2426439
Commit: 631a6e0004e57ca85569b99ea411418627925697
https://github.com/llvm/llvm-project/commit/631a6e0004e57ca85569b99ea411418627925697
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/string/CMakeLists.txt
M libc/src/string/string_utils.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcslen.cpp
A libc/src/wchar/wcslen.h
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcslen_test.cpp
Log Message:
-----------
[libc][wchar] implement wcslen (#124150)
Update string_utils' string_length to work with char* or wchar_t*, so that it
may be reusable when implementing wmemchr, wcspbrk, wcsrchr, wcsstr.
Link: #121183
Link: #124027
Co-authored-by: Nick Desaulniers <ndesaulniers at google.com>
---------
Co-authored-by: Tristan Ross <tristan.ross at midstall.com>
Commit: d87441a2420400166b1f6db107e2946c633ad41b
https://github.com/llvm/llvm-project/commit/d87441a2420400166b1f6db107e2946c633ad41b
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/IR/ProfileSummary.cpp
M llvm/test/tools/llvm-profdata/general.proftext
Log Message:
-----------
[llvm-profdata] Fix detailed summary format on Windows (#124169)
The detailed summary format was changed in
https://github.com/llvm/llvm-project/pull/105915 which broke
`llvm/test/tools/llvm-profdata/general.proftext` (XFAILed in
https://github.com/llvm/llvm-project/pull/124165). Apparently the
behavior of `%lu` is different between Linux and Windows, so I reverted
back to using `<<` style formats.
Commit: f402e06e7d813c0c2732b4605a0291cab8cb15f9
https://github.com/llvm/llvm-project/commit/f402e06e7d813c0c2732b4605a0291cab8cb15f9
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
Log Message:
-----------
[RISCV][VLOPT] Add vector fp min/max instructions to isSupportedInstr (#124196)
Commit: bf258dbd57eedb29e0914fe2e6b27619281b616c
https://github.com/llvm/llvm-project/commit/bf258dbd57eedb29e0914fe2e6b27619281b616c
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
Log Message:
-----------
[RISCV][VLOPT] support fp sign injection instructions (#124195)
Commit: fc952b2a6933d746e843f468052c5a62469c2658
https://github.com/llvm/llvm-project/commit/fc952b2a6933d746e843f468052c5a62469c2658
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/bf16.ll
Log Message:
-----------
[AArch64] Add pre-index store patterns for bf16.
These, like the postinc patterns, need adding very similarly to fp16.
Fixes #97870
Commit: 0e213834df114484ca9525c0e60522b40ecf24e8
https://github.com/llvm/llvm-project/commit/0e213834df114484ca9525c0e60522b40ecf24e8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
R llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
Log Message:
-----------
Revert "[LoopVectorizer] Add support for chaining partial reductions (#120272)" (#124198)
Introduced stack buffer overflow, see #120272.
`getScaledReduction` can return empty vector, and there is not check for
that.
This reverts commit c9b7303b9b18129c4ee6b56aaa2a0a9f59be2d09.
This reverts commit caf0540b91b0fee31353dc7049ae836e0f814cff.
Commit: f5bd623d060051f6f6715c153aa60a577df6f540
https://github.com/llvm/llvm-project/commit/f5bd623d060051f6f6715c153aa60a577df6f540
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
Log Message:
-----------
[RISCV][VLOPT] Rename vx to vf where appropriate in test case
Commit: 9324e6a7a5c5adc5b5c38c3e3cbecd7e1e98876a
https://github.com/llvm/llvm-project/commit/9324e6a7a5c5adc5b5c38c3e3cbecd7e1e98876a
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/include/llvm/ObjCopy/ELF/ELFConfig.h
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
A llvm/test/tools/llvm-objcopy/ELF/remove-note.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
Log Message:
-----------
[llvm-objcopy][ELF] Add an option to remove notes (#118739)
This adds an option `--remove-note=[name/]type` to selectively delete
notes in ELF files, where `type` is the numeric value of the note type
and `name` is the name of the originator. The name can be omitted, in
which case all notes of the specified type will be removed. For now,
only `SHT_NOTE` sections that are not associated with segments are
handled. The implementation can be extended later as needed.
RFC: https://discourse.llvm.org/t/rfc-llvm-objcopy-feature-for-editing-notes/83491
Commit: 42043c423ff01d8d07f33aed76819d3b716bba0c
https://github.com/llvm/llvm-project/commit/42043c423ff01d8d07f33aed76819d3b716bba0c
Author: David Blaikie <dblaikie at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/test/DebugInfo/X86/set.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
A llvm/test/Verifier/dicompositetype-elements-null.ll
Log Message:
-----------
Reapply "Verifier: Add check for DICompositeType elements being null"
This remove some erroneous debug info from tests that should address the
test failures that showed up when the this was previously committed.
This reverts commit 6716ce8b641f0e42e2343e1694ee578b027be0c4.
Commit: 25825d4ac9683010b0b921924cd5e244a82db1a3
https://github.com/llvm/llvm-project/commit/25825d4ac9683010b0b921924cd5e244a82db1a3
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/WebAssembly.cpp
Log Message:
-----------
[WebAssembly] Enable Wasm EH features only once (#124042)
#122466 had an unexpected side effect that,
`EnableFeaturesForWasmEHSjLj` and `BanIncompatibleOptionsForWasmEHSjLj`
can be called multiple times now, every time a Wasm EH flag
(`-fwasm-exceptions`, `-wasm-enable-eh`, `-wasm-enable-sjlj`, ..) was
checked and handled. This resulted in unnecessarily adding the same
feature-enabling arguments multiple times to the command line, for
example, `-target-feature +exception-handling` could be added as many as
three times, which didn't cause any errors but unnecessary. Also we ran
`BanIncompatibleOptionsForWasmEHSjLj` more than once, which was harmless
but unnecessary.
This guards these functions with a static variable so that we only run
them once.
Commit: 4f0325873faccfbe171bae4babceb65975ca892e
https://github.com/llvm/llvm-project/commit/4f0325873faccfbe171bae4babceb65975ca892e
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/lib/orc/macho_platform.cpp
A compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions.cpp
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.h
A llvm/include/llvm/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.h
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
A llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.cpp
A llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.h
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.h
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/CompileUtils.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
A llvm/lib/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.cpp
Log Message:
-----------
[ORC] Enable JIT support for the compact-unwind frame info format on Darwin.
For Darwin/arm64 (including Apple Silicon Macs) this will enable exception
handling and stack unwinding in JIT'd code.
Darwin supports two unwind-info formats: DWARF eh-frames and compact-unwind. On
Darwin/x86-64 compilers usually produce both by default, and ORC supported
exceptions and unwinding via eh-frames (same as on Linux), discarding the
redundant compact-unwind info. On Darwin/arm64 compilers typically default to
producing compact-unwind only, with DWARF eh-frames as a fallback for functions
that can't be described in compact-unwind. Since ORC did not previously support
the compact-unwind format and eh-frames were not present ORC was unable to
handle exceptions or unwinding by default in Darwin/arm64 JIT'd code.
This patch enables support for the compact-unwind-info format, and contains
three major moving parts:
(1) The JITLink CompactUnwindManager class is responsible for transforming the
__compact_unwind records produced by the linker into the __unwind_info
tables that libunwind parses during unwinding. To enable this the
CompactUnwindManager class provides three JITLink passes: The
prepareForPrune pass that splits the __compact_unwind section into
single-record blocks, allowing unused records to be dead-stripped; the
processAndReserveUnwindInfo pass that reserves space for the final
__unwind_info section, and the writeUnwindInfo pass that writes the
__unwind_info section.
(2) The OrcTargetProcess UnwindInfoManager class maintains a table of
registered JIT'd __unwind_info and __eh_frame sections, and handles
requests from libunwind for unwind info sections (by registering a callback
with libunwind's __unw_add_find_dynamic_unwind_sections function).
(3) The Orc UnwindInfoRegistrationPlugin, which scans LinkGraphs for
__unwind_info and __eh_frame sections to register with the
UnwindInfoManager.
This commit adds the CompactUnwindManager passes to the default JITLink
pipelines for Darwin/arm64 and Darwin/x86-64, and UnwindInfoManager intances to
the SelfExecutorProcessControl class (when built for apple platforms) and the
llvm-jitlink-executor tool.
The LLJIT class will now create an UnwindInfoRegistrationPlugin when targeting
a process running on Darwin if it detects that an UnwindInfoManager is
available to handle the registrations.
The ORC runtime macho_platform class already supported libunwind callbacks, so
out-of-process execution and unwinding support will work when loading the ORC
runtime.
The llvm-jitlink tool will only support compact-unwind when the orc-runtime is
loaded, as the UnwindInfoRegistrationPlugin requires access to an IR compiler
to load a helper module and llvm-jitlink does not provide an IR compiler.
Commit: 621e5cd8204596874c2ec7c8c169044d8e6865e3
https://github.com/llvm/llvm-project/commit/621e5cd8204596874c2ec7c8c169044d8e6865e3
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/include/llvm/ObjCopy/ELF/ELFConfig.h
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
R llvm/test/tools/llvm-objcopy/ELF/remove-note.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
Log Message:
-----------
Revert "[llvm-objcopy][ELF] Add an option to remove notes (#118739)"
This reverts commit 9324e6a7a5c5adc5b5c38c3e3cbecd7e1e98876a.
Commit: c7053ac202de1723c49d2f02d1c56d7a0a4481c0
https://github.com/llvm/llvm-project/commit/c7053ac202de1723c49d2f02d1c56d7a0a4481c0
Author: vporpo <vporpodas at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
A llvm/test/Transforms/SandboxVectorizer/cross_bbs.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Disable crossing BBs (#124039)
Crossing BBs is not currently supported by the structures of the
vectorizer. This patch fixes instances where this was happening,
including:
- a walk of use-def operands that updates the UnscheduledSuccs counter,
- the dead instruction removal is now done per BB,
- the scheduler, which will reject bundles that cross BBs.
Commit: 4065d985ab0f012f7fc0718685f6c12cf0352929
https://github.com/llvm/llvm-project/commit/4065d985ab0f012f7fc0718685f6c12cf0352929
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Semantics/reduce.cuf
Log Message:
-----------
[flang][cuda] Allow complex type in cuf kernel reduce (#124185)
Commit: 3d59e30cbcfea475594aaf1c69388c0503f846ef
https://github.com/llvm/llvm-project/commit/3d59e30cbcfea475594aaf1c69388c0503f846ef
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Semantics/cuf09.cuf
Log Message:
-----------
[flang][cuda] Allow DO CONCURRENT in cuf kernel (#124190)
Commit: 10772807ab72ce2b68d76816f8753219b2acbac3
https://github.com/llvm/llvm-project/commit/10772807ab72ce2b68d76816f8753219b2acbac3
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/include/llvm/ObjCopy/ELF/ELFConfig.h
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
A llvm/test/tools/llvm-objcopy/ELF/remove-note.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
Log Message:
-----------
Reapply "[llvm-objcopy][ELF] Add an option to remove notes (#118739)"
This fixes "unused-local-typedef" warnings in 9324e6a7a5.
This adds an option `--remove-note=[name/]type` to selectively delete
notes in ELF files, where `type` is the numeric value of the note type
and `name` is the name of the originator. The name can be omitted, in
which case all notes of the specified type will be removed. For now,
only `SHT_NOTE` sections that are not associated with segments are
handled. The implementation can be extended later as needed.
RFC: https://discourse.llvm.org/t/rfc-llvm-objcopy-feature-for-editing-notes/83491
Commit: bc74a1edbe5e6a3603e65efe06116fa72747acab
https://github.com/llvm/llvm-project/commit/bc74a1edbe5e6a3603e65efe06116fa72747acab
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
Log Message:
-----------
[IA] Generalize the support for power-of-two (de)interleave intrinsics (#123863)
Previously, AArch64 used pattern matching to support
llvm.vector.(de)interleave of 2 and 4; RISC-V only supported
(de)interleave of 2.
This patch consolidates the logics in these two targets by factoring out
the common factor calculations into the InterleaveAccess Pass.
Commit: 28ad8978ee2054298d4198bf10c8cb68730af037
https://github.com/llvm/llvm-project/commit/28ad8978ee2054298d4198bf10c8cb68730af037
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/TemplateDeduction.h
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-0x.cpp
M clang/test/CXX/temp/temp.param/p12.cpp
M clang/test/Modules/cxx-templates.cpp
M clang/test/SemaCXX/make_integer_seq.cpp
M clang/test/SemaTemplate/cwg2398.cpp
M clang/test/SemaTemplate/temp_arg_nontype.cpp
M clang/test/SemaTemplate/temp_arg_template.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/test/Templight/templight-prior-template-arg.cpp
M libcxx/test/libcxx/type_traits/is_specialization.verify.cpp
Log Message:
-----------
Reland: [clang] unified CWG2398 and P0522 changes; finishes implementation of P3310 (#124137)
This patch relands the following PRs:
* #111711
* #107350
* #111457
All of these patches were reverted due to an issue reported in
https://github.com/llvm/llvm-project/pull/111711#issuecomment-2406491485,
due to interdependencies.
---
[clang] Finish implementation of P0522
This finishes the clang implementation of P0522, getting rid
of the fallback to the old, pre-P0522 rules.
Before this patch, when partial ordering template template parameters,
we would perform, in order:
* If the old rules would match, we would accept it. Otherwise, don't
generate diagnostics yet.
* If the new rules would match, just accept it. Otherwise, don't
generate any diagnostics yet again.
* Apply the old rules again, this time with diagnostics.
This situation was far from ideal, as we would sometimes:
* Accept some things we shouldn't.
* Reject some things we shouldn't.
* Only diagnose rejection in terms of the old rules.
With this patch, we apply the P0522 rules throughout.
This needed to extend template argument deduction in order
to accept the historial rule for TTP matching pack parameter to non-pack
arguments.
This change also makes us accept some combinations of historical and P0522
allowances we wouldn't before.
It also fixes a bunch of bugs that were documented in the test suite,
which I am not sure there are issues already created for them.
This causes a lot of changes to the way these failures are diagnosed,
with related test suite churn.
The problem here is that the old rules were very simple and
non-recursive, making it easy to provide customized diagnostics,
and to keep them consistent with each other.
The new rules are a lot more complex and rely on template argument
deduction, substitutions, and they are recursive.
The approach taken here is to mostly rely on existing diagnostics,
and create a new instantiation context that keeps track of this context.
So for example when a substitution failure occurs, we use the error
produced there unmodified, and just attach notes to it explaining
that it occurred in the context of partial ordering this template
argument against that template parameter.
This diverges from the old diagnostics, which would lead with an
error pointing to the template argument, explain the problem
in subsequent notes, and produce a final note pointing to the parameter.
---
[clang] CWG2398: improve overload resolution backwards compat
With this change, we discriminate if the primary template and which partial
specializations would have participated in overload resolution prior to
P0522 changes.
We collect those in an initial set. If this set is not empty, or the
primary template would have matched, we proceed with this set as the
candidates for overload resolution.
Otherwise, we build a new overload set with everything else, and proceed
as usual.
---
[clang] Implement TTP 'reversed' pack matching for deduced function template calls.
Clang previously missed implementing P0522 pack matching
for deduced function template calls.
Commit: c676104875f34a87051b446469cc395932bc1f13
https://github.com/llvm/llvm-project/commit/c676104875f34a87051b446469cc395932bc1f13
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/Options.td
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/test/MachO/cfstring-dedup.s
Log Message:
-----------
[lld-macho] Implement symbol string deduplication (#123874)
The symbol string table does not have deduplication.
Here we add code to deduplicate the symbol string table.
This has a rather large size impact (20-30%) on unstripped binaries
(typically debug binaries) but no size impact on stripped
binaries(typically release binaries).
We enable deduplication by default and add a flag to disable it
(`-no-deduplicate-symbol-strings`).
Commit: 13dae34819e5ba2d7644f8486f1f291bf5836d48
https://github.com/llvm/llvm-project/commit/13dae34819e5ba2d7644f8486f1f291bf5836d48
Author: Haopeng Liu <153236845+haopliu at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Log Message:
-----------
[DSE] Enable the initializes improvement in DSE (#124058)
(Retry) enable the initializes improvement in DSE.
Initially enabled in https://github.com/llvm/llvm-project/pull/119116.
Fix the aliasing issue through global variables in
https://github.com/llvm/llvm-project/pull/120044.
The compile-time comparison of this enabling (no meaningful diff):
https://llvm-compile-time-tracker.com/compare.php?from=b46fcb9fa32f24660b1b8858d5c4cbdb76ef9d8b&to=33dc817b81f7898c87b052d1ddfd3d6e6f5b5dbd&stat=instructions%3Au
Commit: 67a8857989ed5b2aadc7a5982ddebd2e9477ebd0
https://github.com/llvm/llvm-project/commit/67a8857989ed5b2aadc7a5982ddebd2e9477ebd0
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/pointer.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Handle pointer allocation with double descriptors (#124183)
Commit: 26fc07d5d88760ad659599184fd10181287d2d9e
https://github.com/llvm/llvm-project/commit/26fc07d5d88760ad659599184fd10181287d2d9e
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
Log Message:
-----------
[ORC] Add explicit narrowing casts to fix build errors.
This should fix the compile errors seen in
https://lab.llvm.org/buildbot/#/builders/154/builds/10779.
Commit: 788318484d967a5d6e5e96a47ca2421e13adc308
https://github.com/llvm/llvm-project/commit/788318484d967a5d6e5e96a47ca2421e13adc308
Author: Alexander Kornienko <alexfh at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-cmp.ll
Log Message:
-----------
Revert "[InstCombine] Teach foldSelectOpOp about samesign" (#124123)
Reverts llvm/llvm-project#122723 due to a miscompilation
See
https://github.com/llvm/llvm-project/pull/122723#issuecomment-2608777844
for details and the test case.
Commit: 33c44074714d1d2f3d5f65c3fb842cddb6b689ac
https://github.com/llvm/llvm-project/commit/33c44074714d1d2f3d5f65c3fb842cddb6b689ac
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
Log Message:
-----------
[RISCV] Support cR Inline Asm Constraint (#124174)
This denotes RVC-compatible GPR Pairs, which are used by the Zclsd
extension.
C API PR: riscv-non-isa/riscv-c-api-doc#102
Commit: d2234ca16310a9e9bd595561353556ea6ba0176f
https://github.com/llvm/llvm-project/commit/d2234ca16310a9e9bd595561353556ea6ba0176f
Author: vporpo <vporpodas at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Fix packing when PHIs are present (#124206)
Before this patch we might have emitted pack instructions in between PHI
nodes. This patch fixes it by fixing the insert point of the new packs.
Commit: 969eb4ec4c22ca4eedc54cd8c73acdeecc3f7c86
https://github.com/llvm/llvm-project/commit/969eb4ec4c22ca4eedc54cd8c73acdeecc3f7c86
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan][NFC] Correct and clarify comment for getShadowPtrOffset()
The stated return type was incorrect; this patch corrects it. More generally, it explains how the Offset and its components fits into the overall shadow mapping calculation.
Commit: 24f177df61f673804a612dc48279c517bdecd696
https://github.com/llvm/llvm-project/commit/24f177df61f673804a612dc48279c517bdecd696
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt
M llvm/test/MC/X86/avx10.2-bf16-32-att.s
M llvm/test/MC/X86/avx10.2-bf16-32-intel.s
M llvm/test/MC/X86/avx10.2-bf16-64-att.s
M llvm/test/MC/X86/avx10.2-bf16-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2-BF16] Update VCOMISBF16 intrinsics and instructions (#123307)
- Add `I` to intrinsics and instructions
- Add `_` before sbf16 in intrinsics
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: acb7859f075f91b1105c04c37c6aa85db27a898a
https://github.com/llvm/llvm-project/commit/acb7859f075f91b1105c04c37c6aa85db27a898a
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
A llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-ignorable-exec-use.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-lane-mask.mir
M llvm/test/CodeGen/SystemZ/machinelicm-sunk-kill-flags.mir
Log Message:
-----------
[MachineSink] Extend loop sinking capability (#117247)
The current MIR cycle sinking capabilities are rather limited. It only
support sinking copies into a single successor block while obeying
limits.
This opt-in feature adds a more aggressive option, that is not limited
to the above concerns. The feature will try to "sink" by duplicating any
top-level preheader instruction (that we are sure is safe to sink) into
any user block, then does some dead code cleanup. In particular, this is
useful for high RP situations when loop bodies have control flow.
Commit: 00132643744237d2398fea1777114f3497629bd5
https://github.com/llvm/llvm-project/commit/00132643744237d2398fea1777114f3497629bd5
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/test/lit.cfg.py
Log Message:
-----------
[clang][test] Add .cuh as a recognized extension for lit test files (#124080)
Fixes https://github.com/llvm/llvm-project/issues/124079
Commit: 4405f728819350e35e34080874e1cf505bcb4ec6
https://github.com/llvm/llvm-project/commit/4405f728819350e35e34080874e1cf505bcb4ec6
Author: Henry Jiang <h243jian at uwaterloo.ca>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/IR/PassManagerInternal.h
Log Message:
-----------
[llvm][NFC] Remove CV-qualified base class in PassManagerInternal.h (#124193)
This resolves the `-Wignored-qualifiers` warning introduced by the new
warnign in https://github.com/llvm/llvm-project/pull/121419. First
caught in buildbot `ppc64le-lld-multistage-test`
https://lab.llvm.org/buildbot/#/builders/168/builds/7756
---------
Co-authored-by: Henry Jiang <henry.jiang1 at ibm.com>
Commit: b11529bfa26fe8f2abc7d57cd96716a494198327
https://github.com/llvm/llvm-project/commit/b11529bfa26fe8f2abc7d57cd96716a494198327
Author: lntue <lntue at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
Log Message:
-----------
[libc] Use -fno-math-errno to for __builtin_fma* to generate fma instructions. (#124200)
Fixes https://github.com/llvm/llvm-project/issues/123387
Commit: e06b7030303b50556f0a96948d03adb84a90e536
https://github.com/llvm/llvm-project/commit/e06b7030303b50556f0a96948d03adb84a90e536
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][NFC] Remove Redundant Inline Asm Logic (#124202)
This was left over from 408659c5b5c7d745042ae71db344d1ed10601512.
Commit: 0ef39a882bb342982929d2c856d7865de147a3c7
https://github.com/llvm/llvm-project/commit/0ef39a882bb342982929d2c856d7865de147a3c7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineCSE.cpp
Log Message:
-----------
MachineCSE: Remove check for subreg on a def operand (#124095)
There are no subregister defs in SSA.
Commit: 378dcf61014b787b3542b917f6296c9fb5ec490c
https://github.com/llvm/llvm-project/commit/378dcf61014b787b3542b917f6296c9fb5ec490c
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaLookup.cpp
A clang/test/Modules/module-local-hidden-friend-2.cppm
Log Message:
-----------
[C++20] [Modules] Fix may-be incorrect ADL for module local entities (#123931)
Close https://github.com/llvm/llvm-project/issues/123815
See the comments for details. We can't get primary context arbitrarily
since the redecl may have different context and information.
There is a TODO for modules specific case, I'd like to make it after
this PR.
Commit: 6735d527f9945fbf50c14a95cbdd66592472d622
https://github.com/llvm/llvm-project/commit/6735d527f9945fbf50c14a95cbdd66592472d622
Author: Cinhi Young <cyan at cyano.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.h
M llvm/test/CodeGen/Mips/cconv/vector.ll
M llvm/test/CodeGen/Mips/msa/basic_operations.ll
Log Message:
-----------
[MIPS] [MSA] Widen v2i8, v216 and v2i32 vectors (#123040)
- Widen v2i8, v2i16 and v2i32 vectors so they don't cast back and forth,
and make sure that instructions with correct data unit is being used.
- Handle undef indices for VSHF when lowering VECTOR_SHUFFLE (it crashes
if such index is present).
Commit: 9fecb4f9071740f6c1e665940583e9dceae2beb5
https://github.com/llvm/llvm-project/commit/9fecb4f9071740f6c1e665940583e9dceae2beb5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
[CodeGen] Fix a warning
This patch fixes:
llvm/lib/CodeGen/MachineSink.cpp:1667:22: error: unused variable
'Preheader' [-Werror,-Wunused-variable]
Commit: a001cc0e6cdcfa672b8aff9ce6d14782bb96356a
https://github.com/llvm/llvm-project/commit/a001cc0e6cdcfa672b8aff9ce6d14782bb96356a
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/lib/ExecutionEngine/Orc/Core.cpp
Log Message:
-----------
[ORC] Destroy defunct MaterializationUnits outside the session lock.
MaterializationUnits may contain arbitrary resources that need cleanup. We want
to do this outside the JIT's session lock.
This should fix a lock-order-inversion warning in clang-repl (for details see
https://github.com/llvm/llvm-project/issues/124215).
Commit: c9bc242e387f4a4a3dfcd86561f3ec0ca8a72d62
https://github.com/llvm/llvm-project/commit/c9bc242e387f4a4a3dfcd86561f3ec0ca8a72d62
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/Interpreter/simple-exception.cpp
Log Message:
-----------
[clang-repl] The simple-exception test now passes on arm64-darwin.
Commit: 435609b70c8bbf7bc6b73b04ec8852a9c11376ec
https://github.com/llvm/llvm-project/commit/435609b70c8bbf7bc6b73b04ec8852a9c11376ec
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/griddepcontrol.ll
Log Message:
-----------
[LLVM][NVPTX] Add support for griddepcontrol instruction (#123511)
This commit adds support for griddepcontrol PTX instruction with tests
under griddepcontrol.ll
Commit: fd174f0ff3e793fe96a6663b1488ed159cfe042f
https://github.com/llvm/llvm-project/commit/fd174f0ff3e793fe96a6663b1488ed159cfe042f
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/Interpreter/simple-exception.cpp
Log Message:
-----------
[clang-repl] Try to XFAIL testcase on arm32 without affecting arm64 darwin.
See discussion in https://github.com/llvm/llvm-project/commit/4f0325873faccfbe1.
Commit: 02a30049926bac042a7ee33fa587a4446c9c816f
https://github.com/llvm/llvm-project/commit/02a30049926bac042a7ee33fa587a4446c9c816f
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] preadv(64)/pwritev(64) interception. (#124115)
Commit: f3d2e75ead4e9d6e91712945a430cb036a061f3f
https://github.com/llvm/llvm-project/commit/f3d2e75ead4e9d6e91712945a430cb036a061f3f
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] inotify api for Linux interception. (#124177)
Commit: 6db73fa481beb9184ea8f1103e72e7a5c1d82e31
https://github.com/llvm/llvm-project/commit/6db73fa481beb9184ea8f1103e72e7a5c1d82e31
Author: vporpo <vporpodas at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
Log Message:
-----------
[SandboxVec][Scheduler] Fix clear() to clear all state (#124214)
This patch fixes the scheduler's clear() function to also clear the
ReadyList. Not doing so is a bug and results in crashes when the
ReadyList contains stale instructions, because it was never clered.
Commit: 2f39d138dc38a1fdf4754e4e26dd0aeb7409b13d
https://github.com/llvm/llvm-project/commit/2f39d138dc38a1fdf4754e4e26dd0aeb7409b13d
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
Log Message:
-----------
[DirectX] Handle dx.RawBuffer in DXILResourceAccess (#121725)
This adds handling for raw and structured buffers when lowering resource
access via `llvm.dx.resource.getpointer`.
Fixes #121714
Commit: 6330f1e052dbec842e0d12e3d0cc44996e8663d2
https://github.com/llvm/llvm-project/commit/6330f1e052dbec842e0d12e3d0cc44996e8663d2
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a regression in `PointerAlignment: Left` (#124085)
Don't insert a space between a type declaration r_paren and &/&&.
Fixes #124073.
Commit: 3c79a04cc231fc770d40878fc481868d1f312132
https://github.com/llvm/llvm-project/commit/3c79a04cc231fc770d40878fc481868d1f312132
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
Log Message:
-----------
[AMDGPU] Add amdgpu-sw-lower-lds pass to NPM codegen addIRPasses. (#124102)
This PR adds amdgpu-sw-lower-lds pass to
AMDGPUCodeGenPassBuilder::addIRPasses()
Commit: a9c61e0d7655a11f45f8e94b9481193fba11302e
https://github.com/llvm/llvm-project/commit/a9c61e0d7655a11f45f8e94b9481193fba11302e
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/lib/CodeGen/LiveIntervals.cpp
Log Message:
-----------
[NewPM] LiveIntervals: Check dependencies for invalidation (#123563)
Commit: 9dd5aed4edf029d66f0c25e6ae6fae3dbb5870d8
https://github.com/llvm/llvm-project/commit/9dd5aed4edf029d66f0c25e6ae6fae3dbb5870d8
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_loongarch.h
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_relax_align.s
Log Message:
-----------
[JITLink][LoongArch] Support R_LARCH_ALIGN relaxation (#122259)
Linker relaxation is not implemented for jitlink now. But if
relaxation is enabled by clang, R_LARCH_RELAX and
R_LARCH_ALIGN relocations will be emitted.
This commit adapts lld's algorithm to jitlink. Currently, only
relaxing R_LARCH_ALIGN is implemented. Other relaxable
relocs can be implemented in the future.
Without this, interpreting C++ code using clang-repl or running
ir using lli when relaxation is enabled will occur error: `JIT
session error: Unsupported loongarch relocation:102: R_LARCH_ALIGN`.
Similar to https://github.com/llvm/llvm-project/commit/310473c536dd4837934832d1b5454d212f15d5cc but only implement align.
Commit: 212cdc9a377a1b3ac96be0da20212592ebd2c818
https://github.com/llvm/llvm-project/commit/212cdc9a377a1b3ac96be0da20212592ebd2c818
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/Interpreter/simple-exception.cpp
M compiler-rt/lib/orc/macho_platform.cpp
R compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions.cpp
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
R llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.h
R llvm/include/llvm/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.h
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
R llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.cpp
R llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.h
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.h
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/CompileUtils.cpp
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
R llvm/lib/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.cpp
Log Message:
-----------
Revert "[ORC] Enable JIT support for the compact-unwind frame info format..."
This reverts 4f0325873faccfbe171bae4babceb65975ca892e and follow-up patches
(see below) while I investigate some ongoing failures on the buildbots.
---
Revert "[clang-repl] Try to XFAIL testcase on arm32 without affecting arm64
darwin."
This reverts commit fd174f0ff3e793fe96a6663b1488ed159cfe042f.
Revert "[clang-repl] The simple-exception test now passes on arm64-darwin."
This reverts commit c9bc242e387f4a4a3dfcd86561f3ec0ca8a72d62.
Revert "[ORC] Destroy defunct MaterializationUnits outside the session lock."
This reverts commit a001cc0e6cdcfa672b8aff9ce6d14782bb96356a.
Revert "[ORC] Add explicit narrowing casts to fix build errors."
This reverts commit 26fc07d5d88760ad659599184fd10181287d2d9e.
Revert "[ORC] Enable JIT support for the compact-unwind frame info format on
Darwin."
This reverts commit 4f0325873faccfbe171bae4babceb65975ca892e.
Commit: 45d83ae7df65a3c9843270d970119bc97957d830
https://github.com/llvm/llvm-project/commit/45d83ae7df65a3c9843270d970119bc97957d830
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/lib/Dialect/Math/TestExpandMath.cpp
Log Message:
-----------
[mlir] [math] Fix the precision issue of expand math (#120865)
The convertFloorOp pattern incurs precision loss when floating-point
numbers exceed the representable range of int64. This pattern should be
removed.
Fixes https://github.com/llvm/llvm-project/issues/119836
Commit: 8ef171ee831ff030e5aa81a74d68edc133d0cb4f
https://github.com/llvm/llvm-project/commit/8ef171ee831ff030e5aa81a74d68edc133d0cb4f
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
Log Message:
-----------
[msan] Handle horizontal add/subtract intrinsic by applying to shadow (#124159)
Horizontal add (hadd) and subtract (hsub) are currently heuristically
handled by `maybeHandleSimpleNomemIntrinsic()` (via
`handleUnknownIntrinsic()`), which computes the shadow by bitwise OR'ing
the two operands. This has false positives for hadd/hsub shadows. For
example, suppose the shadows for the two operands are 00000000 and
11111111 respectively. The expected shadow for the result is 00001111,
but `maybeHandleSimpleNomemIntrinsic` would compute it as 11111111.
This patch handles horizontal add using
`handleIntrinsicByApplyingToShadow` (from
https://github.com/llvm/llvm-project/pull/114490), which has no false
positives for hadd/hsub: if each pair of adjacent shadow values is zero
(fully initialized), the result will be zero (fully initialized). More
generally, it is precise for hadd/hsub if at least one of the two
adjacent shadow values in each pair is zero.
It does have some false negatives for hadd/hsub: if we add/subtract two
adjacent non-zero shadow values, some bits of the result may incorrectly
be zero. We consider this an acceptable tradeoff for performance. To
make shadow propagation precise, we want the equivalent of "horizontal
OR", but this is not available. Reducing horizontal OR to (permutation
plus bitwise OR) is left as an exercise for the reader.
Commit: b84b717f093bd081f290cedcc4fecb2abec27868
https://github.com/llvm/llvm-project/commit/b84b717f093bd081f290cedcc4fecb2abec27868
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[CostModel] getTypeBasedIntrinsicInstrCost - add default cost approximations for funnel shifts (#124175)
We only had handling for cases where we had argument data.
Commit: f6253f8fe9ff43f2f09f8e743bb095a84829154a
https://github.com/llvm/llvm-project/commit/f6253f8fe9ff43f2f09f8e743bb095a84829154a
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_reloc_addsub.s
Log Message:
-----------
[JITLink][LoongArch] Add label addition and subtraction relocations (#122262)
Commit: ddd2f57b29661f21308eec0400fa92a6d075b0c6
https://github.com/llvm/llvm-project/commit/ddd2f57b29661f21308eec0400fa92a6d075b0c6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-trunc-nowrap.ll
Log Message:
-----------
[X86] Use NSW/NUW flags on ISD::TRUNCATE nodes to improve X86 PACKSS/PACKUS lowering (#123956)
If the NSW/NUW flags are present, then we can assume the source value is within bounds and saturation will not occur with the PACKSS/PACKUS instructions.
Fixes #87485
Commit: 886adf8fb3ba5ec358a9a4fbe87e4da6b3ae8973
https://github.com/llvm/llvm-project/commit/886adf8fb3ba5ec358a9a4fbe87e4da6b3ae8973
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
Log Message:
-----------
[clang][ExprConst] Let diagnostics point to std::allocator calls (#123744)
Instead of the underlying operator new calls. This fixes a longstanding
FIXME comment in cxx2a-constexpr-dynalloc.cpp.
Commit: ee2722fc882ed5dbc7609686bd998b023c6645b2
https://github.com/llvm/llvm-project/commit/ee2722fc882ed5dbc7609686bd998b023c6645b2
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/avx10_2_512bf16intrin.h
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Sema/SemaX86.cpp
M clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt
M llvm/test/MC/X86/avx10.2-bf16-32-att.s
M llvm/test/MC/X86/avx10.2-bf16-32-intel.s
M llvm/test/MC/X86/avx10.2-bf16-64-att.s
M llvm/test/MC/X86/avx10.2-bf16-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (#123335)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: e289cb545adabd8f7b72c0c4a023dcf640823767
https://github.com/llvm/llvm-project/commit/e289cb545adabd8f7b72c0c4a023dcf640823767
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Host/posix/DomainSocket.cpp
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
Log Message:
-----------
[lldb] Remove more workrounds for Android that have been fixed upstream (#124176)
Issues that were fixed 10+ years ago with Bionic libc.
Commit: bfd9bc274586b0261e16e22ac50d50586a0152e2
https://github.com/llvm/llvm-project/commit/bfd9bc274586b0261e16e22ac50d50586a0152e2
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
Log Message:
-----------
[AMDGPU] SIPeepholeSDWA: Disable on existing SDWA instructions (#124131)
This PR reapplies the changes from PR #123942 which had to be reverted
because of a test failure. The test has been adjusted.
Commit: a6cfde62bb89e595db2bf7bb8ae810293d8edf26
https://github.com/llvm/llvm-project/commit/a6cfde62bb89e595db2bf7bb8ae810293d8edf26
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Host/posix/HostInfoPosix.cpp
Log Message:
-----------
[lldb] Check Android API for existence of getgrgid_r() introduced in 24 (#124182)
Commit: eda16991adeb078647b2d239fcf666ddece5c30a
https://github.com/llvm/llvm-project/commit/eda16991adeb078647b2d239fcf666ddece5c30a
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Host/common/Host.cpp
Log Message:
-----------
[lldb] Enable the use of dladdr() on Android (#124187)
dladdr() was introduced 15 years ago.
Commit: 97df7411fd99eb6b2ee54e0eadece490ae7a5a88
https://github.com/llvm/llvm-project/commit/97df7411fd99eb6b2ee54e0eadece490ae7a5a88
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/TestingGuide.rst
Log Message:
-----------
[llvm][Docs] Make it clear where lit test files live (#124121)
As someone on Discord was understandably confused because the build
directory does contain folder structures that look remarkably like the
source directory.
I used this page to explain it but realised that this must be from when
llvm was a separate repository. So `<user home>/llvm` probably was a
common path.
Now it's in llvm-project. So make that obvious in the instructions.
Commit: 24e70e3930724ce499ad05d669bfbc4423c542e0
https://github.com/llvm/llvm-project/commit/24e70e3930724ce499ad05d669bfbc4423c542e0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/exception.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/leap_second.h
M libcxx/include/__chrono/local_info.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/sys_info.h
M libcxx/include/__chrono/time_zone.h
M libcxx/include/__chrono/time_zone_link.h
M libcxx/include/__chrono/tzdb.h
M libcxx/include/__chrono/tzdb_list.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__config
M libcxx/include/__numeric/pstl.h
M libcxx/include/execution
M libcxx/include/iosfwd
M libcxx/include/syncstream
M libcxx/include/version
M libcxx/modules/std/iosfwd.inc
M libcxx/modules/std/syncstream.inc
M libcxx/test/libcxx/experimental/fexperimental-library.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/syncstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/support/test_macros.h
M libcxx/test/tools/clang_tidy_checks/internal_ftm_use.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Switch experimental library macros to 0/1 macros (#124030)
This is a continuation of what's been started in #89178.
As a drive-by, this also changes the PSTL macro to say `EXPERIMENTAL`
instead of `INCOMPLETE`.
Commit: 196f7c2a4f472074668451c5ecc40e82731940f7
https://github.com/llvm/llvm-project/commit/196f7c2a4f472074668451c5ecc40e82731940f7
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/ValueMapper.h
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
Log Message:
-----------
[Utils] Identity map module-level debug info on first use in CloneFunction* (#118627)
Summary:
To avoid cloning module-level debug info (owned by the module rather
than the function), CloneFunction implementation used to eagerly
identity map such debug info into ValueMap's MD map. In larger modules
with meaningful volume of debug info this gets very expensive.
By passing such debug info metadata via an IdentityMD set for the
ValueMapper to map on first use, we get several benefits:
1. Mapping metadata is not cheap, particularly because of tracking. When
cloning a Function we identity map lots of global module-level
metadata to avoid cloning it, while only a fraction of it is actually
used by the function. Mapping on first use is a lot faster for
modules with meaningful amount of debug info.
2. Eagerly identity mapping metadata makes it harder to cache
module-level data (e.g. a set of metadata nodes in a \a DICompileUnit).
With this patch we can cache certain module-level metadata
calculations to speed things up further.
Anecdata from compiling a sample cpp file with full debug info shows that this moderately speeds up
CoroSplitPass which is one of the heavier users of cloning:
| | Baseline | IdentityMD set |
|-----------------|----------|----------------|
| CoroSplitPass | 306ms | 221ms |
| CoroCloner | 101ms | 72ms |
| Speed up | 1x | 1.4x |
Test Plan:
ninja check-llvm-unit
ninja check-llvm
Commit: df3bc54eff3baaa0ad2492b858029bcbf258a5d7
https://github.com/llvm/llvm-project/commit/df3bc54eff3baaa0ad2492b858029bcbf258a5d7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
Log Message:
-----------
[flang] Avoid repeated hash lookups (NFC) (#124230)
Commit: 990837f91de329b1e045f90fadb86ffe21611d9a
https://github.com/llvm/llvm-project/commit/990837f91de329b1e045f90fadb86ffe21611d9a
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/invalid.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
Log Message:
-----------
[mlir][arith][tensor] Disable index type for bitcast (#121455)
Fixes #121397.
Commit: 1fa56038f6ea2b35e7b51d8151cfe7dfcb3abcf3
https://github.com/llvm/llvm-project/commit/1fa56038f6ea2b35e7b51d8151cfe7dfcb3abcf3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
Log Message:
-----------
[CostModel][X86] getIntrinsicInstrCost - lrint/llrint costs can use getCastInstrCost without argument data
We don't use the IntrinsicCostAttributes arguments so, which allows us to use in type-only analysis in a future patch.
Commit: b4ef11d0e20b8263012613697503533fbb2119d6
https://github.com/llvm/llvm-project/commit/b4ef11d0e20b8263012613697503533fbb2119d6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124228)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect Source to be nonnull.
Commit: 148da06628507123f340c68b0ba732c31c3b6de9
https://github.com/llvm/llvm-project/commit/148da06628507123f340c68b0ba732c31c3b6de9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Sema/SemaInternal.h
Log Message:
-----------
[Sema] Migrate away from PointerUnion::dyn_cast (NFC) (#124229)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect UPP.first to be nonnull.
Commit: 1c0af8dced4a38967f3cb2d93fb6576535bc748b
https://github.com/llvm/llvm-project/commit/1c0af8dced4a38967f3cb2d93fb6576535bc748b
Author: gbMattN <146744444+gbMattN at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
A compiler-rt/test/tysan/ignorelist.c
A compiler-rt/test/tysan/ignorelist.h
A compiler-rt/test/tysan/preprocessor.c
Log Message:
-----------
[TySan] Added tests for methods of ignoring instrumentation (#124125)
TySan supports some preprocessor checks and ignorelists, but they are
currently untested. This PR adds some tests to make sure they all work.
@fhahn @AaronBallman, this is based off the discussion in the
documentation PR [#123595]
Commit: 4b6fc4934685c26f223e435d62b02b60544f76d3
https://github.com/llvm/llvm-project/commit/4b6fc4934685c26f223e435d62b02b60544f76d3
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/Contributing.rst
M llvm/docs/DeveloperPolicy.rst
Log Message:
-----------
[llvm][Docs] Clarify the process for requesting a merge on your behalf (#124154)
This makes it more clear what you the author must do, and what reviewers
can expect you to do, before an approved PR can be merged. Spliting out
the email bit into a section also means we can link directly to it in
discussions.
This relies on one of those parties actually reading this, but I plan to
tackle the case where they don't with some new automation.
Commit: 0510d4ea59a185db453b5910f307e1c6e9184589
https://github.com/llvm/llvm-project/commit/0510d4ea59a185db453b5910f307e1c6e9184589
Author: Karlo Basioli <68535415+basioli-k at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel]Fix bazel build after 631a6e0004e57ca85569b99ea411418627925697
Commit: 865104a1042e824254b130c00c7f8ee0e0e0f6c5
https://github.com/llvm/llvm-project/commit/865104a1042e824254b130c00c7f8ee0e0e0f6c5
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
Log Message:
-----------
[AArch64][SME] Change output class of FORM_TRANSPOSED_REG_TUPLE pseudos (#123755)
The FORM_TRANSPOSED_REG_TUPLE pseudo nodes use either the ZPR2Mul2
or ZPR4Mul4 register classes for output. This patch changes the class
so that these can be extended to other multi-vector intrinsics which
instead create a ZPR2/ZPR4 register sequence.
Commit: 77465967130a502eb092a710a2f18be23ef2efff
https://github.com/llvm/llvm-project/commit/77465967130a502eb092a710a2f18be23ef2efff
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr.ll
Log Message:
-----------
[SLP][X86] Add VBMI2 coverage for funnel shift tests
VBMI2 CPUs actually have vector funnel shift instruction support
Commit: aff1242b8ee8b75d68812337f8e408a1405ab00f
https://github.com/llvm/llvm-project/commit/aff1242b8ee8b75d68812337f8e408a1405ab00f
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
Log Message:
-----------
[LV] Align debug location of the widen-phi to the original phi. (#120338)
This patch align the debug location of the widen-phi to the debug
location of original phi.
Split from: #120054
Commit: 3208801aec1867b83335418d84ee09b773ef5b2e
https://github.com/llvm/llvm-project/commit/3208801aec1867b83335418d84ee09b773ef5b2e
Author: David Green <david.green at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Add some bf16 GISel test coverage. NFC
Most of this is mis-compiling with +fullfp16 and should be disabled for GISel.
Commit: f8a56df36e39b01af667f2e7823d5c1d8bab73ee
https://github.com/llvm/llvm-project/commit/f8a56df36e39b01af667f2e7823d5c1d8bab73ee
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
Log Message:
-----------
AMDGPU/GlobalISel: AMDGPURegBankSelect (#112863)
Assign register banks to virtual registers. Does not use generic
RegBankSelect. After register bank selection all register operand of
G_ instructions have LLT and register banks exclusively. If they had
register class, reassign appropriate register bank.
Assign register banks using machine uniformity analysis:
Sgpr - uniform values and some lane masks
Vgpr - divergent, non S1, values
Vcc - divergent S1 values(lane masks)
AMDGPURegBankSelect does not consider available instructions and, in
some cases, G_ instructions with some register bank assignment can't be
inst-selected. This is solved in RegBankLegalize.
Exceptions when uniformity analysis does not work:
S32/S64 lane masks:
- need to end up with sgpr register class after instruction selection
- In most cases Uniformity analysis declares them as uniform
(forced by tablegen) resulting in sgpr S32/S64 reg bank
- When Uniformity analysis declares them as divergent (some phis),
use intrinsic lane mask analyzer to still assign sgpr register bank
temporal divergence copy:
- COPY to vgpr with implicit use of $exec inside of the cycle
- this copy is declared as uniform by uniformity analysis
- make sure that assigned bank is vgpr
Note: uniformity analysis does not consider that registers with vgpr def
are divergent (you can have uniform value in vgpr).
- TODO: implicit use of $exec could be implemented as indicator
that instruction is divergent
Commit: 625e0a40f1a97d181a4641f604495b6aea433bd8
https://github.com/llvm/llvm-project/commit/625e0a40f1a97d181a4641f604495b6aea433bd8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
Log Message:
-----------
[SLP][X86] Add missing SSE2/SSE4 checks from vector rotate tests
Commit: 9bb3c62948d0c6dd3fb233186ae6a79744012b8f
https://github.com/llvm/llvm-project/commit/9bb3c62948d0c6dd3fb233186ae6a79744012b8f
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/test/Driver/fast-math.f90
Log Message:
-----------
[Flang][Driver] Deprecate Ofast (#101701)
This is subject to agreement by the Flang community
(https://discourse.llvm.org/t/rfc-deprecate-ofast-in-flang/80243).
Commit: e6030d389571b3f1b0f0c5a35b7fa45937ed0f6c
https://github.com/llvm/llvm-project/commit/e6030d389571b3f1b0f0c5a35b7fa45937ed0f6c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Use std::allocator calls for Descriptor source (#123900)
... for the dynamic blocks created for operator new calls. This way we
get the type of memory allocated right. As a side-effect, the
diagnostics now point to the std::allocator calls, which is an
improvement.
Commit: 8e702735090388a3231a863e343f880d0f96fecb
https://github.com/llvm/llvm-project/commit/8e702735090388a3231a863e343f880d0f96fecb
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/IRMutator.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/BPF/BPFASpaceCastSimplifyPass.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/DivRemPairs.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopSink.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/Sink.cpp
M llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
M llvm/lib/Transforms/Utils/GuardUtils.cpp
M llvm/lib/Transforms/Utils/Instrumentation.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/tools/llvm-stress/llvm-stress.cpp
M llvm/unittests/Analysis/AssumeBundleQueriesTest.cpp
M llvm/unittests/Analysis/CGSCCPassManagerTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/IR/LegacyPassManagerTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/Support/ScopHelper.cpp
Log Message:
-----------
[NFC][DebugInfo] Use iterator moveBefore at many call-sites (#123583)
As part of the "RemoveDIs" project, BasicBlock::iterator now carries a
debug-info bit that's needed when getFirstNonPHI and similar feed into
instruction insertion positions. Call-sites where that's necessary were
updated a year ago; but to ensure some type safety however, we'd like to
have all calls to moveBefore use iterators.
This patch adds a (guaranteed dereferenceable) iterator-taking
moveBefore, and changes a bunch of call-sites where it's obviously safe
to change to use it by just calling getIterator() on an instruction
pointer. A follow-up patch will contain less-obviously-safe changes.
We'll eventually deprecate and remove the instruction-pointer
insertBefore, but not before adding concise documentation of what
considerations are needed (very few).
Commit: dac49e8ddd5dc0104c238f09cdd532e6fb5c4f1d
https://github.com/llvm/llvm-project/commit/dac49e8ddd5dc0104c238f09cdd532e6fb5c4f1d
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[Arm] Fix generating code with UB in NeonEmitter (#121802)
When generating `arm_neon.h`, NeonEmitter outputs code that
violates strict aliasing rules (C23 6.5 Expressions #7,
C++23 7.2.1 Value category [basic.lval] #11), for example:
bfloat16_t __reint = __p0;
uint32_t __reint1 = (uint32_t)(*(uint16_t *) &__reint) << 16;
__ret = *(float32_t *) &__reint1;
This patch fixed the offending code by replacing it with
a call to `__builtin_bit_cast`.
Commit: 33fc477e6e2614f71541f4287c1d68757b9203b0
https://github.com/llvm/llvm-project/commit/33fc477e6e2614f71541f4287c1d68757b9203b0
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Update `cxx_dr_status.html`
Commit: 965ff7fa309d4408b4ccf5df7e59fec264c905c5
https://github.com/llvm/llvm-project/commit/965ff7fa309d4408b4ccf5df7e59fec264c905c5
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/sm-version.ll
Log Message:
-----------
[NVPTX] Add SM versions for 101 and 120 (#124155)
This patch adds SM and PTX versions for SM
101, 120 and their arch-accelerated variants.
All these are supported in cuda-12.8.
sm120/120a requires ptx8.7 and the rest require ptx8.6.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 0ee037b861f94604907d95d0ff0ff87805b52428
https://github.com/llvm/llvm-project/commit/0ee037b861f94604907d95d0ff0ff87805b52428
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
Log Message:
-----------
AMDGPU/GlobalISel: AMDGPURegBankLegalize (#112864)
Lower G_ instructions that can't be inst-selected with register bank
assignment from AMDGPURegBankSelect based on uniformity analysis.
- Lower instruction to perform it on assigned register bank
- Put uniform value in vgpr because SALU instruction is not available
- Execute divergent instruction in SALU - "waterfall loop"
Given LLTs on all operands after legalizer, some register bank
assignments require lowering while other do not.
Note: cases where all register bank assignments would require lowering
are lowered in legalizer.
AMDGPURegBankLegalize goals:
- Define Rules: when and how to perform lowering
- Goal of defining Rules it to provide high level table-like brief
overview of how to lower generic instructions based on available
target features and uniformity info (uniform vs divergent).
- Fast search of Rules, depends on how complicated Rule.Predicate is
- For some opcodes there would be too many Rules that are essentially
all the same just for different combinations of types and banks.
Write custom function that handles all cases.
- Rules are made from enum IDs that correspond to each operand.
Names of IDs are meant to give brief description what lowering does
for each operand or the whole instruction.
- AMDGPURegBankLegalizeHelper implements lowering algorithms
Since this is the first patch that actually enables -new-reg-bank-select
here is the summary of regression tests that were added earlier:
- if instruction is uniform always select SALU instruction if available
- eliminate back to back vgpr to sgpr to vgpr copies of uniform values
- fast rules: small differences for standard and vector instruction
- enabling Rule based on target feature - salu_float
- how to specify lowering algorithm - vgpr S64 AND to S32
- on G_TRUNC in reg, it is up to user to deal with truncated bits
G_TRUNC in reg is treated as no-op.
- dealing with truncated high bits - ABS S16 to S32
- sgpr S1 phi lowering
- new opcodes for vcc-to-scc and scc-to-vcc copies
- lowering for vgprS1-to-vcc copy (formally this is vgpr-to-vcc G_TRUNC)
- S1 zext and sext lowering to select
- uniform and divergent S1 AND(OR and XOR) lowering - inst-selected into
SALU instruction
- divergent phi with uniform inputs
- divergent instruction with temporal divergent use, source instruction
is defined as uniform(AMDGPURegBankSelect) - missing temporal
divergence lowering
- uniform phi, because of undef incoming, is assigned to vgpr. Will be
fixed in AMDGPURegBankSelect via another fix in machine uniformity
analysis.
Commit: 88136f96452952b85b9c40e185b929e561e6e59f
https://github.com/llvm/llvm-project/commit/88136f96452952b85b9c40e185b929e561e6e59f
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Canonicalize gathers/scatters with trivial offsets (#117939)
Canonicalize gathers/scatters with contiguous (i.e. [0, 1, 2, ...])
offsets into vector masked load/store ops.
Commit: 46a08ce83262767b3aae5c9828fabcd13f2e8a96
https://github.com/llvm/llvm-project/commit/46a08ce83262767b3aae5c9828fabcd13f2e8a96
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidyProfiling.cpp
M clang-tools-extra/clang-tidy/ClangTidyProfiling.h
Log Message:
-----------
[clang-tidy][NFC] simplify `TimerGroup` in `ClangTidyProfiling` (#123958)
`TimerGroup` don't need to use as field of `ClangTidyProfiling`.
We can construct it local during destructing.
Commit: 8e6d6a55108c7979f0392bf8ad3444c92a2474e9
https://github.com/llvm/llvm-project/commit/8e6d6a55108c7979f0392bf8ad3444c92a2474e9
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] improve performance misc-unused-using-decls (#123454)
skip header file before register AST Matchers
it can avoid to matcher lots of ast node when lint header file
Commit: 4831fa8632f6ab89fe2c14b8e7ec09500e43c099
https://github.com/llvm/llvm-project/commit/4831fa8632f6ab89fe2c14b8e7ec09500e43c099
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for load (#112882)
Add IDs for bit width that cover multiple LLTs: B32 B64 etc.
"Predicate" wrapper class for bool predicate functions used to
write pretty rules. Predicates can be combined using &&, || and !.
Lowering for splitting and widening loads.
Write rules for loads to not change existing mir tests from old
regbankselect.
Commit: 5ce349589a4adcc18f5807551bf4b78091746aa8
https://github.com/llvm/llvm-project/commit/5ce349589a4adcc18f5807551bf4b78091746aa8
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroCloner.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[Coro] Prebuild a module-level debug info set and share it between all coroutine clones (#118628)
Summary:
CoroCloner, by calling into CloneFunctionInto, does a lot of repeated
work priming DIFinder and building a list of common module-level debug
info metadata. For programs compiled with full debug info this can get
very expensive.
This diff builds the data once and shares it between all clones.
Anecdata for a sample cpp source file compiled with full debug info:
| | Baseline | IdentityMD set | Prebuilt CommonDI (cur.) |
|-----------------|----------|----------------|--------------------------|
| CoroSplitPass | 306ms | 221ms | 68ms |
| CoroCloner | 101ms | 72ms | 0.5ms |
| CollectCommonDI | - | - | 63ms |
| Speed up | 1x | 1.4x | 4.5x |
Note that CollectCommonDebugInfo happens once *per coroutine* rather than per clone.
Test Plan:
ninja check-llvm-unit
ninja check-llvm
Compiled a sample internal source file, checked time trace output for scope timings.
Commit: b60c118f53e6f7e5328e54dc26b4d6787030c02b
https://github.com/llvm/llvm-project/commit/b60c118f53e6f7e5328e54dc26b4d6787030c02b
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSSAContext.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
Log Message:
-----------
MachineUniformityAnalysis: Improve isConstantOrUndefValuePhi (#112866)
Change existing code for G_PHI to match what LLVM-IR version is doing
via PHINode::hasConstantOrUndefValue. This is not safe for regular PHI
since it may appear with an undef operand and getVRegDef can fail.
Most notably this improves number of values that can be allocated
to sgpr in AMDGPURegBankSelect.
Common case here are phis that appear in structurize-cfg lowering
for cycles with multiple exits:
Undef incoming value is coming from block that reached cycle exit
condition, if other incoming is uniform keep the phi uniform despite
the fact it is joining values from pair of blocks that are entered
via divergent condition branch.
Commit: 57b48987f6c21e369e7bb1626dc79ca74aa34fdb
https://github.com/llvm/llvm-project/commit/57b48987f6c21e369e7bb1626dc79ca74aa34fdb
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/include/lldb/Symbol/Function.h
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Symbol/Function.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-function.s
Log Message:
-----------
[lldb] Use the first address range as the function address (#122440)
This is the behavior expected by DWARF. It also requires some fixups to
algorithms which were storing the addresses of some objects (Blocks and
Variables) relative to the beginning of the function.
There are plenty of things that still don't work in this setups, but
this change is sufficient for the expression evaluator to correctly
recognize the entry point of a function in this case.
Commit: acc13dbe4dcbfeafec24211148683a8b7e9c4cf0
https://github.com/llvm/llvm-project/commit/acc13dbe4dcbfeafec24211148683a8b7e9c4cf0
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[libc][workflow] improve ci coverage with windows-2025 and arm ubuntu (#123745)
Add the following workflows:
- `fullbuild` on aarch64 ubuntu
- `overlay` on windows 2025
- `overlay` on aarch64 ubuntu
`ccache` variant is used on `aarch64` due to
https://github.com/hendrikmuhs/ccache-action/issues/279
Commit: d6e0798a2a7cef94b2457f39c93f7083aaebd29d
https://github.com/llvm/llvm-project/commit/d6e0798a2a7cef94b2457f39c93f7083aaebd29d
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
A llvm/test/CodeGen/Mips/llvm-ir/sdiv-freebsd.ll
Log Message:
-----------
[Mips] Add the missing judgment when processing function handleMFLOSlot (#121463)
In function handleMFLOSlot, we may get a variable LastInstInFunction
with a value of true from function getNextMachineInstr and IInSlot may
be null which would trigger an assert.
So we need to skip this case.
Fix #118223.
Commit: b4e81fd1eb2231b06eaca66e71ecb83cffb88f52
https://github.com/llvm/llvm-project/commit/b4e81fd1eb2231b06eaca66e71ecb83cffb88f52
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/include/clang/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
Log Message:
-----------
[gn] port 4018317407006b2c63
Commit: eb206e9ea84eff0a0596fed2de8316d924f946d1
https://github.com/llvm/llvm-project/commit/eb206e9ea84eff0a0596fed2de8316d924f946d1
Author: Andrea Faulds <andrea.faulds at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/docs/Dialects/GPU.md
M mlir/docs/ReleaseNotes.md
M mlir/docs/SPIRVToLLVMDialectConversion.md
M mlir/lib/ExecutionEngine/VulkanRuntimeWrappers.cpp
M mlir/test/CMakeLists.txt
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-addi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-cmpi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-constants-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-max-min-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-muli-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shli-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrsi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrui-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-sitofp-i32.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-uitofp-i32.mlir
M mlir/test/Integration/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
M mlir/test/Integration/Dialect/Async/CPU/microbench-scf-async-parallel-for.mlir
M mlir/test/Integration/Dialect/Async/CPU/test-async-parallel-for-1d.mlir
M mlir/test/Integration/Dialect/Async/CPU/test-async-parallel-for-2d.mlir
M mlir/test/Integration/Dialect/Complex/CPU/correctness.mlir
M mlir/test/Integration/Dialect/ControlFlow/assert.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-complex-sparse-constant.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/matmul-vs-matvec.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/rank-reducing-subview.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/runtime-verification.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-collapse-tensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-nwc-wcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-nhwc-hwcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-ndhwc-dhwcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-elementwise.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-expand-tensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-matmul-masked-vec.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-one-shot-bufferize.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-padtensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-subtensor-insert-multiple-uses.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-subtensor-insert.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-tensor-e2e.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-tensor-matmul.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Math/CPU/mathtofuncs_ctlz.mlir
M mlir/test/Integration/Dialect/MemRef/cast-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/load-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/print-memref.mlir
M mlir/test/Integration/Dialect/MemRef/reinterpret-cast-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/subview-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/verify-memref.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/block.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/block_majors.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_0.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_0_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_bf16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dual_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/iterator-based-kernel.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/padded_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/reshape_dot.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_abs.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_binary.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cmp.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_dim.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_foreach.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_collapse_shape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex32.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex64.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_constant_to_sparse_tensor.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_1d_nwc_wcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_55.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nchw_fchw.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d_ndhwc_dhwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_block.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_dyn.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_element.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_ptr.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2dense.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2sparse.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_coo_test.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_dilated_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_dot.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_empty.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_expand.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_expand_shape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_foreach_slices.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_generate.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_1d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_loose.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matmul_slice.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matrix_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_mult_elt.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_reduction.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pooling_nhwc.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_re_im.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom_prod.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom_sum.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions_min.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions_prod.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reshape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_push_back.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_sort_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scf_nested.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_select.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_semiring_select.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sign.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sorted_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_storage.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_strided_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_bf16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_c32.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tanh.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tensor_mul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tensor_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_transpose.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_transpose_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_vector_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-hand.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-prune.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-gemm-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec-const.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-mma-2-4-f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sampled-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sddmm-lib.mlir
M mlir/test/Integration/Dialect/Standard/CPU/test-ceil-floor-pos-neg.mlir
M mlir/test/Integration/Dialect/Standard/CPU/test_subview.mlir
M mlir/test/Integration/Dialect/Tosa/CPU/test-fully-connected.mlir
M mlir/test/Integration/Dialect/Tosa/CPU/test-maxpool-dynamic.mlir
M mlir/test/Integration/Dialect/Vector/CPU/0-d-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/broadcast.mlir
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/constant-mask.mlir
M mlir/test/Integration/Dialect/Vector/CPU/contraction.mlir
M mlir/test/Integration/Dialect/Vector/CPU/create-mask-v4i1.mlir
M mlir/test/Integration/Dialect/Vector/CPU/create-mask.mlir
M mlir/test/Integration/Dialect/Vector/CPU/expand.mlir
M mlir/test/Integration/Dialect/Vector/CPU/extract-strided-slice.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/fma.mlir
M mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
M mlir/test/Integration/Dialect/Vector/CPU/index-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/insert-strided-slice.mlir
M mlir/test/Integration/Dialect/Vector/CPU/interleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedload.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-i64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-fp.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-int.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-str.mlir
M mlir/test/Integration/Dialect/Vector/CPU/realloc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f32-reassoc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f64-reassoc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-si4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-ui4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/rewrite-narrow-types.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scan.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shape-cast.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shuffle.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shuffle16x16.mlir
M mlir/test/Integration/Dialect/Vector/CPU/sparse-dot-matvec.mlir
M mlir/test/Integration/Dialect/Vector/CPU/sparse-saxpy-jagged-matvec.mlir
M mlir/test/Integration/Dialect/Vector/CPU/test-deinterleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-to-loops.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-write.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transpose.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f16-f16-accum.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f32.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f16.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32-bare-ptr.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-and.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-maxsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-minsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-op.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-or.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-region.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-xor.mlir
M mlir/test/Integration/GPU/CUDA/alloc-host-shared.mlir
M mlir/test/Integration/GPU/CUDA/assert.mlir
M mlir/test/Integration/GPU/CUDA/async.mlir
M mlir/test/Integration/GPU/CUDA/gpu-to-cubin.mlir
M mlir/test/Integration/GPU/CUDA/multiple-all-reduce.mlir
M mlir/test/Integration/GPU/CUDA/printf.mlir
M mlir/test/Integration/GPU/CUDA/shuffle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/cga_cluster.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x128_stride_noswizzle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir
M mlir/test/Integration/GPU/CUDA/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir
M mlir/test/Integration/GPU/ROCM/printf.mlir
M mlir/test/Integration/GPU/ROCM/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/vecadd.mlir
M mlir/test/Integration/GPU/ROCM/vector-transferops.mlir
M mlir/test/Integration/GPU/SPIRV/double.mlir
M mlir/test/Integration/GPU/SPIRV/simple_add.mlir
M mlir/test/Integration/GPU/SYCL/gpu-addf32-to-spirv.mlir
M mlir/test/Integration/GPU/SYCL/gpu-addi64-to-spirv.mlir
M mlir/test/Integration/GPU/SYCL/gpu-reluf32-to-spirv.mlir
M mlir/test/Integration/GPU/Vulkan/addf.mlir
M mlir/test/Integration/GPU/Vulkan/addf_if.mlir
M mlir/test/Integration/GPU/Vulkan/addi.mlir
M mlir/test/Integration/GPU/Vulkan/addi8.mlir
M mlir/test/Integration/GPU/Vulkan/addui_extended.mlir
M mlir/test/Integration/GPU/Vulkan/mulf.mlir
M mlir/test/Integration/GPU/Vulkan/smul_extended.mlir
M mlir/test/Integration/GPU/Vulkan/subf.mlir
M mlir/test/Integration/GPU/Vulkan/time.mlir
M mlir/test/Integration/GPU/Vulkan/umul_extended.mlir
M mlir/test/Integration/GPU/Vulkan/vector-deinterleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-interleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-shuffle.mlir
M mlir/test/Integration/lit.local.cfg
M mlir/test/lit.cfg.py
M mlir/test/lit.site.cfg.py.in
R mlir/test/mlir-cpu-runner/X86Vector/lit.local.cfg
R mlir/test/mlir-cpu-runner/X86Vector/math-polynomial-approx-avx2.mlir
R mlir/test/mlir-cpu-runner/async-error.mlir
R mlir/test/mlir-cpu-runner/async-func.mlir
R mlir/test/mlir-cpu-runner/async-group.mlir
R mlir/test/mlir-cpu-runner/async-value.mlir
R mlir/test/mlir-cpu-runner/async.mlir
R mlir/test/mlir-cpu-runner/bare-ptr-call-conv.mlir
R mlir/test/mlir-cpu-runner/copy.mlir
R mlir/test/mlir-cpu-runner/expand-arith-ops.mlir
R mlir/test/mlir-cpu-runner/global-constructors.mlir
R mlir/test/mlir-cpu-runner/global-memref.mlir
R mlir/test/mlir-cpu-runner/invalid.mlir
R mlir/test/mlir-cpu-runner/lit.local.cfg
R mlir/test/mlir-cpu-runner/math-polynomial-approx.mlir
R mlir/test/mlir-cpu-runner/memref-reinterpret-cast.mlir
R mlir/test/mlir-cpu-runner/memref-reshape.mlir
R mlir/test/mlir-cpu-runner/sgemm-naive-codegen.mlir
R mlir/test/mlir-cpu-runner/simple.mlir
R mlir/test/mlir-cpu-runner/test-expand-math-approx.mlir
R mlir/test/mlir-cpu-runner/unranked-memref.mlir
R mlir/test/mlir-cpu-runner/utils.mlir
R mlir/test/mlir-cpu-runner/verify-entry-point-result.mlir
R mlir/test/mlir-cpu-runner/verify-flags.mlir
R mlir/test/mlir-cpu-runner/x86-varargs.mlir
A mlir/test/mlir-runner/X86Vector/lit.local.cfg
A mlir/test/mlir-runner/X86Vector/math-polynomial-approx-avx2.mlir
A mlir/test/mlir-runner/async-error.mlir
A mlir/test/mlir-runner/async-func.mlir
A mlir/test/mlir-runner/async-group.mlir
A mlir/test/mlir-runner/async-value.mlir
A mlir/test/mlir-runner/async.mlir
A mlir/test/mlir-runner/bare-ptr-call-conv.mlir
A mlir/test/mlir-runner/copy.mlir
A mlir/test/mlir-runner/expand-arith-ops.mlir
A mlir/test/mlir-runner/global-constructors.mlir
A mlir/test/mlir-runner/global-memref.mlir
A mlir/test/mlir-runner/invalid.mlir
A mlir/test/mlir-runner/lit.local.cfg
A mlir/test/mlir-runner/math-polynomial-approx.mlir
A mlir/test/mlir-runner/memref-reinterpret-cast.mlir
A mlir/test/mlir-runner/memref-reshape.mlir
A mlir/test/mlir-runner/sgemm-naive-codegen.mlir
A mlir/test/mlir-runner/simple.mlir
A mlir/test/mlir-runner/test-expand-math-approx.mlir
A mlir/test/mlir-runner/unranked-memref.mlir
A mlir/test/mlir-runner/utils.mlir
A mlir/test/mlir-runner/verify-entry-point-result.mlir
A mlir/test/mlir-runner/verify-flags.mlir
A mlir/test/mlir-runner/x86-varargs.mlir
M mlir/tools/CMakeLists.txt
R mlir/tools/mlir-cpu-runner/CMakeLists.txt
R mlir/tools/mlir-cpu-runner/mlir-cpu-runner.cpp
A mlir/tools/mlir-runner/CMakeLists.txt
A mlir/tools/mlir-runner/mlir-runner.cpp
Log Message:
-----------
[mlir] Rename mlir-cpu-runner to mlir-runner (#123776)
With the removal of mlir-vulkan-runner (as part of #73457) in
e7e3c45bc70904e24e2b3221ac8521e67eb84668, mlir-cpu-runner is now the
only runner for all CPU and GPU targets, and the "cpu" name has been
misleading for some time already. This commit renames it to mlir-runner.
Commit: a5cc897cdedfdca018a83fac5734ebe086acb817
https://github.com/llvm/llvm-project/commit/a5cc897cdedfdca018a83fac5734ebe086acb817
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port 0ee037b861f9
Commit: 6292a808b3524d9ba6f4ce55bc5b9e547b088dd8
https://github.com/llvm/llvm-project/commit/6292a808b3524d9ba6f4ce55bc5b9e547b088dd8
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/Transforms/Utils/Instrumentation.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopNestAnalysis.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/Transforms/Coroutines/MaterializationUtils.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARC.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/SCCP.cpp
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/MoveAutoInit.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/tools/llvm-reduce/deltas/ReduceBasicBlocks.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/Analysis/ProfileSummaryInfoTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/Transforms/Scalar/LICMTest.cpp
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/CodeGen/LoopGenerators.cpp
M polly/lib/Transform/MaximalStaticExpansion.cpp
Log Message:
-----------
[NFC][DebugInfo] Use iterator-flavour getFirstNonPHI at many call-sites (#123737)
As part of the "RemoveDIs" project, BasicBlock::iterator now carries a
debug-info bit that's needed when getFirstNonPHI and similar feed into
instruction insertion positions. Call-sites where that's necessary were
updated a year ago; but to ensure some type safety however, we'd like to
have all calls to getFirstNonPHI use the iterator-returning version.
This patch changes a bunch of call-sites calling getFirstNonPHI to use
getFirstNonPHIIt, which returns an iterator. All these call sites are
where it's obviously safe to fetch the iterator then dereference it. A
follow-up patch will contain less-obviously-safe changes.
We'll eventually deprecate and remove the instruction-pointer
getFirstNonPHI, but not before adding concise documentation of what
considerations are needed (very few).
---------
Co-authored-by: Stephen Tozer <Melamoto at gmail.com>
Commit: 02c6002d1cd2dabe4b98368f91e7b4395e5ab11d
https://github.com/llvm/llvm-project/commit/02c6002d1cd2dabe4b98368f91e7b4395e5ab11d
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
M lldb/test/API/linux/aarch64/gcs/main.c
Log Message:
-----------
[lldb][AArch64] Add Guarded Control Stack registers (#123720)
The Guarded Control Stack extension implements a shadow stack and the
Linux kernel provides access to 3 registers for it via ptrace.
struct user_gcs {
__u64 features_enabled;
__u64 features_locked;
__u64 gcspr_el0;
};
This commit adds support for reading those from a live process.
The first 2 are pseudo registers based on the real control register and
the 3rd is a real register. This is the stack pointer for the guarded
stack.
I have added a "gcs_" prefix to the "features" registers so that they
have a clear name when shown individually. Also this means they will tab
complete from "gcs", and be next to gcspr_el0 in any sorted lists of
registers.
Guarded Control Stack Registers:
gcs_features_enabled = 0x0000000000000000
gcs_features_locked = 0x0000000000000000
gcspr_el0 = 0x0000000000000000
Testing is more of the usual, where possible I'm writing a register then
doing something in the program to confirm the value was actually sent to
ptrace.
Commit: 11b040192640ef3b1f481124c440f464ed6ec86a
https://github.com/llvm/llvm-project/commit/11b040192640ef3b1f481124c440f464ed6ec86a
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-alias.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected
Log Message:
-----------
[AMDGPU] Restore SP from saved-FP or saved-BP (#124007)
Currently, the AMDGPU backend bumps the Stack Pointer
by fixed size offsets in the prolog of device functions, and
restores it by the same amount in the epilog.
Prolog:
sp += frameSize
Epilog:
sp -= frameSize
If a function has dynamic stack realignment,
Prolog:
sp += frameSize + max_alignment
Epilog:
sp -= frameSize + max_alignment
These calculations are not optimal in case of dynamic
stack realignment, and completely fail in case of
dynamic stack readjustment.
This patch uses the saved Frame Pointer to restore SP.
Prolog:
fp = sp
sp += frameSize
Epilog:
sp = fp
In case of dynamic stack realignment, SP is restored from
the saved Base Pointer.
Prolog:
fp = sp + (max_alignment - 1)
fp = fp & (-max_alignment)
bp = sp
sp += frameSize + max_alignment
Epilog:
sp = bp
(Note: The presence of BP has been enforced in case of any
dynamic stack realignment.)
---------
Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 970094d50b08e694c2302f7ee39b1c33d08f2405
https://github.com/llvm/llvm-project/commit/970094d50b08e694c2302f7ee39b1c33d08f2405
Author: Lou <lou.knauer at sipearl.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
A llvm/test/tools/llvm-opt-report/Inputs/scalable.c
A llvm/test/tools/llvm-opt-report/Inputs/scalable.yaml
A llvm/test/tools/llvm-opt-report/scalabe.test
M llvm/tools/llvm-opt-report/OptReport.cpp
Log Message:
-----------
[llvm-opt-report] Show scalable vectorization factors (#123367)
Scalable vectorization factors are printed as "vscale x VF" where VF is
the known minimum number of elements, a integer. Currently,
llvm-opt-report always expects a integer (like for vectorization with
fixed-sized vectors), and does not display any vectorization factor in
the output (just 'V', but without a number).
This patch adds support for scalable vectorization factors and prints
them as "VNx<VF>", so for example "VNx4". The "Nx" is used to
differentiate between fixed-sized and scalable factors, and is
consistent with the way LLVM mangles scalable vectors in other places.
Commit: e5e55c04d6af4ae32c99d574f59e632595abf607
https://github.com/llvm/llvm-project/commit/e5e55c04d6af4ae32c99d574f59e632595abf607
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
Log Message:
-----------
[GlobalMerge][NFC] Skip sorting by profitability when it is not needed (#124146)
We were previously sorting by profitability even if we were choosing to
merge all globals together, which is not impacted by UsedGlobalSet
order.
We can also remove iteration of UsedGlobalSets in reverse order in both
cases. In the first csae, the order does not matter. In the second case,
we just sort by the order we need instead of sorting in the opposite
direction and calling reverse.
This change should only be an improvement on compile time. I have not
measured it, but I think it would never make things worse.
Commit: 77c780d64b950d6850d5ec1ee06cd0c21b38b89e
https://github.com/llvm/llvm-project/commit/77c780d64b950d6850d5ec1ee06cd0c21b38b89e
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port eb206e9ea84eff0a0596fed2de8316d924f946d1
Leave around an alias so users can move at their own pace.
Commit: acde3f722ff3766f6f793884108d342b78623fe4
https://github.com/llvm/llvm-project/commit/acde3f722ff3766f6f793884108d342b78623fe4
Author: Peter Hawkins <phawkins at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/python/mlir/dialects/_ods_common.py
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
Log Message:
-----------
[mlir:python] Compute get_op_result_or_value in PyOpView's constructor. (#123953)
This logic is in the critical path for constructing an operation from
Python. It is faster to compute this in C++ than it is in Python, and it
is a minor change to do this.
This change also alters the API contract of
_ods_common.get_op_results_or_values to avoid calling
get_op_result_or_value on each element of a sequence, since the C++ code
will now do this.
Most of the diff here is simply reordering the code in IRCore.cpp.
Commit: f2b253b9613a858ae3dd5bf5ccbba87b64941688
https://github.com/llvm/llvm-project/commit/f2b253b9613a858ae3dd5bf5ccbba87b64941688
Author: Emma Pilkington <emma.pilkington95 at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
A llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
Log Message:
-----------
[SelectionDAG] Fix an incorrect DebugLoc on a COPY (#122963)
Fixes: SWDEV-502134
Commit: 2068b1ba031e258a6448bea372005d19692c802a
https://github.com/llvm/llvm-project/commit/2068b1ba031e258a6448bea372005d19692c802a
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/test/CodeGen/X86/addcarry.ll
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
M llvm/test/CodeGen/X86/avgflooru-i128.ll
M llvm/test/CodeGen/X86/fmuladd-soft-float.ll
M llvm/test/CodeGen/X86/i128-abi.ll
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
M llvm/test/CodeGen/X86/subcarry.ll
M llvm/test/CodeGen/X86/uadd_sat_vec.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
Log Message:
-----------
[X86] Fix ABI for passing after i128 (#124134)
If we're passing an i128 value and we no longer have enough argument
registers (only r9 unallocated), the value gets passed via the stack.
However, r9 is still allocated as a shadow register, which means that a
following i64 argument will not use it. This doesn't match the x86-64
psABI.
Fix this by making i128 arguments as requiring consecutive registers,
and then adding a custom CC lowering that will allocate both parts of
the i128 at the same time, either to register or to stack, without
reserving a shadow register.
Fixes https://github.com/llvm/llvm-project/issues/123935.
Commit: 9cf52fe1f94fdcd8e27c76f7d33a80eeb2075833
https://github.com/llvm/llvm-project/commit/9cf52fe1f94fdcd8e27c76f7d33a80eeb2075833
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/test/Lower/OpenMP/derived-type-allocatable.f90
Log Message:
-----------
[flang][OpenMP][NFC] test the current private dealloc runtime calls (#124017)
It looks like in most cases we still don't make calls to deallocate
allocatable members of derived types which have been privatized.
This is just intended to add a test for the one case where we do, to
make sure this doesn't regress with my upcoming changes.
Commit: c546b5317c518987a5f45dd4c4d25321a955c758
https://github.com/llvm/llvm-project/commit/c546b5317c518987a5f45dd4c4d25321a955c758
Author: DianQK <dianqk at dianqk.net>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/ValueTracking/implied-condition-samesign.ll
Log Message:
-----------
[ValueTracking] Pass changed predicate `SignedLPred` to `isImpliedByMatchingCmp` (#124271)
Fixes #124267.
Since we are using the new predicate, we should also update the
parameters of `isImpliedByMatchingCmp`.
Commit: a12d7e4b611f0db2525da68f5576beaeeb6c84ac
https://github.com/llvm/llvm-project/commit/a12d7e4b611f0db2525da68f5576beaeeb6c84ac
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
Log Message:
-----------
[SLP] getVectorCallCosts - don't provide scalar argument data for vector IntrinsicCostAttributes (#124254)
getVectorCallCosts determines the cost of a vector intrinsic, based off
an existing scalar intrinsic call - but we were including the scalar
argument data to the IntrinsicCostAttributes, which meant that not only
was the cost calculation not type-only based, it was making incorrect
assumptions about constant values etc.
This also exposed an issue that x86 relied on fallback calculations for
funnel shift costs - this is great when we have the argument data as
that improves the accuracy of uniform shift amounts etc., but meant that
type-only costs would default to Cost=2 for all custom lowered funnel
shifts, which was far too cheap.
This is the reverse of #124129 where we weren't including argument data
when we could.
Fixes #63980
Commit: 6c11b7e689c89ff46e4472810dd555434eab1010
https://github.com/llvm/llvm-project/commit/6c11b7e689c89ff46e4472810dd555434eab1010
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
Log Message:
-----------
[CodeGen] NFC: Change order of checks in MachineInstr->isDead() (#124207)
[[Change-Id:
Ic349022bb99ef91f5396e462ade0366bc772ae02](https://github.com/llvm/llvm-project/pull/123531)](https://github.com/llvm/llvm-project/pull/123531)
moved isDead() from DeadMachineInstrElim to MachineInstr . In the
process of moving, I reordered the checks to improve chances of early
exit, but this has caused a slight increase in compile time.
This PR reverts back to the original order of checks.
Commit: a94226f9e6f5be4d6978134e7813f22b0510f3d4
https://github.com/llvm/llvm-project/commit/a94226f9e6f5be4d6978134e7813f22b0510f3d4
Author: Eric Astor <epastor at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
A llvm/test/tools/llvm-ml/bare_proc_error.asm
A llvm/test/tools/llvm-ml/no_section_error.asm
Log Message:
-----------
[llvm-ml] Remove unsafe getCurrentSegmentOnly() call (#123355)
This call was made unsafe recently, but was not fixed in
db48f1a1764023f8efeb055e343b967d1eb37d19 (the commit that fixed the
parallel code in AsmParser.cpp).
Fixes #123189
Commit: ec66c4af09263e68d800971906e60afc27d54a06
https://github.com/llvm/llvm-project/commit/ec66c4af09263e68d800971906e60afc27d54a06
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] true16 codegen pattern for f16 canonicalize (#122000)
true16 codegen pattern for f16 canonicalize
Commit: 5d2393a222c751723b0906485bf90a28dd4e564b
https://github.com/llvm/llvm-project/commit/5d2393a222c751723b0906485bf90a28dd4e564b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
Log Message:
-----------
[InstCombine] Avoid repeated hash lookups (NFC) (#124243)
Commit: 37bf0a10fb4cee10f4acbb7da453e7c19c8ee599
https://github.com/llvm/llvm-project/commit/37bf0a10fb4cee10f4acbb7da453e7c19c8ee599
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
A llvm/test/Analysis/ScalarEvolution/pr123550.ll
Log Message:
-----------
[SCEV] Add test for #123550 (NFC)
Commit: 256f40d0e6b2beb0e951b0f5f836847223c5695c
https://github.com/llvm/llvm-project/commit/256f40d0e6b2beb0e951b0f5f836847223c5695c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libc/src/stdlib/gpu/free.cpp
M libc/src/stdlib/gpu/malloc.cpp
M libc/test/src/stdlib/CMakeLists.txt
Log Message:
-----------
[libc] Use the NVIDIA device allocator for GPU malloc (#124277)
Summary:
This is a blocker on another patch in the OpenMP runtime. The problem is
that NVIDIA truly doesn't handle RPC-based allocations very well. It
cannot reliably update the MMU while a kernel is running and it will
usually deadlock if called from a separate thread due to internal use of
TLS.
This patch just removes the definition of `malloc` and `free` for NVPTX.
The result here is that they will be undefined, which is the cue for the
`nvlink` linker to define them for us. So, as far as `libc` is concerned
it still implements malloc.
Commit: 7842374103b26933d71a8fe354cd4d8715d55b1c
https://github.com/llvm/llvm-project/commit/7842374103b26933d71a8fe354cd4d8715d55b1c
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Emit nested namespaces in InstrInfoEmitter (#124210)
- Emit C++17 nested namespaces in InstrInfoEmitter.
Commit: cccb55491223cd410cb2f83973377dd75757cb60
https://github.com/llvm/llvm-project/commit/cccb55491223cd410cb2f83973377dd75757cb60
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Host/common/PseudoTerminal.cpp
Log Message:
-----------
[lldb] Remove unused posix_openpt function definition for Android (#124257)
This was for the wrapper function that was in
source/Host/android/LibcGlue.cpp. Android added
support 10+ years ago.
Commit: 3da7de34a2bcfeef73747a9796652f6bff225de3
https://github.com/llvm/llvm-project/commit/3da7de34a2bcfeef73747a9796652f6bff225de3
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/include/flang/Common/api-attrs.h
M flang/runtime/stop.cpp
Log Message:
-----------
[flang][runtime] Disable optimization for traceback related functions. (#124172)
The backtrace may at least print the backtrace name in the call stack,
but this does not happen with the release builds of the runtime.
Surprisingly, specifying "no-omit-frame-pointer" did not work
with GCC, so I decided to fall back to -O0 for these functions.
Commit: a976036a100b7dd459b6cabac96159875fcd513d
https://github.com/llvm/llvm-project/commit/a976036a100b7dd459b6cabac96159875fcd513d
Author: lntue <lntue at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libc/test/src/math/exhaustive/exhaustive_test.h
Log Message:
-----------
[libc][NFC] Remove extra ; in exhaustive_test.h. (#124216)
These cause warnings when running check-libc.
Commit: ba6774f997ee28157b0a3b8816cc76b94ed1da17
https://github.com/llvm/llvm-project/commit/ba6774f997ee28157b0a3b8816cc76b94ed1da17
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
Log Message:
-----------
[mlir][xegpu] Fix verifier diagnostic recursion (#124148)
Uses global diagnostic message in operation verifier to avoid infinite
recursion on a warning.
Emitting diagnostics through the operation under verification creates a
loop where verifier runs again before printing the message.
Commit: d88293d8a2005b19f89a86252c60102cec6c9b01
https://github.com/llvm/llvm-project/commit/d88293d8a2005b19f89a86252c60102cec6c9b01
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-break-down-bitcast.mlir
Log Message:
-----------
[mlir][vector] Disable `BreakDownVectorBitCast` for scalable vectors (#122725)
`BreakDownVectorBitCast` leverages
* `vector.extract_strided_slices` + `vector.insert_strided_slices`
As these Ops do not support extracting scalable sub-vectors (i.e.
extracting/inserting a fraction of a scalable dim), it's best to bail
out.
Commit: 474f5d2aefb44430b89ed72774a3c1d26a0adfb1
https://github.com/llvm/llvm-project/commit/474f5d2aefb44430b89ed72774a3c1d26a0adfb1
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/CodeGen/AArch64/cpu-supports-target.c
M clang/test/CodeGen/AArch64/cpu-supports.c
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/CodeGen/AArch64/fmv-features.c
M clang/test/CodeGen/AArch64/fmv-priority.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
M clang/test/Sema/attr-target-version.c
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/apple.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/lib/Target/AArch64/AArch64FMV.td
Log Message:
-----------
[FMV][AArch64] Remove features predres and ls64. (#124266)
These cannot be detected by reading the ID_AA64ISAR1_EL1 register since
their corresponding bitfields are hidden. Additionally the instructions
that these features enable are unusable from EL0.
ACLE: https://github.com/ARM-software/acle/pull/382
Commit: 5daecd4a3b9c6cca10ab6d44f539adf7310ace23
https://github.com/llvm/llvm-project/commit/5daecd4a3b9c6cca10ab6d44f539adf7310ace23
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Support/AArch64BuildAttributes.cpp
Log Message:
-----------
[Support] Fix namespace after #123990
https://llvm.org/docs/CodingStandards.html#use-namespace-qualifiers-to-implement-previously-declared-functions
Commit: c025b96ef9bb364c79f73fc3afb45c851c2efb17
https://github.com/llvm/llvm-project/commit/c025b96ef9bb364c79f73fc3afb45c851c2efb17
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Symbol::extract : remove unneeded file->lazy check
Commit: 134401deea5e86d646bb99fab39c182cfa8e5292
https://github.com/llvm/llvm-project/commit/134401deea5e86d646bb99fab39c182cfa8e5292
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RPC.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
A offload/test/libc/server.c
Log Message:
-----------
[Offload] Move RPC server handling to a dedicated thread (#112988)
Summary:
Handling the RPC server requires running through list of jobs that the
device has requested to be done. Currently this is handled by the thread
that does the waiting for the kernel to finish. However, this is not
sound on NVIDIA architectures and only works for async launches in the
OpenMP model that uses helper threads.
However, we also don't want to have this thread doing work
unnnecessarily. For this reason we track the execution of kernels and
cause the thread to sleep via a condition variable (usually backed by
some kind of futex or other intelligent sleeping mechanism) so that the
thread will be idle while no kernels are running.
Commit: bd8a8181288c9e16eb90fff78cbbc63b4687963a
https://github.com/llvm/llvm-project/commit/bd8a8181288c9e16eb90fff78cbbc63b4687963a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
Log Message:
-----------
[Offload] Add cuLaunchHostFunc to dynamic cuda
Summary:
This was missing, causing non-directly linked builds to fail.
Commit: 0cd794d4860e376698bb4da24bcdf8cbf331835c
https://github.com/llvm/llvm-project/commit/0cd794d4860e376698bb4da24bcdf8cbf331835c
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/FormatPaper.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/ostream.h
A libcxx/include/__chrono/utc_clock.h
M libcxx/include/chrono
M libcxx/include/module.modulemap
M libcxx/modules/std/chrono.inc
A libcxx/test/benchmarks/utc_clock.bench.cpp
M libcxx/test/libcxx/diagnostics/chrono.nodiscard.verify.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/get_leap_second_info.pass.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/time.clock.utc.members/from_sys.pass.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/time.clock.utc.members/to_sys.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/get_leap_second_info.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/leap_second_info.members.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/from_sys.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/now.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/to_sys.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/types.compile.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/utc_time.ostream.pass.cpp
A libcxx/test/std/time/time.syn/formatter.utc_time.pass.cpp
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
Log Message:
-----------
[libc++][chrono] implements UTC clock. (#90393)
While implementing this feature and its associated LWG issues it turns
out
- LWG3316 Correctly define epoch for utc_clock / utc_timepoint only
added non-normative wording to the standard.
Implements parts of:
- P0355 Extending <chrono> to Calendars and Time Zones
- P1361 Integration of chrono with text formatting
- LWG3359 <chrono> leap second support should allow for negative leap
seconds
Commit: 12f82fbe072382bb78ab1cbdd3fbeb8ed44cbc81
https://github.com/llvm/llvm-project/commit/12f82fbe072382bb78ab1cbdd3fbeb8ed44cbc81
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M compiler-rt/test/profile/Windows/binary-id.c
Log Message:
-----------
[compiler-rt] Fix Windows test after profile summary change (#124318)
Fix a Windows compiler-rt test that
https://github.com/llvm/llvm-project/pull/105915 broke.
Commit: 7293455cf292cfaa263ea04fc1bc2aee4ceab6a6
https://github.com/llvm/llvm-project/commit/7293455cf292cfaa263ea04fc1bc2aee4ceab6a6
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/bindings/interface/SBThreadExtensions.i
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/functionalities/location-list-lookup/TestLocationListLookup.py
M lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
M lldb/test/API/lang/objc/print-obj/TestPrintObj.py
Log Message:
-----------
[lldb] Add SBThread.selected_frame property (#123981)
Adds a `selected_frame` property to `SBThread`. The setter accepts either a frame index (like `SetSelectedFrame`), or a frame object.
Updates a few tests to make use of the new `selected_frame`. While doing so I noticed some of the usage could be cleaned up, so I did that too.
Commit: a9ad601f7c5486919d6fabc5dd3cb6e96f63ac61
https://github.com/llvm/llvm-project/commit/a9ad601f7c5486919d6fabc5dd3cb6e96f63ac61
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
Log Message:
-----------
[RISCV] Use vrsub for select of add and sub of the same operands (#123400)
If we have a (vselect c, a+b, a-b), we can combine this to a+(vselect c,
b, -b). That by itself isn't hugely profitable, but if we reverse the
select, we get a form which matches a masked vrsub.vi with zero. The
result is that we can use a masked vrsub *before* the add instead of a
masked add or sub. This doesn't change the critical path (since we
already had the pass through on the masked second op), but does reduce
register pressure since a, b, and (a+b) don't need to all be alive at
once.
In addition to the vselect form, we can also see the same pattern with a
vector_shuffle encoding the vselect. I explored canonicalizing these to
vselects instead, but that exposes several unrelated missing combines.
Commit: 544a3cb65b6b9b1455f9294d1764f47a7b8673b7
https://github.com/llvm/llvm-project/commit/544a3cb65b6b9b1455f9294d1764f47a7b8673b7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
Log Message:
-----------
[flang][cuda] Handle variable with initialization in device global pass (#124307)
Commit: d9b8120259a546ce7aa9f047566fef29479f59e8
https://github.com/llvm/llvm-project/commit/d9b8120259a546ce7aa9f047566fef29479f59e8
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/COFF/SymbolTable.cpp
M lld/test/COFF/start-lib.ll
Log Message:
-----------
[lld/COFF] Fix -start-lib / -end-lib more after reviews.llvm.org/D116434 (#124294)
This is a follow-up to #120452 in a way.
Since lld/COFF does not yet insert all defined in an obj file before all
undefineds (ELF and MachO do this, see #67445 and things linked from
there), it's possible that:
1. We add an obj file a.obj
2. a.obj contains an undefined that's in b.obj, causing b.obj to be
added
3. b.obj contains an undefined that's in a part of a.obj that's not yet
in the symbol table, causing a recursive load of a.obj, which adds the
symbols in there twice, leading to duplicate symbol errors.
For normal archives, `ArchiveFile::addMember()` has a `seen` check to
prevent this. For start-lib lazy objects, we can just check if the
archive is still lazy at the recursive call.
This bug is similar to issue #59162.
(Eventually, we'll probably want to do what the MachO and ELF ports do.)
Includes a test that caused duplicate symbol diagnostics before this
code change.
Commit: e4009ed3d68ba8d9e78721ce5afc2b3a7edd6f36
https://github.com/llvm/llvm-project/commit/e4009ed3d68ba8d9e78721ce5afc2b3a7edd6f36
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/docs/ConstantInterpreter.rst
M clang/www/OpenProjects.html
Log Message:
-----------
[clang][docs] Update bytecode interpreter docs (#124252)
Just a light update, not adding a lot of new information.
Commit: 825e712959d48f14b47e579871bcf9b5e25fff7a
https://github.com/llvm/llvm-project/commit/825e712959d48f14b47e579871bcf9b5e25fff7a
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
R clang/test/AST/HLSL/ast-dump-comment-cbuffe-tbufferr.hlsl
A clang/test/AST/HLSL/ast-dump-comment-cbuffer-tbuffer.hlsl
A clang/test/AST/HLSL/cbuffer.hlsl
A clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
R clang/test/AST/HLSL/cbuffer_tbuffer.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
Log Message:
-----------
[HLSL] cbuffer: create host layout structs (#122820)
Creates layout struct for `cbuffer` in Sema which will contains only
declarations contributing to the constant buffer layout. Anything else
will be filtered out, such as static variables decls, struct and
function definitions, resources, or empty struct and zero-sized arrays.
If the constant buffer includes a struct that contains any of the above
undesirable declarations, a new version of this struct should be created
with these declarations filtered out as well.
The definition of buffer layout struct will be added to the
HLSLBufferDecl AST node as the last node. Any layout structs for
embedded structures will be added there as well.
Fixes #122553
Commit: 3861b9db882d5637725ceeccb801c2bb837e8fc5
https://github.com/llvm/llvm-project/commit/3861b9db882d5637725ceeccb801c2bb837e8fc5
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 0cd794d4860e
Commit: ab976a17121374ae3407374b2aa6306e95863eb3
https://github.com/llvm/llvm-project/commit/ab976a17121374ae3407374b2aa6306e95863eb3
Author: Stephen Long <63318318+steplong at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
A llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
A llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-exp.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/lit.local.cfg
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
PreISelIntrinsicLowering: Lower llvm.exp/llvm.exp2 to a loop if scalable vec arg (#117568)
Commit: 83df39c649fe1b1dd556d8f2160999c65ce497eb
https://github.com/llvm/llvm-project/commit/83df39c649fe1b1dd556d8f2160999c65ce497eb
Author: junfengd-nv <junfengd at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Transforms/Utils/Inliner.cpp
A mlir/test/Transforms/inlining-recursive-2.mlir
M mlir/test/Transforms/inlining-recursive.mlir
Log Message:
-----------
[mlir][inline] Fix Issue#82401: Infinite loop in MLIR inliner for indirect recursive call. (#124026)
Commit: 3b30f20c60d020e43f5700dae68cf1080158b725
https://github.com/llvm/llvm-project/commit/3b30f20c60d020e43f5700dae68cf1080158b725
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/utc_clock.h
Log Message:
-----------
[libc++][TZDB] Fixes CI.
The commit 24e70e3930724ce499ad05d669bfbc4423c542e0 changed internal
macros which were used in 0cd794d4860e376698bb4da24bcdf8cbf331835c.
This caused build failures on platforms without TZDB support
Commit: 95d993a838863269dc1b90de3808c1e40ac6d5f2
https://github.com/llvm/llvm-project/commit/95d993a838863269dc1b90de3808c1e40ac6d5f2
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Target/LLVMIR/Import/instructions.ll
Log Message:
-----------
[MLIR] Fix import of calls with mismatched variadic types (#124286)
Previously, an indirect call was incorrectly generated when
`llvm::CallBase::getCalledFunction` returned null due to a type mismatch
between the call and the function. This patch updates the code to use
`llvm::CallBase::getCalledOperand` instead.
Commit: 1b1270f30bbdb2c7a310009d0512e167b09bac48
https://github.com/llvm/llvm-project/commit/1b1270f30bbdb2c7a310009d0512e167b09bac48
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/test/Transforms/GlobalOpt/resolve-fmv-ifunc.ll
Log Message:
-----------
[FMV][GlobalOpt] Enable static resolution of non-FMV callers. (#124314)
The undetectable FMV features predres and ls64 have been removed,
therefore the optimization is now re-enabled. The llvm testsuite
Graviton4 bots are expected to remain green.
Commit: d398c0c97aa0bfaeed5647f75bc37c87b8142f79
https://github.com/llvm/llvm-project/commit/d398c0c97aa0bfaeed5647f75bc37c87b8142f79
Author: siya100 <85541510+siya100 at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/cpio.yaml
Log Message:
-----------
[libc][cpio] Add cpio.h header. (#123798)
[libc][docs] add cpio to documentation and include related functi…
These changes ensure that the cpio header is documented properly
with respect to the issue
(https://github.com/llvm/llvm-project/issues/122006 ).
**Changes:**
1. **cpio.yaml**: Created a new YAML file for cpio with functions
and related macros.
2. **CMakeLists.txt**: Added cpio to the documentation
directories.
3. **index.rst**: Included `cpio` in the documentation index.
---------
Co-authored-by: siya <siya at Siya.com>
Commit: 074a25fb2678dacb4f3c6a24d5f907788c858e7a
https://github.com/llvm/llvm-project/commit/074a25fb2678dacb4f3c6a24d5f907788c858e7a
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
A llvm/test/MC/Disassembler/RISCV/vmask-carry-in.txt
A llvm/test/MC/RISCV/rvv/vmask-carry-in.s
Log Message:
-----------
[RISCV][MC] Create an AsmOperand for carry-in vmask (#124317)
Previously we used a fixed assembly string as well as encoding for the
carry-in vector mask, since it will always be there. However, this makes
both AsmParser and disassembler to either create a garbage MCOperand for
the mask or fail to add one as a whole. This wouldn't be a problem for
majority of the cases but tools like llvm-mca who relies on MCInst will
fail to account for the register dependency on these mask operands.
Commit: ae8b560899c00d1792fd87ec591558cd91add2ef
https://github.com/llvm/llvm-project/commit/ae8b560899c00d1792fd87ec591558cd91add2ef
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Transforms/PGOProfile/memprof_loop_unroll.ll
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
Log Message:
-----------
[MemProf] Disable hot hints by default (#124338)
By default we were marking some contexts as hot, and adding hot hints to
unambiguously hot allocations. However, there is not yet support for
cloning to expose hot allocation contexts, and none is planned for the
forseeable future.
While we convert hot contexts to notcold contexts during the cloning
step, their existence was greatly limiting the context trimming
performed when we add the MemProf profile to the IR. This change simply
disables the generation of hot contexts / hints by default, as few
allocations were unambiguously hot.
A subsequent change will address the issue when hot hints are optionally
enabled. See PR124219 for details.
This change resulted in significant overhead reductions for a large
target:
~48% reduction in the per-module ThinLTO bitcode summary sizes
~72% reduction in the distributed ThinLTO bitcode combined summary sizes
~68% reduction in thin link time
~34% reduction in thin link peak memory
Commit: ee054404dfde9913ed47d9bac5ea2be28926f5ad
https://github.com/llvm/llvm-project/commit/ee054404dfde9913ed47d9bac5ea2be28926f5ad
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-launch.fir
Log Message:
-----------
[flang][cuda] Carry over the cuf.proc_attr attribute to gpu.launch_func (#124325)
Commit: df9b31f1e0cdb8096e9d2e0749e473dd815b39f7
https://github.com/llvm/llvm-project/commit/df9b31f1e0cdb8096e9d2e0749e473dd815b39f7
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/Sema/HeuristicResolver.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
Log Message:
-----------
[clang][Sema] Handle undeduced auto types in HeuristicResolver (#124236)
Fixes https://github.com/clangd/clangd/issues/897
Commit: 73b462321c2968a450779f8f6c240f46a1830376
https://github.com/llvm/llvm-project/commit/73b462321c2968a450779f8f6c240f46a1830376
Author: Petr Hosek <phosek at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libc/include/strings.yaml
Log Message:
-----------
[libc] Include size_t type header in strings.h (#124352)
A number of functions in strings.h take size_t as an argument.
Commit: b41987beaedaa6ea78fd8dd11ba8c3b21eb8fa88
https://github.com/llvm/llvm-project/commit/b41987beaedaa6ea78fd8dd11ba8c3b21eb8fa88
Author: vporpo <vporpodas at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
Log Message:
-----------
[SandboxVec][DAG] Fix MemDGNode chain maintenance when move destination is non-mem (#124227)
This patch fixes a bug in the maintenance of the MemDGNode chain of the
DAG. Whenever we move a memory instruction, the DAG gets notified about
the move and maintains the chain of memory nodes. The bug was that if
the destination of the move was not a memory instruction, then the
memory node's next node would end up pointing to itself.
Commit: 425d25f5df4c6814e5551640b810bec53322f3df
https://github.com/llvm/llvm-project/commit/425d25f5df4c6814e5551640b810bec53322f3df
Author: Hiroshi Yamauchi <56735936+hjyamauchi at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/test/CodeGen/AArch64/stack-hazard-windows.ll
A llvm/test/CodeGen/AArch64/wincfi-missing-seh-directives.ll
Log Message:
-----------
[AArch64][WinCFI] Fix a crash due to missing seh directives (#123993)
https://github.com/llvm/llvm-project/issues/123808
Commit: 77c23fd0aa1534abe904c2d5256a6d7879dc3cf7
https://github.com/llvm/llvm-project/commit/77c23fd0aa1534abe904c2d5256a6d7879dc3cf7
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU] Update AMDGPUUsage.rst to document two intrinsics (#123816)
The AMDGPUUsage.rst file is updated to document two intrinsics:
llvm.amdgcn.mov.dpp and llvm.amdgcn.update.dpp.
Commit: 34c6c5e72f48de65a7e332033af9566576c1895d
https://github.com/llvm/llvm-project/commit/34c6c5e72f48de65a7e332033af9566576c1895d
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/PLTCall.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/exceptions-plt.cpp
A bolt/test/runtime/exceptions-plt.cpp
Log Message:
-----------
[BOLT][AArch64] Fix PLT optimization (#124192)
Preserve C++ exception metadata while running PLT optimization on
AArch64.
Commit: 4b209c5d87c8b8eb4bbf2750ea9daa5927a13699
https://github.com/llvm/llvm-project/commit/4b209c5d87c8b8eb4bbf2750ea9daa5927a13699
Author: vporpo <vporpodas at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/SandboxIR/Value.h
M llvm/lib/SandboxIR/Region.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromMetadata.cpp
M llvm/unittests/SandboxIR/PassTest.cpp
M llvm/unittests/SandboxIR/RegionTest.cpp
Log Message:
-----------
[SandboxIR][Region] Add cost modeling to the region (#124354)
This patch implements cost modeling for Region. All instructions that
are added or removed get their cost counted in the Scoreboard. This is
used for checking if the region before or after a transformation is more
profitable.
Commit: 05fd4d5775e2c40c00057d7af195290bc3a39cd3
https://github.com/llvm/llvm-project/commit/05fd4d5775e2c40c00057d7af195290bc3a39cd3
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/test/Lower/CUDA/cuda-devptr.cuf
Log Message:
-----------
[flang][cuda] Perform inlined assignment when field is c_devptr (#124322)
When a field in a derived type is `c_devptr`, keep check if we can do a
memcpy instead of falling back to the runtime assignment.
Many internal CUDA Fortran derived type have a `c_devptr` field and this
would lead to stack overflow on the device if the assignment is
performed by the runtime function.
Commit: cff7ad56babc2e8e7c731b3f60d3c0b4c8aca96f
https://github.com/llvm/llvm-project/commit/cff7ad56babc2e8e7c731b3f60d3c0b4c8aca96f
Author: vporpo <vporpodas at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Utils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
Log Message:
-----------
[SandboxVec][Utils] Implement Utils::verifyFunction() (#124356)
This patch implements a wrapper function for the LLVM IR verifier for
functions, and calls it (flag-guarded) within the bottom-up-vectorizer
for finding IR bugs as soon as they happen.
Commit: d910fbcbd10c5e72d0771dd9607e7133ae51dc70
https://github.com/llvm/llvm-project/commit/d910fbcbd10c5e72d0771dd9607e7133ae51dc70
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[RISCV][NFC] cR Constraint Release Note
Commit: ac75d322801411f496fe5d1155c86453f915ae98
https://github.com/llvm/llvm-project/commit/ac75d322801411f496fe5d1155c86453f915ae98
Author: vporpo <vporpodas at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/cross_bbs.ll
M llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][VecUtils] Filter out instructions not in BB in VecUtils:getLowest() (#124360)
This patch changes the functionality of `VecUtils::getLowest(Vals, BB)`
such that it filters out any instructions in `Vals` that are not in BB.
This is useful when Vals contains instructions from different BBs,
because in that case we are only interested in one BB.
Commit: 4df9c17e5f436702ca4f5439322972b0385d629a
https://github.com/llvm/llvm-project/commit/4df9c17e5f436702ca4f5439322972b0385d629a
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/result_of.h
M libcxx/test/libcxx/ranges/no_specializations.verify.cpp
M libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
Log Message:
-----------
[libc++] Fix tests for clang::no_specializations for C++17 and C++20
Commit: e2005d1461942539f7533a518aa78017074f6bf9
https://github.com/llvm/llvm-project/commit/e2005d1461942539f7533a518aa78017074f6bf9
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/bindings/interface/SBSaveCoreOptionsDocstrings.i
Log Message:
-----------
[LLDB] Reapply #123873 SBSaveCore Docstrings (#124355)
In my last attempt at this (#123873), I didn't realize we needed semi
colons! Also fixed the bug that the feature summary didn't have a type
defined.
CC @JDevlieghere hope you get a laugh at needing to revert doc strings
for breaking the build....
Commit: 241e5d8c5c424155e02e05524e8f731fc524aa40
https://github.com/llvm/llvm-project/commit/241e5d8c5c424155e02e05524e8f731fc524aa40
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmpx_eq_f16 (#124038)
True16 format for v_cmpx_eq_f16.
Also cleaned up some stray gfx11 check line in gfx12 dasm test
Commit: d789915f35a976bb532441915249cd1b165c2fd5
https://github.com/llvm/llvm-project/commit/d789915f35a976bb532441915249cd1b165c2fd5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Bump Runner Version in Containers (#124324)
This patch bumps the runner version to v2.322.0 in the CI containers.
Nothing looks suspicious in the change log, and it is important to keep
the runner up to date or we will end up with containers that cannot
connect to Github due to having a version too old.
Commit: 280c7d719834a828895b8a39f8ea982527fdcc73
https://github.com/llvm/llvm-project/commit/280c7d719834a828895b8a39f8ea982527fdcc73
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
M .ci/monolithic-windows.sh
Log Message:
-----------
[CI] Increase Configurability of Monolithic Windows Build (#124328)
This patch makes it so that the caller of monolithic-windows.sh can set
the maximum number of parallel compile/link jobs in an environment
variable rather than manually specifying it inside of the CMake.
Additionally, the env variable definitions for CC, CXX, and LD are sunk
into the shell script due to those config options being pretty inherent
to what the pipeline is testing.
This is intended to make things more flexible/useable for the new
premerge CI pipeline, particularly as we are looking at using larger
runners and want the increased flexibility to experiment.
Commit: 6409799bdcd86be3ed72e8d172181294d3e5ad09
https://github.com/llvm/llvm-project/commit/6409799bdcd86be3ed72e8d172181294d3e5ad09
Author: vporpo <vporpodas at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Pack from different BBs (#124363)
When the inputs of the pack come from different BBs we need to make sure
we emit the pack instructions at the correct place.
Commit: 48657bf29b01e95749b5ecd8c7f675c14a7948d1
https://github.com/llvm/llvm-project/commit/48657bf29b01e95749b5ecd8c7f675c14a7948d1
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/include/flang/Runtime/CUDA/kernel.h
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/runtime/CUDA/kernel.cpp
M flang/test/Fir/CUDA/cuda-gpu-launch-func.mlir
Log Message:
-----------
[flang][cuda] Handle launch of cooperative kernel (#124362)
Add `CUFLaunchCooperativeKernel` entry points and lower gpu.launch_func
with grid_global attribute to this entry point.
Commit: c725a95e088dea14953c2d891d04429bc50b912e
https://github.com/llvm/llvm-project/commit/c725a95e088dea14953c2d891d04429bc50b912e
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
Log Message:
-----------
[MemProf] Convert Hot contexts to NotCold early (#124219)
While we convert hot contexts to notcold contexts during the cloning
step, their existence was greatly limiting the context trimming
performed when we add the MemProf profile to the IR. To address this,
any hot contexts are converted to notcold contexts immediately after
first checking for unambiguous allocation types, and before checking it
again and before adding metadata while performing context trimming.
Note that hot hints are now disabled by default, however, this avoids
adding unnecessary overhead if they are re-enabled.
Commit: db1ee18eda6329d7577ad019a47822220b3e293d
https://github.com/llvm/llvm-project/commit/db1ee18eda6329d7577ad019a47822220b3e293d
Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
NFC: Typo fix
Change-Id: I08470bc617490558250136ea35a4964003fa9981
Commit: 1b4bd4e1a5120c8bb4daa44787a3bc4559b6b3b4
https://github.com/llvm/llvm-project/commit/1b4bd4e1a5120c8bb4daa44787a3bc4559b6b3b4
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
A bolt/test/AArch64/jump-table-heuristic-fail.s
M bolt/test/AArch64/test-indirect-branch.s
Log Message:
-----------
[BOLT][AArch64] Remove assertions from jump table heuristic (#124372)
The code for jump table detection on AArch64 asserts liberally whenever
the input instruction sequence does not match the expected pattern. As a
result, BOLT fails to process binaries with such sequences instead of
ignoring functions with unknown control flow.
Remove asserts in analyzeIndirectBranchFragment() and mark indirect
jumps as instructions with unknown control flow instead.
Commit: d92bac8a3ebb19106f6bca6b7613a27c52cb48ab
https://github.com/llvm/llvm-project/commit/d92bac8a3ebb19106f6bca6b7613a27c52cb48ab
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Basic/AddressSpaces.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Sema/SemaHLSL.cpp
R clang/test/AST/HLSL/ast-dump-comment-cbuffer-tbuffer.hlsl
A clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer.hlsl
M clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
M clang/test/CodeGenHLSL/cbuf.hlsl
M clang/test/CodeGenHLSL/cbuf_in_namespace.hlsl
M clang/test/CodeGenHLSL/static_global_and_function_in_cb.hlsl
M clang/test/SemaTemplate/address_space-dependent.cpp
Log Message:
-----------
[HLSL] Introduce address space `hlsl_constant(2)` for constant buffer declarations (#123411)
Introduces a new address space `hlsl_constant(2)` for constant buffer
declarations.
This address space is applied to declarations inside `cbuffer` block.
Later on, it will also be applied to `ConstantBuffer<T>` syntax and the
default `$Globals` constant buffer.
Clang codegen translates constant buffer declarations to global
variables and loads from `hlsl_constant(2)` address space. More work
coming soon will include addition of metadata that will map these
globals to individual constant buffers and enable their transformation
to appropriate constant buffer load intrinsics later on in an LLVM pass.
Fixes #123406
Commit: 07ed8187acc31ac3f4779da452864a29d48799ac
https://github.com/llvm/llvm-project/commit/07ed8187acc31ac3f4779da452864a29d48799ac
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/OpenMP/assumes_include_nvptx.cpp
M clang/test/OpenMP/nvptx_target_firstprivate_codegen.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/test/Transforms/OpenMP/always_inline_device.ll
M llvm/test/Transforms/OpenMP/attributor_module_slice_reproducer.ll
M llvm/test/Transforms/OpenMP/barrier_removal.ll
M llvm/test/Transforms/OpenMP/bug66687.ll
M llvm/test/Transforms/OpenMP/custom_state_machines.ll
M llvm/test/Transforms/OpenMP/custom_state_machines_pre_lto.ll
M llvm/test/Transforms/OpenMP/custom_state_machines_remarks.ll
M llvm/test/Transforms/OpenMP/deduplication_target.ll
M llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll
M llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold_optnone.ll
M llvm/test/Transforms/OpenMP/global_constructor.ll
M llvm/test/Transforms/OpenMP/globalization_remarks.ll
M llvm/test/Transforms/OpenMP/gpu_kernel_detection_remarks.ll
M llvm/test/Transforms/OpenMP/gpu_state_machine_function_ptr_replacement.ll
M llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
M llvm/test/Transforms/OpenMP/nested_parallelism.ll
M llvm/test/Transforms/OpenMP/parallel_level_fold.ll
M llvm/test/Transforms/OpenMP/remove_globalization.ll
M llvm/test/Transforms/OpenMP/replace_globalization.ll
M llvm/test/Transforms/OpenMP/single_threaded_execution.ll
M llvm/test/Transforms/OpenMP/spmdization.ll
M llvm/test/Transforms/OpenMP/spmdization_assumes.ll
M llvm/test/Transforms/OpenMP/spmdization_constant_prop.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding_two_reaching_kernels.ll
M llvm/test/Transforms/OpenMP/spmdization_indirect.ll
M llvm/test/Transforms/OpenMP/spmdization_no_guarding_two_reaching_kernels.ll
M llvm/test/Transforms/OpenMP/spmdization_remarks.ll
M llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
Log Message:
-----------
[OpenMP] Replace nvvm.annotation usage with kernel calling conventions (#122320)
Specifying a kernel with the `ptx_kernel` or `amdgpu_kernel` calling
convention is a more idiomatic and compile-time performant than using
the `nvvm.annoation !"kernel"` metadata.
Transition OMPIRBuilder to use calling conventions for PTX kernels and
no longer emit `nvvm.annoation`. Update OpenMPOpt to work with kernels
specified via calling convention as well as metadata. Update OpenMP
tests to use the calling conventions.
Commit: 4ea44eb1e292369b0b3f2f8ad4680081558f1e01
https://github.com/llvm/llvm-project/commit/4ea44eb1e292369b0b3f2f8ad4680081558f1e01
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/test/Driver/wasm-toolchain.c
Log Message:
-----------
[WebAssembly] Fix EH feature flags when compiling multiple files (#124374)
#124042 caused a problem that when invoking `clang` with multiple files,
the static `HasRun` variables were set when processing the first file so
the appropriate feature flags were not added from the second file. This
fixes the problem by making those `HasRun` variables just normal
variables within the enclosing function.
Commit: 8e31050bc2e02d7a3c654def7d7af899ce1cdb1d
https://github.com/llvm/llvm-project/commit/8e31050bc2e02d7a3c654def7d7af899ce1cdb1d
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in annotating overloaded co_await decl (#124240)
Fixes #124223.
Commit: 3b35b4c7f9141c59fbac415e335489494b7d507e
https://github.com/llvm/llvm-project/commit/3b35b4c7f9141c59fbac415e335489494b7d507e
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/BuiltinDialectBytecode.td
M mlir/include/mlir/IR/Location.h
M mlir/lib/IR/Location.cpp
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[mlir] Allow fallback from file line col range to loc (#124321)
This was discussed during the original review but I made it stricter
than discussed. Making it a pure view but adding a helper for bytecode
serialization (I could avoid the helper, but it ends up with more logic
and stronger coupling).
Commit: ac1ba1f9dd7013852cd27f514467f57ee0e6ed16
https://github.com/llvm/llvm-project/commit/ac1ba1f9dd7013852cd27f514467f57ee0e6ed16
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
Log Message:
-----------
[CodeGen] Introduce a VirtRegOrUnit class to hold virtual reg or physical reg unit. NFC (#123768)
LiveIntervals and MachineVerifier were previously using Register to
store this, but reg units are different than physical registers. One
important difference is that 0 is a valid reg unit number, but it is not
a valid phyiscal register.
This patch introduces a new VirtRegOrUnit class that is distinct from
Register. It can be be converted to/from a virtual Register or a
MCRegUnit. I've made all conversions explicit and used assertions to
check the validity.
I also fixed a place in MachineVerifier that was ignoring reg unit 0.
Commit: 8a6b44bf4cfe5df3db687a6b9519e99dbce8cf54
https://github.com/llvm/llvm-project/commit/8a6b44bf4cfe5df3db687a6b9519e99dbce8cf54
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/result_of.h
M libcxx/test/libcxx/ranges/no_specializations.verify.cpp
M libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
Log Message:
-----------
Revert "[libc++] Fix tests for clang::no_specializations for C++17 and C++20"
This reverts commit 4df9c17e5f436702ca4f5439322972b0385d629a.
Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/24/builds/4598/steps/10/logs/stdio)
Commit: 1f26ac10ca1bef40a80be8f81a6f109713bc586f
https://github.com/llvm/llvm-project/commit/1f26ac10ca1bef40a80be8f81a6f109713bc586f
Author: mconst <mconst at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/test/CodeGen/X86/huge-stack-offset.ll
M llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
Log Message:
-----------
[X86] Better handling of impossibly large stack frames (#124217)
If you try to create a stack frame of 4 GiB or larger with a 32-bit
stack pointer, we currently emit invalid instructions like `mov eax,
5000000000` (unless you specify `-fstack-clash-protection`, in which
case we emit a trap instead).
The trap seems nicer, so let's do that in all cases. This avoids
emitting invalid instructions, and also fixes the "can't have 32-bit
16GB stack frame" assertion in `X86FrameLowering::emitSPUpdate()` (which
used to be triggerable by user code, but is now correct).
This was originally part of #124041.
@phoebewang
Commit: f607e3fd23ef0019b2f3b289b4d46012400b8db5
https://github.com/llvm/llvm-project/commit/f607e3fd23ef0019b2f3b289b4d46012400b8db5
Author: Valentyn Yukhymenko <valentin.yukhymenko at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/fixed-expansion.cpp
M clang/test/SemaCXX/alias-template.cpp
Log Message:
-----------
[Clang][Sema] Reject declaring an alias template with the same name as its template parameter. (#123533)
The issue occurred because the template parameter scope was skipped
too early, before diagnosing the alias name shadowing.
To fix this, the patch moves it to after LookupName, such that the behavior
remains consistent with the typedef implementation.
Fixes llvm#123423
Commit: c216081e981ea14536024b86df79ddee9fe517e0
https://github.com/llvm/llvm-project/commit/c216081e981ea14536024b86df79ddee9fe517e0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/AST/DeclTemplate.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124388)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect P to be nonnull.
Commit: 186d6546d9c5898a0a32f4616558021d9a908786
https://github.com/llvm/llvm-project/commit/186d6546d9c5898a0a32f4616558021d9a908786
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/Index/FileIndexRecord.cpp
Log Message:
-----------
[Index] Migrate away from PointerUnion::dyn_cast (NFC) (#124389)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect DclInfo.DeclOrMacro to be nonnull.
Commit: 62bd217b5a1cf6b231b2413b5522533986d4e5df
https://github.com/llvm/llvm-project/commit/62bd217b5a1cf6b231b2413b5522533986d4e5df
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaCodeComplete.cpp
Log Message:
-----------
[Sema] Migrate away from PointerUnion::dyn_cast (NFC) (#124391)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect DeclOrIterator to be nonnull.
Commit: 0cc74a8941884d56a4718c28cc5b8ef8dbe17047
https://github.com/llvm/llvm-project/commit/0cc74a8941884d56a4718c28cc5b8ef8dbe17047
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/ModuloSchedule.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#124392)
Commit: 72918fd11dd805b578bbc9c4f36bea3bc96f37b5
https://github.com/llvm/llvm-project/commit/72918fd11dd805b578bbc9c4f36bea3bc96f37b5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
Log Message:
-----------
[GlobalISel] Avoid repeated hash lookups (NFC) (#124393)
Commit: 84d4037488f5b366e76be4fe723e0de7aeee264d
https://github.com/llvm/llvm-project/commit/84d4037488f5b366e76be4fe723e0de7aeee264d
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/result_of.h
M libcxx/test/libcxx/ranges/no_specializations.verify.cpp
M libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
Log Message:
-----------
Reapply "[libc++] Fix tests for clang::no_specializations for C++17 and C++20"
The missing diagnostic pragmas have been added.
This reverts commit 8a6b44bf4cfe5df3db687a6b9519e99dbce8cf54.
Commit: 7974f12b1e3682514bd58b35c5a784f35938fa04
https://github.com/llvm/llvm-project/commit/7974f12b1e3682514bd58b35c5a784f35938fa04
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[HLSL] Suppress a warning in #122820 [-Wunused-but-set-variable]
Commit: 2696e4fb9567d23ce065a067e7f4909b310daf50
https://github.com/llvm/llvm-project/commit/2696e4fb9567d23ce065a067e7f4909b310daf50
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/conjunction.h
Log Message:
-----------
[libc++] Reduce std::conjunction overhead (#124259)
The old and new implementation of `_And` are very close in terms of
performance according to my testing, but the new implementation can also
be used to implement `conjunction`, which make that ~50% faster.
Commit: 52bffdf9f5bb72eb86249a012d08a40c90316dfb
https://github.com/llvm/llvm-project/commit/52bffdf9f5bb72eb86249a012d08a40c90316dfb
Author: David Green <david.green at arm.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
A llvm/test/Transforms/FunctionSpecialization/solver-constant-strictfpmetadata.ll
Log Message:
-----------
[IPSCCP][FuncSpec] Protect against metadata access from call args. (#124284)
Fixes an issue reported from #114964, where metadata arguments were
attempted to be accessed as constants.
Commit: 1a53d4baeb0242e00c494fd0a2b2ce58bcbf28b6
https://github.com/llvm/llvm-project/commit/1a53d4baeb0242e00c494fd0a2b2ce58bcbf28b6
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/CMakeLists.txt
M clang/tools/driver/CMakeLists.txt
M clang/utils/perf-training/CMakeLists.txt
M clang/utils/perf-training/perf-helper.py
Log Message:
-----------
[clang][cmake] Apply bolt optimizations as part of the clang target (#119896)
This change removes the need to call the clang-bolt target in order to
apply bolt optimizations to clang. Now running `ninja clang` will build
a clang with bolt optimizations, and `ninja check-clang` and `ninja
install-clang` will test and install bolt optimized clang too.
The clang-bolt target has been kept for compatibilty reasons, but it is
now just an alias to the clang target.
Also, this new design for applying the bolt optimizations to clang will
be easier to generalize and use to optimize other binaries/libraries in
the project.
---------
Co-authored-by: Amir Ayupov <fads93 at gmail.com>
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: de5ff8ad07ae824b86c5cefcba63f4b66607b759
https://github.com/llvm/llvm-project/commit/de5ff8ad07ae824b86c5cefcba63f4b66607b759
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/docs/TestingLibcxx.rst
M libcxx/test/std/input.output/iostream.format/print.fun/includes.compile.pass.cpp
M libcxx/test/std/input.output/iostream.format/print.fun/no_file_description.pass.cpp
M libcxx/test/std/localization/locale.stdcvt/depr.verify.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.buffer/depr.verify.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/depr.verify.cpp
M libcxx/test/std/strings/basic.string/string.capacity/reserve.deprecated_in_cxx20.verify.cpp
M libcxx/utils/libcxx/test/params.py
Log Message:
-----------
[libc++][test] Improves C++ Standard filtering. (#89499)
Adds a new lit directive to improve C++ Standard filtering. This is
based on the
[Discourse](https://discourse.llvm.org/t/rfc-improving-c-standard-filtering-in-the-lit-tests/78474)
discussion.
Commit: 6383a12e3b4339fa4743bb97da4d51dea6d2e2ea
https://github.com/llvm/llvm-project/commit/6383a12e3b4339fa4743bb97da4d51dea6d2e2ea
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
Log Message:
-----------
[VPlan] Refactor HCFG builder to preserve original vector latch (NFC).
Update HCFG builder to preserve the original latch block of the initial
VPlan, ensuring there is always a latch.
It also skips creating the BranchOnCond for the latch of the top-level
loop, instead of removing it later. Exiting via the latch is controlled
by later recipes.
This further unifies HCFG construction and prepares for use to also
build an initial VPlan (VPlan0) for inner loops.
Commit: 9325a61aa0960595c22867799ebd157c8160fd86
https://github.com/llvm/llvm-project/commit/9325a61aa0960595c22867799ebd157c8160fd86
Author: James Y Knight <jyknight at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
Log Message:
-----------
Revert "[GlobalMerge][NFC] Skip sorting by profitability when it is not needed" (#124411)
Reverts llvm/llvm-project#124146 -- new comparator is not a strict-weak
as required by stable_sort.
Co-authored-by: Michael Maitland <michaeltmaitland at gmail.com>
Commit: 21f04b1458c52ba875a23b58b02cf6b1f8db0661
https://github.com/llvm/llvm-project/commit/21f04b1458c52ba875a23b58b02cf6b1f8db0661
Author: Adam Paszke <adam.paszke at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M mlir/lib/Interfaces/SideEffectInterfaces.cpp
Log Message:
-----------
Hold a queue of iterator ranges (not operations) in wouldOpBeTriviallyDead (#123642)
Ranges let us push the whole blocks onto the queue in constant time. If
one of the first ops in the block is side-effecting we'll be able to
provide the answer quickly. The previous implementation had to walk the
block and queue all the operations only to start traversing them again,
which was a considerable slowdown for compile times of large MLIR
programs in our benchmarks.
---------
Co-authored-by: Jacques Pienaar <jpienaar at google.com>
Commit: 5cb2db3b51c2a9d516d57bd2f07d9899bd5fdae7
https://github.com/llvm/llvm-project/commit/5cb2db3b51c2a9d516d57bd2f07d9899bd5fdae7
Author: vporpo <vporpodas at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Forbid crossing BBs (#124369)
This patch updates the scheduler to forbid scheduling across BBs. It
should eventually be able to handle this, but we disable it for now.
Commit: 485b1ac8a265dcf19c55a98aeefff95158cc63a2
https://github.com/llvm/llvm-project/commit/485b1ac8a265dcf19c55a98aeefff95158cc63a2
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/docs/SandboxIR.md
Log Message:
-----------
[SandboxIR][Docs] C++ highlighting for code block
Commit: 14b44179cb61dd551c911dea54de57b588621005
https://github.com/llvm/llvm-project/commit/14b44179cb61dd551c911dea54de57b588621005
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/include/__format/buffer.h
M libcxx/include/__format/format_functions.h
M libcxx/include/module.modulemap
M libcxx/test/std/utilities/format/format.functions/format_tests.h
Log Message:
-----------
[libc++][format][3/3] Improves formatting performance. (#108990)
This changes the __output_buffer to a new structure. This improves the
performace of std::format, std::format_to, std::format_to_n, and
std::formatted_size.
Commit: 8b6211472793680994f7bc15abb5910d0a916cc5
https://github.com/llvm/llvm-project/commit/8b6211472793680994f7bc15abb5910d0a916cc5
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/macosx/universal/TestUniversal.py
Log Message:
-----------
[lldb] Delete unused lldbutil.print_registers (NFC)
Commit: b178c2d63e0701655046dfd2ead195b36e0df397
https://github.com/llvm/llvm-project/commit/b178c2d63e0701655046dfd2ead195b36e0df397
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
Log Message:
-----------
[SandboxVec][DAG] Fix trim schedule
Fix trimSchedule by skipping instructions without a DAG Node.
Commit: aba0476f23fc2a851792e9d85c25ee34a5ea7ed0
https://github.com/llvm/llvm-project/commit/aba0476f23fc2a851792e9d85c25ee34a5ea7ed0
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/atomic/TestLibCxxAtomic.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/initializerlist/TestInitializerList.py
Log Message:
-----------
[lldb] Delete lldbutil.PrintableRegex (NFC)
Use of this class wasn't making use of the original regex string. Note that `re.Pattern`
has a `pattern` property to access the original regex.
Commit: def50f701f6a2c1e0550bb341fd8b64bed299e72
https://github.com/llvm/llvm-project/commit/def50f701f6a2c1e0550bb341fd8b64bed299e72
Author: Hui <hui.xie1990 at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__flat_map/flat_map.h
A libcxx/include/__flat_map/flat_multimap.h
A libcxx/include/__flat_map/sorted_equivalent.h
A libcxx/include/__flat_map/utils.h
M libcxx/include/__functional/is_transparent.h
M libcxx/include/flat_map
M libcxx/include/module.modulemap
M libcxx/include/version
M libcxx/modules/std/flat_map.inc
A libcxx/test/libcxx/containers/container.adaptors/flat.map/assert.input_range.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.map/assert.sorted_unique.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.multimap/assert.input_range.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.multimap/assert.sorted_equivalent.pass.cpp
R libcxx/test/libcxx/containers/containers.adaptors/flat.map/assert.input_range.pass.cpp
R libcxx/test/libcxx/containers/containers.adaptors/flat.map/assert.sorted_unique.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.map.syn/sorted_equivalent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/empty.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/empty.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.compile.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.verify.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/default_noexcept.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/dtor_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/empty.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/empty.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/size.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/assign_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/compare.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/containers.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.addressof.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct_pmr.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/dtor_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_clears.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_exceptions.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/pmr.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_container.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.erasure/erase_if.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.erasure/erase_if_exceptions.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator_comparison.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator_concept_conformance.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/range_concept_conformance.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/reverse_iterator.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/clear.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/emplace.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/emplace_hint.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/extract.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_cv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_cv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_rv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_rv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_sorted_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_sorted_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/replace.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_exception.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_free.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_member.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/comp.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/keys_values.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/contains.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/contains_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/count.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/count_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/equal_range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/equal_range_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/find.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/find_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/lower_bound.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/lower_bound_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/upper_bound.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/upper_bound_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/helpers.h
A libcxx/test/std/containers/container.adaptors/flat.multimap/incomplete_type.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/op_compare.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/types.compile.pass.cpp
A libcxx/test/std/language.support/support.limits/support.limits.general/flat_map.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] implement `std::flat_multimap` (#113835)
fixes https://github.com/llvm/llvm-project/issues/105190
---------
Co-authored-by: Hui Xie <huixie at Mac.broadband>
Co-authored-by: Hui Xie <huixie at Huis-MacBook-Pro.local>
Commit: d578d0bb135ca337b14aabe6696fe5b0a0932932
https://github.com/llvm/llvm-project/commit/d578d0bb135ca337b14aabe6696fe5b0a0932932
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port def50f701f6a
Commit: 2655ae54db6d7e9276a5ef4208cbeff1ae2ee72c
https://github.com/llvm/llvm-project/commit/2655ae54db6d7e9276a5ef4208cbeff1ae2ee72c
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M mlir/examples/toy/Ch4/mlir/Dialect.cpp
M mlir/examples/toy/Ch5/mlir/Dialect.cpp
M mlir/examples/toy/Ch6/mlir/Dialect.cpp
M mlir/examples/toy/Ch7/mlir/Dialect.cpp
Log Message:
-----------
[mlir] Fix deprecated pointer union casts in toy example (#124422)
Commit: 4bcd8184a093d2d9f0aad1053dbb1367891da6a5
https://github.com/llvm/llvm-project/commit/4bcd8184a093d2d9f0aad1053dbb1367891da6a5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[TargetLowering] Pull similar code out of the forceExpandWideMUL into a helper. NFC (#124371)
These functions have similar code. One of them calculates the 2x width
full product from 2 sources. The other calculates the product from 2
sources that have low and high halves.
This patch introduces a new function that takes HiLHS and HiRHS as
optional values. If they are not null, they will be used in the
calculation of the Hi half. The Signed flag can only be set when
HiLHS/HiRHS are null.
Commit: 5e65f430414dd9df79ca6a1056b4943110ebc14b
https://github.com/llvm/llvm-project/commit/5e65f430414dd9df79ca6a1056b4943110ebc14b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/extracts-non-extendable.ll
Log Message:
-----------
[SLP][NFC]Add a test, producing serie of extrtactelements, building non-extendable tree
Commit: e5b0132d157ad4c9a502dc8c4a61a3a3c83646c2
https://github.com/llvm/llvm-project/commit/e5b0132d157ad4c9a502dc8c4a61a3a3c83646c2
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
Log Message:
-----------
SCEV: add samesign tests for exit-limit computation (#124304)
As the tests demonstrate, computeExitLimitFromICmp needs no additional
changes to compute exit limits from an icmp with samesign.
Commit: 89f2fee9f80658650524ba4fc12f01409e45000e
https://github.com/llvm/llvm-project/commit/89f2fee9f80658650524ba4fc12f01409e45000e
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/fsh.ll
Log Message:
-----------
[InstCombine] Add test for incorrect retention of Range attribute in fshl
Commit: 77c325b646301e394bcd89c2980b4c2da8af49cd
https://github.com/llvm/llvm-project/commit/77c325b646301e394bcd89c2980b4c2da8af49cd
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/COFF/DLL.cpp
M lld/test/COFF/arm64ec-import.test
Log Message:
-----------
[LLD][COFF] Keep hasData true in NullChunk constructor (#124368)
`NullChunk` instances do write data, even if it's always zero. Setting
`hasData` to false causes `Writer::assignAddresses` to ignore them
when calculating `rawSize`. This typically isn't an issue, as null chunks
are usually positioned within a section, and later chunks adjust the
size accordingly.
However, on ARM64EC, the auxiliary IAT is placed at the end of the
`.rdata` section and terminates with a null chunk. As a result, `rawSize`
is never updated to account for it, and space for the null chunk is not
allocated. Consequently, when `NullChunk::writeTo` is called, it receives
an invalid pointer - either pointing to the next section or beyond the
allocated buffer.
Commit: 2131115be5b9d8b39af80973d9b64c0adc41d38d
https://github.com/llvm/llvm-project/commit/2131115be5b9d8b39af80973d9b64c0adc41d38d
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/fsh.ll
Log Message:
-----------
[InstCombine] Drop Range attribute when simplifying 'fshl' based on demanded bits (#124429)
When simplifying operands based on demanded bits, the return value range
of llvm.fshl might change. Keeping the Range attribute might cause
llvm.fshl to generate a poison and lead to miscompile. Drop the Range
attribute similar to `dropPosonGeneratingFlags` elsewhere.
Fix #124387
Commit: 1395cd015f2edf26f8c2567870183d63f4fdd753
https://github.com/llvm/llvm-project/commit/1395cd015f2edf26f8c2567870183d63f4fdd753
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
Log Message:
-----------
[VPlan] Support multi-exit loops in HCFG builder.
Update HCFG construction to support multi-exit loops. If there is no
unique exit block, map the middle block of the initial plan to the exit
block from the latch.
This further unifies HCFG construction and prepares for use to also
build an initial VPlan (VPlan0) for inner loops.
Effectively NFC as this isn't used on the default code path yet.
Commit: 563c7c5539f05e7f8cbb42565c1f24466019f38b
https://github.com/llvm/llvm-project/commit/563c7c5539f05e7f8cbb42565c1f24466019f38b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/APINotes/APINotesManager.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/Frontend/SerializedDiagnosticPrinter.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/tools/libclang/CIndexDiagnostic.cpp
Log Message:
-----------
[clang] Migrate away from PointerUnion::dyn_cast (NFC) (#124425)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
This patch migrates uses of PointerUnion::dyn_cast to
dyn_cast_if_present (see the definition of PointerUnion::dyn_cast).
Note that we cannot use dyn_cast in any of the migrations in this
patch; placing
assert(!X.isNull());
just before any of dyn_cast_if_present in this patch triggers some
failure in check-clang.
Commit: 04d5608057f73cf8deb66ddaeddf2f9254fd864b
https://github.com/llvm/llvm-project/commit/04d5608057f73cf8deb66ddaeddf2f9254fd864b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/AST/DeclTemplate.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124430)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect P to be nonnull.
Commit: 19a6ac18ef3e92017db49668ee365e694157f317
https://github.com/llvm/llvm-project/commit/19a6ac18ef3e92017db49668ee365e694157f317
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/EhFrame.cpp
M lld/test/ELF/invalid-eh-frame2.s
M lld/test/ELF/invalid-eh-frame4.s
M lld/test/ELF/invalid-eh-frame6.s
Log Message:
-----------
[ELF] EhFrame: replace failOn with errOn
These diagnostics are mostly reported by a thread during writeSections.
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1.
Commit: 0f3c2884f3ccbdbe396e4388feb8be716b50dd68
https://github.com/llvm/llvm-project/commit/0f3c2884f3ccbdbe396e4388feb8be716b50dd68
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/AST/ParentMapContext.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124433)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect U to be nonnull.
Commit: d2c7cabe0453d6a6d03c15b7ae1800b53de9e182
https://github.com/llvm/llvm-project/commit/d2c7cabe0453d6a6d03c15b7ae1800b53de9e182
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/Sema/JumpDiagnostics.cpp
Log Message:
-----------
[Sema] Migrate away from PointerUnion::dyn_cast (NFC) (#124434)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect EWC->getObject(i) to be nonnull.
Commit: 4f480481716553aa89142131f49e53e7d53c1998
https://github.com/llvm/llvm-project/commit/4f480481716553aa89142131f49e53e7d53c1998
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/test/ELF/invalid/merge-invalid-size.s
M lld/test/ELF/invalid/merge-writable.s
Log Message:
-----------
[ELF] SHF_MERGE: avoid Fatal
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1.
Commit: c7579bfba5969377f7fb4239cc05d6cd4a077957
https://github.com/llvm/llvm-project/commit/c7579bfba5969377f7fb4239cc05d6cd4a077957
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/Writer.cpp
M lld/test/ELF/stdout.s
Log Message:
-----------
[ELF] -o -: suppress output if disableOutput
So that LLD_IN_TEST=2 ld.lld -o - a.o only writes the output once.
Commit: 7db789b5702714ffb6c96ad53c3136ca0a4300b2
https://github.com/llvm/llvm-project/commit/7db789b5702714ffb6c96ad53c3136ca0a4300b2
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/test/ELF/compressed-input-err.s
M lld/test/ELF/invalid/section-alignment.test
M lld/test/ELF/invalid/section-alignment2.s
Log Message:
-----------
[ELF] Replace a few Fatal with Err
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1. Change a few Fatal to
recoverable Err.
Commit: 6b87f01aaaa9d7c6eef8b66e48f13eb8492c7503
https://github.com/llvm/llvm-project/commit/6b87f01aaaa9d7c6eef8b66e48f13eb8492c7503
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/InputSection.cpp
R lld/test/ELF/merge-string-error.s
M lld/test/ELF/mergeable-errors.s
M lld/test/ELF/relocation-past-merge-end.s
Log Message:
-----------
[ELF] MergeInputSection: replace Fatal with Err
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1. Change a few Fatal to
recoverable Err.
Commit: a9e92beb253d4bbd7636d99f100940534f3a7f36
https://github.com/llvm/llvm-project/commit/a9e92beb253d4bbd7636d99f100940534f3a7f36
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/Driver.cpp
Log Message:
-----------
[ELF] openAuxiliaryFile: open /dev/null if disableOutput and filename is "-"
So that LLD_IN_TEST=2 ld.lld --print-archive-stats=- a.o (and -Map -)
only writes the output once.
Commit: b7195e8e040d57bbf502f34ec84d71bd123f85b8
https://github.com/llvm/llvm-project/commit/b7195e8e040d57bbf502f34ec84d71bd123f85b8
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/test/ELF/basic.s
M lld/test/ELF/stdout.s
Log Message:
-----------
[ELF,test] Add env LLD_IN_TEST=1 to make some tests work if RUN_LLD_MAIN_TWICE
Commit: f21c35d54f8f7af9d0c64b566cabbc4f796a54df
https://github.com/llvm/llvm-project/commit/f21c35d54f8f7af9d0c64b566cabbc4f796a54df
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/Relocations.cpp
M lld/test/ELF/invalid/section-index.test
M lld/test/ELF/invalid/symbol-name.test
Log Message:
-----------
[ELF] Replace some Fatal with Err
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1. Change a few Fatal to
recoverable Err.
Commit: 988978f964fb84cb99c83e6cd260dcc395afb6c2
https://github.com/llvm/llvm-project/commit/988978f964fb84cb99c83e6cd260dcc395afb6c2
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/test/ELF/invalid/bad-reloc-target.test
M lld/test/ELF/lto/cache-warnings.ll
M lld/test/ELF/lto/ltopasses-custom.ll
M lld/test/ELF/lto/verify-invalid.ll
Log Message:
-----------
[ELF,test] Add env LLD_IN_TEST=1 to make some tests work if RUN_LLD_MAIN_TWICE
Commit: f359c1f524bf826eba355b8863a870450eb747b0
https://github.com/llvm/llvm-project/commit/f359c1f524bf826eba355b8863a870450eb747b0
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/Common/ErrorHandler.cpp
Log Message:
-----------
[ELF] Disable error handling script if disableOutput
Fix ELF/error-handling-script-linux.test when LLD_IN_TEST=2 is set.
Commit: 18335f4800ae5491a11e74a574969d716acddce7
https://github.com/llvm/llvm-project/commit/18335f4800ae5491a11e74a574969d716acddce7
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/Driver.cpp
Log Message:
-----------
[ELF] Ignore --time-trace if disableOutput
To avoid prevent generating two JSON for LLD_IN_TEST=2 ld.lld
--time-trace.
Commit: c1f10ef0a5c15f1dccf87ff07699055297c715a5
https://github.com/llvm/llvm-project/commit/c1f10ef0a5c15f1dccf87ff07699055297c715a5
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/test/ELF/invalid/linkorder-invalid-sec.test
Log Message:
-----------
[ELF] SHF_LINK_ORDER: replace Fatal with ErrAlways
In LLD_IN_TEST=2 mode, when a thread calls Fatal, there will be no
output even if the process exits with code 1. Change the Fatal to
ErrAlways (not-recoverable) as subsequent code assumes SHF_LINK_ORDER
sh_link is correct.
Commit: c1ec5beb4ab36c2c4d99ed6d735d217e74364771
https://github.com/llvm/llvm-project/commit/c1ec5beb4ab36c2c4d99ed6d735d217e74364771
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTestTableGen.cpp
Log Message:
-----------
[clang-format] Fix a TableGen crash on comment after l_paren (#124380)
Fixes #124248.
Commit: 9b6990ff2531942d534c9ef7db728af2437c3329
https://github.com/llvm/llvm-project/commit/9b6990ff2531942d534c9ef7db728af2437c3329
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[Github][CI] Add Windows Premerge Job for Testing (#122661)
This patch adds a windows premerge job for testing. We plan to enable
this by default soon once we have evaluated stability and have
reasonable reason to believe the system is reliable.
Commit: 6bb70a94da1b5c53143537f1d2e96602a74331ca
https://github.com/llvm/llvm-project/commit/6bb70a94da1b5c53143537f1d2e96602a74331ca
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Enable builds on Linux/AArch64 (#120786)
Commit: 44b85743498a88cb9fd1281bdfac47c93fcf6fee
https://github.com/llvm/llvm-project/commit/44b85743498a88cb9fd1281bdfac47c93fcf6fee
Author: Palmer <palmercox at gmail.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/test/MC/AArch64/basic-a64-instructions.s
Log Message:
-----------
[AArch64] Fix movk parsing with an .equ operand (#124428)
Prior to 5da801386c2b820a4596fc6d8da6b5f4a6da94b4, this code worked:
.equ p4_low_b0, 0x0000
movk x1, p4_low_b0, lsl 16
(The code above is from the isa-l project - I discovered this issue
while trying to compile it with clang 19 on MacOS on aarch64)
That commit fixed a different bug, but accidentally broke the case where
the second operand to movk is not a literal.
In 442f066fc464e953b7783230e95ccf2a67ebfb38, a fix was applied to handle
the case where the second operand is a value like "(Val) >> 16".
However, that didn't appear to fix the test case in this commit. In this
commit, we extend the change to handle the case where the second operand
is a identifier defined by .equ.
Fixes #124427
Commit: 753028bc81c1a556eaaaf45ac77ca0cf4c7a3b4a
https://github.com/llvm/llvm-project/commit/753028bc81c1a556eaaaf45ac77ca0cf4c7a3b4a
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/lib/Target/Xtensa/CMakeLists.txt
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.h
M llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
R llvm/lib/Target/Xtensa/XtensaUtils.cpp
R llvm/lib/Target/Xtensa/XtensaUtils.h
Log Message:
-----------
[Xtensa] Move XtensaUtils to MCTargetDesc
PR #121118 attempted to introduce `checkRegister` used by
XtensaDisassembler. Since `checkRegister` and other functions in
XtensaUtils.cpp cannot link against XtensaCodeGen, move them to
XtensaDesc, which can be used by XtensaDisassembler.
Pull Request: https://github.com/llvm/llvm-project/pull/123969
Commit: 37fdde6025c8ead27a7608643b63e0d4498211e2
https://github.com/llvm/llvm-project/commit/37fdde6025c8ead27a7608643b63e0d4498211e2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-25 (Sat, 25 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/lib/CodeGen/MachineOperand.cpp
Log Message:
-----------
[CodeGen] Remove implict conversions from Register to unsigned from MachineOperand. NFC
Commit: f46eb1430992ba1abe246dfd0b4ccf8229fe0ab7
https://github.com/llvm/llvm-project/commit/f46eb1430992ba1abe246dfd0b4ccf8229fe0ab7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.h
Log Message:
-----------
[AMDGPU] Replace unsigned with Register in SIMachineScheduler. NFC
Some of these may eventually need to VirtRegOrUnit.
Commit: ab895ad2bfb6835e8c47d8e616edb6cadaf59b77
https://github.com/llvm/llvm-project/commit/ab895ad2bfb6835e8c47d8e616edb6cadaf59b77
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/lib/AST/DeclTemplate.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124446)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect Pattern to be nonnull.
Commit: f09a6f632584c2b34f8f2d048a5420b040bb1005
https://github.com/llvm/llvm-project/commit/f09a6f632584c2b34f8f2d048a5420b040bb1005
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaAPINotes.cpp
Log Message:
-----------
[Sema] Migrate away from PointerUnion::dyn_cast (NFC) (#124447)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect AnyFunc to be nonnull.
Commit: 850852e9a45f7883bd1a04c2a6b9fceb6dcdaba2
https://github.com/llvm/llvm-project/commit/850852e9a45f7883bd1a04c2a6b9fceb6dcdaba2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#124455)
Commit: 8035d38daab028b8da3cf2b01090b5f0ceacd695
https://github.com/llvm/llvm-project/commit/8035d38daab028b8da3cf2b01090b5f0ceacd695
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/Todo/dispatch.f90
A flang/test/Parser/OpenMP/dispatch.f90
A flang/test/Semantics/OpenMP/dispatch.f90
Log Message:
-----------
[Flang][OpenMP]Add parsing support for DISPATCH construct (#121982)
This allows the Flang parser to accept the !$OMP DISPATCH and related
clauses.
Lowering is currently not implemented. Tests for unparse and parse-tree
dump is provided, and one for checking that the lowering ends in a "not
yet implemented"
---------
Co-authored-by: Kiran Chandramohan <kiran.chandramohan at arm.com>
Commit: 81d38da65e336dfb023df89f1bdc32633ad05fb2
https://github.com/llvm/llvm-project/commit/81d38da65e336dfb023df89f1bdc32633ad05fb2
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
Log Message:
-----------
[LV] Add more tests for narrowing interleave groups for AArch64.
Add additional tests for
https://github.com/llvm/llvm-project/pull/106441.
Commit: dec47b76f406242dfb9d36da4d7adfb171c71104
https://github.com/llvm/llvm-project/commit/dec47b76f406242dfb9d36da4d7adfb171c71104
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/ctlz-codesize.ll
M llvm/test/Analysis/CostModel/X86/ctlz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/ctlz.ll
M llvm/test/Analysis/CostModel/X86/cttz-codesize.ll
M llvm/test/Analysis/CostModel/X86/cttz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/cttz.ll
M llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll
M llvm/test/Transforms/SLPVectorizer/X86/ctlz.ll
M llvm/test/Transforms/SLPVectorizer/X86/cttz.ll
Log Message:
-----------
[CostModel][X86] Update baseline CTTZ/CTLZ costs for x86_64 (#124312)
Followup to #123623 - now that the CMOV has been removed, the throughput has improved, reducing the benefit of vectorization on pre-x86-64-v3 CPUs
Commit: e4514293f99962b47d881d5b40722c6b56a1f425
https://github.com/llvm/llvm-project/commit/e4514293f99962b47d881d5b40722c6b56a1f425
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaLambda.cpp
M clang/test/SemaCXX/cxx1z-constexpr-lambdas.cpp
Log Message:
-----------
[Clang] Correctly determine constexprness of dependent lambdas. (#124468)
We skipped checking if a lambda is constexpr if the parent context was
dependent, even if the lambda itself wasn't (and there is no other
opportunity to establish constexprness)
Fixes #114234
Fixes #97958
Commit: 0c784851c50b6b5b844e6a1f21bbe73efac332d4
https://github.com/llvm/llvm-project/commit/0c784851c50b6b5b844e6a1f21bbe73efac332d4
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/include/llvm/Support/MathExtras.h
Log Message:
-----------
[MathExtras] Favor using the hexadecimal FP constants (#123180)
This just fixes a TODO now that we are using C++17.
Commit: 33ad474c45e6d7a0de7bc75e15e27cf6cb9ff895
https://github.com/llvm/llvm-project/commit/33ad474c45e6d7a0de7bc75e15e27cf6cb9ff895
Author: Manuel Sainz de Baranda y Goñi <manuel at zxe.io>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init-arm.c
M clang/test/Preprocessor/init-csky.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/init-mips.c
M clang/test/Preprocessor/init-ppc.c
M clang/test/Preprocessor/init-ppc64.c
M clang/test/Preprocessor/init-s390x.c
M clang/test/Preprocessor/init-v7k-compat.c
M clang/test/Preprocessor/init-ve.c
M clang/test/Preprocessor/init-x86.c
M clang/test/Preprocessor/init.c
Log Message:
-----------
[Clang] Add predefined macros for integer constants (#123514)
This adds predefined macros for integer constants to implement section 7.18.4 of ISO/IEC 9899:1999 in `<stdint.h>` in a safe way:
```
__INT8_C(c)
__INT16_C(c)
__INT32_C(c)
__INT64_C(c)
__INTMAX_C(c)
__UINT8_C(c)
__UINT16_C(c)
__UINT32_C(c)
__UINT64_C(c)
__UINTMAX_C(c)
```
Which improves compatibility with GCC and makes it trivial to implement
section 7.18.4 of ISO/IEC 9899:1999.
Clang defines `__INT<N>_C_SUFFIX__`, `__UINT<N>_C_SUFFIX__`,
`__INTAX_C_SUFFIX__` and `__UINTMAX_C_SUFFIX__`, but these macros are
useless for this purpose.
Let's say, for example, that `__INT64_C_SUFFIX__` expands to `L` or
`LL`. If the user defines them as a macros, the compiler will produce
errors if `INT64_C` is implemented in `<stdint.h>` using
`__INT64_C_SUFFIX__`:
**minimal-test.c:**
```cpp
#if defined(__clang__) & !defined(__INT64_C)
# pragma clang diagnostic push
# pragma clang diagnostic ignored "-Wreserved-identifier"
# define __PSTDC_INT_C_(literal, suffix) literal##suffix
# define __PSTDC_INT_C(literal, suffix) __PSTDC_INT_C_(literal, suffix)
# define INT64_C(literal) __PSTDC_INT_C(literal, __INT64_C_SUFFIX__)
# pragma clang diagnostic pop
#elif defined(__GNUC__)
# define INT64_C __INT64_C
#endif
typedef __INT64_TYPE__ int64_t;
#define L "Make Clang produce an error"
#define LL "Make Clang produce an error"
int main(int argc, char **argv)
{
(void)argc; (void)argv;
int64_t v = INT64_C(9223372036854775807);
(void)v;
return 0;
}
```
<img width="697" alt="imagen"
src="https://github.com/user-attachments/assets/6df97af6-7cfd-4cf9-85b7-d7c854509325"
/>
**test.c:**
```cpp
#if defined(__clang__) && !defined(__INT8_C)
# pragma clang diagnostic push
# pragma clang diagnostic ignored "-Wreserved-identifier"
# define __PSTDC_INT_C_(literal, suffix) literal##suffix
# define __PSTDC_INT_C(literal, suffix) __PSTDC_INT_C_(literal, suffix)
# define INT8_C(literal) __PSTDC_INT_C(literal, __INT8_C_SUFFIX__)
# define INT16_C(literal) __PSTDC_INT_C(literal, __INT16_C_SUFFIX__)
# define INT32_C(literal) __PSTDC_INT_C(literal, __INT32_C_SUFFIX__)
# define INT64_C(literal) __PSTDC_INT_C(literal, __INT64_C_SUFFIX__)
# define INTMAX_C(literal) __PSTDC_INT_C(literal, __INTMAX_C_SUFFIX__)
# define UINT8_C(literal) __PSTDC_INT_C(literal, __UINT8_C_SUFFIX__)
# define UINT16_C(literal) __PSTDC_INT_C(literal, __UINT16_C_SUFFIX__)
# define UINT32_C(literal) __PSTDC_INT_C(literal, __UINT32_C_SUFFIX__)
# define UINT64_C(literal) __PSTDC_INT_C(literal, __UINT64_C_SUFFIX__)
# define UINTMAX_C(literal) __PSTDC_INT_C(literal, __UINTMAX_C_SUFFIX__)
# pragma clang diagnostic pop
#else
# define INT8_C __INT8_C
# define INT16_C __INT16_C
# define INT32_C __INT32_C
# define INT64_C __INT64_C
# define INTMAX_C __INTMAX_C
# define UINT8_C __UINT8_C
# define UINT16_C __UINT16_C
# define UINT32_C __UINT32_C
# define UINT64_C __UINT64_C
# define UINTMAX_C __UINTMAX_C
#endif
typedef __INT8_TYPE__ int8_t;
typedef __INT16_TYPE__ int16_t;
typedef __INT32_TYPE__ int32_t;
typedef __INT64_TYPE__ int64_t;
typedef __INTMAX_TYPE__ intmax_t;
typedef __UINT8_TYPE__ uint8_t;
typedef __UINT16_TYPE__ uint16_t;
typedef __UINT32_TYPE__ uint32_t;
typedef __UINT64_TYPE__ uint64_t;
typedef __UINTMAX_TYPE__ uintmax_t;
#define L "Make Clang produce an error"
#define LL "Make Clang produce an error"
#define U "Make Clang produce an error"
#define UL "Make Clang produce an error"
#define ULL "Make Clang produce an error"
int main(int argc, char **argv)
{
(void)argc; (void)argv;
int8_t a = INT8_C (127);
int16_t b = INT16_C (32767);
int32_t c = INT32_C (2147483647);
int64_t d = INT64_C (9223372036854775807);
intmax_t e = INTMAX_C (9223372036854775807);
uint8_t f = UINT8_C (255);
uint16_t g = UINT16_C (65535);
uint32_t h = UINT32_C (4294967295);
uint64_t i = UINT64_C (18446744073709551615);
uintmax_t j = UINTMAX_C(18446744073709551615);
(void)a; (void)b; (void)c; (void)d; (void)e;
(void)f; (void)g; (void)h; (void)i; (void)j;
return 0;
}
```
Commit: 2af819fa3d802e55027dcc1408186cb8738f08e6
https://github.com/llvm/llvm-project/commit/2af819fa3d802e55027dcc1408186cb8738f08e6
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/test/Transforms/PGOProfile/memprof.ll
Log Message:
-----------
[MemProf] Add test for hot hints (#124394)
The change in PR124219 required removing one of the tests added for
-memprof-use-hot-hints, since we no longer label any contexts as hot in
metadata, so add a new test that checks the hot attribute instead.
Commit: f8ab91f74f152c8a6d8aaedb8165109c497a618d
https://github.com/llvm/llvm-project/commit/f8ab91f74f152c8a6d8aaedb8165109c497a618d
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
Log Message:
-----------
[LVI][CVP] Add test for trunc bittest. (NFC)
Commit: e8e75e08c9214fe25b56535fc26f5435a875a137
https://github.com/llvm/llvm-project/commit/e8e75e08c9214fe25b56535fc26f5435a875a137
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/BPSectionOrderer.h
Log Message:
-----------
[lld-macho] Remove unneeded functions from BPSectionOrderer. NFC
Commit: ccc066e8d5a742f79b41a0f90ef309d5b9e92c2a
https://github.com/llvm/llvm-project/commit/ccc066e8d5a742f79b41a0f90ef309d5b9e92c2a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/utils/TableGen/MveEmitter.cpp
Log Message:
-----------
[TableGen] Avoid repeated map lookups (NFC) (#124448)
This patch avoids repeated map lookups and constructions of temporary
std::string instances by switching to DenseSet.
Commit: 1c4341d176492da5f276937b84a3d0c959e4cf5b
https://github.com/llvm/llvm-project/commit/1c4341d176492da5f276937b84a3d0c959e4cf5b
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
Log Message:
-----------
[SandboxVec][DAG] Fix interval check without Node
This patch moves the check of whether a node exists before the check of
whether it is contained in the interval.
Commit: fb01a289038c16e13c6133ee602a58254b349411
https://github.com/llvm/llvm-project/commit/fb01a289038c16e13c6133ee602a58254b349411
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/COFF/DLL.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
A lld/test/COFF/arm64x-import.test
Log Message:
-----------
[LLD][COFF] Implement support for hybrid IAT on ARM64X (#124189)
In hybrid images, the PE header references a single IAT for both native
and EC views, merging entries where possible. When merging isn't
feasible, different imports are grouped together, and ARM64X relocations
are emitted as needed.
Commit: 80ab237c1187aa7e8a1f546175887d768fa14e2d
https://github.com/llvm/llvm-project/commit/80ab237c1187aa7e8a1f546175887d768fa14e2d
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/test/COFF/arm64x-import.test
Log Message:
-----------
[LLD][COFF] Add REQUIRE x86 to arm64x-import.test (NFC)
This ensures the disassembler can handle ARM64X binaries correctly. Fixes #124189.
Commit: e278e1b6ece025ace4238748c0f57fda3ca833f9
https://github.com/llvm/llvm-project/commit/e278e1b6ece025ace4238748c0f57fda3ca833f9
Author: Alexey Bader <alexey.bader at intel.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
Log Message:
-----------
[NFC][CodeGen] Fix typos in code comments. (#124382)
This fixes typos in `calcUniqueIDUpdateFlagsAndSize` function.
Commit: c9637afec7ed72904c74c2fc71e990d378f3d7a6
https://github.com/llvm/llvm-project/commit/c9637afec7ed72904c74c2fc71e990d378f3d7a6
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[Clang] Fix createConstexprUnknownAPValues to use zero offset when ceating APValue (#124478)
When implmenting P2280R4 here:
https://github.com/llvm/llvm-project/pull/95474
When creating the APValue to store and constexprUnknown value I used an
offset of CharUnits::One() but it should have been CharUnits::Zero().
This change just adjusts that value.
Commit: bfa7de0df5d8eb8dd284b0f49f10e7f0cd850693
https://github.com/llvm/llvm-project/commit/bfa7de0df5d8eb8dd284b0f49f10e7f0cd850693
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/canonicalize-vars.ll
Log Message:
-----------
X86: Support FCANONICALIZE on f64/f80 for i686 with SSE2 or AVX (#123917)
Currently, FCANONICALIZE is not enabled for f64 with SSE2,
and is not enabled for f80 for 32bit system.
Let's enable them.
Commit: db79fb2a91df31a07f312f8e061936927ac5c506
https://github.com/llvm/llvm-project/commit/db79fb2a91df31a07f312f8e061936927ac5c506
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
Log Message:
-----------
[msan] Add handlers for AVX masked load/store intrinsics (#123857)
This patch adds explicit support for AVX masked load/store intrinsics,
largely by applying the intrinsics to the shadows (but subtly different
to handleIntrinsicByApplyingToShadow()).
We do not reuse the handleMaskedLoad/Store functions. The key challenge
is that the LLVM masked intrinsics require a vector of booleans, while
AVX masked intrinsics use the MSBs of a vector of integers.
X86InstCombineIntrinsic.cpp::simplifyX86MaskedLoad mentions that the x86
backend does not know how to efficiently convert from a vector of
booleans back into the AVX mask format; therefore, they (and we) do not
reduce AVX masked intrinsics into LLVM masked intrinsics.
Commit: 980e86f130eea02bd41b887f4ed896340fc90f6c
https://github.com/llvm/llvm-project/commit/980e86f130eea02bd41b887f4ed896340fc90f6c
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
Log Message:
-----------
[msan] Add avx512-intrinsics.ll and avx512-intrinsics-upgrade.ll test case (#123980)
These are forked from the corresponding files in llvm/test/CodeGen/X86/.
avx512-intrinsics.ll shows that many intrinsics are already
heuristically handled by MSan, and can be used to track refinements to
the intrinsic handling.
avx512-intrinsics-upgrade.ll tests intrinsics that LLVM "auto-upgrades";
for example, @llvm.x86.avx512.mask.store is converted into
@llvm.masked.store (which has the interesting side effect that
MemorySanitizer can already handle it via its existing
handleMaskedStore).
Commit: 84af3ee5124de3385b829c3a9980fd734f0d92e8
https://github.com/llvm/llvm-project/commit/84af3ee5124de3385b829c3a9980fd734f0d92e8
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/InputFiles.cpp
Log Message:
-----------
[ELF] Replace Fatal with Err
Commit: a6044a05cd16d2c5dbca80757a160cba9a2cb037
https://github.com/llvm/llvm-project/commit/a6044a05cd16d2c5dbca80757a160cba9a2cb037
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
Log Message:
-----------
[msan] Fix-forward avx512-intrinsics-upgrade.ll (#124495)
I had added the test in https://github.com/llvm/llvm-project/pull/123980
and contemporaneously added AVX masked store/load intrinsics
(https://github.com/llvm/llvm-project/pull/123857) and forgot to update
the test output for the intersection. This patch fixes the output.
Commit: b9d301cc7e4fe4c442ec15169686fa4a18f5cdfc
https://github.com/llvm/llvm-project/commit/b9d301cc7e4fe4c442ec15169686fa4a18f5cdfc
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
Log Message:
-----------
Revert "[msan] Add handlers for AVX masked load/store intrinsics (#123857)"
This reverts commit db79fb2a91df31a07f312f8e061936927ac5c506.
Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/144/builds/16636/steps/6/logs/FAIL__LLVM__avx512-intrinsics-upgrade_ll)
Commit: b6eeec586fa6c0db4ab1b0e129111e82a97c7283
https://github.com/llvm/llvm-project/commit/b6eeec586fa6c0db4ab1b0e129111e82a97c7283
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
Log Message:
-----------
Revert "[msan] Fix-forward avx512-intrinsics-upgrade.ll (#124495)"
This reverts commit a6044a05cd16d2c5dbca80757a160cba9a2cb037.
Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/144/builds/16636/steps/6/logs/FAIL__LLVM__avx512-intrinsics-upgrade_ll)
Commit: b2647ffbf797dd5a457b6b19faab06956934d067
https://github.com/llvm/llvm-project/commit/b2647ffbf797dd5a457b6b19faab06956934d067
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
R llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
R llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
Log Message:
-----------
Revert "[msan] Add avx512-intrinsics.ll and avx512-intrinsics-upgrade.ll test case (#123980)"
This reverts commit 980e86f130eea02bd41b887f4ed896340fc90f6c.
Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/154/builds/10901/steps/5/logs/FAIL__LLVM__avx512-intrinsics-upgrade_ll)
Commit: 7107f55d82f8d1077d5478e8f58c94851385c06f
https://github.com/llvm/llvm-project/commit/7107f55d82f8d1077d5478e8f58c94851385c06f
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/AST/TemplateBase.cpp
Log Message:
-----------
[clang] NFC: remove redundant dyn_cast
Commit: 0e6b58202ca9c4d1ca814e4bea5bd3f0bac7f329
https://github.com/llvm/llvm-project/commit/0e6b58202ca9c4d1ca814e4bea5bd3f0bac7f329
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/test/ELF/lto/version-script.ll
M lld/test/ELF/lto/version-script2.ll
Log Message:
-----------
[ELF] Improve parseSymbolVersion tests in for compileBitcodeFiles
Otherwise, the tests won't catch a mistake that removes
`parseSymbolVersion`.
Commit: 2a26292388fcab0c857c91b2d08074c33abd37e8
https://github.com/llvm/llvm-project/commit/2a26292388fcab0c857c91b2d08074c33abd37e8
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/ELF/Driver.cpp
Log Message:
-----------
[ELF] Make isExported accurate early
LTO compilation might define symbols not in the symbol table (e.g.
__emutls_v.x in test/ELF/lto/wrap-unreferenced-before-codegen.test).
These symbols have a false `isExported` until
`demoteSymbolsAndComputeIsPreemptible`. This is usually benign as we do
not reference `isExported` that early.
Ensure that `isExported` is correct early. This helps remove a redundant
`isExported` computation in `demoteSymbolsAndComputeIsPreemptible`.
Commit: 1a4d6de1b532149b10522eae5dabce39e5f7c687
https://github.com/llvm/llvm-project/commit/1a4d6de1b532149b10522eae5dabce39e5f7c687
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Remove redundant isExported computation
Commit 2a26292388fcab0c857c91b2d08074c33abd37e8 made `isExported`
accurate except a few linker-synthesized symbols in finalizeSections.
We can collect these linker-synthesized symbols into a vector
and avoid recomputation for other symbols.
Commit: b9efbed468ec18044070eea936c694fb8f6e244b
https://github.com/llvm/llvm-project/commit/b9efbed468ec18044070eea936c694fb8f6e244b
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M lld/ELF/Writer.cpp
R lld/test/ELF/hip-section-layout.s
Log Message:
-----------
Revert "Move HIP fatbin sections farther away from .text"
This reverts commit 048f35037779763963c4b4478a0884e828ea9538.
This reverts commit f7bbc40b0736cc417f57cd039b098b504cf6a71f.
Related to #95949. A developer with no prior lld contribution and very
little AMD contribution sneaked in these application-specific section
order rules we discourage.
Commit: 6805d7e8aa5f2ecea021acbb8c6b4c29ca432e78
https://github.com/llvm/llvm-project/commit/6805d7e8aa5f2ecea021acbb8c6b4c29ca432e78
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-26 (Sun, 26 Jan 2025)
Changed paths:
M llvm/test/tools/llvm-objcopy/ELF/remove-note.test
Log Message:
-----------
[test] Convert remove-note.test from \r\n to \n after #118739
Commit: 9452ee4f750a849148a391ac75eb31220343fa1e
https://github.com/llvm/llvm-project/commit/9452ee4f750a849148a391ac75eb31220343fa1e
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Treat uppercase identifiers after struct as macros (#124397)
This restores the behavior before llvmorg-20-init.
Fixes #94184.
Fixes #117477.
Fixes #122690.
Fixes #123142.
Commit: a01e1d4e044ec0147e04a5af9ca54ede550f5dc1
https://github.com/llvm/llvm-project/commit/a01e1d4e044ec0147e04a5af9ca54ede550f5dc1
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/Sema/HeuristicResolver.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
Log Message:
-----------
[clang][Sema] Handle dependent qualifier in HeuristicResolver::resolveDeclRefExpr() (#124515)
Commit: bd38c4993aa41d89a13cbc4dc457df4d81e410bf
https://github.com/llvm/llvm-project/commit/bd38c4993aa41d89a13cbc4dc457df4d81e410bf
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-frint-frecpx-fsqrt.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (8/11) (#116834)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`FRINTx`, `FRECPX`, and `FSQRT` instructions.
Commit: 351ee30529c054d39ea742c1b9c738c9e70c131b
https://github.com/llvm/llvm-project/commit/351ee30529c054d39ea742c1b9c738c9e70c131b
Author: bernhardu <bernhardu at mailbox.org>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Support some more 6 byte instructions. (#124006)
This patch adds several instructions seen when trying to run a
executable built with ASan with llvm-mingw.
(x86 and x86_64, using the git tip in llvm-project).
Also includes instructions collected by
Roman Pišl and Eric Pouech in the Wine bug reports below.
```
Related: https://github.com/llvm/llvm-project/issues/96270
Co-authored-by: Roman Pišl <rpisl at seznam.cz>
https://bugs.winehq.org/show_bug.cgi?id=50993
https://bugs.winehq.org/attachment.cgi?id=70233
Co-authored-by: Eric Pouech <eric.pouech at gmail.com>
https://bugs.winehq.org/show_bug.cgi?id=52386
https://bugs.winehq.org/attachment.cgi?id=71626
```
Commit: bbf377060adc8607e1187952388c7eeea7cf4933
https://github.com/llvm/llvm-project/commit/bbf377060adc8607e1187952388c7eeea7cf4933
Author: bernhardu <bernhardu at mailbox.org>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Support some more 7 or 8 byte instructions. (#124011)
This patch adds several instructions seen when trying to run a
executable built with ASan with llvm-mingw.
(x86 and x86_64, using the git tip in llvm-project).
Also includes instructions collected by
Roman Pišl and Eric Pouech in the Wine bug reports below.
```
Related: https://github.com/llvm/llvm-project/issues/96270
Co-authored-by: Roman Pišl <rpisl at seznam.cz>
https://bugs.winehq.org/show_bug.cgi?id=50993
https://bugs.winehq.org/attachment.cgi?id=70233
Co-authored-by: Eric Pouech <eric.pouech at gmail.com>
https://bugs.winehq.org/show_bug.cgi?id=52386
https://bugs.winehq.org/attachment.cgi?id=71626
```
Commit: 7211bf48a62bfe3a181013f412f2fa6e112ae99f
https://github.com/llvm/llvm-project/commit/7211bf48a62bfe3a181013f412f2fa6e112ae99f
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/test/Driver/fsave-main-program.f90
M flang/test/Lower/fsave-main-program.f90
Log Message:
-----------
[flang][driver] add negative from of -fsave-main-program (#124110)
Add the `-fno` form for consistency and to make it easy to switch the
default for downstream users.
Commit: 3b5e9eed2f67c1fb6dcf7033e92509ba2b0381e9
https://github.com/llvm/llvm-project/commit/3b5e9eed2f67c1fb6dcf7033e92509ba2b0381e9
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
A llvm/test/CodeGen/NVPTX/convert-sm100.ll
Log Message:
-----------
[NVPTX] Add float to tf32 conversion intrinsics (#124316)
This patch adds the set of f32 -> tf32 cvt intrinsics introduced
in sm100 with ptx8.6. This builds on top of the recent PR #121507.
Tests are verified with a 12.8 ptxas executable.
PTX ISA link:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 87103a016fbfd480e1d3bb8eba23c27a9c74e70d
https://github.com/llvm/llvm-project/commit/87103a016fbfd480e1d3bb8eba23c27a9c74e70d
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/include/clang/Basic/TargetBuiltins.h
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/CodeGen/AArch64/builtin-shufflevector-fp8.c
A clang/test/CodeGen/AArch64/fp8-cast.c
M clang/test/CodeGen/arm-mfp8.c
M clang/test/CodeGenCXX/aarch64-mangle-neon-vectors.cpp
M clang/test/CodeGenCXX/mangle-neon-vectors.cpp
A clang/test/Sema/aarch64-fp8-cast.c
M clang/test/Sema/arm-mfp8.cpp
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[AArch64] Implement NEON FP8 vectors as VectorType (#123603)
Reimplement Neon FP8 vector types using attribute `neon_vector_type`
instead of having them as builtin types.
This allows to implement FP8 Neon intrinsics without the need to add
special cases for these types when using `__builtin_shufflevector`
or bitcast (using C-style cast operator) between vectors, both
extensively used in the generated code in `arm_neon.h`.
Commit: 8f17f51deb12456f25d32b9a42ac1f00feabbfbc
https://github.com/llvm/llvm-project/commit/8f17f51deb12456f25d32b9a42ac1f00feabbfbc
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Fix comments format(NFC) (#124520)
This PR corrects the formatting of comments in Markdown. The previous
format was as follows:
https://mlir.llvm.org/docs/Dialects/TOSA/#tosaerf-mlirtosaerfop
https://mlir.llvm.org/docs/Dialects/TOSA/#tosarescale-mlirtosarescaleop
Commit: 14ffff384740f484b382a1225f4bd01aeebfdc3f
https://github.com/llvm/llvm-project/commit/14ffff384740f484b382a1225f4bd01aeebfdc3f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/lib/AST/TextNodeDumper.cpp
A clang/test/AST/ast-dump-APValue-lvalue.cpp
M clang/test/AST/ast-dump-APValue-todo.cpp
Log Message:
-----------
[clang] Add dump() support for lvalue APValues (#124476)
Add some lvalue information to the `dump()` output of lvalue APValues.
Commit: 43a50deb63453cd3c800f097514d500536f9d436
https://github.com/llvm/llvm-project/commit/43a50deb63453cd3c800f097514d500536f9d436
Author: Samuel Ginzburg <ginzburg.sam at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[MLIR][ROCDL] Add GFX940 SMFMAC (2:4 sparsity) instructions to the ROCDL dialect (#124435)
# Overview
This PR adds 2:4 structured sparsity (sparse A, dense B) matrix multiply
instructions to ROCDL.
# Testing
I've added tests to Dialect/mlir and Target/mlir
Commit: ac87d6b03642eca3901a7776d73be368299402e9
https://github.com/llvm/llvm-project/commit/ac87d6b03642eca3901a7776d73be368299402e9
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/test/Lower/Intrinsics/ieee_next.f90
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fold `arith.cmpi eq, %val, %one : i1` -> `%val` and `arith.cmpi ne, %val, %zero : i1 -> %val` (#124436)
https://alive2.llvm.org/ce/z/dNZMdC
Commit: ddbfe6f7d2075a828fa9e8e5f5734bf881cda13a
https://github.com/llvm/llvm-project/commit/ddbfe6f7d2075a828fa9e8e5f5734bf881cda13a
Author: Robert Dazi <14996868+v01dXYZ at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ExprCXX.h
M clang/lib/Sema/TreeTransform.h
A clang/test/SemaCXX/array-type-trait-with-template.cpp
Log Message:
-----------
[Sema] Fix __array_rank instantiation (#124491)
The type being queried was left as a template type parameter, making the
whole expression as dependent and thus not eligible to static_assert.
Fixes #123498
Co-authored-by: v01dxyz <v01dxyz at v01d.xyz>
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: b7286dbef9dc1986860d29e390b092599e1d7db5
https://github.com/llvm/llvm-project/commit/b7286dbef9dc1986860d29e390b092599e1d7db5
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
Log Message:
-----------
Reland "[LoopVectorize] Add support for reverse loops in isDereferenceableAndAlignedInLoop #96752" (#123616)
The last attempt failed a sanitiser build because we were
creating a reference to a null Predicates pointer in
isDereferenceableAndAlignedInLoop. This was exposed by
the unit test IsDerefReadOnlyLoop in
unittests/Analysis/LoadsTest.cpp. I fixed this by falling
back on getConstantMaxBackedgeTakenCount if Predicates is
null - see line 316 in llvm/lib/Analysis/Loads.cpp. There
are no other changes.
Commit: b8d921003d1f20819b897b066e02d22787f11550
https://github.com/llvm/llvm-project/commit/b8d921003d1f20819b897b066e02d22787f11550
Author: David Truby <david.truby at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/test/HLFIR/unroll-loops.fir
M flang/test/Integration/unroll-loops.f90
Log Message:
-----------
[flang][NFC] Restrict -funroll-loops tests to known working targets (#123939)
If -funroll-loops tests are not restricted to specific targets the tests
may behave differently based on the host platform. This patch restricts
the tests to aarch64 and x86_64, and removes the PowerPC XFAIL.
Commit: 98e52db4a5e57f919bb70312f9ca7deb16ee6fcb
https://github.com/llvm/llvm-project/commit/98e52db4a5e57f919bb70312f9ca7deb16ee6fcb
Author: David Truby <david.truby at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/test/HLFIR/unroll-loops.fir
M flang/test/Integration/unroll-loops.f90
Log Message:
-----------
Revert "[flang][NFC] Restrict -funroll-loops tests to known working targets" (#124536)
Reverts llvm/llvm-project#123939
Commit: 6087c3049656bbaef51fffb48e2404e86f7e0d3f
https://github.com/llvm/llvm-project/commit/6087c3049656bbaef51fffb48e2404e86f7e0d3f
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lldb/source/Host/common/Host.cpp
Log Message:
-----------
[lldb] Simplify preprocessor conditional (#124522)
The long list of defines is just a very elaborate way to say "not
windows".
Commit: cfdd7d736a94aa65a23eb41258d9d6712cdb2b0d
https://github.com/llvm/llvm-project/commit/cfdd7d736a94aa65a23eb41258d9d6712cdb2b0d
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] sched cpu affinity for linux interception. (#124194)
Commit: e21b80464a44ef6491e44517ac59892c10ba2d6c
https://github.com/llvm/llvm-project/commit/e21b80464a44ef6491e44517ac59892c10ba2d6c
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] socketpair interception. (#124107)
Commit: d8ad1eef8ffeb4ef5474f0e38d6d340d82c53572
https://github.com/llvm/llvm-project/commit/d8ad1eef8ffeb4ef5474f0e38d6d340d82c53572
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-flogb.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (7/11) (#116833)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`FLOGB` instructions.
Commit: b31e9747d0866ff97a1cd4a608b7eade31c0aa0b
https://github.com/llvm/llvm-project/commit/b31e9747d0866ff97a1cd4a608b7eade31c0aa0b
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
M lldb/test/API/linux/aarch64/gcs/main.c
Log Message:
-----------
[lldb][AArch64] Fix expression evaluation with Guarded Control Stacks (#123918)
When the Guarded Control Stack (GCS) is enabled, returns cause the
processor to validate that the address at the location pointed to by
gcspr_el0 matches the one in the link register.
```
ret (lr=A) << pc
| GCS |
+=====+
| A |
| B | << gcspr_el0
Fault: tried to return to A when you should have returned to B.
```
Therefore when an expression wrapper function tries to return to the
expression return address (usually `_start` if there is a libc), it
would fault.
```
ret (lr=_start) << pc
| GCS |
+============+
| user_func1 |
| user_func2 | << gcspr_el0
Fault: tried to return to _start when you should have returned to user_func2.
```
To fix this we must push that return address to the GCS in
PrepareTrivialCall. This value is then consumed by the final return and
the expression completes as expected.
If for some reason that fails, we will manually restore the value of
gcspr_el0, because it turns out that PrepareTrivialCall
does not restore registers if it fails at all. So for now I am handling
gcspr_el0 specifically, but I have filed
https://github.com/llvm/llvm-project/issues/124269 to address the
general problem.
(the other things PrepareTrivialCall does are exceedingly likely to not
fail, so we have never noticed this)
```
ret (lr=_start) << pc
| GCS |
+============+
| user_func1 |
| user_func2 |
| _start | << gcspr_el0
No fault, we return to _start as normal.
```
The gcspr_el0 register will be restored after expression evaluation so
that the program can continue correctly.
However, due to restrictions in the Linux GCS ABI, we will not restore
the enable bit of gcs_features_enabled. Re-enabling GCS via ptrace is
not supported because it requires memory to be allocated by the kernel.
We could disable GCS if the expression enabled GCS, however this would
use up that state transition that the program might later rely on. And
generally it is cleaner to ignore the enable bit, rather than one state
transition of it.
We will also not restore the GCS entry that was overwritten with the
expression's return address. On the grounds that:
* This entry will never be used by the program. If the program branches,
the entry will be overwritten. If the program returns, gcspr_el0 will
point to the entry before the expression return address and that entry
will instead be validated.
* Any expression that calls functions will overwrite even more entries,
so the user needs to be aware of that anyway if they want to preserve
the contents of the GCS for inspection.
* An expression could leave the program in a state where restoring the
value makes the situation worse. Especially if we ever support this in
bare metal debugging.
I will later document all this on
https://lldb.llvm.org/use/aarch64-linux.html.
Tests have been added for:
* A function call that does not interact with GCS.
* A call that does, and disables it (we do not re-enable it).
* A call that does, and enables it (we do not disable it again).
* Failure to push an entry to the GCS stack.
Commit: ef54e0bbfbef59932a59a1640f1f9e14b70cc41b
https://github.com/llvm/llvm-project/commit/ef54e0bbfbef59932a59a1640f1f9e14b70cc41b
Author: David Green <david.green at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
Log Message:
-----------
[AArch64] Avoid generating LDAPUR on certain cores (#124274)
On the CPUs listed below, we want to avoid LDAPUR for performance
reasons. Add a tuning feature to disable them when using:
-mcpu=neoverse-v2
-mcpu=neoverse-v3
-mcpu=cortex-x3
-mcpu=cortex-x4
-mcpu=cortex-x925
Commit: 347fb208c1e390a4f108e566efc81bd945837307
https://github.com/llvm/llvm-project/commit/347fb208c1e390a4f108e566efc81bd945837307
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M libclc/clc/include/clc/relational/relational.h
M libclc/clc/lib/generic/relational/clc_isequal.cl
M libclc/clc/lib/generic/relational/clc_isgreater.cl
M libclc/clc/lib/generic/relational/clc_isgreaterequal.cl
M libclc/clc/lib/generic/relational/clc_isless.cl
M libclc/clc/lib/generic/relational/clc_islessequal.cl
M libclc/clc/lib/generic/relational/clc_islessgreater.cl
M libclc/clc/lib/generic/relational/clc_isnotequal.cl
Log Message:
-----------
[libclc] Optimize CLC vector relational builtins (#124537)
Clang knows how to perform relational operations on OpenCL vectors, so
we don't need to use the Clang builtins. The builtins we were using
didn't support vector types, so we were previously scalarizing.
This commit generates the same LLVM fcmp operations as before, just
without the scalarization.
Commit: e9e06bea8661ddd474557a0db2cdc8770a55b66f
https://github.com/llvm/llvm-project/commit/e9e06bea8661ddd474557a0db2cdc8770a55b66f
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
Log Message:
-----------
[lldb][AArch64][NFC] Move a comment in GCS tests
Got put in the wrong place during a rebase.
Commit: d7e561b913d2a75c7c1807bf1c1e0bddc270a2b3
https://github.com/llvm/llvm-project/commit/d7e561b913d2a75c7c1807bf1c1e0bddc270a2b3
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/test/Lower/OpenMP/loop-directive.f90
Log Message:
-----------
[flang][OpenMP] Support `bind` clause code-gen for standalone `loop`s (#122674)
Extends rewriting of `loop` directives by supporting `bind` clause for
standalone directives. This follows both the spec and the current state
of clang as follows:
* No `bind` or `bind(thread)`: the `loop` is rewritten to `simd`.
* `bind(parallel)`: the `loop` is rewritten to `do`.
* `bind(teams)`: the `loop` is rewritten to `distribute`.
This is a follow-up PR for
https://github.com/llvm/llvm-project/pull/122632, only the latest commit
in this PR is relevant to the PR.
Commit: e7592d83e0ac58f61cfe8dcf61bcc8e7a8bd67b3
https://github.com/llvm/llvm-project/commit/e7592d83e0ac58f61cfe8dcf61bcc8e7a8bd67b3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[Offload][NFC] Make sure the thread is not running already
Commit: 86705eb6242b5e2d6153708ddedffbfc95491756
https://github.com/llvm/llvm-project/commit/86705eb6242b5e2d6153708ddedffbfc95491756
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/huge-stack-offset.ll
Log Message:
-----------
[X86] huge-stack-offset.ll - add gnux32 test coverage
This should match x86 for the basic implementation, but its useful to check it actually runs correctly.
Commit: 3684ec425904424fc4dc80c8661f82bc676d7197
https://github.com/llvm/llvm-project/commit/3684ec425904424fc4dc80c8661f82bc676d7197
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M flang/include/flang/Tools/TargetSetup.h
M flang/runtime/exceptions.cpp
Log Message:
-----------
[flang] IEEE underflow control for Arm (#124170)
Update IEEE_SUPPORT_UNDERFLOW_CONTROL, IEEE_GET_UNDERFLOW_MODE, and
IEEE_SET_UNDERFLOW_MODE code for Arm.
Commit: 3a4376b8f90686f754ee51b296a064ab03c12895
https://github.com/llvm/llvm-project/commit/3a4376b8f90686f754ee51b296a064ab03c12895
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/pointer-phis.ll
M llvm/test/Transforms/LoopDistribute/pointer-phi-in-loop.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected
Log Message:
-----------
LAA: handle 0 return from getPtrStride correctly (#124539)
getPtrStride returns 0 when the PtrScev is loop-invariant, and this is
not an erroneous value: it returns std::nullopt to communicate that it
was not able to find a valid pointer stride. In analyzeLoop, we call
getPtrStride with a value_or(0) conflating the zero return value with
std::nullopt. Fix this, handling loop-invariant loads correctly.
Commit: f07505849c8e683bf8f444e205d3dd3284759b7d
https://github.com/llvm/llvm-project/commit/f07505849c8e683bf8f444e205d3dd3284759b7d
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M offload/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[Offload] Fix server thread from being shut down if unused
Commit: 54928a10c8dba7c07c6224c1ead5c02a335890e6
https://github.com/llvm/llvm-project/commit/54928a10c8dba7c07c6224c1ead5c02a335890e6
Author: Dipesh Sharma <76941383+dipeshs809 at users.noreply.github.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/LangOptions.h
M clang/lib/Basic/Targets/OSTargets.cpp
A clang/test/Preprocessor/deprecate-threads-macro-definition-msvc1939.c
M clang/test/Preprocessor/init-aarch64.c
Log Message:
-----------
[clang] __STDC_NO_THREADS__ is no longer necessary for VS 2022 1939 and above (#117149)
Since `__STDC_NO_THREADS__` is a reserved identifier,
- If `MSVC version < 17.9`
- C version < C11(201112L)
- When `<threads.h>` is unavailable `!__has_include(<threads.h>)` is
`__has_include` is defined.
Closes #115529
Commit: f95a8bde3425ada0ef004186eb8ccda6e723241c
https://github.com/llvm/llvm-project/commit/f95a8bde3425ada0ef004186eb8ccda6e723241c
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[AArch64] Refactor implementation of FP8 types (NFC) (#123604)
- The FP8 scalar type (`__mfp8`) was described as a vector type
- The FP8 vector types were described/assumed to have integer element
type (the element type ought to be `__mfp8`)
- Add support for `m` type specifier (denoting `__mfp8`) in
`DecodeTypeFromStr` and create builtin function prototypes using that
specifier, instead of `int8_t`
Commit: f1d5e70a00fbc80f42977800e9299353b06d48cb
https://github.com/llvm/llvm-project/commit/f1d5e70a00fbc80f42977800e9299353b06d48cb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Do not check poison values for corresponding vectorized entries
No need to check poison values if they have been vectorized and/or mark
them as vectorized, it should work only for instructions.
Commit: 4f96cf96febf4eb4f18b605094c70b009f53918a
https://github.com/llvm/llvm-project/commit/4f96cf96febf4eb4f18b605094c70b009f53918a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-27 (Mon, 27 Jan 2025)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
M .ci/monolithic-windows.sh
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/premerge.yaml
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/PLTCall.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/exceptions-plt.cpp
A bolt/test/AArch64/jump-table-heuristic-fail.s
M bolt/test/AArch64/test-indirect-branch.s
A bolt/test/runtime/exceptions-plt.cpp
M clang-tools-extra/clang-tidy/ClangTidyProfiling.cpp
M clang-tools-extra/clang-tidy/ClangTidyProfiling.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.h
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-integer-sign-comparison.rst
M clang-tools-extra/modularize/CoverageChecker.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-integer-sign-comparison-qt.cpp
M clang/CMakeLists.txt
M clang/docs/BoundsSafety.rst
A clang/docs/BoundsSafetyAdoptionGuide.rst
M clang/docs/ConstantInterpreter.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/index.rst
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/Attr.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/RecursiveASTVisitor.h
A clang/include/clang/AST/StmtSYCL.h
M clang/include/clang/AST/StmtVisitor.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/UnresolvedSet.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Basic/AArch64SVEACLETypes.def
M clang/include/clang/Basic/AddressSpaces.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/include/clang/Basic/Attributes.h
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/clang/CodeGen/BackendUtil.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/CMakeLists.txt
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaInternal.h
M clang/include/clang/Sema/SemaSYCL.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/Sema/TemplateDeduction.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTRecordReader.h
M clang/lib/APINotes/APINotesManager.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/ParentMapContext.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TemplateName.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Frontend/SerializedDiagnosticPrinter.cpp
M clang/lib/Headers/avx10_2_512bf16intrin.h
M clang/lib/Headers/avx10_2_512convertintrin.h
M clang/lib/Headers/avx10_2_512satcvtintrin.h
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Headers/avx10_2convertintrin.h
M clang/lib/Headers/avx10_2satcvtintrin.h
M clang/lib/Index/FileIndexRecord.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Sema/HeuristicResolver.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
M clang/test/AST/ByteCode/new-delete.cpp
R clang/test/AST/HLSL/ast-dump-comment-cbuffe-tbufferr.hlsl
A clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
A clang/test/AST/HLSL/cbuffer.hlsl
A clang/test/AST/HLSL/cbuffer_and_namespaces.hlsl
R clang/test/AST/HLSL/cbuffer_tbuffer.hlsl
M clang/test/AST/HLSL/packoffset.hlsl
M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
A clang/test/AST/ast-dump-APValue-lvalue.cpp
M clang/test/AST/ast-dump-APValue-todo.cpp
A clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-entry-point.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-0x.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/fixed-expansion.cpp
M clang/test/CXX/temp/temp.param/p12.cpp
M clang/test/CodeCompletion/member-access.cpp
A clang/test/CodeGen/AArch64/builtin-shufflevector-fp8.c
M clang/test/CodeGen/AArch64/cpu-supports-target.c
M clang/test/CodeGen/AArch64/cpu-supports.c
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/CodeGen/AArch64/fmv-features.c
M clang/test/CodeGen/AArch64/fmv-priority.c
A clang/test/CodeGen/AArch64/fp8-cast.c
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c
M clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
M clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/avx10_2convert-builtins.c
M clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
M clang/test/CodeGen/arm-mfp8.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/CodeGenCXX/aarch64-mangle-neon-vectors.cpp
M clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
M clang/test/CodeGenCXX/mangle-neon-vectors.cpp
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/cbuf.hlsl
M clang/test/CodeGenHLSL/cbuf_in_namespace.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
M clang/test/CodeGenHLSL/static_global_and_function_in_cb.hlsl
M clang/test/Driver/arm-mfpu.c
M clang/test/Driver/cuda-cross-compiling.c
A clang/test/Driver/fno-plt.c
M clang/test/Driver/linker-wrapper-image.c
M clang/test/Driver/linux-as.c
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mscq.c
A clang/test/Driver/loongarch-relax-features.c
M clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/wasm-toolchain.c
M clang/test/Headers/__cpuidex_conflict.c
A clang/test/Headers/crash-instantiated-in-scope-cxx-modules5.cpp
M clang/test/Index/crash-recovery-modules.m
M clang/test/Modules/cxx-templates.cpp
M clang/test/Modules/empty.modulemap
A clang/test/Modules/gmodules-codegenopts.c
A clang/test/Modules/module-local-hidden-friend-2.cppm
M clang/test/Modules/preferred_name.cppm
M clang/test/OpenMP/assumes_include_nvptx.cpp
M clang/test/OpenMP/nvptx_target_firstprivate_codegen.cpp
M clang/test/Preprocessor/arm-target-features.c
A clang/test/Preprocessor/builtin_aux_info.cpp
A clang/test/Preprocessor/deprecate-threads-macro-definition-msvc1939.c
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init-arm.c
M clang/test/Preprocessor/init-csky.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/init-mips.c
M clang/test/Preprocessor/init-ppc.c
M clang/test/Preprocessor/init-ppc64.c
M clang/test/Preprocessor/init-s390x.c
M clang/test/Preprocessor/init-v7k-compat.c
M clang/test/Preprocessor/init-ve.c
M clang/test/Preprocessor/init-x86.c
M clang/test/Preprocessor/init.c
A clang/test/Preprocessor/macro-reserved-attrs-cxx11.cpp
A clang/test/Sema/aarch64-fp8-cast.c
M clang/test/Sema/arm-mfp8.cpp
M clang/test/Sema/attr-target-version.c
M clang/test/SemaCXX/alias-template.cpp
A clang/test/SemaCXX/array-type-trait-with-template.cpp
M clang/test/SemaCXX/cxx1z-constexpr-lambdas.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
M clang/test/SemaCXX/make_integer_seq.cpp
M clang/test/SemaSYCL/sycl-kernel-entry-point-attr-appertainment.cpp
M clang/test/SemaTemplate/address_space-dependent.cpp
M clang/test/SemaTemplate/cwg2398.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/SemaTemplate/temp_arg_nontype.cpp
M clang/test/SemaTemplate/temp_arg_template.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/test/Templight/templight-prior-template-arg.cpp
M clang/test/lit.cfg.py
M clang/tools/driver/CMakeLists.txt
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CIndexDiagnostic.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestTableGen.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M clang/utils/perf-training/CMakeLists.txt
M clang/utils/perf-training/perf-helper.py
M clang/www/OpenProjects.html
M clang/www/cxx_dr_status.html
M compiler-rt/lib/asan/tests/asan_test.cpp
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/apple.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/lsan/lsan_common_linux.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_getauxval.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
M compiler-rt/test/profile/Linux/Inputs/instrprof-value-merge.c
M compiler-rt/test/profile/Linux/binary-id.c
M compiler-rt/test/profile/Linux/profile-version.c
M compiler-rt/test/profile/Windows/binary-id.c
A compiler-rt/test/tysan/ignorelist.c
A compiler-rt/test/tysan/ignorelist.h
A compiler-rt/test/tysan/preprocessor.c
M flang/include/flang/Common/api-attrs.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/CUDA/kernel.h
A flang/include/flang/Runtime/CUDA/pointer.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.cpp
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/module/cudadevice.f90
M flang/runtime/CUDA/CMakeLists.txt
M flang/runtime/CUDA/kernel.cpp
A flang/runtime/CUDA/pointer.cpp
M flang/runtime/exceptions.cpp
M flang/runtime/stop.cpp
M flang/test/Driver/fast-math.f90
M flang/test/Driver/fsave-main-program.f90
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-gpu-launch-func.mlir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-devptr.cuf
M flang/test/Lower/HLFIR/elemental-intrinsics.f90
M flang/test/Lower/Intrinsics/acos.f90
M flang/test/Lower/Intrinsics/ieee_next.f90
A flang/test/Lower/OpenMP/Todo/dispatch.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/derived-type-allocatable.f90
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/fsave-main-program.f90
M flang/test/Lower/trigonometric-intrinsics.f90
A flang/test/Parser/OpenMP/dispatch.f90
A flang/test/Semantics/OpenMP/dispatch.f90
M flang/test/Semantics/cuf-device-procedures01.cuf
M flang/test/Semantics/cuf09.cuf
M flang/test/Semantics/reduce.cuf
M libc/CMakeLists.txt
M libc/benchmarks/distributions/README.md
M libc/benchmarks/gpu/CMakeLists.txt
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/CMakeLists.txt
M libc/docs/dev/printf_behavior.rst
M libc/docs/dev/undefined_behavior.rst
M libc/docs/gpu/rpc.rst
M libc/docs/headers/index.rst
M libc/docs/platform_support.rst
M libc/fuzzing/__support/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/pthread.yaml
M libc/include/stdfix.yaml
M libc/include/strings.yaml
M libc/include/sys/uio.yaml
M libc/include/wchar.yaml
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/macros/null_check.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/spin_lock.h
M libc/src/__support/time/windows/CMakeLists.txt
M libc/src/math/nvptx/CMakeLists.txt
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/gpu/free.cpp
M libc/src/stdlib/gpu/malloc.cpp
M libc/src/string/CMakeLists.txt
M libc/src/string/string_utils.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcslen.cpp
A libc/src/wchar/wcslen.h
M libc/test/src/__support/File/CMakeLists.txt
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/exhaustive/exhaustive_test.h
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/nan_test.cpp
M libc/test/src/math/smoke/nanf128_test.cpp
M libc/test/src/math/smoke/nanf16_test.cpp
M libc/test/src/math/smoke/nanf_test.cpp
M libc/test/src/math/smoke/nanl_test.cpp
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/stdfix/CMakeLists.txt
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/sys/resource/CMakeLists.txt
M libc/test/src/sys/select/CMakeLists.txt
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/wait/CMakeLists.txt
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcslen_test.cpp
M libc/utils/docgen/aio.yaml
A libc/utils/docgen/cpio.yaml
M libc/utils/docgen/net/if.yaml
M libc/utils/docgen/netinet/in.yaml
M libc/utils/docgen/sys/resource.yaml
M libc/utils/docgen/sys/stat.yaml
M libc/utils/docgen/sys/time.yaml
M libc/utils/docgen/sys/wait.yaml
M libc/utils/docgen/termios.yaml
A libc/utils/docgen/unistd.yaml
M libc/utils/mathtools/worst_case.sollya
M libclc/amdgpu/lib/SOURCES
R libclc/amdgpu/lib/math/nextafter.cl
M libclc/clc/include/clc/clcmacro.h
A libclc/clc/include/clc/math/binary_decl_with_scalar_second_arg.inc
A libclc/clc/include/clc/math/clc_nextafter.h
M libclc/clc/include/clc/relational/clc_isnan.h
M libclc/clc/include/clc/relational/relational.h
A libclc/clc/include/clc/shared/binary_decl.inc
M libclc/clc/lib/clspv/SOURCES
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_nextafter.cl
M libclc/clc/lib/generic/relational/clc_isequal.cl
M libclc/clc/lib/generic/relational/clc_isgreater.cl
M libclc/clc/lib/generic/relational/clc_isgreaterequal.cl
M libclc/clc/lib/generic/relational/clc_isless.cl
M libclc/clc/lib/generic/relational/clc_islessequal.cl
M libclc/clc/lib/generic/relational/clc_islessgreater.cl
M libclc/clc/lib/generic/relational/clc_isnotequal.cl
M libclc/clc/lib/spirv/SOURCES
M libclc/clc/lib/spirv64/SOURCES
M libclc/clspv/lib/SOURCES
R libclc/clspv/lib/math/nextafter.cl
R libclc/clspv/lib/math/nextafter.inc
R libclc/generic/include/clc/math/binary_decl.inc
M libclc/generic/include/clc/math/fmax.h
M libclc/generic/include/clc/math/fmin.h
R libclc/generic/include/math/clc_nextafter.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/nextafter.cl
R libclc/ptx/lib/SOURCES
R libclc/ptx/lib/math/nextafter.cl
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/FormatPaper.csv
M libcxx/docs/TestingLibcxx.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/exception.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/leap_second.h
M libcxx/include/__chrono/local_info.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/sys_info.h
M libcxx/include/__chrono/time_zone.h
M libcxx/include/__chrono/time_zone_link.h
M libcxx/include/__chrono/tzdb.h
M libcxx/include/__chrono/tzdb_list.h
A libcxx/include/__chrono/utc_clock.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__compare/compare_three_way_result.h
M libcxx/include/__config
M libcxx/include/__cxx03/__locale_dir/locale_base_api/android.h
M libcxx/include/__flat_map/flat_map.h
A libcxx/include/__flat_map/flat_multimap.h
A libcxx/include/__flat_map/sorted_equivalent.h
A libcxx/include/__flat_map/utils.h
M libcxx/include/__format/buffer.h
M libcxx/include/__format/format_arg.h
M libcxx/include/__format/format_functions.h
M libcxx/include/__functional/is_transparent.h
M libcxx/include/__locale_dir/locale_base_api/android.h
M libcxx/include/__numeric/pstl.h
M libcxx/include/__ranges/range_adaptor.h
M libcxx/include/__type_traits/add_cv_quals.h
M libcxx/include/__type_traits/add_lvalue_reference.h
M libcxx/include/__type_traits/add_pointer.h
M libcxx/include/__type_traits/add_rvalue_reference.h
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/alignment_of.h
M libcxx/include/__type_traits/common_reference.h
M libcxx/include/__type_traits/conditional.h
M libcxx/include/__type_traits/conjunction.h
M libcxx/include/__type_traits/copy_cvref.h
M libcxx/include/__type_traits/datasizeof.h
M libcxx/include/__type_traits/decay.h
M libcxx/include/__type_traits/disjunction.h
M libcxx/include/__type_traits/enable_if.h
M libcxx/include/__type_traits/extent.h
M libcxx/include/__type_traits/has_unique_object_representation.h
M libcxx/include/__type_traits/has_virtual_destructor.h
M libcxx/include/__type_traits/integral_constant.h
M libcxx/include/__type_traits/invoke.h
M libcxx/include/__type_traits/is_abstract.h
M libcxx/include/__type_traits/is_aggregate.h
M libcxx/include/__type_traits/is_always_bitcastable.h
M libcxx/include/__type_traits/is_arithmetic.h
M libcxx/include/__type_traits/is_array.h
M libcxx/include/__type_traits/is_assignable.h
M libcxx/include/__type_traits/is_base_of.h
M libcxx/include/__type_traits/is_bounded_array.h
M libcxx/include/__type_traits/is_class.h
M libcxx/include/__type_traits/is_compound.h
M libcxx/include/__type_traits/is_const.h
M libcxx/include/__type_traits/is_constructible.h
M libcxx/include/__type_traits/is_convertible.h
M libcxx/include/__type_traits/is_destructible.h
M libcxx/include/__type_traits/is_empty.h
M libcxx/include/__type_traits/is_enum.h
M libcxx/include/__type_traits/is_execution_policy.h
M libcxx/include/__type_traits/is_final.h
M libcxx/include/__type_traits/is_floating_point.h
M libcxx/include/__type_traits/is_function.h
M libcxx/include/__type_traits/is_fundamental.h
M libcxx/include/__type_traits/is_implicit_lifetime.h
M libcxx/include/__type_traits/is_integral.h
M libcxx/include/__type_traits/is_literal_type.h
M libcxx/include/__type_traits/is_member_pointer.h
M libcxx/include/__type_traits/is_nothrow_assignable.h
M libcxx/include/__type_traits/is_nothrow_constructible.h
M libcxx/include/__type_traits/is_nothrow_convertible.h
M libcxx/include/__type_traits/is_nothrow_destructible.h
M libcxx/include/__type_traits/is_null_pointer.h
M libcxx/include/__type_traits/is_object.h
M libcxx/include/__type_traits/is_pod.h
M libcxx/include/__type_traits/is_pointer.h
M libcxx/include/__type_traits/is_polymorphic.h
M libcxx/include/__type_traits/is_reference.h
M libcxx/include/__type_traits/is_same.h
M libcxx/include/__type_traits/is_scalar.h
M libcxx/include/__type_traits/is_signed.h
M libcxx/include/__type_traits/is_standard_layout.h
M libcxx/include/__type_traits/is_swappable.h
M libcxx/include/__type_traits/is_trivial.h
M libcxx/include/__type_traits/is_trivially_assignable.h
M libcxx/include/__type_traits/is_trivially_constructible.h
M libcxx/include/__type_traits/is_trivially_copyable.h
M libcxx/include/__type_traits/is_trivially_destructible.h
M libcxx/include/__type_traits/is_unbounded_array.h
M libcxx/include/__type_traits/is_union.h
M libcxx/include/__type_traits/is_unsigned.h
M libcxx/include/__type_traits/is_void.h
M libcxx/include/__type_traits/is_volatile.h
M libcxx/include/__type_traits/make_signed.h
M libcxx/include/__type_traits/make_unsigned.h
M libcxx/include/__type_traits/negation.h
M libcxx/include/__type_traits/rank.h
M libcxx/include/__type_traits/remove_all_extents.h
M libcxx/include/__type_traits/remove_const.h
M libcxx/include/__type_traits/remove_cv.h
M libcxx/include/__type_traits/remove_cvref.h
M libcxx/include/__type_traits/remove_extent.h
M libcxx/include/__type_traits/remove_pointer.h
M libcxx/include/__type_traits/remove_reference.h
M libcxx/include/__type_traits/remove_volatile.h
M libcxx/include/__type_traits/result_of.h
M libcxx/include/__type_traits/type_identity.h
M libcxx/include/__type_traits/type_list.h
M libcxx/include/__type_traits/underlying_type.h
M libcxx/include/__type_traits/unwrap_ref.h
M libcxx/include/chrono
M libcxx/include/execution
M libcxx/include/flat_map
M libcxx/include/iosfwd
M libcxx/include/module.modulemap
M libcxx/include/streambuf
M libcxx/include/syncstream
M libcxx/include/variant
M libcxx/include/version
M libcxx/modules/std/chrono.inc
M libcxx/modules/std/flat_map.inc
M libcxx/modules/std/iosfwd.inc
M libcxx/modules/std/syncstream.inc
M libcxx/src/verbose_abort.cpp
A libcxx/test/benchmarks/utc_clock.bench.cpp
A libcxx/test/libcxx/algorithms/no_specializations.verify.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.map/assert.input_range.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.map/assert.sorted_unique.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.multimap/assert.input_range.pass.cpp
A libcxx/test/libcxx/containers/container.adaptors/flat.multimap/assert.sorted_equivalent.pass.cpp
R libcxx/test/libcxx/containers/containers.adaptors/flat.map/assert.input_range.pass.cpp
R libcxx/test/libcxx/containers/containers.adaptors/flat.map/assert.sorted_unique.pass.cpp
M libcxx/test/libcxx/diagnostics/chrono.nodiscard.verify.cpp
M libcxx/test/libcxx/experimental/fexperimental-library.compile.pass.cpp
A libcxx/test/libcxx/language.support/no_specializations.verify.cpp
A libcxx/test/libcxx/ranges/no_specializations.verify.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/get_leap_second_info.pass.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/time.clock.utc.members/from_sys.pass.cpp
A libcxx/test/libcxx/time/time.clock/time.clock.utc/time.clock.utc.members/to_sys.pass.cpp
M libcxx/test/libcxx/type_traits/is_specialization.verify.cpp
A libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/format/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/no_specializations.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.map.syn/sorted_equivalent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/empty.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/empty.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.compile.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.verify.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/default_noexcept.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/dtor_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/empty.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/empty.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/size.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/assign_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/compare.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/containers.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.addressof.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct_pmr.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/dtor_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_alloc.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_clears.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_exceptions.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_noexcept.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/pmr.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_container.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.erasure/erase_if.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.erasure/erase_if_exceptions.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator_comparison.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator_concept_conformance.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/range_concept_conformance.compile.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/reverse_iterator.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/clear.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/emplace.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/emplace_hint.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/extract.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_cv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_cv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_rv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_rv.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_sorted_initializer_list.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_sorted_iter_iter.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/replace.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_exception.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_free.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_member.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/comp.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/keys_values.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/contains.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/contains_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/count.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/count_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/equal_range.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/equal_range_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/find.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/find_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/lower_bound.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/lower_bound_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/upper_bound.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/upper_bound_transparent.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/helpers.h
A libcxx/test/std/containers/container.adaptors/flat.multimap/incomplete_type.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/op_compare.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/types.compile.pass.cpp
M libcxx/test/std/input.output/iostream.format/print.fun/includes.compile.pass.cpp
M libcxx/test/std/input.output/iostream.format/print.fun/no_file_description.pass.cpp
A libcxx/test/std/language.support/support.limits/support.limits.general/flat_map.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/syncstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/localization/locale.stdcvt/depr.verify.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.buffer/depr.verify.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/depr.verify.cpp
M libcxx/test/std/strings/basic.string/string.capacity/reserve.deprecated_in_cxx20.verify.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/get_leap_second_info.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/leap_second_info.members.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/from_sys.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/now.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/time.clock.utc.members/to_sys.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/types.compile.pass.cpp
A libcxx/test/std/time/time.clock/time.clock.utc/utc_time.ostream.pass.cpp
A libcxx/test/std/time/time.syn/formatter.utc_time.pass.cpp
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
M libcxx/test/std/utilities/format/format.functions/format_tests.h
M libcxx/test/support/test_macros.h
M libcxx/test/tools/clang_tidy_checks/internal_ftm_use.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/params.py
M libcxxabi/src/abort_message.cpp
M lld/COFF/Chunks.cpp
M lld/COFF/DLL.cpp
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
M lld/COFF/Options.td
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/Common/ErrorHandler.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Writer.cpp
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/BPSectionOrderer.h
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/Options.td
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/docs/ReleaseNotes.rst
M lld/test/COFF/arm64ec-import.test
M lld/test/COFF/arm64x-export.test
A lld/test/COFF/arm64x-import.test
M lld/test/COFF/empty-section-decl.yaml
M lld/test/COFF/start-lib.ll
M lld/test/ELF/basic.s
M lld/test/ELF/compressed-input-err.s
M lld/test/ELF/gnustack.s
R lld/test/ELF/hip-section-layout.s
M lld/test/ELF/invalid-eh-frame2.s
M lld/test/ELF/invalid-eh-frame4.s
M lld/test/ELF/invalid-eh-frame6.s
M lld/test/ELF/invalid/bad-reloc-target.test
M lld/test/ELF/invalid/linkorder-invalid-sec.test
M lld/test/ELF/invalid/merge-invalid-size.s
M lld/test/ELF/invalid/merge-writable.s
M lld/test/ELF/invalid/section-alignment.test
M lld/test/ELF/invalid/section-alignment2.s
M lld/test/ELF/invalid/section-index.test
M lld/test/ELF/invalid/symbol-name.test
M lld/test/ELF/lto/cache-warnings.ll
M lld/test/ELF/lto/ltopasses-custom.ll
M lld/test/ELF/lto/verify-invalid.ll
M lld/test/ELF/lto/version-script.ll
M lld/test/ELF/lto/version-script2.ll
R lld/test/ELF/merge-string-error.s
M lld/test/ELF/mergeable-errors.s
M lld/test/ELF/relocation-past-merge-end.s
M lld/test/ELF/stdout.s
M lld/test/MachO/cfstring-dedup.s
M lldb/bindings/interface/SBSaveCoreOptionsDocstrings.i
M lldb/bindings/interface/SBThreadExtensions.i
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/include/lldb/Host/Time.h
M lldb/include/lldb/Symbol/Function.h
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Host/CMakeLists.txt
R lldb/source/Host/android/LibcGlue.cpp
M lldb/source/Host/common/Host.cpp
M lldb/source/Host/common/PseudoTerminal.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/posix/DomainSocket.cpp
M lldb/source/Host/posix/HostInfoPosix.cpp
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
M lldb/source/Host/windows/PipeWindows.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Symbol/Function.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/UnixSignals.cpp
M lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
M lldb/test/API/commands/frame/diagnose/array/TestArray.py
M lldb/test/API/commands/frame/diagnose/bad-reference/TestBadReference.py
M lldb/test/API/commands/frame/diagnose/complicated-expression/TestComplicatedExpression.py
M lldb/test/API/commands/frame/diagnose/dereference-argument/TestDiagnoseDereferenceArgument.py
M lldb/test/API/commands/frame/diagnose/dereference-function-return/TestDiagnoseDereferenceFunctionReturn.py
M lldb/test/API/commands/frame/diagnose/dereference-this/TestDiagnoseDereferenceThis.py
M lldb/test/API/commands/frame/diagnose/inheritance/TestDiagnoseInheritance.py
M lldb/test/API/commands/frame/diagnose/local-variable/TestLocalVariable.py
M lldb/test/API/commands/frame/diagnose/virtual-method-call/TestDiagnoseDereferenceVirtualMethodCall.py
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/atomic/TestLibCxxAtomic.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/initializerlist/TestInitializerList.py
M lldb/test/API/functionalities/location-list-lookup/TestLocationListLookup.py
M lldb/test/API/lang/cpp/std-function-recognizer/TestStdFunctionRecognizer.py
M lldb/test/API/lang/objc/print-obj/TestPrintObj.py
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
M lldb/test/API/linux/aarch64/gcs/main.c
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/API/macosx/universal/TestUniversal.py
A lldb/test/API/tools/lldb-dap/progress/Makefile
A lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
A lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
A lldb/test/API/tools/lldb-dap/progress/main.cpp
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
M lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-function.s
M lldb/tools/lldb-dap/ProgressEvent.cpp
M lldb/tools/lldb-dap/ProgressEvent.h
M lldb/unittests/Signals/UnixSignalsTest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
M llvm/cmake/config-ix.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/docs/Contributing.rst
M llvm/docs/DeveloperPolicy.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SandboxIR.md
M llvm/docs/TestingGuide.rst
M llvm/examples/BrainF/BrainF.cpp
M llvm/examples/ExceptionDemo/CMakeLists.txt
M llvm/examples/ExceptionDemo/ExceptionDemo.cpp
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachineJumpTableInfo.h
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/Config/config.h.cmake
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_loongarch.h
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/include/llvm/FuzzMutate/OpDescriptor.h
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/PassManagerInternal.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/include/llvm/ObjCopy/ELF/ELFConfig.h
M llvm/include/llvm/Object/COFF.h
M llvm/include/llvm/Option/OptTable.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/SandboxIR/Utils.h
M llvm/include/llvm/SandboxIR/Value.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Support/Threading.h
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/include/llvm/Transforms/Instrumentation/LowerAllowCheckPass.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/Instrumentation.h
A llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
M llvm/include/llvm/Transforms/Utils/SSAUpdater.h
M llvm/include/llvm/Transforms/Utils/ValueMapper.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/LoopNestAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineLoopUtils.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/MachineSSAContext.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/CodeGen/StackColoring.cpp
A llvm/lib/CodeGen/StaticDataSplitter.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/FileCheck/FileCheckImpl.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/IRMutator.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/IR/InlineAsm.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/ProfileSummary.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/Option/OptTable.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/SandboxIR/Region.cpp
M llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/Unix/DynamicLibrary.inc
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Unix/Signals.inc
M llvm/lib/Support/Unix/Unix.h
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/AArch64/AArch64FMV.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.h
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMCallingConv.cpp
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/BPF/BPFASpaceCastSimplifyPass.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.h
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/Target/Xtensa/CMakeLists.txt
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.h
M llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
R llvm/lib/Target/Xtensa/XtensaUtils.cpp
R llvm/lib/Target/Xtensa/XtensaUtils.h
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/Coroutines/CoroCloner.h
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/MaterializationUtils.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARC.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/DivRemPairs.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/LoopSink.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SCCP.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/Sink.cpp
M llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
M llvm/lib/Transforms/Utils/GuardUtils.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/Instrumentation.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
A llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
M llvm/lib/Transforms/Utils/MoveAutoInit.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/VNCoercion.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromMetadata.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Analysis/CostModel/X86/ctlz-codesize.ll
M llvm/test/Analysis/CostModel/X86/ctlz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/ctlz.ll
M llvm/test/Analysis/CostModel/X86/cttz-codesize.ll
M llvm/test/Analysis/CostModel/X86/cttz-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/cttz.ll
M llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll
M llvm/test/Analysis/LoopAccessAnalysis/pointer-phis.ll
M llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
M llvm/test/Analysis/ScalarEvolution/cycled_phis.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
M llvm/test/Analysis/ScalarEvolution/implied-via-division.ll
A llvm/test/Analysis/ScalarEvolution/pr123550.ll
M llvm/test/Analysis/ScalarEvolution/unknown_phis.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
M llvm/test/Analysis/ValueTracking/implied-condition-samesign.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
M llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
M llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
M llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
M llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
M llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16.ll
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/stack-hazard-windows.ll
M llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
A llvm/test/CodeGen/AArch64/wincfi-missing-seh-directives.ll
A llvm/test/CodeGen/AArch64/zeroing-forms-flogb.ll
A llvm/test/CodeGen/AArch64/zeroing-forms-frint-frecpx-fsqrt.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/abs_i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-alias.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
A llvm/test/CodeGen/AMDGPU/lower-indirect-lds-references.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
A llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-ignorable-exec-use.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-lane-mask.mir
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.mir
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
R llvm/test/CodeGen/AMDGPU/power-sched-no-cycle.mir
M llvm/test/CodeGen/AMDGPU/pr51516.mir
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
A llvm/test/CodeGen/Hexagon/swp-ws-live-intervals-issue123165.mir
A llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg-128.ll
M llvm/test/CodeGen/LoongArch/smul-with-overflow.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/CodeGen/Mips/cconv/vector.ll
A llvm/test/CodeGen/Mips/llvm-ir/sdiv-freebsd.ll
M llvm/test/CodeGen/Mips/msa/basic_operations.ll
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
A llvm/test/CodeGen/NVPTX/convert-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
A llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/sm-version.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
A llvm/test/CodeGen/RISCV/rvv/vlopt-same-vl.ll
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/SystemZ/machinelicm-sunk-kill-flags.mir
A llvm/test/CodeGen/SystemZ/pr124001.ll
M llvm/test/CodeGen/Thumb/smul_fix.ll
M llvm/test/CodeGen/Thumb/smul_fix_sat.ll
M llvm/test/CodeGen/Thumb/umul_fix.ll
M llvm/test/CodeGen/Thumb/umul_fix_sat.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/X86/addcarry.ll
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
M llvm/test/CodeGen/X86/avgflooru-i128.ll
M llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
M llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512-intrinsics.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/bit_ceil.ll
M llvm/test/CodeGen/X86/canonicalize-vars.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
M llvm/test/CodeGen/X86/fmuladd-soft-float.ll
M llvm/test/CodeGen/X86/huge-stack-offset.ll
M llvm/test/CodeGen/X86/i128-abi.ll
A llvm/test/CodeGen/X86/jump-table-partition.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/muloti.ll
M llvm/test/CodeGen/X86/pr89877.ll
M llvm/test/CodeGen/X86/pr90847.ll
M llvm/test/CodeGen/X86/pr92569.ll
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/scheduler-backtracking.ll
M llvm/test/CodeGen/X86/smul-with-overflow.ll
M llvm/test/CodeGen/X86/smul_fix_sat.ll
M llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
M llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
M llvm/test/CodeGen/X86/stack-clash-huge.ll
M llvm/test/CodeGen/X86/subcarry.ll
M llvm/test/CodeGen/X86/tail-dup-pred-succ-size.mir
M llvm/test/CodeGen/X86/uadd_sat_vec.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
M llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll
M llvm/test/CodeGen/X86/vector-reduce-and-scalar.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
M llvm/test/CodeGen/X86/vector-trunc-nowrap.ll
M llvm/test/CodeGen/X86/xmulo.ll
A llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
A llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size-too-big.mir
M llvm/test/DebugInfo/X86/set.ll
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_relax_align.s
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_reloc_addsub.s
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
M llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
M llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
M llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
M llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
M llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
M llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
M llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
M llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
M llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
M llvm/test/MC/AArch64/basic-a64-instructions.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
A llvm/test/MC/Disassembler/RISCV/vmask-carry-in.txt
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
M llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt
A llvm/test/MC/RISCV/rvv/vmask-carry-in.s
A llvm/test/MC/RISCV/rvv/xsfvfwmacc-invalid.s
A llvm/test/MC/RISCV/rvv/xsfvqmacc-invalid.s
A llvm/test/MC/RISCV/xqcilo-aliases-valid.s
A llvm/test/MC/RISCV/xqcilo-invalid.s
A llvm/test/MC/RISCV/xqcilo-valid.s
M llvm/test/MC/X86/avx10.2-bf16-32-att.s
M llvm/test/MC/X86/avx10.2-bf16-32-intel.s
M llvm/test/MC/X86/avx10.2-bf16-64-att.s
M llvm/test/MC/X86/avx10.2-bf16-64-intel.s
M llvm/test/MC/X86/avx10.2convert-32-att.s
M llvm/test/MC/X86/avx10.2convert-32-intel.s
M llvm/test/MC/X86/avx10.2convert-64-att.s
M llvm/test/MC/X86/avx10.2convert-64-intel.s
M llvm/test/MC/X86/avx10.2satcvt-32-att.s
M llvm/test/MC/X86/avx10.2satcvt-32-intel.s
M llvm/test/MC/X86/avx10.2satcvt-64-att.s
M llvm/test/MC/X86/avx10.2satcvt-64-intel.s
R llvm/test/Object/coff-sec-sym.test
M llvm/test/ObjectYAML/MachO/section_data.yaml
M llvm/test/Other/crash-stack-trace.ll
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/ThinLTO/X86/devirt_check.ll
M llvm/test/Transforms/ConstraintElimination/eq.ll
M llvm/test/Transforms/ConstraintElimination/ne.ll
M llvm/test/Transforms/ConstraintElimination/pr105785.ll
M llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
A llvm/test/Transforms/FunctionSpecialization/solver-constant-strictfpmetadata.ll
M llvm/test/Transforms/GVN/vscale.ll
M llvm/test/Transforms/GlobalOpt/resolve-fmv-ifunc.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
M llvm/test/Transforms/InstCombine/fsh.ll
M llvm/test/Transforms/InstCombine/known-phi-recurse.ll
M llvm/test/Transforms/InstCombine/scalable-vector-struct.ll
M llvm/test/Transforms/InstCombine/select-cmp.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopDistribute/pointer-phi-in-loop.ll
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/deep-loop-nest.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
A llvm/test/Transforms/NewGVN/vscale.ll
M llvm/test/Transforms/OpenMP/always_inline_device.ll
M llvm/test/Transforms/OpenMP/attributor_module_slice_reproducer.ll
M llvm/test/Transforms/OpenMP/barrier_removal.ll
M llvm/test/Transforms/OpenMP/bug66687.ll
M llvm/test/Transforms/OpenMP/custom_state_machines.ll
M llvm/test/Transforms/OpenMP/custom_state_machines_pre_lto.ll
M llvm/test/Transforms/OpenMP/custom_state_machines_remarks.ll
M llvm/test/Transforms/OpenMP/deduplication_target.ll
M llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll
M llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold_optnone.ll
M llvm/test/Transforms/OpenMP/global_constructor.ll
M llvm/test/Transforms/OpenMP/globalization_remarks.ll
M llvm/test/Transforms/OpenMP/gpu_kernel_detection_remarks.ll
M llvm/test/Transforms/OpenMP/gpu_state_machine_function_ptr_replacement.ll
M llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
M llvm/test/Transforms/OpenMP/nested_parallelism.ll
M llvm/test/Transforms/OpenMP/parallel_level_fold.ll
M llvm/test/Transforms/OpenMP/remove_globalization.ll
M llvm/test/Transforms/OpenMP/replace_globalization.ll
M llvm/test/Transforms/OpenMP/single_threaded_execution.ll
M llvm/test/Transforms/OpenMP/spmdization.ll
M llvm/test/Transforms/OpenMP/spmdization_assumes.ll
M llvm/test/Transforms/OpenMP/spmdization_constant_prop.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding_two_reaching_kernels.ll
M llvm/test/Transforms/OpenMP/spmdization_indirect.ll
M llvm/test/Transforms/OpenMP/spmdization_no_guarding_two_reaching_kernels.ll
M llvm/test/Transforms/OpenMP/spmdization_remarks.ll
M llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Transforms/PGOProfile/memprof_loop_unroll.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-exp.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/lit.local.cfg
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/min_max.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr.ll
M llvm/test/Transforms/SLPVectorizer/X86/ctlz.ll
M llvm/test/Transforms/SLPVectorizer/X86/cttz.ll
A llvm/test/Transforms/SLPVectorizer/X86/extracts-non-extendable.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
A llvm/test/Transforms/SandboxVectorizer/cross_bbs.ll
A llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/test/Transforms/SimplifyCFG/switch-branch-fold-indirectbr-102351.ll
A llvm/test/Verifier/dicompositetype-elements-null.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets.s
M llvm/test/tools/llvm-mca/X86/BtVer2/clear-super-register-1.s
A llvm/test/tools/llvm-ml/bare_proc_error.asm
A llvm/test/tools/llvm-ml/no_section_error.asm
A llvm/test/tools/llvm-objcopy/ELF/remove-note.test
A llvm/test/tools/llvm-opt-report/Inputs/scalable.c
A llvm/test/tools/llvm-opt-report/Inputs/scalable.yaml
A llvm/test/tools/llvm-opt-report/scalabe.test
M llvm/test/tools/llvm-profdata/cs-sample-nested-profile.test
M llvm/test/tools/llvm-profdata/general.proftext
M llvm/test/tools/llvm-profdata/sample-summary.test
M llvm/test/tools/llvm-profdata/suppl-instr-with-sample.test
M llvm/test/tools/llvm-profdata/vtable-value-prof.test
M llvm/test/tools/yaml2obj/ELF/custom-fill.yaml
M llvm/test/tools/yaml2obj/ELF/section-type.yaml
M llvm/tools/bugpoint/Miscompilation.cpp
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-opt-report/OptReport.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-reduce/deltas/ReduceBasicBlocks.cpp
M llvm/tools/llvm-stress/llvm-stress.cpp
M llvm/unittests/Analysis/AssumeBundleQueriesTest.cpp
M llvm/unittests/Analysis/CGSCCPassManagerTest.cpp
M llvm/unittests/Analysis/MemoryProfileInfoTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/Analysis/ProfileSummaryInfoTest.cpp
M llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/LegacyPassManagerTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/Option/OptionMarshallingTest.cpp
M llvm/unittests/SandboxIR/PassTest.cpp
M llvm/unittests/SandboxIR/RegionTest.cpp
M llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
M llvm/unittests/Target/SPIRV/SPIRVAPITest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Scalar/LICMTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/include/clang/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
M mlir/cmake/modules/AddMLIRPython.cmake
M mlir/docs/DefiningDialects/Assembly.md
M mlir/docs/Dialects/GPU.md
M mlir/docs/ReleaseNotes.md
M mlir/docs/SPIRVToLLVMDialectConversion.md
M mlir/examples/toy/Ch4/mlir/Dialect.cpp
M mlir/examples/toy/Ch5/mlir/Dialect.cpp
M mlir/examples/toy/Ch6/mlir/Dialect.cpp
M mlir/examples/toy/Ch7/mlir/Dialect.cpp
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td
A mlir/include/mlir/Dialect/SPIRV/IR/SPIRVPrimitiveOps.td
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/IR/Attributes.h
M mlir/include/mlir/IR/BuiltinDialectBytecode.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/include/mlir/IR/Location.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeConv2D.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/ExecutionEngine/VulkanRuntimeWrappers.cpp
M mlir/lib/IR/Attributes.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/Location.cpp
M mlir/lib/IR/OperationSupport.cpp
M mlir/lib/Interfaces/SideEffectInterfaces.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Transforms/Utils/Inliner.cpp
M mlir/python/mlir/dialects/_ods_common.py
M mlir/test/CAPI/ir.c
M mlir/test/CMakeLists.txt
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/invalid.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SPIRV/IR/availability.mlir
A mlir/test/Dialect/SPIRV/IR/primitive-ops.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-conv2d.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/vector-break-down-bitcast.mlir
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-addi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-cmpi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-constants-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-max-min-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-muli-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shli-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrsi-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrui-i16.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-sitofp-i32.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-uitofp-i32.mlir
M mlir/test/Integration/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
M mlir/test/Integration/Dialect/Async/CPU/microbench-scf-async-parallel-for.mlir
M mlir/test/Integration/Dialect/Async/CPU/test-async-parallel-for-1d.mlir
M mlir/test/Integration/Dialect/Async/CPU/test-async-parallel-for-2d.mlir
M mlir/test/Integration/Dialect/Complex/CPU/correctness.mlir
M mlir/test/Integration/Dialect/ControlFlow/assert.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-complex-sparse-constant.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
M mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/matmul-vs-matvec.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/rank-reducing-subview.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/runtime-verification.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-collapse-tensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-nwc-wcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-nhwc-hwcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-ndhwc-dhwcf-call.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-elementwise.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-expand-tensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-matmul-masked-vec.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-one-shot-bufferize.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-padtensor.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-subtensor-insert-multiple-uses.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-subtensor-insert.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-tensor-e2e.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-tensor-matmul.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Math/CPU/mathtofuncs_ctlz.mlir
M mlir/test/Integration/Dialect/MemRef/cast-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/load-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/print-memref.mlir
M mlir/test/Integration/Dialect/MemRef/reinterpret-cast-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/subview-runtime-verification.mlir
M mlir/test/Integration/Dialect/MemRef/verify-memref.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/block.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/block_majors.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_0.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_0_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_bf16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dual_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/iterator-based-kernel.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/padded_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/reshape_dot.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_abs.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_binary.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cmp.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_dim.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_foreach.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_collapse_shape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex32.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex64.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_constant_to_sparse_tensor.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_1d_nwc_wcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_55.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nchw_fchw.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d_ndhwc_dhwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_block.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_dyn.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_element.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_ptr.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2dense.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2sparse.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_coo_test.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_dilated_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_dot.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_ds.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_empty.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_expand.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_expand_shape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_foreach_slices.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_generate.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_1d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_loose.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matmul_slice.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matrix_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_mult_elt.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_reduction.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_permute.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pooling_nhwc.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_print_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_re_im.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom_prod.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom_sum.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions_min.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions_prod.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reshape.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_push_back.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_sort_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scf_nested.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_select.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_semiring_select.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sign.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sorted_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_storage.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_strided_conv_2d_nhwc_hwcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_bf16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_c32.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tanh.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tensor_mul.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tensor_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_transpose.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_transpose_coo.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_vector_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-hand.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-prune.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-gemm-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec-const.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-mma-2-4-f16.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sampled-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sddmm-lib.mlir
M mlir/test/Integration/Dialect/Standard/CPU/test-ceil-floor-pos-neg.mlir
M mlir/test/Integration/Dialect/Standard/CPU/test_subview.mlir
M mlir/test/Integration/Dialect/Tosa/CPU/test-fully-connected.mlir
M mlir/test/Integration/Dialect/Tosa/CPU/test-maxpool-dynamic.mlir
M mlir/test/Integration/Dialect/Vector/CPU/0-d-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/broadcast.mlir
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/constant-mask.mlir
M mlir/test/Integration/Dialect/Vector/CPU/contraction.mlir
M mlir/test/Integration/Dialect/Vector/CPU/create-mask-v4i1.mlir
M mlir/test/Integration/Dialect/Vector/CPU/create-mask.mlir
M mlir/test/Integration/Dialect/Vector/CPU/expand.mlir
M mlir/test/Integration/Dialect/Vector/CPU/extract-strided-slice.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/fma.mlir
M mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
M mlir/test/Integration/Dialect/Vector/CPU/index-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/insert-strided-slice.mlir
M mlir/test/Integration/Dialect/Vector/CPU/interleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedload.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-i64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-fp.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-int.mlir
M mlir/test/Integration/Dialect/Vector/CPU/print-str.mlir
M mlir/test/Integration/Dialect/Vector/CPU/realloc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f32-reassoc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f64-reassoc.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-f64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-i64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-si4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/reductions-ui4.mlir
M mlir/test/Integration/Dialect/Vector/CPU/rewrite-narrow-types.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scan.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shape-cast.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shuffle.mlir
M mlir/test/Integration/Dialect/Vector/CPU/shuffle16x16.mlir
M mlir/test/Integration/Dialect/Vector/CPU/sparse-dot-matvec.mlir
M mlir/test/Integration/Dialect/Vector/CPU/sparse-saxpy-jagged-matvec.mlir
M mlir/test/Integration/Dialect/Vector/CPU/test-deinterleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-to-loops.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-write.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transpose.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f16-f16-accum.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f32.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f16.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32-bare-ptr.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-and.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-maxsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-minsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-op.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-or.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-region.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-xor.mlir
M mlir/test/Integration/GPU/CUDA/alloc-host-shared.mlir
M mlir/test/Integration/GPU/CUDA/assert.mlir
M mlir/test/Integration/GPU/CUDA/async.mlir
M mlir/test/Integration/GPU/CUDA/gpu-to-cubin.mlir
M mlir/test/Integration/GPU/CUDA/multiple-all-reduce.mlir
M mlir/test/Integration/GPU/CUDA/printf.mlir
M mlir/test/Integration/GPU/CUDA/shuffle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/cga_cluster.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x128_stride_noswizzle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir
M mlir/test/Integration/GPU/CUDA/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir
M mlir/test/Integration/GPU/ROCM/printf.mlir
M mlir/test/Integration/GPU/ROCM/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/vecadd.mlir
M mlir/test/Integration/GPU/ROCM/vector-transferops.mlir
M mlir/test/Integration/GPU/SPIRV/double.mlir
M mlir/test/Integration/GPU/SPIRV/simple_add.mlir
M mlir/test/Integration/GPU/SYCL/gpu-addf32-to-spirv.mlir
M mlir/test/Integration/GPU/SYCL/gpu-addi64-to-spirv.mlir
M mlir/test/Integration/GPU/SYCL/gpu-reluf32-to-spirv.mlir
M mlir/test/Integration/GPU/Vulkan/addf.mlir
M mlir/test/Integration/GPU/Vulkan/addf_if.mlir
M mlir/test/Integration/GPU/Vulkan/addi.mlir
M mlir/test/Integration/GPU/Vulkan/addi8.mlir
M mlir/test/Integration/GPU/Vulkan/addui_extended.mlir
M mlir/test/Integration/GPU/Vulkan/mulf.mlir
M mlir/test/Integration/GPU/Vulkan/smul_extended.mlir
M mlir/test/Integration/GPU/Vulkan/subf.mlir
M mlir/test/Integration/GPU/Vulkan/time.mlir
M mlir/test/Integration/GPU/Vulkan/umul_extended.mlir
M mlir/test/Integration/GPU/Vulkan/vector-deinterleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-interleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-shuffle.mlir
M mlir/test/Integration/lit.local.cfg
M mlir/test/Target/Cpp/switch.mlir
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
A mlir/test/Target/SPIRV/primitive-ops.mlir
A mlir/test/Transforms/inlining-recursive-2.mlir
M mlir/test/Transforms/inlining-recursive-self.mlir
M mlir/test/Transforms/inlining-recursive.mlir
M mlir/test/lib/Dialect/Math/TestExpandMath.cpp
M mlir/test/lit.cfg.py
M mlir/test/lit.site.cfg.py.in
R mlir/test/mlir-cpu-runner/X86Vector/lit.local.cfg
R mlir/test/mlir-cpu-runner/X86Vector/math-polynomial-approx-avx2.mlir
R mlir/test/mlir-cpu-runner/async-error.mlir
R mlir/test/mlir-cpu-runner/async-func.mlir
R mlir/test/mlir-cpu-runner/async-group.mlir
R mlir/test/mlir-cpu-runner/async-value.mlir
R mlir/test/mlir-cpu-runner/async.mlir
R mlir/test/mlir-cpu-runner/bare-ptr-call-conv.mlir
R mlir/test/mlir-cpu-runner/copy.mlir
R mlir/test/mlir-cpu-runner/expand-arith-ops.mlir
R mlir/test/mlir-cpu-runner/global-constructors.mlir
R mlir/test/mlir-cpu-runner/global-memref.mlir
R mlir/test/mlir-cpu-runner/invalid.mlir
R mlir/test/mlir-cpu-runner/lit.local.cfg
R mlir/test/mlir-cpu-runner/math-polynomial-approx.mlir
R mlir/test/mlir-cpu-runner/memref-reinterpret-cast.mlir
R mlir/test/mlir-cpu-runner/memref-reshape.mlir
R mlir/test/mlir-cpu-runner/sgemm-naive-codegen.mlir
R mlir/test/mlir-cpu-runner/simple.mlir
R mlir/test/mlir-cpu-runner/test-expand-math-approx.mlir
R mlir/test/mlir-cpu-runner/unranked-memref.mlir
R mlir/test/mlir-cpu-runner/utils.mlir
R mlir/test/mlir-cpu-runner/verify-entry-point-result.mlir
R mlir/test/mlir-cpu-runner/verify-flags.mlir
R mlir/test/mlir-cpu-runner/x86-varargs.mlir
A mlir/test/mlir-runner/X86Vector/lit.local.cfg
A mlir/test/mlir-runner/X86Vector/math-polynomial-approx-avx2.mlir
A mlir/test/mlir-runner/async-error.mlir
A mlir/test/mlir-runner/async-func.mlir
A mlir/test/mlir-runner/async-group.mlir
A mlir/test/mlir-runner/async-value.mlir
A mlir/test/mlir-runner/async.mlir
A mlir/test/mlir-runner/bare-ptr-call-conv.mlir
A mlir/test/mlir-runner/copy.mlir
A mlir/test/mlir-runner/expand-arith-ops.mlir
A mlir/test/mlir-runner/global-constructors.mlir
A mlir/test/mlir-runner/global-memref.mlir
A mlir/test/mlir-runner/invalid.mlir
A mlir/test/mlir-runner/lit.local.cfg
A mlir/test/mlir-runner/math-polynomial-approx.mlir
A mlir/test/mlir-runner/memref-reinterpret-cast.mlir
A mlir/test/mlir-runner/memref-reshape.mlir
A mlir/test/mlir-runner/sgemm-naive-codegen.mlir
A mlir/test/mlir-runner/simple.mlir
A mlir/test/mlir-runner/test-expand-math-approx.mlir
A mlir/test/mlir-runner/unranked-memref.mlir
A mlir/test/mlir-runner/utils.mlir
A mlir/test/mlir-runner/verify-entry-point-result.mlir
A mlir/test/mlir-runner/verify-flags.mlir
A mlir/test/mlir-runner/x86-varargs.mlir
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/test/python/ir/location.py
M mlir/tools/CMakeLists.txt
R mlir/tools/mlir-cpu-runner/CMakeLists.txt
R mlir/tools/mlir-cpu-runner/mlir-cpu-runner.cpp
M mlir/tools/mlir-pdll/mlir-pdll.cpp
A mlir/tools/mlir-runner/CMakeLists.txt
A mlir/tools/mlir-runner/mlir-runner.cpp
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/MemoryManager.h
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RPC.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
A offload/test/libc/server.c
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/CodeGen/LoopGenerators.cpp
M polly/lib/Support/ScopHelper.cpp
M polly/lib/Transform/MaximalStaticExpansion.cpp
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/config.h
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
Rebase
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/25767fc08b81...4f96cf96febf
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