[all-commits] [llvm/llvm-project] a9d283: [llvm][CodeGen] Fix the issue caused by live inter...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Fri Jan 24 04:47:12 PST 2025
Branch: refs/heads/users/alexey-bataev/spr/slpimproved-reduction-costcodegen
Home: https://github.com/llvm/llvm-project
Commit: a9d2834508e276d0a3cc09ac549132b56796e87f
https://github.com/llvm/llvm-project/commit/a9d2834508e276d0a3cc09ac549132b56796e87f
Author: Hua Tian <akiratian at tencent.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
A llvm/test/CodeGen/Hexagon/swp-ws-live-intervals-issue123165.mir
Log Message:
-----------
[llvm][CodeGen] Fix the issue caused by live interval checking in window scheduler (#123184)
At some corner cases, the cloned MI still retains an old slot index,
which leads to the compiler crashing. This patch update the slot index
map before delete the recycled MI.
https://github.com/llvm/llvm-project/issues/123165
Commit: 847acbbc529133b2300721a809751891200f37f5
https://github.com/llvm/llvm-project/commit/847acbbc529133b2300721a809751891200f37f5
Author: epitavy <32581827+epitavy at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/examples/ExceptionDemo/CMakeLists.txt
M llvm/examples/ExceptionDemo/ExceptionDemo.cpp
Log Message:
-----------
[ExceptionDemo] Transition example from MCJIT to ORC and fix errors (#92504)
ExceptionDemo has been broken for some time. This patch fixes the
compilation errors and moves the example from MCJIT to ORC.
Commit: 23d2a1862a8b60cf5a04ffabdf5c1ea776120d04
https://github.com/llvm/llvm-project/commit/23d2a1862a8b60cf5a04ffabdf5c1ea776120d04
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove unnecessary check for null TargetInstrInfo (#123929)
This can never happen.
Commit: d3aea77f50a2215a9fa50c1bfa5f4b9717d8e928
https://github.com/llvm/llvm-project/commit/d3aea77f50a2215a9fa50c1bfa5f4b9717d8e928
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Move transformMaskAfterShuffle into BaseShuffleAnalysis and use it as much as possible. (#123896)
Commit: 1042ddc31b594511657ff70a82d71e2d037e2e35
https://github.com/llvm/llvm-project/commit/1042ddc31b594511657ff70a82d71e2d037e2e35
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[gn] port ec15b242505
Commit: 6f69adeed6728e49c16d47bdde658285f49c8ed7
https://github.com/llvm/llvm-project/commit/6f69adeed6728e49c16d47bdde658285f49c8ed7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove null TargetRegisterInfo check (#123933)
This cannot happen. Also simplify the LaneBitmask check from !none
to any.
Commit: 2646e2d487027e61c4e3cba5ceecfd95cedce0fe
https://github.com/llvm/llvm-project/commit/2646e2d487027e61c4e3cba5ceecfd95cedce0fe
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Stop allocating tiny helper classes (NFC) (#123936)
This was allocating tiny helper classes for every instruction
visited. We can just dispatch over the cases in the visitor
function instead.
Commit: ba70368f1380f8d22494fc8c100d2ab894a3cf94
https://github.com/llvm/llvm-project/commit/ba70368f1380f8d22494fc8c100d2ab894a3cf94
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
A clang/test/Driver/loongarch-relax-features.c
Log Message:
-----------
[Clang][Driver] Support linker relaxation options for LoongArch (#123587)
This commit completed four tasks:
- Add `-mrelax/-mno-relax` options support for LoongArch in clang
driver.
- Print error for `-gsplit-dwarf` with LoongArch linker relaxation
(`-mrelax`).
- Pass `-X` to linker to discard a plethora of `.L` symbols due to
linker relaxation.
- Forward `--no-relax` option to linker.
Commit: 15c2d4baf17292b4966d335846b30c50063f0265
https://github.com/llvm/llvm-project/commit/15c2d4baf17292b4966d335846b30c50063f0265
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove check for subreg index on a def operand (#123943)
This is looking at operand 0 of a REG_SEQUENCE, which can never
have a subregister index.
Commit: 9cefa3e6fccf30959433b96a8a275417b1429f4e
https://github.com/llvm/llvm-project/commit/9cefa3e6fccf30959433b96a8a275417b1429f4e
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan] Generalize handleIntrinsicByApplyingToShadow by adding bitcasting (#123474)
`handleIntrinsicByApplyingToShadow` (introduced in
https://github.com/llvm/llvm-project/pull/114490) requires that the
intrinsic supports integer-ish operands; this is not the case for all
intrinsics. This patch generalizes the function to bitcast the shadow
arguments to be the same type as the original intrinsic, thus
guaranteeing that the intrinsic exists. Additionally, it casts the
computed shadow to be an appropriate shadow type.
This function assumes that the intrinsic will handle arbitrary
bit-patterns (for example, if the intrinsic accepts floats for var1, we
assume that it works normally even if inputs are NaNs etc.).
Commit: ba3e6f0f0f2bebeb2b82e976ea1b5df007784862
https://github.com/llvm/llvm-project/commit/ba3e6f0f0f2bebeb2b82e976ea1b5df007784862
Author: Luke Lau <luke at igalia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOPT] Remove dead passthru check in getOperandLog2EEW. NFC (#123911)
We already bail if the user is tied in checkUsers, which is true for all
passthrus. Remove the check in getOperandLog2EEW so that it only worries
about computing the OperandInfo, and leaves the passthru correctness to
checkUsers.
Commit: 0fe8e70c6609ff86cd40fbb45a85a8ed04c153c2
https://github.com/llvm/llvm-project/commit/0fe8e70c6609ff86cd40fbb45a85a8ed04c153c2
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
R clang/test/CodeGenHLSL/builtins/reflect.hlsl
R clang/test/CodeGenSPIRV/Builtins/reflect.c
R clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
R clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
R llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
Log Message:
-----------
Revert "Reland "[HLSL] Implement the `reflect` HLSL function"" (#124046)
Reverts llvm/llvm-project#123853
The introduction of `reflect-error.ll` surfaced a bug with the use of
`report_fatal_error` in `SPIRVInstructionSelector` that was propagated
into the pr. This has caused a build-bot breakage, and the work to solve
the underlying issue is tracked here:
https://github.com/llvm/llvm-project/issues/124045. We can re-apply this
commit when the underlying issue is resolved.
Commit: 3ef90f843fee74ff811ef88246734475f50e2073
https://github.com/llvm/llvm-project/commit/3ef90f843fee74ff811ef88246734475f50e2073
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Target/Cpp/switch.mlir
Log Message:
-----------
[emitc] Fix the translation switchop with argument of expressionop (#123701)
Now a `emitc.switch` with argument of `emitc.expression` wouldn't emit
its argument to cpp. This patch fix it.
Commit: b46fcb9fa32f24660b1b8858d5c4cbdb76ef9d8b
https://github.com/llvm/llvm-project/commit/b46fcb9fa32f24660b1b8858d5c4cbdb76ef9d8b
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Implement CWG 2628 "Implicit deduction guides should propagate constraints" (#111143)
Closes https://github.com/llvm/llvm-project/issues/98592
Commit: 652ff20140d79544db4dfa21314fc62c3c9182e5
https://github.com/llvm/llvm-project/commit/652ff20140d79544db4dfa21314fc62c3c9182e5
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/module/cudadevice.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Semantics/cuf-device-procedures01.cuf
Log Message:
-----------
[flang][cuda] Adding atomicadd as a cudadevice intrinsic and converting it LLVM dialect (#123840)
With these changes, CUF atomic operations are handled as cudadevice
intrinsics and are converted straight to the LLVM dialect with the
`llvm.atomicrw` operation.
I am only submitting changes for `atomicadd` to gather feedback. If we
are to proceed with these changes I will add support for all other
applicable atomic operations following this pattern.
Commit: 892a804d93d44ddfd7cd351852fe6aef32d4dcd0
https://github.com/llvm/llvm-project/commit/892a804d93d44ddfd7cd351852fe6aef32d4dcd0
Author: Akshay Deodhar <adeodhar at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
Log Message:
-----------
[NVPTX] Stop using 16-bit CAS instructions from PTX (#120220)
Increases minimum CAS size from 16 bit to 32 bit, for better SASS
codegen.
When atomics are emulated using atom.cas.b16, the SASS generated
includes 2 (nested) emulation loops. When emulated using an atom.cas.b32
loop, the SASS too has a single emulation loop. Using 32 bit CAS thus
results in better codegen.
Commit: 1c5d971e425ff080dffd4d9a9a7734ead042d323
https://github.com/llvm/llvm-project/commit/1c5d971e425ff080dffd4d9a9a7734ead042d323
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[Signals] Exclude dladdr for AIX after #123879
Widely supported but missing on AIX
https://www.austingroupbugs.net/view.php?id=993
Commit: 75750722737e9128500b81363ba66c62fea1e4fe
https://github.com/llvm/llvm-project/commit/75750722737e9128500b81363ba66c62fea1e4fe
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets.s
Log Message:
-----------
[llvm-exegesis] Disable exhaustive tests on Windows
When looking at the slowest lit tests, I'm seeing these four tests take
two to eight minutes. Test coverage on Linux should be sufficient for
the functionality on top of it not really being useful on Windows at
all.
This was observed when hacking on the new premerge in a windows VM.
Commit: 19834b4623fd1e7ae5185ed76031b407c3fa7a47
https://github.com/llvm/llvm-project/commit/19834b4623fd1e7ae5185ed76031b407c3fa7a47
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mscq.c
M clang/test/Preprocessor/init-loongarch.c
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
A llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg-128.ll
Log Message:
-----------
[LoongArch] Support sc.q instruction for 128bit cmpxchg operation (#116771)
Two options for clang
-mno-scq: Disable sc.q instruction.
-mscq: Enable sc.q instruction.
The default is -mno-scq.
Commit: 0bcf34e422683b900ed504c5e4605038b257f1ee
https://github.com/llvm/llvm-project/commit/0bcf34e422683b900ed504c5e4605038b257f1ee
Author: MagentaTreehouse <99200384+MagentaTreehouse at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/AST/UnresolvedSet.h
Log Message:
-----------
[Clang] [NFC] Mark `UnresolvedSetImpl`'s move operations as defaulted (#97930)
Commit: d80b814c010580b0fd02c1b1a9521a0b640a358a
https://github.com/llvm/llvm-project/commit/d80b814c010580b0fd02c1b1a9521a0b640a358a
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[LoongArch] Summary llvm20 release notes
Commit: 3c7a878d919c6483c9e78a3ed4578d4ee2f54408
https://github.com/llvm/llvm-project/commit/3c7a878d919c6483c9e78a3ed4578d4ee2f54408
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[LoongArch] Summary clang20 release notes
Commit: aa273fd83eccb55215f4cb18285f8462a1013f5c
https://github.com/llvm/llvm-project/commit/aa273fd83eccb55215f4cb18285f8462a1013f5c
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/docs/ReleaseNotes.rst
Log Message:
-----------
[LoongArch] Update lld20 release notes
Commit: 163935a48df69bde944fae2b4581541dab30c730
https://github.com/llvm/llvm-project/commit/163935a48df69bde944fae2b4581541dab30c730
Author: quic_hchandel <165007698+hchandel at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcilo-aliases-valid.s
A llvm/test/MC/RISCV/xqcilo-invalid.s
A llvm/test/MC/RISCV/xqcilo-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcilo (Large Offset Load Store) extension (#123881)
This extension adds eight 48 bit load store instructions.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
---------
Co-authored-by: Harsh Chandel <hchandel at qti.qualcomm.com>
Commit: de209fa11b5455155228bcdba012b6074388b917
https://github.com/llvm/llvm-project/commit/de209fa11b5455155228bcdba012b6074388b917
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineJumpTableInfo.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
A llvm/lib/CodeGen/StaticDataSplitter.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
A llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
[CodeGen] Introduce Static Data Splitter pass (#122183)
https://discourse.llvm.org/t/rfc-profile-guided-static-data-partitioning/83744
proposes to partition static data sections.
This patch introduces a codegen pass. This patch produces jump table
hotness in the in-memory states (machine jump table info and entries).
Target-lowering and asm-printer consume the states and produce `.hot`
section suffix. The follow up PR
https://github.com/llvm/llvm-project/pull/122215 implements such
changes.
---------
Co-authored-by: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Commit: d15f3e828d3d3335aa9b92b9013a590b71e56b92
https://github.com/llvm/llvm-project/commit/d15f3e828d3d3335aa9b92b9013a590b71e56b92
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/deep-loop-nest.ll
Log Message:
-----------
[LoopInterchange] Constrain LI within supported loop nest depth (#118656)
This patch is an extension to #115128.
After profiling LLVM test-suite, I see a lot of loop nest of depth more
than `MaxLoopNestDepth` which is 10. Early exit for them would save
compile-time as it would avoid computing DependenceInfo and CacheCost.
Please see 'bound-max-depth' branch on compile-time-tracker.
Commit: 646f034e4e228f9d5d6a0142210e5e28f2ea7872
https://github.com/llvm/llvm-project/commit/646f034e4e228f9d5d6a0142210e5e28f2ea7872
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port de209fa11b54
Commit: daa18205c6f0a3b5dd62ba2e65948e1a9182a60f
https://github.com/llvm/llvm-project/commit/daa18205c6f0a3b5dd62ba2e65948e1a9182a60f
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/OpenMP/copyin.f90
Log Message:
-----------
[Flang][OpenMP] Fix copyin allocatable lowering to MLIR (#122097)
Fixes https://github.com/llvm/llvm-project/issues/113191
Issue: [flang][OpenMP] Runtime segfault when an allocatable variable is
used with copyin
Rootcause: The value of the threadprivate variable is not being copied
from the primary thread to the other threads within a parallel region.
As a result it tries to access a null pointer inside a parallel region
which causes segfault.
Fix: When allocatables used with copyin clause need to ensure that, on
entry to any parallel region each thread’s copy of a variable will
acquire the allocation status of the primary thread, before copying the
value of a threadprivate variable of the primary thread to the
threadprivate variable of each other member of the team.
Commit: ea49d474fd355a9fdc3d549c4f927b970181f4c9
https://github.com/llvm/llvm-project/commit/ea49d474fd355a9fdc3d549c4f927b970181f4c9
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
Specify triple for llc test
Commit: 5d8390d48e5c03235b3c83748e4a2eec0a19ae65
https://github.com/llvm/llvm-project/commit/5d8390d48e5c03235b3c83748e4a2eec0a19ae65
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
Temporarily disable test on Fuchsia
Commit: c3dfd34e54c1cb9e0e6c7472a6d30d03a63f6f0a
https://github.com/llvm/llvm-project/commit/c3dfd34e54c1cb9e0e6c7472a6d30d03a63f6f0a
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Add unreachable before catch destinations (#123915)
When `try_table`'s catch clause's destination has a return type, as in
the case of catch with a concrete tag, catch_ref, and catch_all_ref. For
example:
```wasm
block exnref
try_table (catch_all_ref 0)
...
end_try_table
end_block
... use exnref ...
```
This code is not valid because the block's body type is not exnref. So
we add an unreachable after the 'end_try_table' to make the code valid
here:
```wasm
block exnref
try_table (catch_all_ref 0)
...
end_try_table
unreachable ;; Newly added
end_block
```
Because 'unreachable' is a terminator we also need to split the BB.
---
We need to handle the same thing for unwind mismatch handling. In the
code below, we create a "trampoline BB" that will be the destination for
the nested `try_table`~`end_try_table` added to fix a unwind mismatch:
```wasm
try_table (catch ... )
block exnref
...
try_table (catch_all_ref N)
some code
end_try_table
...
end_block ;; Trampoline BB
throw_ref
end_try_table
```
While the `block` added for the trampoline BB has the return type
`exnref`, its body, which contains the nested `try_table` and other
code, wouldn't have the `exnref` return type. Most times it didn't
become a problem because the block's body ended with something like `br`
or `return`, but that may not always be the case, especially when there
is a loop. So we add an `unreachable` to make the code valid here too:
```wasm
try_table (catch ... )
block exnref
...
try_table (catch_all_ref N)
some code
end_try_table
...
unreachable ;; Newly added
end_block ;; Trampoline BB
throw_ref
end_try_table
```
In this case we just append the `unreachable` at the end of the layout
predecessor BB. (This was tricky to do in the first (non-mismatch) case
because there `end_try_table` and `end_block` were added in the
beginning of an EH pad in `placeTryTableMarker` and moving
`end_try_table` and the new `unreachable` to the previous BB caused
other problems.)
---
This adds many `unreaachable`s to the output, but this adds
`unreachable` to only a few places to see if this is working. The
FileCheck lines in `exception.ll` and `cfg-stackify-eh.ll` are already
heavily redacted to only leave important control-flow instructions, so I
don't think it's worth adding `unreachable`s everywhere.
Commit: ba174855203403f6c3e2a46bdd79dbb3e27ac6a4
https://github.com/llvm/llvm-project/commit/ba174855203403f6c3e2a46bdd79dbb3e27ac6a4
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/test/CodeCompletion/member-access.cpp
Log Message:
-----------
[clang][CodeComplete] Use HeuristicResolver to resolve DependentNameTypes (#123818)
Fixes https://github.com/clangd/clangd/issues/1249
Commit: 220004d2f8692e3a224dc75f7a7c6001711d3d58
https://github.com/llvm/llvm-project/commit/220004d2f8692e3a224dc75f7a7c6001711d3d58
Author: Alan Li <me at alanli.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
Log Message:
-----------
[GISel] Add more FP opcodes to CSE (#123949)
Resubmit, previously PR has compilation issues.
Commit: 3fb8c5b43195d6e11ff0557d07e75700343d369f
https://github.com/llvm/llvm-project/commit/3fb8c5b43195d6e11ff0557d07e75700343d369f
Author: mconst <mconst at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
M llvm/test/CodeGen/X86/stack-clash-huge.ll
Log Message:
-----------
[X86] Fix invalid instructions on x32 with large stack frames (#124041)
`X86FrameLowering::emitSPUpdate()` assumes that 64-bit targets use a
64-bit stack pointer, but that's not true on x32.
When checking the stack pointer size, we need to look at
`Uses64BitFramePtr` rather than `Is64Bit`. This avoids generating
invalid instructions like `add esp, rcx`.
For impossibly-large stack frames (4 GiB or larger with a 32-bit stack
pointer), we were also generating invalid instructions like `mov eax,
5000000000`. The inline stack probe code already had a check for that
situation; I've moved the check into `emitSPUpdate()`, so any attempt to
allocate a 4 GiB stack frame with a 32-bit stack pointer will now trap
rather than adjusting ESP by the wrong amount. This also fixes the
"can't have 32-bit 16GB stack frame" assertion, which used to be
triggerable by user code but is now correct.
To help catch situations like this in the future, I've added
`-verify-machineinstrs` to the stack clash tests that generate large
stack frames.
This fixes the expensive-checks buildbot failure caused by #113219.
Commit: 8eb99bbe6e8878bfd73fb301899ced6bb5dfff38
https://github.com/llvm/llvm-project/commit/8eb99bbe6e8878bfd73fb301899ced6bb5dfff38
Author: Martin Storsjö <martin at martin.st>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/test/COFF/empty-section-decl.yaml
M llvm/include/llvm/Object/COFF.h
R llvm/test/Object/coff-sec-sym.test
Log Message:
-----------
Reland [LLD] [COFF] Fix linking MSVC generated implib header objects (#123916)
ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b tried to fix cases when LLD
links what seems to be import library header objects from MSVC. However,
the fix seems incorrect; the review at https://reviews.llvm.org/D133627
concluded that if this (treating this kind of symbol as a common symbol)
is what link.exe does, it's fine.
However, this is most probably not what link.exe does. The symbol
mentioned in the commit message of
ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b would be a common symbol with a
size of around 3 GB; this is not what might have been intended.
That commit tried to avoid running into the error ".idata$4 should not
refer to special section 0"; that issue is fixed for a similar style of
section symbols in 4a4a8a1476b1386b523dc5b292ba9a5a6748a9cf.
Therefore, revert ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b and extend
the fix from 4a4a8a1476b1386b523dc5b292ba9a5a6748a9cf to also work for
the section symbols in MSVC generated import libraries.
The main detail about them, is that for symbols of type
IMAGE_SYM_CLASS_SECTION, the Value field is not an offset, but it is an
optional set of flags, corresponding to the Characteristics of the
section header (although it may be empty).
This is a reland of a previous version of this commit, earlier merged in
9457418e66766d8fafc81f85eb8045986220ca3e / #122811. The previous version
failed tests when run with address sanitizer. The issue was that the
synthesized coff_symbol_generic object actually will be used to access a
full coff_symbol16 or coff_symbol32 struct, see
DefinedCOFF::getCOFFSymbol. Therefore, we need to make a copy of the
full size of either of them.
Commit: cd5694ecea2da1990365f46f9737be1b29d94f0c
https://github.com/llvm/llvm-project/commit/cd5694ecea2da1990365f46f9737be1b29d94f0c
Author: Chandler Carruth <chandlerc at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M llvm/include/llvm/Option/OptTable.h
M llvm/lib/Option/OptTable.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/unittests/Option/OptionMarshallingTest.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
Log Message:
-----------
[StrTable] Switch the option parser to `llvm::StringTable` (#123308)
Now that we have a dedicated abstraction for string tables, switch the
option parser library's string table over to it rather than using a raw
`const char*`. Also try to use the `StringTable::Offset` type rather
than a raw `unsigned` where we can to avoid accidental increments or
other issues.
This is based on review feedback for the initial switch of options to a
string table. Happy to tweak or adjust if desired here.
Commit: 2b67eceeef6e04ae5a4093bec9a0f0b048c70958
https://github.com/llvm/llvm-project/commit/2b67eceeef6e04ae5a4093bec9a0f0b048c70958
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Driver/arm-mfpu.c
M clang/test/Driver/linux-as.c
Log Message:
-----------
Android no longer supports arm < 7 (#123952)
Commit: 2a51a0d39a659feeeee57b6d1d768bf08d378c5e
https://github.com/llvm/llvm-project/commit/2a51a0d39a659feeeee57b6d1d768bf08d378c5e
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
Log Message:
-----------
Remove reference to android-mips (#124021)
Commit: 091741a880c2df9d3d161068a12655d289633eee
https://github.com/llvm/llvm-project/commit/091741a880c2df9d3d161068a12655d289633eee
Author: Paweł Bylica <pawel at ethereum.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerFlags.def
Log Message:
-----------
[libfuzzer] Clarify -max_len behavior on bigger files (#123095)
Commit: 70d7c847fd1b73c8bb453eac11a4a1ae03bb0d86
https://github.com/llvm/llvm-project/commit/70d7c847fd1b73c8bb453eac11a4a1ae03bb0d86
Author: Hongren Zheng <i at zenithal.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/docs/DefiningDialects/Assembly.md
Log Message:
-----------
[mlir][docs] Add usage/example of OpAsmOpInterface (#123610)
This is part of
https://discourse.llvm.org/t/rfc-introduce-opasm-type-attr-interface-for-pretty-print-in-asmprinter/83792.
OpAsmOpInterface controls the SSA Name/Block Name and Default Dialect
Prefix. This PR adds the usage of them by existing examples in MLIR.
Commit: 4b0df28a68a4ed4ec5829fb4d8722a0e701d1796
https://github.com/llvm/llvm-project/commit/4b0df28a68a4ed4ec5829fb4d8722a0e701d1796
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
Log Message:
-----------
[clang][Tooling] Prefer <atomic> for atomic_* family in C++
Commit: 778138114e9e42e28fcb51c0a38224e667a3790c
https://github.com/llvm/llvm-project/commit/778138114e9e42e28fcb51c0a38224e667a3790c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
Log Message:
-----------
[SDAG] Use BatchAAResults for querying alias analysis (AA) results (#123934)
Once we get to SelectionDAG the IR should not be changing anymore, so we
can use BatchAAResults rather than AAResults to cache AA queries.
This should be a NFC change for targets that enable AA during codegen
(such as AArch64), but also give a nice compile-time improvement in some
cases. See:
https://github.com/llvm/llvm-project/pull/123787#issuecomment-2606797041
Note: This follows Nikita's suggestion on #123787.
Commit: d7c14c8f976fd291984e0c7eed75dd3331b1ed6d
https://github.com/llvm/llvm-project/commit/d7c14c8f976fd291984e0c7eed75dd3331b1ed6d
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/examples/BrainF/BrainF.cpp
M llvm/include/llvm/FuzzMutate/OpDescriptor.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/InlineAsm.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/tools/bugpoint/Miscompilation.cpp
Log Message:
-----------
[IR] Replace of PointerType::getUnqual(Type) with opaque version (NFC) (#123909)
Follow up to https://github.com/llvm/llvm-project/issues/123569
Commit: 9fd92634749c75b39be829c22240567ccda3ffce
https://github.com/llvm/llvm-project/commit/9fd92634749c75b39be829c22240567ccda3ffce
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxxabi/src/abort_message.cpp
Log Message:
-----------
[libc++abi] Remove support for Android 4 and older (#124054)
Commit: 6bc68d0fe94e7fbdec40e1306bf8db1b0db3110c
https://github.com/llvm/llvm-project/commit/6bc68d0fe94e7fbdec40e1306bf8db1b0db3110c
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/__cxx03/__locale_dir/locale_base_api/android.h
M libcxx/include/__locale_dir/locale_base_api/android.h
M libcxx/src/verbose_abort.cpp
Log Message:
-----------
[libc++] Remove support for Android 4 and older (#124062)
Commit: 0429bfea49615882e89ee2350ffde777ce77fb95
https://github.com/llvm/llvm-project/commit/0429bfea49615882e89ee2350ffde777ce77fb95
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/common_reference.h
M libcxx/include/__type_traits/datasizeof.h
M libcxx/include/__type_traits/is_always_bitcastable.h
M libcxx/include/__type_traits/make_signed.h
M libcxx/include/__type_traits/make_unsigned.h
M libcxx/include/__type_traits/remove_cvref.h
M libcxx/include/__type_traits/type_list.h
Log Message:
-----------
[libc++] Remove a few unused includes (#124025)
Commit: ee99c4d4845db66c4daa2373352133f4b237c942
https://github.com/llvm/llvm-project/commit/ee99c4d4845db66c4daa2373352133f4b237c942
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/MC/MCELFStreamer.h
A llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/lib/MC/MCELFStreamer.cpp
A llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[LLVM][Clang][AArch64] Implement AArch64 build attributes (#123990)
- Added support for AArch64-specific build attributes.
- Print AArch64 build attributes to assembly.
- Emit AArch64 build attributes to ELF.
Specification: https://github.com/ARM-software/abi-aa/pull/230
Commit: 7fb97bee9269f0d4239908ac8def70be696991c6
https://github.com/llvm/llvm-project/commit/7fb97bee9269f0d4239908ac8def70be696991c6
Author: Stephen Senran Zhang <zsrkmyn at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/eq.ll
M llvm/test/Transforms/ConstraintElimination/ne.ll
M llvm/test/Transforms/ConstraintElimination/pr105785.ll
Log Message:
-----------
[ConstraintElimination] Add eq/ne facts to signed constraint system (#121423)
Facts of eq/ne were added to unsigned system only, causing some missing
optimizations. This patch adds eq/ne facts to both signed & unsigned
constraint system.
Fixes #117961.
Commit: 08195f31ab1c484ad59dea125bfd61316a07eee8
https://github.com/llvm/llvm-project/commit/08195f31ab1c484ad59dea125bfd61316a07eee8
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/streambuf
Log Message:
-----------
[libc++] Inline basic_streambuf functions (#123379)
Most of the `basic_streambuf` functions are really simple, which makes
most of the implementation when they are out of line boilerplate.
Commit: 8388040fc9e75d49cd000b3371e2610c6c3548ba
https://github.com/llvm/llvm-project/commit/8388040fc9e75d49cd000b3371e2610c6c3548ba
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/ops.mlir
Log Message:
-----------
[mlir][tosa] Add NaN Propagation Mode Support (#121951)
The TOSA-V1.0 specification adds "nan propagation" modes as attributes
for several operators. Adjust the ODS definitions of the relevant
operations to include this attribute.
The defined modes are "PROPAGATE" and "IGNORE" and the PROPAGATE mode is
set by default.
MAXIMUM, MINIMUM, REDUCE_MAX, REDUCE_MIN, MAX_POOL, CLAMP, and ARGMAX
support this attribute.
Signed-off-by: Jack Frankland <jack.frankland at arm.com>
Co-authored-by: TatWai Chong <tatwai.chong at arm.com>
Commit: 19306351a2c45e266fa11b41eb1362b20b6ca56d
https://github.com/llvm/llvm-project/commit/19306351a2c45e266fa11b41eb1362b20b6ca56d
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/test/Modules/empty.modulemap
Log Message:
-----------
[clang][Modules] Raise empty.modulemap expected size to <70KB to fix RISC-V failure (#123959)
I'm not sure why the test is larger for RISC-V than other targets, but
we saw this before with #111360.
The file is just over the current 60KB limit:
```
62772 /home/asb/llvm-project/build/stage2/tools/clang/test/Modules/Output/empty.modulemap.tmp/base.pcm
```
Commit: cad6bbade0d7dc57b9c43d9ed8c38260345d50bf
https://github.com/llvm/llvm-project/commit/cad6bbade0d7dc57b9c43d9ed8c38260345d50bf
Author: Dmitry Polukhin <34227995+dmpolukhin at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/Headers/crash-instantiated-in-scope-cxx-modules5.cpp
Log Message:
-----------
[C++20][Modules] Fix crash/compiler error due broken AST links (#123648)
Summary:
This PR fixes bugreport
https://github.com/llvm/llvm-project/issues/122493 The root problem is
the same as before lambda function and DeclRefExpr references a variable
that does not belong to the same module as the enclosing function body.
Therefore iteration over the function body doesn’t visit the VarDecl.
Before this change RelatedDeclsMap was created only for canonical decl
but in reality it has to be done for the definition of the function that
does not always match the canonical decl.
Test Plan: check-clang
Commit: 2e6cc79f816d942ab09d6a310cd925c1da148aa9
https://github.com/llvm/llvm-project/commit/2e6cc79f816d942ab09d6a310cd925c1da148aa9
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Migrate CpAsyncOp to intrinsics (#123789)
Intrinsics are available for the 'cpSize'
variants also. So, this patch migrates the Op
to lower to the intrinsics for all cases.
* Update the existing tests to check the lowering to intrinsics.
* Add newer cp_async_zfill tests to verify the lowering for the 'cpSize'
variants.
* Tidy-up CHECK lines in cp_async() function in nvvmir.mlir (NFC)
PTX spec link:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-async
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: cb714e74cc0efd5bfdb3e5e80978239425bd83d4
https://github.com/llvm/llvm-project/commit/cb714e74cc0efd5bfdb3e5e80978239425bd83d4
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
A llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size-too-big.mir
Log Message:
-----------
[DebugInfo][InstrRef] Avoid producing broken DW_OP_deref_sizes (#123967)
We use variable locations such as DBG_VALUE $xmm0 as shorthand to refer
to "the low lane of $xmm0", and this is reflected in how DWARF is
interpreted too. However InstrRefBasedLDV tries to be smart and
interprets such a DBG_VALUE as a 128-bit reference. We then issue a
DW_OP_deref_size of 128 bits to the stack, which isn't permitted by
DWARF (it's larger than a pointer).
Solve this for now by not using DW_OP_deref_size if it would be illegal.
Instead we'll use DW_OP_deref, and the consumer will load the variable
type from the stack, which should be correct.
There's still a risk of imprecision when LLVM decides to use smaller or
larger value types than the source-variable type, which manifests as
too-little or too-much memory being read from the stack. However we
can't solve that without putting more type information in debug-info.
fixes #64093
Commit: ad6d808906075c3386bbeada3c37d8d3e6afe248
https://github.com/llvm/llvm-project/commit/ad6d808906075c3386bbeada3c37d8d3e6afe248
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
Log Message:
-----------
[lldb][DWARFASTParserClang] Make C++ method parsing aware of explicit object parameters (#124096)
LLDB deduces the CV-qualifiers and storage class of a C++ method from
the object parameter. Currently it assumes that parameter is implicit
(and is a pointer type with the name "this"). This isn't true anymore in
C++23 with explicit object parameters. To support those we can simply
check the `DW_AT_object_pointer` of the subprogram DIE (works for both
declarations and definitions) when searching for the object parameter.
We can also remove the check for `eEncodingIsPointerUID`, because in C++
an artificial parameter called `this` is only ever the implicit object
parameter (at least for all the major compilers).
Commit: fa7f0e582bc25a91d89dab7c488a1619060f9bef
https://github.com/llvm/llvm-project/commit/fa7f0e582bc25a91d89dab7c488a1619060f9bef
Author: Abhilash Majumder <30946547+abhilash1910 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
Log Message:
-----------
[NVPTX] Add Bulk Copy Prefetch Intrinsics (#123226)
This patch adds NVVM intrinsics and NVPTX codegen for:
- cp.async.bulk.prefetch.L2.* variants
- These intrinsics optionally support cache_hints as indicated by the
boolean flag argument.
- Lit tests are added for all combinations of these intrinsics in
cp-async-bulk.ll.
- The generated PTX is verified with a 12.3 ptxas executable.
- Added docs for these intrinsics in NVPTXUsage.rst file.
PTX Spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-async-bulk-prefetch
Co-authored-by: abmajumder <abmajumder at nvidia.com>
Commit: 17756aa9c9d2f54a29dba3a2805f217cc1723ff0
https://github.com/llvm/llvm-project/commit/17756aa9c9d2f54a29dba3a2805f217cc1723ff0
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang] [Release Notes] Implicit lifetimes are a C++23 feature
Commit: a8020930a8174d84da04fa91b6fef244207f42f5
https://github.com/llvm/llvm-project/commit/a8020930a8174d84da04fa91b6fef244207f42f5
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
Log Message:
-----------
Revert "[lldb][DWARFASTParserClang] Make C++ method parsing aware of explicit object parameters" (#124100)
Reverts llvm/llvm-project#124096
Broke linux CI:
```
Note: This is test shard 7 of 42.
[==========] Running 1 test from 1 test suite.
[----------] Global test environment set-up.
[----------] 1 test from DWARFASTParserClangTests
[ RUN ] DWARFASTParserClangTests.TestParseSubroutine_ExplicitObjectParameter
Expected<T> must be checked before access or destruction.
Expected<T> value was in success state. (Note: Expected<T> values in success mode must still be checked prior to being destroyed).
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0 SymbolFileDWARFTests 0x0000560271ee5ba7
1 SymbolFileDWARFTests 0x0000560271ee3a2c
2 SymbolFileDWARFTests 0x0000560271ee63ea
3 libc.so.6 0x00007f3e54e5b050
4 libc.so.6 0x00007f3e54ea9e2c
5 libc.so.6 0x00007f3e54e5afb2 gsignal + 18
6 libc.so.6 0x00007f3e54e45472 abort + 211
7 SymbolFileDWARFTests 0x0000560271e79d51
8 SymbolFileDWARFTests 0x0000560271e724f7
9 SymbolFileDWARFTests 0x0000560271f39e2c
10 SymbolFileDWARFTests 0x0000560271f3b368
11 SymbolFileDWARFTests 0x0000560271f3c053
12 SymbolFileDWARFTests 0x0000560271f4cf67
13 SymbolFileDWARFTests 0x0000560271f4c18a
14 SymbolFileDWARFTests 0x0000560271f2561c
15 libc.so.6 0x00007f3e54e4624a
16 libc.so.6 0x00007f3e54e46305 __libc_start_main + 133
17 SymbolFileDWARFTests 0x0000560271e65161
```
Commit: 05fbc3830d05878a0521a3e07aa1e469905ce732
https://github.com/llvm/llvm-project/commit/05fbc3830d05878a0521a3e07aa1e469905ce732
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Move VPBlockUtils to VPlanUtils.h (NFC)
Nothing in VPlan.h directly uses VPBlockUtils.h. Move it out to the more
appropriate VPlanUtils.h to reduce the size of the widely included VPlan.h.
Commit: 4bcdb26dac4cdadd7f8850a5f9b2e775b73aaf7f
https://github.com/llvm/llvm-project/commit/4bcdb26dac4cdadd7f8850a5f9b2e775b73aaf7f
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
Log Message:
-----------
Revert "[lldb][test] Remove compiler version check and use regex" (#124101)
Reverts llvm/llvm-project#123393
This is causing `TestVectorOfVectorsFromStdModule.py` to fail on the the
macOS clang-15 matrix bot.
Commit: 4f26edd5e9eb3b6cea19e15ca8fb2c8416b82fa8
https://github.com/llvm/llvm-project/commit/4f26edd5e9eb3b6cea19e15ca8fb2c8416b82fa8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/lib/Support/YAMLTraits.cpp
Log Message:
-----------
[NFC][YAML] Add `IO::error()` (#123475)
For #123280
Commit: 1311b36acea0ac0d94c23452fcb0109bb18373cb
https://github.com/llvm/llvm-project/commit/1311b36acea0ac0d94c23452fcb0109bb18373cb
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[llvm][Support] Put back filename into FileToRemoveList (#124065)
Prevents avoidable memory leaks.
Looks like exchange added in aa1333a91f8d8a060bcf5b14aa32a6e8bab74e8c
didn't take "continue" into account.
```
==llc==2150782==ERROR: LeakSanitizer: detected memory leaks
Direct leak of 10 byte(s) in 1 object(s) allocated from:
#0 0x5f1b0f9ac14a in strdup llvm-project/compiler-rt/lib/asan/asan_interceptors.cpp:593:3
#1 0x5f1b1768428d in FileToRemoveList llvm-project/llvm/lib/Support/Unix/Signals.inc:105:55
```
Commit: 636bc72f672712cb848729c0f130d8b42c86f1cb
https://github.com/llvm/llvm-project/commit/636bc72f672712cb848729c0f130d8b42c86f1cb
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
Log Message:
-----------
Reland "[lldb][DWARFASTParserClang] Make C++ method parsing aware of explicit object parameters" (#124100)"
This reverts commit a8020930a8174d84da04fa91b6fef244207f42f5.
Relands original commit but fixing the unit-test to consume the
`llvm::Expected` error object.
Commit: 3ea2b546a8d17014d3ecf05356ecfaadf26ed846
https://github.com/llvm/llvm-project/commit/3ea2b546a8d17014d3ecf05356ecfaadf26ed846
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Host/windows/PipeWindows.cpp
Log Message:
-----------
[lldb/windows] Make "anonymous" pipe names more unique (#123905)
Using a "random" name for an "anonymous" pipe seems to be the state of
the art on windows (according to stack overflow, new windows versions
may have something better, but it involves calling kernel APIs directly
and generally a lot of dark magic).
The problem with the current method was that is does not produce unique
names if one has two copies of the pipe code in the same process, which
is what happened with #120457 (because liblldb only exposes the public
api, and we've started using the pipe code in lldb-dap as well).
This patch works around the problem by adding the address of the counter
variable to the pipe name.
Replicating the multiple-copies setup in a test would be very difficult,
which is why I'm not adding a test for this scenario.
Commit: 0236cb689550ed2dac406443c652efb723cb2602
https://github.com/llvm/llvm-project/commit/0236cb689550ed2dac406443c652efb723cb2602
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Target/UnixSignals.cpp
M lldb/test/API/commands/frame/diagnose/array/TestArray.py
M lldb/test/API/commands/frame/diagnose/bad-reference/TestBadReference.py
M lldb/test/API/commands/frame/diagnose/complicated-expression/TestComplicatedExpression.py
M lldb/test/API/commands/frame/diagnose/dereference-argument/TestDiagnoseDereferenceArgument.py
M lldb/test/API/commands/frame/diagnose/dereference-function-return/TestDiagnoseDereferenceFunctionReturn.py
M lldb/test/API/commands/frame/diagnose/dereference-this/TestDiagnoseDereferenceThis.py
M lldb/test/API/commands/frame/diagnose/inheritance/TestDiagnoseInheritance.py
M lldb/test/API/commands/frame/diagnose/local-variable/TestLocalVariable.py
M lldb/test/API/commands/frame/diagnose/virtual-method-call/TestDiagnoseDereferenceVirtualMethodCall.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
M lldb/unittests/Signals/UnixSignalsTest.cpp
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb] Enable "frame diagnose" on linux (#123217)
.. by changing the signal stop reason format :facepalm:
The reason this did not work is because the code in
`StopInfo::GetCrashingDereference` was looking for the string "address="
to extract the address of the crash. Macos stop reason strings have the
form
```
EXC_BAD_ACCESS (code=1, address=0xdead)
```
while on linux they look like:
```
signal SIGSEGV: address not mapped to object (fault address: 0xdead)
```
Extracting the address from a string sounds like a bad idea, but I
suppose there's some value in using a consistent format across
platforms, so this patch changes the signal format to use the equals
sign as well. All of the diagnose tests pass except one, which appears
to fail due to something similar #115453 (disassembler reports
unrelocated call targets).
I've left the tests disabled on windows, as the stop reason reporting
code works very differently there, and I suspect it won't work out of
the box. If I'm wrong -- the XFAIL will let us know.
Commit: 6f684816e25d8b4e5fb2cbc7d0560d608a8bd938
https://github.com/llvm/llvm-project/commit/6f684816e25d8b4e5fb2cbc7d0560d608a8bd938
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/__compare/compare_three_way_result.h
M libcxx/include/__config
M libcxx/include/__format/format_arg.h
M libcxx/include/__ranges/range_adaptor.h
M libcxx/include/__type_traits/add_cv_quals.h
M libcxx/include/__type_traits/add_lvalue_reference.h
M libcxx/include/__type_traits/add_pointer.h
M libcxx/include/__type_traits/add_rvalue_reference.h
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/alignment_of.h
M libcxx/include/__type_traits/conditional.h
M libcxx/include/__type_traits/conjunction.h
M libcxx/include/__type_traits/decay.h
M libcxx/include/__type_traits/disjunction.h
M libcxx/include/__type_traits/enable_if.h
M libcxx/include/__type_traits/extent.h
M libcxx/include/__type_traits/has_unique_object_representation.h
M libcxx/include/__type_traits/has_virtual_destructor.h
M libcxx/include/__type_traits/integral_constant.h
M libcxx/include/__type_traits/invoke.h
M libcxx/include/__type_traits/is_abstract.h
M libcxx/include/__type_traits/is_aggregate.h
M libcxx/include/__type_traits/is_arithmetic.h
M libcxx/include/__type_traits/is_array.h
M libcxx/include/__type_traits/is_assignable.h
M libcxx/include/__type_traits/is_base_of.h
M libcxx/include/__type_traits/is_bounded_array.h
M libcxx/include/__type_traits/is_class.h
M libcxx/include/__type_traits/is_compound.h
M libcxx/include/__type_traits/is_const.h
M libcxx/include/__type_traits/is_constructible.h
M libcxx/include/__type_traits/is_convertible.h
M libcxx/include/__type_traits/is_destructible.h
M libcxx/include/__type_traits/is_empty.h
M libcxx/include/__type_traits/is_enum.h
M libcxx/include/__type_traits/is_execution_policy.h
M libcxx/include/__type_traits/is_final.h
M libcxx/include/__type_traits/is_floating_point.h
M libcxx/include/__type_traits/is_function.h
M libcxx/include/__type_traits/is_fundamental.h
M libcxx/include/__type_traits/is_implicit_lifetime.h
M libcxx/include/__type_traits/is_integral.h
M libcxx/include/__type_traits/is_literal_type.h
M libcxx/include/__type_traits/is_member_pointer.h
M libcxx/include/__type_traits/is_nothrow_assignable.h
M libcxx/include/__type_traits/is_nothrow_constructible.h
M libcxx/include/__type_traits/is_nothrow_convertible.h
M libcxx/include/__type_traits/is_nothrow_destructible.h
M libcxx/include/__type_traits/is_null_pointer.h
M libcxx/include/__type_traits/is_object.h
M libcxx/include/__type_traits/is_pod.h
M libcxx/include/__type_traits/is_pointer.h
M libcxx/include/__type_traits/is_polymorphic.h
M libcxx/include/__type_traits/is_reference.h
M libcxx/include/__type_traits/is_same.h
M libcxx/include/__type_traits/is_scalar.h
M libcxx/include/__type_traits/is_signed.h
M libcxx/include/__type_traits/is_standard_layout.h
M libcxx/include/__type_traits/is_swappable.h
M libcxx/include/__type_traits/is_trivial.h
M libcxx/include/__type_traits/is_trivially_assignable.h
M libcxx/include/__type_traits/is_trivially_constructible.h
M libcxx/include/__type_traits/is_trivially_copyable.h
M libcxx/include/__type_traits/is_trivially_destructible.h
M libcxx/include/__type_traits/is_unbounded_array.h
M libcxx/include/__type_traits/is_union.h
M libcxx/include/__type_traits/is_unsigned.h
M libcxx/include/__type_traits/is_void.h
M libcxx/include/__type_traits/is_volatile.h
M libcxx/include/__type_traits/make_signed.h
M libcxx/include/__type_traits/make_unsigned.h
M libcxx/include/__type_traits/negation.h
M libcxx/include/__type_traits/rank.h
M libcxx/include/__type_traits/remove_all_extents.h
M libcxx/include/__type_traits/remove_const.h
M libcxx/include/__type_traits/remove_cv.h
M libcxx/include/__type_traits/remove_cvref.h
M libcxx/include/__type_traits/remove_extent.h
M libcxx/include/__type_traits/remove_pointer.h
M libcxx/include/__type_traits/remove_reference.h
M libcxx/include/__type_traits/remove_volatile.h
M libcxx/include/__type_traits/type_identity.h
M libcxx/include/__type_traits/underlying_type.h
M libcxx/include/__type_traits/unwrap_ref.h
M libcxx/include/execution
M libcxx/include/variant
A libcxx/test/libcxx/algorithms/no_specializations.verify.cpp
A libcxx/test/libcxx/language.support/no_specializations.verify.cpp
A libcxx/test/libcxx/ranges/no_specializations.verify.cpp
A libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/format/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/no_specializations.verify.cpp
Log Message:
-----------
[libc++] Use [[clang::no_specializations]] to diagnose invalid user specializations (#118167)
Some templates in the standard library are illegal to specialize for users
(even if the specialization contains user-defined types). The [[clang::no_specializations]]
attribute allows marking such base templates so that the compiler will
diagnose if users try adding a specialization.
Commit: 9705500582b9c2b2e1dd6de14f03a94d270a9250
https://github.com/llvm/llvm-project/commit/9705500582b9c2b2e1dd6de14f03a94d270a9250
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libclc/amdgpu/lib/SOURCES
R libclc/amdgpu/lib/math/nextafter.cl
M libclc/clc/include/clc/clcmacro.h
A libclc/clc/include/clc/math/binary_decl_with_scalar_second_arg.inc
A libclc/clc/include/clc/math/clc_nextafter.h
M libclc/clc/include/clc/relational/clc_isnan.h
A libclc/clc/include/clc/shared/binary_decl.inc
M libclc/clc/lib/clspv/SOURCES
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_nextafter.cl
M libclc/clc/lib/spirv/SOURCES
M libclc/clc/lib/spirv64/SOURCES
M libclc/clspv/lib/SOURCES
R libclc/clspv/lib/math/nextafter.cl
R libclc/clspv/lib/math/nextafter.inc
R libclc/generic/include/clc/math/binary_decl.inc
M libclc/generic/include/clc/math/fmax.h
M libclc/generic/include/clc/math/fmin.h
R libclc/generic/include/math/clc_nextafter.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/nextafter.cl
R libclc/ptx/lib/SOURCES
R libclc/ptx/lib/math/nextafter.cl
Log Message:
-----------
[libclc] Move nextafter to the CLC library (#124097)
There were two implementations of this - one that implemented nextafter
in software, and another that called a clang builtin. No in-tree targets
called the builtin, so all targets build the software version. The
builtin version has been removed, and the software version has been
renamed to be the "default".
This commit also optimizes nextafter, to avoid scalarization as much as
possible. Note however that the (CLC) relational builtins still
scalarize; those will be optimized in a separate commit.
Since nextafter is used by some convert_type builtins, the diff to IR
codegen is not limited to the builtin itself.
Commit: e069518f82bc3699dc4fc81bbc99ae4a6d44449e
https://github.com/llvm/llvm-project/commit/e069518f82bc3699dc4fc81bbc99ae4a6d44449e
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/implied-via-division.ll
Log Message:
-----------
SCEV: cover a codepath in isImpliedCondBalancedTypes (#123070)
The code that checks a predicate against a swapped predicate in
isImpliedCondBalancedTypes is not covered by any existing test, within
any Analysis or Transform. Fix this by adding a test to SCEV.
Commit: 0e944a30954e666cba2bf17497fafe835e4b3519
https://github.com/llvm/llvm-project/commit/0e944a30954e666cba2bf17497fafe835e4b3519
Author: Tuomas Kärnä <tuomas.karna at intel.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
Log Message:
-----------
[SCFToGPU] Convert scf.parallel+scf.reduce to gpu.all_reduce (#122782)
Support reductions in SCFToGPU: `scf.parallel` and `scf.reduce` op
combination is now converted to a `gpu.all_reduce` op.
Commit: 90e9895a9373b3d83eefe15b34d2dc83c7bcc88f
https://github.com/llvm/llvm-project/commit/90e9895a9373b3d83eefe15b34d2dc83c7bcc88f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/test/CodeGen/X86/bit_ceil.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/pr89877.ll
M llvm/test/CodeGen/X86/pr90847.ll
M llvm/test/CodeGen/X86/pr92569.ll
M llvm/test/CodeGen/X86/scheduler-backtracking.ll
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/tools/llvm-mca/X86/BtVer2/clear-super-register-1.s
Log Message:
-----------
[X86] Handle BSF/BSR "zero-input pass through" behaviour (#123623)
Intel docs have been updated to be similar to AMD and now describe
BSF/BSR as not changing the destination register if the input value was
zero, which allows us to support CTTZ/CTLZ zero-input cases by setting
the destination to support a NumBits result (BSR is a bit messy as it
has to be XOR'd to create a CTLZ result). VIA/Zhaoxin x86_64 CPUs have also
been confirmed to match this behaviour.
This patch adjusts the X86ISD::BSF/BSR nodes to take a "pass through"
argument for zero-input cases, by default this is set to UNDEF to match
existing behaviour, but it can be set to a suitable value if supported.
There are still some limits to this - its only supported for x86_64
capable processors (and I've only enabled it for x86_64 codegen), and
Intel CPUs sometimes zero the upper 32-bits of a pass through register
when used for BSR32/BSF32 with a zero source value (i.e. the whole
64bits may not get passed through).
Fixes #122004
Commit: 0c66644270abc1455e92301a44232b9af75fafc6
https://github.com/llvm/llvm-project/commit/0c66644270abc1455e92301a44232b9af75fafc6
Author: Danial Klimkin <dklimkin at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel]Fix bazel build past 2e6cc79f816d942ab09d6a310cd925c1da148aa9 (#124112)
Split target under LLVMIR/Transforms to avoid deps loop.
Commit: 590e5e20b12f9fd956d0ba7de83aa2ab44c9faeb
https://github.com/llvm/llvm-project/commit/590e5e20b12f9fd956d0ba7de83aa2ab44c9faeb
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/M68k/pipeline.ll
Log Message:
-----------
[M68k] Fix llc pass test after 3630d9ef65b30af7e4ca78e668649bbc48b5be66
Commit: d3d605b7cdee132929d32f8b71b01641eb1d6d37
https://github.com/llvm/llvm-project/commit/d3d605b7cdee132929d32f8b71b01641eb1d6d37
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/FileCheck/FileCheckImpl.h
Log Message:
-----------
[FileCheck] Use move semantics instead of std::swap. NFC. (#123304)
This code was using a pre-move-semantics trick of using std::swap to
avoid expensive vector copies.
Commit: fb3fa41aee4733e549620a4aa444525aacb075f7
https://github.com/llvm/llvm-project/commit/fb3fa41aee4733e549620a4aa444525aacb075f7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
Log Message:
-----------
MachineRegisterInfo: Use variable for TRI
Commit: 6fdaaafd89d7cbc15dafe3ebf1aa3235d148aaab
https://github.com/llvm/llvm-project/commit/6fdaaafd89d7cbc15dafe3ebf1aa3235d148aaab
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
Log Message:
-----------
[AMDGPU] SIPeepholeSDWA: Disable on existing SDWA instructions (#123942)
This is meant as a short-term workaround for an invalid conversion in
this pass that occurs because existing SDWA selections are not correctly
taken into account during the conversion.
See the draft PR #123221 for an attempt to fix the actual issue.
---------
Co-authored-by: Frederik Harwath <fharwath at amd.com>
Commit: d8eb4ac41d881a19bea7673d753ba92e6a11f5d6
https://github.com/llvm/llvm-project/commit/d8eb4ac41d881a19bea7673d753ba92e6a11f5d6
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Support/Threading.h
Log Message:
-----------
[Support] Remove ciso646 include (#123578)
This header has been removed in C++20 and causes a large amount of
deprecation spam when building against libstdc++ 15 in C++17 mode.
As far as I understand, we just need to include *some* STL header to get
access to the version macros, and as this header also includes
<optional> nowadays we can just drop the <cstd646> include entirely.
Commit: ff55c9bc63ddd1bbe13376c25ae1fc327e3d5da2
https://github.com/llvm/llvm-project/commit/ff55c9bc63ddd1bbe13376c25ae1fc327e3d5da2
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
A llvm/test/CodeGen/AMDGPU/lower-indirect-lds-references.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
Log Message:
-----------
[llvm][amdgpu] Handle indirect refs to LDS GVs during LDS lowering (#124089)
Fixes #123800
Extends LDS lowering by allowing it to discover transitive
indirect/escpaing references to LDS GVs.
For example, given the following input:
```llvm
@lds_item_to_indirectly_load = internal addrspace(3) global ptr undef, align 8
%store_type = type { i32, ptr }
@place_to_store_indirect_caller = internal addrspace(3) global %store_type undef, align 8
define amdgpu_kernel void @offloading_kernel() {
store ptr @indirectly_load_lds, ptr addrspace(3) getelementptr inbounds nuw (i8, ptr addrspace(3) @place_to_store_indirect_caller, i32 0), align 8
call void @call_unknown()
ret void
}
define void @call_unknown() {
%1 = alloca ptr, align 8
%2 = call i32 %1()
ret void
}
define void @indirectly_load_lds() {
call void @directly_load_lds()
ret void
}
define void @directly_load_lds() {
%2 = load ptr, ptr addrspace(3) @lds_item_to_indirectly_load, align 8
ret void
}
```
With the above input, prior to this patch, LDS lowering failed to lower
the reference to `@lds_item_to_indirectly_load` because:
1. it is indirectly called by a function whose address is taken in the
kernel.
2. we did not check if the kernel indirectly makes any calls to unknown
functions (we only checked the direct calls).
Co-authored-by: Jon Chesterfield <jonathan.chesterfield at amd.com>
Commit: 92b839e9c82450a3c465d349de73818e6aad59f3
https://github.com/llvm/llvm-project/commit/92b839e9c82450a3c465d349de73818e6aad59f3
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[gn] fix mistake in ee99c4d4845db
Commit: e28e93550a74752714db6fffe50233aa96e536a5
https://github.com/llvm/llvm-project/commit/e28e93550a74752714db6fffe50233aa96e536a5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
Log Message:
-----------
AMDGPU: Make vector_shuffle legal for v2i32 with v_pk_mov_b32 (#123684)
For VALU shuffles, this saves an instruction in some case.
Commit: 0c71fdd1575b826cbb3c252ee0b15fc84559abec
https://github.com/llvm/llvm-project/commit/0c71fdd1575b826cbb3c252ee0b15fc84559abec
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Driver/cuda-cross-compiling.c
Log Message:
-----------
[NVPTX] Fix ctor / dtor lowering when NVPTX target is not enabled (#124116)
Summary:
We pass the `-nvptx-lower-global-ctor-dtor` option to support the `libc`
like use-case which needs global constructors sometimes. This only
affects the backend. If the NVPTX target is not enabled this option will
be unknown which prevents you from compiling generic IR for this.
Commit: 99d450e9f51683bad608bf801e1b29e5c54b8917
https://github.com/llvm/llvm-project/commit/99d450e9f51683bad608bf801e1b29e5c54b8917
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
R llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
R llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
Log Message:
-----------
Revert "[AMDGPU] SIPeepholeSDWA: Disable on existing SDWA instructions (#123942)"
This reverts commit 6fdaaafd89d7cbc15dafe3ebf1aa3235d148aaab.
Breaks check-llvm, see
https://github.com/llvm/llvm-project/pull/123942#issuecomment-2609861953
Commit: 4d3a5309248e167021913736dfd5276ee536f4ce
https://github.com/llvm/llvm-project/commit/4d3a5309248e167021913736dfd5276ee536f4ce
Author: Danial Klimkin <dklimkin at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel]Fix(2) bazel build past 2e6cc79f816d942ab09d6a310cd925c1da148aa9 (#124118)
Fix caused link errors downstream.
Commit: 25653e558c292e9582d8132134af47a1af55499b
https://github.com/llvm/llvm-project/commit/25653e558c292e9582d8132134af47a1af55499b
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/Headers/avx10_2_512convertintrin.h
M clang/lib/Headers/avx10_2convertintrin.h
M clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
M clang/test/CodeGen/X86/avx10_2convert-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt
M llvm/test/MC/X86/avx10.2convert-32-att.s
M llvm/test/MC/X86/avx10.2convert-32-intel.s
M llvm/test/MC/X86/avx10.2convert-64-att.s
M llvm/test/MC/X86/avx10.2convert-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[AVX10.2] Update convert chapter intrinsic and mnemonics names (#123656)
Intel spec for avx10.2
(https://cdrdv2.intel.com/v1/dl/getContent/828965) has been updated.
This PR changes relevant names from the "AVX10 CONVERT INSTRUCTIONS"
chapter .
Commit: 1f0964f81e5ae90e1c50fcdd103ec9c838b995e0
https://github.com/llvm/llvm-project/commit/1f0964f81e5ae90e1c50fcdd103ec9c838b995e0
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/Contributing.rst
Log Message:
-----------
[llvm][Docs] Clarify finding maintainers
By noting where the files are to be found, and adding some
whitespace to break up large blocks.
(the merge on behalf bit needs a refresh but this will go
into review later after this)
Commit: 26b61e143b7e6117b57df2b58bbcb146a6f0f4d4
https://github.com/llvm/llvm-project/commit/26b61e143b7e6117b57df2b58bbcb146a6f0f4d4
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
Log Message:
-----------
[LoopVectorizer] Propagate underlying instruction to the cloned instances of VPPartialReductionRecipes (#123638)
Commit: 6206f5444fc0732e6495703c75a67f1f90f5b418
https://github.com/llvm/llvm-project/commit/6206f5444fc0732e6495703c75a67f1f90f5b418
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/abs_i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.mir
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/pr51516.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
Log Message:
-----------
[AMDGPU] Occupancy w.r.t. workgroup size range is also a range (#123748)
Occupancy (i.e., the number of waves per EU) depends, in addition to
register usage, on per-workgroup LDS usage as well as on the range of
possible workgroup sizes. Mirroring the latter, occupancy should
therefore be expressed as a range since different group sizes generally
yield different achievable occupancies.
`getOccupancyWithLocalMemSize` currently returns a scalar occupancy
based on the maximum workgroup size and LDS usage. With respect to the
workgroup size range, this scalar can be the minimum, the maximum, or
neither of the two of the range of achievable occupancies. This commit
fixes the function by making it compute and return the range of
achievable occupancies w.r.t. workgroup size and LDS usage; it also
renames it to `getOccupancyWithWorkGroupSizes` since it is the range of
workgroup sizes that produces the range of achievable occupancies.
Computing the achievable occupancy range is surprisingly involved.
Minimum/maximum workgroup sizes do not necessarily yield maximum/minimum
occupancies i.e., sometimes workgroup sizes inside the range yield the
occupancy bounds. The implementation finds these sizes in constant time;
heavy documentation explains the rationale behind the sometimes
relatively obscure calculations.
As a justifying example, consider a target with 10 waves / EU, 4 EUs/CU,
64-wide waves. Also consider a function with no LDS usage and a flat
workgroup size range of [513,1024].
- A group of 513 items requires 9 waves per group. Only 4 groups made up
of 9 waves each can fit fully on a CU at any given time, for a total of
36 waves on the CU, or 9 per EU. However, filling as much as possible
the remaining 40-36=4 wave slots without decreasing the number of groups
reveals that a larger group of 640 items yields 40 waves on the CU, or
10 per EU.
- Similarly, a group of 1024 items requires 16 waves per group. Only 2
groups made up of 16 waves each can fit fully on a CU ay any given time,
for a total of 32 waves on the CU, or 8 per EU. However, removing as
many waves as possible from the groups without being able to fit another
equal-sized group on the CU reveals that a smaller group of 896 items
yields 28 waves on the CU, or 7 per EU.
Therefore the achievable occupancy range for this function is not [8,9]
as the group size bounds directly yield, but [7,10].
Naturally this change causes a lot of test churn as instruction
scheduling is driven by achievable occupancy estimates. In most unit
tests the flat workgroup size range is the default [1,1024] which,
ignoring potential LDS limitations, would previously produce a scalar
occupancy of 8 (derived from 1024) on a lot of targets, whereas we now
consider the maximum occupancy to be 10 in such cases. Most tests are
updated automatically and checked manually for sanity. I also manually
changed some non-automatically generated assertions when necessary.
Fixes #118220.
Commit: c3b40c7ea215487ffc3b9d146f3f8f9a7ac8d407
https://github.com/llvm/llvm-project/commit/c3b40c7ea215487ffc3b9d146f3f8f9a7ac8d407
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/uadd_sat_vec.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
Log Message:
-----------
[X86] Regenerate test checks (NFC)
Regenerate some tests for the new vpternlog printing.
Commit: f61d93ffc456d94df729529642ea180b40ef9d19
https://github.com/llvm/llvm-project/commit/f61d93ffc456d94df729529642ea180b40ef9d19
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/HLFIR/elemental-intrinsics.f90
M flang/test/Lower/Intrinsics/acos.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/trigonometric-intrinsics.f90
Log Message:
-----------
[Flang] Generate math.acos op for non-precise acos intrinsic calls (#123641)
This patch changes the codgegn for non-precise acos calls to generate
math.acos ops. This wasn't done before because the math dialect did not
have a acos operation at the time.
Commit: 6fe0fc60341b05bf30ccc16012dab9eeb55a338d
https://github.com/llvm/llvm-project/commit/6fe0fc60341b05bf30ccc16012dab9eeb55a338d
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/ARM/ARMCallingConv.cpp
Log Message:
-----------
[CallingConv] Return ArrayRef from AllocateRegBlock() (NFC) (#124120)
Instead of returning the first register, return the ArrayRef containing
the whole block.
Existing users rely on the fact that the register block only contains
adjacently-numbered registers and it's possible to get the remaining
registers in the block by just incrementing the register. Returning an
ArrayRef allows more generic usage with non-adjacent registers.
Commit: e1aa1e43decf9275175845bea970ef6d7c2b1af6
https://github.com/llvm/llvm-project/commit/e1aa1e43decf9275175845bea970ef6d7c2b1af6
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/test/ThinLTO/X86/devirt_check.ll
Log Message:
-----------
[WPD]Provide branch weight for checking mode. (#124084)
Checking mode aims to help diagnose and confirm undefined behavior. In
most cases, source code don't cast pointers between unrelated types for
virtual calls, so we expect direct calls in the frequent branch and
debug trap in the unlikely branch.
This way, the overhead of checking mode is not higher than an indirect
call promotion for a hot callsite as long as the callsite doesn't run the debug trap
branch.
Commit: 96410edd4748a78e6b736eef8a5ff1ca4bb29be5
https://github.com/llvm/llvm-project/commit/96410edd4748a78e6b736eef8a5ff1ca4bb29be5
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
mark test as unsupported as I investigate test failure on certain environments
Commit: cb426b18c2f683ed3b4be325f257d62976d22f00
https://github.com/llvm/llvm-project/commit/cb426b18c2f683ed3b4be325f257d62976d22f00
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXIL.td
Log Message:
-----------
[NFC][DirectX] Clean-up of `DXIL.td` (#124005)
- Runs clang-format on `DXIL.td`
Note: this does not include the suggested formatting changes to `defset
list<DXILOpClasses> OpClasses` as it does not enforce the formatting
that is primarily used elsewhere
- Reorders currently defined `DXIL` ops by opcode in ascending order to
be consistent with other definitions
This is a small cleanup moved to be separate from
[#115912](https://github.com/llvm/llvm-project/issues/115912) for
reviewability.
Commit: 4bd0440bd2a653644987dddf8ec8d9d1f258ce31
https://github.com/llvm/llvm-project/commit/4bd0440bd2a653644987dddf8ec8d9d1f258ce31
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
A llvm/test/MC/RISCV/rvv/xsfvfwmacc-invalid.s
A llvm/test/MC/RISCV/rvv/xsfvqmacc-invalid.s
Log Message:
-----------
[RISCV] Add RVVConstraint to SiFive custom matrix multiply instructions. (#124055)
The instructions don't allow the vs1 encoded register to overlap vd.
Confusingly these instructions order their operands vd, vs1, vs2 while
every other vector instruction is vd, vs2, vs1. So we need to use
VS2Constraint for this since it checks the first operand after vd.
2 of the 3 extensions have instruction that produce a result with
EMUL=2*LMUL. This makes them subject to the widening constraints for
vs2. So for these extensions we use WidenV which includes VS2Constraint.
Commit: 1937a36209bc5f3636e7c98a1638ee9f082b4d2b
https://github.com/llvm/llvm-project/commit/1937a36209bc5f3636e7c98a1638ee9f082b4d2b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Add @earlyclobber to SiFive custom matrix multiply instruction. (#124060)
All of these have a constraint that vd and vs1 cannot overlap. Some of
them have an additional widening constraint for vs2. We should use
earlyclobber to protect this.
This is unlikely to be an issue in practice due to the instrinsic being
ternary so vd is also a source. The intrinsic has a different type for
this source than the other sources. You would have to do something crazy
to get the register allocator to overlap the registers.
Commit: df299958e64c73d73b427afc70b960ec039586ac
https://github.com/llvm/llvm-project/commit/df299958e64c73d73b427afc70b960ec039586ac
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
Log Message:
-----------
[mlir] Fix warnings
This patch fixes:
mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp:403:5: error:
'ClampRange' may not intend to support class template argument
deduction [-Werror,-Wctad-maybe-unsupported]
mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp:404:5: error:
'ClampRange' may not intend to support class template argument
deduction [-Werror,-Wctad-maybe-unsupported]
Commit: bca6dbd3a241f4a2cb6cfa5ed4c2f94cf76d3f17
https://github.com/llvm/llvm-project/commit/bca6dbd3a241f4a2cb6cfa5ed4c2f94cf76d3f17
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/i128-abi.ll
Log Message:
-----------
[X86] Add additional i128 abi test (NFC)
Commit: 7db4ba3916d33e57fb5244214f4873bf74e273f0
https://github.com/llvm/llvm-project/commit/7db4ba3916d33e57fb5244214f4873bf74e273f0
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
Log Message:
-----------
[GlobalMerge][NFC] Fix inaccurate comments (#124136)
I was studying the code here and realized that the comments were talking
about grouping by basic blocks when the code was grouping by Function.
Fix the comments so they reflect what the code is actually doing.
Commit: fa299294c068b1857d8d7ee74a512080898f194d
https://github.com/llvm/llvm-project/commit/fa299294c068b1857d8d7ee74a512080898f194d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Modernize code base in several places
Commit: e622468f164f6ba223e6862d8235eea5f555f927
https://github.com/llvm/llvm-project/commit/e622468f164f6ba223e6862d8235eea5f555f927
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/AST/JSONNodeDumper.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124074)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect CO to be nonnull.
Commit: 113e1fdc8c7f9085d5a48ca16b270cf53e9f189d
https://github.com/llvm/llvm-project/commit/113e1fdc8c7f9085d5a48ca16b270cf53e9f189d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
[CodeGen] Migrate away from PointerUnion::dyn_cast (NFC) (#124076)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect Pos to be nonnull.
Commit: d05008363d4ed87b1350701831032ea5070d5b98
https://github.com/llvm/llvm-project/commit/d05008363d4ed87b1350701831032ea5070d5b98
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Target/DynamicRegisterInfo.cpp
Log Message:
-----------
[lldb] Avoid repeated map lookups (NFC) (#124077)
Commit: bb019dd165ceeb5b9c9e4a0bf3c9ee9bc886e7fc
https://github.com/llvm/llvm-project/commit/bb019dd165ceeb5b9c9e4a0bf3c9ee9bc886e7fc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineLoopUtils.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#124078)
Commit: bda39a6067833c9353adbc42bddb1b5808bcf44b
https://github.com/llvm/llvm-project/commit/bda39a6067833c9353adbc42bddb1b5808bcf44b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
Log Message:
-----------
[ExecutionEngine] Include <map> (#124083)
This patch reinstates an include of <map>, fixing a build failure
caused by:
commit 1f4d91ecb8529678a3d3919d7523743bd21942ca
Author: Kazu Hirata <kazu at google.com>
Date: Tue Nov 19 19:41:59 2024 -0800
[ExecutionEngine] Remove unused includes (NFC) (#116749)
---------
Co-authored-by: h-vetinari <h.vetinari at gmx.com>
Commit: 7ddeea359811ec49a07db948bbf3f6b6c915f675
https://github.com/llvm/llvm-project/commit/7ddeea359811ec49a07db948bbf3f6b6c915f675
Author: Acim Maravic <Acim.Maravic at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
Log Message:
-----------
[LLVM][AMDGPU] MC support for ds_bpermute_fi_b32 (#124108)
Added assembler/disassembler support for ds_bpermute_fi_b32 instruction,
as well as tests.
Commit: d8cd8d56ea980d9a9c1e70bcc2dd7207d1236f94
https://github.com/llvm/llvm-project/commit/d8cd8d56ea980d9a9c1e70bcc2dd7207d1236f94
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/min_max.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
Log Message:
-----------
[SLP] getSpillCost - fully populate IntrinsicCostAttributes to improve cost analysis. (#124129)
We were only constructing the IntrinsicCostAttributes with the arg type info, and not the args themselves, preventing more detailed cost analysis (constant / uniform args etc.)
Just pass the whole IntrinsicInst to the constructor and let it resolve everything it can.
Noticed while having yet another attempt at #63980
Commit: 2f76e2b27d9ddd4fa0a1098f77b96fa51905bdb1
https://github.com/llvm/llvm-project/commit/2f76e2b27d9ddd4fa0a1098f77b96fa51905bdb1
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/fno-plt.c
Log Message:
-----------
[Driver] -fno-plt: warn for unsupported targets
-fno-plt is an ELF specific option that is only implemented for x86 (for
a long time) and AArch64 (#78890). GCC doesn't bother to give a
diagnostic on Windows. -fno-plt is somewhat popular and we've been
ignoring it for unsupported targets for a while, so just report a
warning for unsupported targets.
Pull Request: https://github.com/llvm/llvm-project/pull/124081
Commit: 082b148041ec8bb5024246da3a33e8246dc5e01b
https://github.com/llvm/llvm-project/commit/082b148041ec8bb5024246da3a33e8246dc5e01b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
Log Message:
-----------
[TableGen] Pass CodeGenProcModel reference instead of index to addWriteRes/addReadAdvance. NFC
2 of the 3 callers of each of these already had a reference they
converted to index. Use that reference and make the one caller
that only has an index responsible for looking up the reference from it.
Commit: 1a8f49fdda5b14ccc894aacee653f19130df3a30
https://github.com/llvm/llvm-project/commit/1a8f49fdda5b14ccc894aacee653f19130df3a30
Author: Scott Todd <scott.todd0 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIRPython.cmake
Log Message:
-----------
[mlir][python][cmake] Allow skipping nanobind compile options changes. (#123997)
Context:
https://github.com/llvm/llvm-project/pull/107103#discussion_r1925834532
This code is brittle, especially when called from a superproject that
adds the `nanobind-*` target in a different source directory:
```cmake
get_property(all_targets DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} PROPERTY BUILDSYSTEM_TARGETS)
```
The changes here do help with my downstream build, but I'm not sure if
using the `MLIR_DISABLE_CONFIGURE_PYTHON_DEV_PACKAGES` option introduced
in https://github.com/llvm/llvm-project/pull/117934 is the right fix
given that the option is currently scoped directly to one location with
a matching name:
https://github.com/llvm/llvm-project/blob/7ad8a3da4771ce8abbd146611124104d42a4e63e/mlir/cmake/modules/MLIRDetectPythonEnv.cmake#L4-L5
Some other solutions to consider:
1. Search through an explicit list of target names using `if (TARGET)`
2. Iterate over _all_ targets in the project, not just the targets in
the current directory, using code like
https://stackoverflow.com/a/62311397
3. Iterate over targets in the directory known to MLIR
(`llvm-project/mlir/python`)
4. Move this `target_compile_options` setup into
`mlir_configure_python_dev_packages` (I started on this, but that runs
into similar issues where the target is defined in a different
directory)
Commit: 8c138bee6e5afc963e77644a1b92e4b228ca34ad
https://github.com/llvm/llvm-project/commit/8c138bee6e5afc963e77644a1b92e4b228ca34ad
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/pointer.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Handle pointer allocation with source (#124070)
Commit: caf0540b91b0fee31353dc7049ae836e0f814cff
https://github.com/llvm/llvm-project/commit/caf0540b91b0fee31353dc7049ae836e0f814cff
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
Log Message:
-----------
[LoopVectorizer] Add support for chaining partial reductions (#120272)
Chaining partial reductions, where multiple partial reductions share an
accumulator, allow for more values to be combined together as part of
the reduction without discarding the semantics of the partial reduction
itself.
Commit: a2453097e3b4010162efacb4e7edcb121da8607f
https://github.com/llvm/llvm-project/commit/a2453097e3b4010162efacb4e7edcb121da8607f
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/test/profile/Linux/Inputs/instrprof-value-merge.c
M compiler-rt/test/profile/Linux/binary-id.c
M compiler-rt/test/profile/Linux/profile-version.c
M llvm/lib/IR/ProfileSummary.cpp
M llvm/test/tools/llvm-profdata/cs-sample-nested-profile.test
M llvm/test/tools/llvm-profdata/general.proftext
M llvm/test/tools/llvm-profdata/sample-summary.test
M llvm/test/tools/llvm-profdata/suppl-instr-with-sample.test
M llvm/test/tools/llvm-profdata/vtable-value-prof.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Add block percent to detailed summary (#105915)
Commit: e00f1f843610416f18a2fe4779c19310e808a1a4
https://github.com/llvm/llvm-project/commit/e00f1f843610416f18a2fe4779c19310e808a1a4
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/test/ELF/gnustack.s
Log Message:
-----------
[ELF] Error for executable .note.GNU-stack unless -z execstack or -r
.note.GNU-stack with the SHF_EXECINSTR flag requires an executable
stack. This is exceedingly rare. We report an error to force
the user to explicitly request an executable stack.
Close #121234
Pull Request: https://github.com/llvm/llvm-project/pull/124068
Commit: 6d4e72abb85a4b302204dee881894271a84dd322
https://github.com/llvm/llvm-project/commit/6d4e72abb85a4b302204dee881894271a84dd322
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/Transforms/GVN/vscale.ll
A llvm/test/Transforms/NewGVN/vscale.ll
Log Message:
-----------
[GVN] Add extra vscale tests with different types. NFC
Commit: 3d72619d751994f3b2b13c1fbb38f5f2541ea0ae
https://github.com/llvm/llvm-project/commit/3d72619d751994f3b2b13c1fbb38f5f2541ea0ae
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/scalable-vector-struct.ll
Log Message:
-----------
[InstCombine] Add a test for splitting scalable structs. NFC
Commit: e0622245967514c27b538cc10e04184323c5f96e
https://github.com/llvm/llvm-project/commit/e0622245967514c27b538cc10e04184323c5f96e
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/test/Transforms/inlining-recursive-self.mlir
M mlir/test/Transforms/inlining-recursive.mlir
Log Message:
-----------
[test] Remove misleading ''
Commit: ed512710a5e855a029a05f399335e03db0e704bd
https://github.com/llvm/llvm-project/commit/ed512710a5e855a029a05f399335e03db0e704bd
Author: hidekisaito <hidekido at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M offload/plugins-nextgen/common/include/MemoryManager.h
Log Message:
-----------
[Offload] Make MemoryManager threshold ENV var size_t type. (#124063)
Commit: 6a97897d5c159a52975bac19ac22c7913672c549
https://github.com/llvm/llvm-project/commit/6a97897d5c159a52975bac19ac22c7913672c549
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang-tools-extra/modularize/CoverageChecker.cpp
Log Message:
-----------
[NFC][modules] Create objects on the stack (#124034)
`ClangTool` change to fix memory leak.
`FixedCompilationDatabase` changed just to makes it simpler.
Commit: c7e6ca76cb4be7b1707cb583cf4aa4d458b312aa
https://github.com/llvm/llvm-project/commit/c7e6ca76cb4be7b1707cb583cf4aa4d458b312aa
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Add dump() method for ScheduleData struct type for better debugging
Commit: 66e49e38aeed92c48ba175f31e12b07a8c526d11
https://github.com/llvm/llvm-project/commit/66e49e38aeed92c48ba175f31e12b07a8c526d11
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/test/ObjectYAML/MachO/section_data.yaml
M llvm/test/tools/yaml2obj/ELF/custom-fill.yaml
Log Message:
-----------
[YAML] Don't validate `Fill::Size` after error (#123280)
Size is required, so we don't know if it's in
uninitialized state after the previous error.
Triggers msan on llvm/test/tools/yaml2obj/ELF/custom-fill.yaml NOSIZE
test.
We have `Fill` Section with Pattern, but no size. Before the fix it
produced error:
```
YAML:169:5: error: missing required key 'Size'
- Type: Fill
^
YAML:169:5: error: "Size" can't be 0 when "Pattern" is not empty
- Type: Fill
```
The same applies to `MachOYAML::Section` fields `content` and `size`.
However `MachOYAML::Section` matches size first, so on error,
content is not set anyway. Added error checking just in case.
Commit: ff17a4136dedba004d901a571c4fae501affd051
https://github.com/llvm/llvm-project/commit/ff17a4136dedba004d901a571c4fae501affd051
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/include/lldb/Host/Time.h
M lldb/source/Host/CMakeLists.txt
R lldb/source/Host/android/LibcGlue.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/posix/HostInfoPosix.cpp
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
Log Message:
-----------
[lldb] Remove support and workarounds for Android 4 and older (#124047)
Commit: 5a7d92f7a09d5580a298c2982bd42918b7ec492c
https://github.com/llvm/llvm-project/commit/5a7d92f7a09d5580a298c2982bd42918b7ec492c
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/test/CodeGen/AArch64/cpu-supports-target.c
Log Message:
-----------
[NFC] Remove invalid features from test and autogenerate checks. (#124130)
Commit: e0cd57decb3aa9eb911b62306b8f8ac88fd97ffd
https://github.com/llvm/llvm-project/commit/e0cd57decb3aa9eb911b62306b8f8ac88fd97ffd
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/lib/asan/tests/asan_test.cpp
M compiler-rt/lib/lsan/lsan_common_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_getauxval.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
Log Message:
-----------
[compiler-rt] Remove support and workarounds for Android 4 and older (#124056)
Commit: 6045146014151a8f63a60612445de9ff6af47626
https://github.com/llvm/llvm-project/commit/6045146014151a8f63a60612445de9ff6af47626
Author: Alex Prabhat Bara <50404684+alexprabhat99 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/include/pthread.yaml
Log Message:
-----------
[libc] change return type of pthread_setspecific to int in generated header (#124072)
Fixes: #124032
Commit: 02906931654460ca04a4b74f6aef65b542c73d2d
https://github.com/llvm/llvm-project/commit/02906931654460ca04a4b74f6aef65b542c73d2d
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/tools/llvm-profdata/general.proftext
Log Message:
-----------
[llvm-profdata] XFAIL broken test on windows (#124165)
XFAIL `llvm/test/tools/llvm-profdata/general.proftext` after it was
accidentally broken by
https://github.com/llvm/llvm-project/pull/105915/. I will follow up to
get this fixed.
Commit: db6b7a84e6e4949569e756f46357d9f54ad16a03
https://github.com/llvm/llvm-project/commit/db6b7a84e6e4949569e756f46357d9f54ad16a03
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/benchmarks/distributions/README.md
M libc/benchmarks/gpu/CMakeLists.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/printf_behavior.rst
M libc/docs/dev/undefined_behavior.rst
M libc/docs/gpu/rpc.rst
M libc/docs/platform_support.rst
M libc/fuzzing/__support/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/stdfix.yaml
M libc/include/sys/uio.yaml
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/spin_lock.h
M libc/src/__support/time/windows/CMakeLists.txt
M libc/src/math/nvptx/CMakeLists.txt
M libc/src/stdlib/CMakeLists.txt
M libc/test/src/__support/File/CMakeLists.txt
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/stdfix/CMakeLists.txt
M libc/test/src/sys/resource/CMakeLists.txt
M libc/test/src/sys/select/CMakeLists.txt
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/wait/CMakeLists.txt
M libc/test/src/unistd/CMakeLists.txt
M libc/utils/docgen/aio.yaml
M libc/utils/docgen/net/if.yaml
M libc/utils/docgen/netinet/in.yaml
M libc/utils/docgen/sys/resource.yaml
M libc/utils/docgen/sys/stat.yaml
M libc/utils/docgen/sys/time.yaml
M libc/utils/docgen/sys/wait.yaml
M libc/utils/docgen/termios.yaml
M libc/utils/mathtools/worst_case.sollya
Log Message:
-----------
[libc][NFC] Strip all training whitespace and missing newlines (#124163)
Commit: 2f6b0b4a8522b540de07c9ebd3446433e7d99eb6
https://github.com/llvm/llvm-project/commit/2f6b0b4a8522b540de07c9ebd3446433e7d99eb6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
Log Message:
-----------
[RISCV] Add SiFive sf.vqmacc tests to vmv-copy.mir. NFC (#124075)
The vqmaccu.2x8x2 test is currently being miscompiled. We need to use a
whole register move instead of vmv.v.v. The input has VL elements with
EEW=8 EMUL=4. The output has VL/4 elements with EEW=32 EMUL=4. We can't
use the original VL or input SEW for a vmv.v.v.
Commit: bec4c7f5f7fb044dbc7b134a00f4cf29b5cb2b48
https://github.com/llvm/llvm-project/commit/bec4c7f5f7fb044dbc7b134a00f4cf29b5cb2b48
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/test/Transforms/InstCombine/scalable-vector-struct.ll
Log Message:
-----------
[InstCombine] Unpack scalable struct loads/stores. (#123986)
This teaches unpackLoadToAggregate and unpackStoreToAggregate to unpack
scalable structs to individual loads/stores with insertvalues /
extractvalues. The gep used for the offsets uses an i8 ptradd as opposed
to a struct gep, as the geps for scalable structs are not supported and
we canonicalize to i8.
Commit: 3dec24d2a284e98c8a12b8ec9d0a80a657b2d992
https://github.com/llvm/llvm-project/commit/3dec24d2a284e98c8a12b8ec9d0a80a657b2d992
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
Stats are sorted before they are printed. Try fixing test failure by checking stats in its print order.
Commit: 6d5697f7cb4e933d2f176c46b7ac05a9cbaeb8b6
https://github.com/llvm/llvm-project/commit/6d5697f7cb4e933d2f176c46b7ac05a9cbaeb8b6
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
A llvm/test/CodeGen/SystemZ/pr124001.ll
Log Message:
-----------
[SystemZ] Fix ICE with i128->i64 uaddo carry chain
We can only optimize a uaddo_carry via specialized instruction
if the carry was produced by another uaddo(_carry) instruction;
there is already a check for that.
However, i128 uaddo(_carry) use a completely different mechanism;
they indicate carry in a vector register instead of the CC flag.
Thus, we must also check that we don't mix those two - that check
has been missing.
Fixes: https://github.com/llvm/llvm-project/issues/124001
Commit: 0d0190815d8f273e9d87c29b4779b81412b31e91
https://github.com/llvm/llvm-project/commit/0d0190815d8f273e9d87c29b4779b81412b31e91
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/test/CodeGen/X86/tail-dup-pred-succ-size.mir
Log Message:
-----------
[TailDup] Allow large number of predecessors/successors without phis. (#116072)
This adjusts the threshold logic added in #78582 to only trigger for
cases where there are actually phis to duplicate in either TailBB or in
one of the successors.
In cases there are no phis, we only have to pay the cost of extra edges,
but have no explosion in PHI related instructions.
This improves performance of Python on some inputs by 2-3% on Apple
Silicon CPUs.
PR: https://github.com/llvm/llvm-project/pull/116072
Commit: 1c28b9237382b093f477479c993c80181922ca6a
https://github.com/llvm/llvm-project/commit/1c28b9237382b093f477479c993c80181922ca6a
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/test/Headers/__cpuidex_conflict.c
A clang/test/Preprocessor/builtin_aux_info.cpp
Log Message:
-----------
[Clang] __has_builtin should return false for aux triple builtins (#121839)
Currently, `__has_builtin` will return true when passed a builtin that
is only supported on the aux target. I found this when `__has_builtin`
was called with an X86 builtin but the current target was SPIR-V.
We should instead return false for aux builtins.
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: a6211a64dc22b11daa6f01122350a7287a593159
https://github.com/llvm/llvm-project/commit/a6211a64dc22b11daa6f01122350a7287a593159
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
Log Message:
-----------
[gn build] Port ff17a4136ded
Commit: 4cf1fe240589d3f2a8a8332abf3f71a18bdba027
https://github.com/llvm/llvm-project/commit/4cf1fe240589d3f2a8a8332abf3f71a18bdba027
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
Log Message:
-----------
[lldb] Add missing operations to GetOpcodeDataSize (#120163)
The improved error reporting in #120162 revealed that we were missing
opcodes in GetOpcodeDataSize. I changed the function to remove the
default case and switch over the enum type which will cause the compiler
to emit a warning if there are unhandled operations in the future.
rdar://139705570
Commit: 775d0f36f74851172f84074d90cde29e181b3edd
https://github.com/llvm/llvm-project/commit/775d0f36f74851172f84074d90cde29e181b3edd
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Utils/VNCoercion.cpp
M llvm/test/Transforms/GVN/vscale.ll
Log Message:
-----------
[GVN] Handle scalable vectors with the same size in VNCoercion (#123984)
This allows us to forward to a load even if the types do not match
(nxv4i32 vs nxv2i64 for example). Scalable types are allowed in
canCoerceMustAliasedValueToLoad so long as the size (minelts *
scalarsize) is the same, and some follow-on code is adjusted to make
sure it handles scalable sizes correctly. Methods like
analyzeLoadFromClobberingWrite and analyzeLoadFromClobberingStore still
do nothing for scalable vectors, as Offsets and mismatching types are
not supported.
Commit: c9b7303b9b18129c4ee6b56aaa2a0a9f59be2d09
https://github.com/llvm/llvm-project/commit/c9b7303b9b18129c4ee6b56aaa2a0a9f59be2d09
Author: Karlo Basioli <68535415+basioli-k at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
Add [[maybe_unused]] to a variable used only in assert in VPlan.h (#124173)
Commit: c3ecbe6792bbbda12b5a70273048643496b63484
https://github.com/llvm/llvm-project/commit/c3ecbe6792bbbda12b5a70273048643496b63484
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
Disable the test again.
* https://lab.llvm.org/buildbot/#/builders/127/builds/2148/steps/7/logs/stdio shows a failure.
Commit: 4018317407006b2c632fbb75729de624a2426439
https://github.com/llvm/llvm-project/commit/4018317407006b2c632fbb75729de624a2426439
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/include/clang/Basic/Attributes.h
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/CMakeLists.txt
M clang/lib/Basic/Attributes.cpp
M clang/lib/Lex/PPDirectives.cpp
A clang/test/Preprocessor/macro-reserved-attrs-cxx11.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Clang] restrict use of attribute names reserved by the C++ standard (#106036)
Fixes #92196
https://eel.is/c++draft/macro.names#2
> A translation unit shall not #define or #undef names lexically
identical to keywords, to the identifiers listed in Table
[4](https://eel.is/c++draft/lex.name#tab:lex.name.special), or to the
[attribute-token](https://eel.is/c++draft/dcl.attr.grammar#nt:attribute-token)s
described in [[dcl.attr]](https://eel.is/c++draft/dcl.attr), except that
the names likely and unlikely may be defined as function-like macros
([[cpp.replace]](https://eel.is/c++draft/cpp.replace))[.](https://eel.is/c++draft/macro.names#2.sentence-1)
Commit: d17e4ca7e02b6c4118df9170d10c4e68aee7da0a
https://github.com/llvm/llvm-project/commit/d17e4ca7e02b6c4118df9170d10c4e68aee7da0a
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel][NFC] Add td_library for downstream use (#124156)
This will allow td_library/gentbl_cc_library in other packages to use
these td files.
Commit: cb981cc540ba7e16f973e925a80b5bcb337381cc
https://github.com/llvm/llvm-project/commit/cb981cc540ba7e16f973e925a80b5bcb337381cc
Author: Alex Prabhat Bara <alexpbara at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/include/wchar.yaml
Log Message:
-----------
[libc] added btowc to wchar.h generated header (#124168)
Fixes: #124152
Commit: c118864223c6309378cd704f3406533474c2759f
https://github.com/llvm/llvm-project/commit/c118864223c6309378cd704f3406533474c2759f
Author: Yi Qian <68618497+yiqian1 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[MLIR][ROCDL]Add MFMA_*_F8F6F4 instructions to the ROCDL dialect (#123830)
This PR adds mfma.scale.f32.32x32x64.f8f6f4 and
mfma.scale.f32.16x16x128.f8f6f4 to the ROCDL dialect. They are converted
to the corresponding intrinsics in the mlir-to-llvmir pass.
Commit: 24b137365004f0916f9ed64bc5859d8b80585ca1
https://github.com/llvm/llvm-project/commit/24b137365004f0916f9ed64bc5859d8b80585ca1
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/unistd.yaml
Log Message:
-----------
[libc][docs] Add Unistd header's page to the status of implementations doc (#123068)
These changes ensure that the unistd header is documented properly with
respect to the issue ( https://github.com/llvm/llvm-project/issues/122006 ) .
Commit: e10d551aa482ee185a80216b2670a2947a8bdeb0
https://github.com/llvm/llvm-project/commit/e10d551aa482ee185a80216b2670a2947a8bdeb0
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/tools/mlir-pdll/mlir-pdll.cpp
Log Message:
-----------
[mlir][PDLL] Allow (and ignore) `-D` tablegen macros. (#124166)
Similar to #91329, `mlir-pdll` is a tool used in tablegen macros that
unregisters from common flags, including `-D` macros. Because a macro
may be used globally, e.g. configured via `LLVM_TABLEGEN_FLAGS`, we want
this tool to just ignore the macro instead of a fatal failure due to the
unrecognized flag.
Commit: c4ca87ee78fa4f1978e018e6e3a260ac9aea399d
https://github.com/llvm/llvm-project/commit/c4ca87ee78fa4f1978e018e6e3a260ac9aea399d
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/test/tools/yaml2obj/ELF/section-type.yaml
Log Message:
-----------
[yaml2obj] Don't use uninitialized Type (#123274)
Alternative to #123137
With -DMACHINE=EM_NONE, machine specific
sections, like SHT_ARM_EXIDX, will fall to parse
and set `Type`.
This triggers msan on
```
yaml2obj llvm-project/llvm/test/tools/yaml2obj/ELF/mips-abi-flags.yaml -DMACHINE=EM_NONE
```
Commit: 7a831eb924e34e9c5e62f3b5a8e0db0278284f84
https://github.com/llvm/llvm-project/commit/7a831eb924e34e9c5e62f3b5a8e0db0278284f84
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove unused VPLane::getNumCachedLanes. (NFC)
The function isn't used, remove it.
Commit: 0b7cbd23a043ea4c14bd13ccd737049d38f64b5d
https://github.com/llvm/llvm-project/commit/0b7cbd23a043ea4c14bd13ccd737049d38f64b5d
Author: thetruestblue <bblueconway at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
Log Message:
-----------
[Darwin][Sanitizers][CrashReporter] Adopt initializer for Crash Reporter Annotations struct (#123978)
An initializer for the Crash Reporter Annotatoins struct was added in
version 5. For the simplicity of not needing to always update the struct
in subsequent versions, this patchs checks for the initializer before
attempting to redefine the struct on its own.
Note -- we have an existing test for this that is disabled by default,
it is inherently flakey due to the nature of crash reporter. But we can
run that when making crash reporter related changes.
rdar://136156203
Commit: e19261faf5c771bd7951b987abe8de698469e9f1
https://github.com/llvm/llvm-project/commit/e19261faf5c771bd7951b987abe8de698469e9f1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
Log Message:
-----------
[TableGen] Add a SmallPtrSet to track WriteRes that are referenced by some ReadAdvance. NFC (#124160)
Use this to remove a linear scan from CodeGenProcModel::hasReadOfWrite.
This reduces build time of RISCVGenSubtargetInfo.inc on by machine from
~6 seconds to ~3 seconds.
Commit: e30a4fc3e20bf5d9cc2f5bfcb61b4eb0e686a193
https://github.com/llvm/llvm-project/commit/e30a4fc3e20bf5d9cc2f5bfcb61b4eb0e686a193
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/LoongArch/smul-with-overflow.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/Thumb/smul_fix.ll
M llvm/test/CodeGen/Thumb/smul_fix_sat.ll
M llvm/test/CodeGen/Thumb/umul_fix.ll
M llvm/test/CodeGen/Thumb/umul_fix_sat.ll
M llvm/test/CodeGen/X86/muloti.ll
M llvm/test/CodeGen/X86/smul-with-overflow.ll
M llvm/test/CodeGen/X86/smul_fix_sat.ll
M llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/xmulo.ll
Log Message:
-----------
[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)
We have two forceExpandWideMUL functions. One takes the low and high
half of 2 inputs and calculates the low and high half of their product.
This does not calculate the full 2x width product.
The other signature takes 2 inputs and calculates the low and high half
of their full 2x width product. Previously it did this by sign/zero
extending the inputs to create the high bits and then calling the other
function.
We can instead copy the algorithm from the other function and use the
Signed flag to determine whether we should do SRA or SRL. This avoids
the need to multiply the high part of the inputs and add them to the
high half of the result. This improves the generated code for signed
multiplication.
This should improve the performance of #123262. I don't know yet how
close we will get to gcc.
Commit: 76ed4b1cec57ad26433e4808697d6c4d042d4b22
https://github.com/llvm/llvm-project/commit/76ed4b1cec57ad26433e4808697d6c4d042d4b22
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/TableGen/Record.cpp
Log Message:
-----------
[TableGen] Add StringInit pools to RecordKeeperImpl::dumpAllocationStats. (#124164)
Remove duplicate print of TheBitsInitPool.
I don't know who or what uses this information. I happened to notice
TheBitsInitPool was printed twice which lead to auditing the whole list.
Commit: f2942b90778670d9ad974d025c779fc96afa737c
https://github.com/llvm/llvm-project/commit/f2942b90778670d9ad974d025c779fc96afa737c
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
Log Message:
-----------
[CodeGen] NFC: Move isDead to MachineInstr (#123531)
Provide isDead interface for access to ad-hoc isDead queries.
LivePhysRegs is optional: if not provided, pessimistically check
deadness of a single MI without doing the LivePhysReg walk; if provided
it is assumed to be at the position of MI.
Commit: 1688c8719fca43e285bfa3900062a2248295a9af
https://github.com/llvm/llvm-project/commit/1688c8719fca43e285bfa3900062a2248295a9af
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
s/requires/REQUIRES to fix the test on release build
Commit: 3ed28bbf195d5fe93c8711d09abc8bda7c73963e
https://github.com/llvm/llvm-project/commit/3ed28bbf195d5fe93c8711d09abc8bda7c73963e
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Generate CXX11AttributeInfo.inc for 4018317407006b2c632fbb75729de624a2426439
Commit: 631a6e0004e57ca85569b99ea411418627925697
https://github.com/llvm/llvm-project/commit/631a6e0004e57ca85569b99ea411418627925697
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/string/CMakeLists.txt
M libc/src/string/string_utils.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcslen.cpp
A libc/src/wchar/wcslen.h
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcslen_test.cpp
Log Message:
-----------
[libc][wchar] implement wcslen (#124150)
Update string_utils' string_length to work with char* or wchar_t*, so that it
may be reusable when implementing wmemchr, wcspbrk, wcsrchr, wcsstr.
Link: #121183
Link: #124027
Co-authored-by: Nick Desaulniers <ndesaulniers at google.com>
---------
Co-authored-by: Tristan Ross <tristan.ross at midstall.com>
Commit: d87441a2420400166b1f6db107e2946c633ad41b
https://github.com/llvm/llvm-project/commit/d87441a2420400166b1f6db107e2946c633ad41b
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/IR/ProfileSummary.cpp
M llvm/test/tools/llvm-profdata/general.proftext
Log Message:
-----------
[llvm-profdata] Fix detailed summary format on Windows (#124169)
The detailed summary format was changed in
https://github.com/llvm/llvm-project/pull/105915 which broke
`llvm/test/tools/llvm-profdata/general.proftext` (XFAILed in
https://github.com/llvm/llvm-project/pull/124165). Apparently the
behavior of `%lu` is different between Linux and Windows, so I reverted
back to using `<<` style formats.
Commit: f402e06e7d813c0c2732b4605a0291cab8cb15f9
https://github.com/llvm/llvm-project/commit/f402e06e7d813c0c2732b4605a0291cab8cb15f9
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
Log Message:
-----------
[RISCV][VLOPT] Add vector fp min/max instructions to isSupportedInstr (#124196)
Commit: bf258dbd57eedb29e0914fe2e6b27619281b616c
https://github.com/llvm/llvm-project/commit/bf258dbd57eedb29e0914fe2e6b27619281b616c
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
Log Message:
-----------
[RISCV][VLOPT] support fp sign injection instructions (#124195)
Commit: fc952b2a6933d746e843f468052c5a62469c2658
https://github.com/llvm/llvm-project/commit/fc952b2a6933d746e843f468052c5a62469c2658
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/bf16.ll
Log Message:
-----------
[AArch64] Add pre-index store patterns for bf16.
These, like the postinc patterns, need adding very similarly to fp16.
Fixes #97870
Commit: 0e213834df114484ca9525c0e60522b40ecf24e8
https://github.com/llvm/llvm-project/commit/0e213834df114484ca9525c0e60522b40ecf24e8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
R llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
Log Message:
-----------
Revert "[LoopVectorizer] Add support for chaining partial reductions (#120272)" (#124198)
Introduced stack buffer overflow, see #120272.
`getScaledReduction` can return empty vector, and there is not check for
that.
This reverts commit c9b7303b9b18129c4ee6b56aaa2a0a9f59be2d09.
This reverts commit caf0540b91b0fee31353dc7049ae836e0f814cff.
Commit: f5bd623d060051f6f6715c153aa60a577df6f540
https://github.com/llvm/llvm-project/commit/f5bd623d060051f6f6715c153aa60a577df6f540
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
Log Message:
-----------
[RISCV][VLOPT] Rename vx to vf where appropriate in test case
Commit: 9324e6a7a5c5adc5b5c38c3e3cbecd7e1e98876a
https://github.com/llvm/llvm-project/commit/9324e6a7a5c5adc5b5c38c3e3cbecd7e1e98876a
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/include/llvm/ObjCopy/ELF/ELFConfig.h
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
A llvm/test/tools/llvm-objcopy/ELF/remove-note.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
Log Message:
-----------
[llvm-objcopy][ELF] Add an option to remove notes (#118739)
This adds an option `--remove-note=[name/]type` to selectively delete
notes in ELF files, where `type` is the numeric value of the note type
and `name` is the name of the originator. The name can be omitted, in
which case all notes of the specified type will be removed. For now,
only `SHT_NOTE` sections that are not associated with segments are
handled. The implementation can be extended later as needed.
RFC: https://discourse.llvm.org/t/rfc-llvm-objcopy-feature-for-editing-notes/83491
Commit: 42043c423ff01d8d07f33aed76819d3b716bba0c
https://github.com/llvm/llvm-project/commit/42043c423ff01d8d07f33aed76819d3b716bba0c
Author: David Blaikie <dblaikie at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/test/DebugInfo/X86/set.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
A llvm/test/Verifier/dicompositetype-elements-null.ll
Log Message:
-----------
Reapply "Verifier: Add check for DICompositeType elements being null"
This remove some erroneous debug info from tests that should address the
test failures that showed up when the this was previously committed.
This reverts commit 6716ce8b641f0e42e2343e1694ee578b027be0c4.
Commit: 25825d4ac9683010b0b921924cd5e244a82db1a3
https://github.com/llvm/llvm-project/commit/25825d4ac9683010b0b921924cd5e244a82db1a3
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/WebAssembly.cpp
Log Message:
-----------
[WebAssembly] Enable Wasm EH features only once (#124042)
#122466 had an unexpected side effect that,
`EnableFeaturesForWasmEHSjLj` and `BanIncompatibleOptionsForWasmEHSjLj`
can be called multiple times now, every time a Wasm EH flag
(`-fwasm-exceptions`, `-wasm-enable-eh`, `-wasm-enable-sjlj`, ..) was
checked and handled. This resulted in unnecessarily adding the same
feature-enabling arguments multiple times to the command line, for
example, `-target-feature +exception-handling` could be added as many as
three times, which didn't cause any errors but unnecessary. Also we ran
`BanIncompatibleOptionsForWasmEHSjLj` more than once, which was harmless
but unnecessary.
This guards these functions with a static variable so that we only run
them once.
Commit: 4f0325873faccfbe171bae4babceb65975ca892e
https://github.com/llvm/llvm-project/commit/4f0325873faccfbe171bae4babceb65975ca892e
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/lib/orc/macho_platform.cpp
A compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions.cpp
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.h
A llvm/include/llvm/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.h
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
A llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.cpp
A llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.h
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.h
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/CompileUtils.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
A llvm/lib/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.cpp
Log Message:
-----------
[ORC] Enable JIT support for the compact-unwind frame info format on Darwin.
For Darwin/arm64 (including Apple Silicon Macs) this will enable exception
handling and stack unwinding in JIT'd code.
Darwin supports two unwind-info formats: DWARF eh-frames and compact-unwind. On
Darwin/x86-64 compilers usually produce both by default, and ORC supported
exceptions and unwinding via eh-frames (same as on Linux), discarding the
redundant compact-unwind info. On Darwin/arm64 compilers typically default to
producing compact-unwind only, with DWARF eh-frames as a fallback for functions
that can't be described in compact-unwind. Since ORC did not previously support
the compact-unwind format and eh-frames were not present ORC was unable to
handle exceptions or unwinding by default in Darwin/arm64 JIT'd code.
This patch enables support for the compact-unwind-info format, and contains
three major moving parts:
(1) The JITLink CompactUnwindManager class is responsible for transforming the
__compact_unwind records produced by the linker into the __unwind_info
tables that libunwind parses during unwinding. To enable this the
CompactUnwindManager class provides three JITLink passes: The
prepareForPrune pass that splits the __compact_unwind section into
single-record blocks, allowing unused records to be dead-stripped; the
processAndReserveUnwindInfo pass that reserves space for the final
__unwind_info section, and the writeUnwindInfo pass that writes the
__unwind_info section.
(2) The OrcTargetProcess UnwindInfoManager class maintains a table of
registered JIT'd __unwind_info and __eh_frame sections, and handles
requests from libunwind for unwind info sections (by registering a callback
with libunwind's __unw_add_find_dynamic_unwind_sections function).
(3) The Orc UnwindInfoRegistrationPlugin, which scans LinkGraphs for
__unwind_info and __eh_frame sections to register with the
UnwindInfoManager.
This commit adds the CompactUnwindManager passes to the default JITLink
pipelines for Darwin/arm64 and Darwin/x86-64, and UnwindInfoManager intances to
the SelfExecutorProcessControl class (when built for apple platforms) and the
llvm-jitlink-executor tool.
The LLJIT class will now create an UnwindInfoRegistrationPlugin when targeting
a process running on Darwin if it detects that an UnwindInfoManager is
available to handle the registrations.
The ORC runtime macho_platform class already supported libunwind callbacks, so
out-of-process execution and unwinding support will work when loading the ORC
runtime.
The llvm-jitlink tool will only support compact-unwind when the orc-runtime is
loaded, as the UnwindInfoRegistrationPlugin requires access to an IR compiler
to load a helper module and llvm-jitlink does not provide an IR compiler.
Commit: 621e5cd8204596874c2ec7c8c169044d8e6865e3
https://github.com/llvm/llvm-project/commit/621e5cd8204596874c2ec7c8c169044d8e6865e3
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/include/llvm/ObjCopy/ELF/ELFConfig.h
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
R llvm/test/tools/llvm-objcopy/ELF/remove-note.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
Log Message:
-----------
Revert "[llvm-objcopy][ELF] Add an option to remove notes (#118739)"
This reverts commit 9324e6a7a5c5adc5b5c38c3e3cbecd7e1e98876a.
Commit: c7053ac202de1723c49d2f02d1c56d7a0a4481c0
https://github.com/llvm/llvm-project/commit/c7053ac202de1723c49d2f02d1c56d7a0a4481c0
Author: vporpo <vporpodas at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
A llvm/test/Transforms/SandboxVectorizer/cross_bbs.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Disable crossing BBs (#124039)
Crossing BBs is not currently supported by the structures of the
vectorizer. This patch fixes instances where this was happening,
including:
- a walk of use-def operands that updates the UnscheduledSuccs counter,
- the dead instruction removal is now done per BB,
- the scheduler, which will reject bundles that cross BBs.
Commit: 4065d985ab0f012f7fc0718685f6c12cf0352929
https://github.com/llvm/llvm-project/commit/4065d985ab0f012f7fc0718685f6c12cf0352929
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Semantics/reduce.cuf
Log Message:
-----------
[flang][cuda] Allow complex type in cuf kernel reduce (#124185)
Commit: 3d59e30cbcfea475594aaf1c69388c0503f846ef
https://github.com/llvm/llvm-project/commit/3d59e30cbcfea475594aaf1c69388c0503f846ef
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Semantics/cuf09.cuf
Log Message:
-----------
[flang][cuda] Allow DO CONCURRENT in cuf kernel (#124190)
Commit: 10772807ab72ce2b68d76816f8753219b2acbac3
https://github.com/llvm/llvm-project/commit/10772807ab72ce2b68d76816f8753219b2acbac3
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/include/llvm/ObjCopy/ELF/ELFConfig.h
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
A llvm/test/tools/llvm-objcopy/ELF/remove-note.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
Log Message:
-----------
Reapply "[llvm-objcopy][ELF] Add an option to remove notes (#118739)"
This fixes "unused-local-typedef" warnings in 9324e6a7a5.
This adds an option `--remove-note=[name/]type` to selectively delete
notes in ELF files, where `type` is the numeric value of the note type
and `name` is the name of the originator. The name can be omitted, in
which case all notes of the specified type will be removed. For now,
only `SHT_NOTE` sections that are not associated with segments are
handled. The implementation can be extended later as needed.
RFC: https://discourse.llvm.org/t/rfc-llvm-objcopy-feature-for-editing-notes/83491
Commit: bc74a1edbe5e6a3603e65efe06116fa72747acab
https://github.com/llvm/llvm-project/commit/bc74a1edbe5e6a3603e65efe06116fa72747acab
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
Log Message:
-----------
[IA] Generalize the support for power-of-two (de)interleave intrinsics (#123863)
Previously, AArch64 used pattern matching to support
llvm.vector.(de)interleave of 2 and 4; RISC-V only supported
(de)interleave of 2.
This patch consolidates the logics in these two targets by factoring out
the common factor calculations into the InterleaveAccess Pass.
Commit: 28ad8978ee2054298d4198bf10c8cb68730af037
https://github.com/llvm/llvm-project/commit/28ad8978ee2054298d4198bf10c8cb68730af037
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/TemplateDeduction.h
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-0x.cpp
M clang/test/CXX/temp/temp.param/p12.cpp
M clang/test/Modules/cxx-templates.cpp
M clang/test/SemaCXX/make_integer_seq.cpp
M clang/test/SemaTemplate/cwg2398.cpp
M clang/test/SemaTemplate/temp_arg_nontype.cpp
M clang/test/SemaTemplate/temp_arg_template.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/test/Templight/templight-prior-template-arg.cpp
M libcxx/test/libcxx/type_traits/is_specialization.verify.cpp
Log Message:
-----------
Reland: [clang] unified CWG2398 and P0522 changes; finishes implementation of P3310 (#124137)
This patch relands the following PRs:
* #111711
* #107350
* #111457
All of these patches were reverted due to an issue reported in
https://github.com/llvm/llvm-project/pull/111711#issuecomment-2406491485,
due to interdependencies.
---
[clang] Finish implementation of P0522
This finishes the clang implementation of P0522, getting rid
of the fallback to the old, pre-P0522 rules.
Before this patch, when partial ordering template template parameters,
we would perform, in order:
* If the old rules would match, we would accept it. Otherwise, don't
generate diagnostics yet.
* If the new rules would match, just accept it. Otherwise, don't
generate any diagnostics yet again.
* Apply the old rules again, this time with diagnostics.
This situation was far from ideal, as we would sometimes:
* Accept some things we shouldn't.
* Reject some things we shouldn't.
* Only diagnose rejection in terms of the old rules.
With this patch, we apply the P0522 rules throughout.
This needed to extend template argument deduction in order
to accept the historial rule for TTP matching pack parameter to non-pack
arguments.
This change also makes us accept some combinations of historical and P0522
allowances we wouldn't before.
It also fixes a bunch of bugs that were documented in the test suite,
which I am not sure there are issues already created for them.
This causes a lot of changes to the way these failures are diagnosed,
with related test suite churn.
The problem here is that the old rules were very simple and
non-recursive, making it easy to provide customized diagnostics,
and to keep them consistent with each other.
The new rules are a lot more complex and rely on template argument
deduction, substitutions, and they are recursive.
The approach taken here is to mostly rely on existing diagnostics,
and create a new instantiation context that keeps track of this context.
So for example when a substitution failure occurs, we use the error
produced there unmodified, and just attach notes to it explaining
that it occurred in the context of partial ordering this template
argument against that template parameter.
This diverges from the old diagnostics, which would lead with an
error pointing to the template argument, explain the problem
in subsequent notes, and produce a final note pointing to the parameter.
---
[clang] CWG2398: improve overload resolution backwards compat
With this change, we discriminate if the primary template and which partial
specializations would have participated in overload resolution prior to
P0522 changes.
We collect those in an initial set. If this set is not empty, or the
primary template would have matched, we proceed with this set as the
candidates for overload resolution.
Otherwise, we build a new overload set with everything else, and proceed
as usual.
---
[clang] Implement TTP 'reversed' pack matching for deduced function template calls.
Clang previously missed implementing P0522 pack matching
for deduced function template calls.
Commit: c676104875f34a87051b446469cc395932bc1f13
https://github.com/llvm/llvm-project/commit/c676104875f34a87051b446469cc395932bc1f13
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/Options.td
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/test/MachO/cfstring-dedup.s
Log Message:
-----------
[lld-macho] Implement symbol string deduplication (#123874)
The symbol string table does not have deduplication.
Here we add code to deduplicate the symbol string table.
This has a rather large size impact (20-30%) on unstripped binaries
(typically debug binaries) but no size impact on stripped
binaries(typically release binaries).
We enable deduplication by default and add a flag to disable it
(`-no-deduplicate-symbol-strings`).
Commit: 13dae34819e5ba2d7644f8486f1f291bf5836d48
https://github.com/llvm/llvm-project/commit/13dae34819e5ba2d7644f8486f1f291bf5836d48
Author: Haopeng Liu <153236845+haopliu at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Log Message:
-----------
[DSE] Enable the initializes improvement in DSE (#124058)
(Retry) enable the initializes improvement in DSE.
Initially enabled in https://github.com/llvm/llvm-project/pull/119116.
Fix the aliasing issue through global variables in
https://github.com/llvm/llvm-project/pull/120044.
The compile-time comparison of this enabling (no meaningful diff):
https://llvm-compile-time-tracker.com/compare.php?from=b46fcb9fa32f24660b1b8858d5c4cbdb76ef9d8b&to=33dc817b81f7898c87b052d1ddfd3d6e6f5b5dbd&stat=instructions%3Au
Commit: 67a8857989ed5b2aadc7a5982ddebd2e9477ebd0
https://github.com/llvm/llvm-project/commit/67a8857989ed5b2aadc7a5982ddebd2e9477ebd0
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/pointer.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Handle pointer allocation with double descriptors (#124183)
Commit: 26fc07d5d88760ad659599184fd10181287d2d9e
https://github.com/llvm/llvm-project/commit/26fc07d5d88760ad659599184fd10181287d2d9e
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
Log Message:
-----------
[ORC] Add explicit narrowing casts to fix build errors.
This should fix the compile errors seen in
https://lab.llvm.org/buildbot/#/builders/154/builds/10779.
Commit: 788318484d967a5d6e5e96a47ca2421e13adc308
https://github.com/llvm/llvm-project/commit/788318484d967a5d6e5e96a47ca2421e13adc308
Author: Alexander Kornienko <alexfh at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-cmp.ll
Log Message:
-----------
Revert "[InstCombine] Teach foldSelectOpOp about samesign" (#124123)
Reverts llvm/llvm-project#122723 due to a miscompilation
See
https://github.com/llvm/llvm-project/pull/122723#issuecomment-2608777844
for details and the test case.
Commit: 33c44074714d1d2f3d5f65c3fb842cddb6b689ac
https://github.com/llvm/llvm-project/commit/33c44074714d1d2f3d5f65c3fb842cddb6b689ac
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
Log Message:
-----------
[RISCV] Support cR Inline Asm Constraint (#124174)
This denotes RVC-compatible GPR Pairs, which are used by the Zclsd
extension.
C API PR: riscv-non-isa/riscv-c-api-doc#102
Commit: d2234ca16310a9e9bd595561353556ea6ba0176f
https://github.com/llvm/llvm-project/commit/d2234ca16310a9e9bd595561353556ea6ba0176f
Author: vporpo <vporpodas at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][BottomUpVec] Fix packing when PHIs are present (#124206)
Before this patch we might have emitted pack instructions in between PHI
nodes. This patch fixes it by fixing the insert point of the new packs.
Commit: 969eb4ec4c22ca4eedc54cd8c73acdeecc3f7c86
https://github.com/llvm/llvm-project/commit/969eb4ec4c22ca4eedc54cd8c73acdeecc3f7c86
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan][NFC] Correct and clarify comment for getShadowPtrOffset()
The stated return type was incorrect; this patch corrects it. More generally, it explains how the Offset and its components fits into the overall shadow mapping calculation.
Commit: 24f177df61f673804a612dc48279c517bdecd696
https://github.com/llvm/llvm-project/commit/24f177df61f673804a612dc48279c517bdecd696
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt
M llvm/test/MC/X86/avx10.2-bf16-32-att.s
M llvm/test/MC/X86/avx10.2-bf16-32-intel.s
M llvm/test/MC/X86/avx10.2-bf16-64-att.s
M llvm/test/MC/X86/avx10.2-bf16-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2-BF16] Update VCOMISBF16 intrinsics and instructions (#123307)
- Add `I` to intrinsics and instructions
- Add `_` before sbf16 in intrinsics
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: acb7859f075f91b1105c04c37c6aa85db27a898a
https://github.com/llvm/llvm-project/commit/acb7859f075f91b1105c04c37c6aa85db27a898a
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
A llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-ignorable-exec-use.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-lane-mask.mir
M llvm/test/CodeGen/SystemZ/machinelicm-sunk-kill-flags.mir
Log Message:
-----------
[MachineSink] Extend loop sinking capability (#117247)
The current MIR cycle sinking capabilities are rather limited. It only
support sinking copies into a single successor block while obeying
limits.
This opt-in feature adds a more aggressive option, that is not limited
to the above concerns. The feature will try to "sink" by duplicating any
top-level preheader instruction (that we are sure is safe to sink) into
any user block, then does some dead code cleanup. In particular, this is
useful for high RP situations when loop bodies have control flow.
Commit: 00132643744237d2398fea1777114f3497629bd5
https://github.com/llvm/llvm-project/commit/00132643744237d2398fea1777114f3497629bd5
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/test/lit.cfg.py
Log Message:
-----------
[clang][test] Add .cuh as a recognized extension for lit test files (#124080)
Fixes https://github.com/llvm/llvm-project/issues/124079
Commit: 4405f728819350e35e34080874e1cf505bcb4ec6
https://github.com/llvm/llvm-project/commit/4405f728819350e35e34080874e1cf505bcb4ec6
Author: Henry Jiang <h243jian at uwaterloo.ca>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/IR/PassManagerInternal.h
Log Message:
-----------
[llvm][NFC] Remove CV-qualified base class in PassManagerInternal.h (#124193)
This resolves the `-Wignored-qualifiers` warning introduced by the new
warnign in https://github.com/llvm/llvm-project/pull/121419. First
caught in buildbot `ppc64le-lld-multistage-test`
https://lab.llvm.org/buildbot/#/builders/168/builds/7756
---------
Co-authored-by: Henry Jiang <henry.jiang1 at ibm.com>
Commit: b11529bfa26fe8f2abc7d57cd96716a494198327
https://github.com/llvm/llvm-project/commit/b11529bfa26fe8f2abc7d57cd96716a494198327
Author: lntue <lntue at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
Log Message:
-----------
[libc] Use -fno-math-errno to for __builtin_fma* to generate fma instructions. (#124200)
Fixes https://github.com/llvm/llvm-project/issues/123387
Commit: e06b7030303b50556f0a96948d03adb84a90e536
https://github.com/llvm/llvm-project/commit/e06b7030303b50556f0a96948d03adb84a90e536
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][NFC] Remove Redundant Inline Asm Logic (#124202)
This was left over from 408659c5b5c7d745042ae71db344d1ed10601512.
Commit: 0ef39a882bb342982929d2c856d7865de147a3c7
https://github.com/llvm/llvm-project/commit/0ef39a882bb342982929d2c856d7865de147a3c7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineCSE.cpp
Log Message:
-----------
MachineCSE: Remove check for subreg on a def operand (#124095)
There are no subregister defs in SSA.
Commit: 378dcf61014b787b3542b917f6296c9fb5ec490c
https://github.com/llvm/llvm-project/commit/378dcf61014b787b3542b917f6296c9fb5ec490c
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaLookup.cpp
A clang/test/Modules/module-local-hidden-friend-2.cppm
Log Message:
-----------
[C++20] [Modules] Fix may-be incorrect ADL for module local entities (#123931)
Close https://github.com/llvm/llvm-project/issues/123815
See the comments for details. We can't get primary context arbitrarily
since the redecl may have different context and information.
There is a TODO for modules specific case, I'd like to make it after
this PR.
Commit: 6735d527f9945fbf50c14a95cbdd66592472d622
https://github.com/llvm/llvm-project/commit/6735d527f9945fbf50c14a95cbdd66592472d622
Author: Cinhi Young <cyan at cyano.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.h
M llvm/test/CodeGen/Mips/cconv/vector.ll
M llvm/test/CodeGen/Mips/msa/basic_operations.ll
Log Message:
-----------
[MIPS] [MSA] Widen v2i8, v216 and v2i32 vectors (#123040)
- Widen v2i8, v2i16 and v2i32 vectors so they don't cast back and forth,
and make sure that instructions with correct data unit is being used.
- Handle undef indices for VSHF when lowering VECTOR_SHUFFLE (it crashes
if such index is present).
Commit: 9fecb4f9071740f6c1e665940583e9dceae2beb5
https://github.com/llvm/llvm-project/commit/9fecb4f9071740f6c1e665940583e9dceae2beb5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
[CodeGen] Fix a warning
This patch fixes:
llvm/lib/CodeGen/MachineSink.cpp:1667:22: error: unused variable
'Preheader' [-Werror,-Wunused-variable]
Commit: a001cc0e6cdcfa672b8aff9ce6d14782bb96356a
https://github.com/llvm/llvm-project/commit/a001cc0e6cdcfa672b8aff9ce6d14782bb96356a
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/lib/ExecutionEngine/Orc/Core.cpp
Log Message:
-----------
[ORC] Destroy defunct MaterializationUnits outside the session lock.
MaterializationUnits may contain arbitrary resources that need cleanup. We want
to do this outside the JIT's session lock.
This should fix a lock-order-inversion warning in clang-repl (for details see
https://github.com/llvm/llvm-project/issues/124215).
Commit: c9bc242e387f4a4a3dfcd86561f3ec0ca8a72d62
https://github.com/llvm/llvm-project/commit/c9bc242e387f4a4a3dfcd86561f3ec0ca8a72d62
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/Interpreter/simple-exception.cpp
Log Message:
-----------
[clang-repl] The simple-exception test now passes on arm64-darwin.
Commit: 435609b70c8bbf7bc6b73b04ec8852a9c11376ec
https://github.com/llvm/llvm-project/commit/435609b70c8bbf7bc6b73b04ec8852a9c11376ec
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/griddepcontrol.ll
Log Message:
-----------
[LLVM][NVPTX] Add support for griddepcontrol instruction (#123511)
This commit adds support for griddepcontrol PTX instruction with tests
under griddepcontrol.ll
Commit: fd174f0ff3e793fe96a6663b1488ed159cfe042f
https://github.com/llvm/llvm-project/commit/fd174f0ff3e793fe96a6663b1488ed159cfe042f
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/Interpreter/simple-exception.cpp
Log Message:
-----------
[clang-repl] Try to XFAIL testcase on arm32 without affecting arm64 darwin.
See discussion in https://github.com/llvm/llvm-project/commit/4f0325873faccfbe1.
Commit: 02a30049926bac042a7ee33fa587a4446c9c816f
https://github.com/llvm/llvm-project/commit/02a30049926bac042a7ee33fa587a4446c9c816f
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] preadv(64)/pwritev(64) interception. (#124115)
Commit: f3d2e75ead4e9d6e91712945a430cb036a061f3f
https://github.com/llvm/llvm-project/commit/f3d2e75ead4e9d6e91712945a430cb036a061f3f
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] inotify api for Linux interception. (#124177)
Commit: 6db73fa481beb9184ea8f1103e72e7a5c1d82e31
https://github.com/llvm/llvm-project/commit/6db73fa481beb9184ea8f1103e72e7a5c1d82e31
Author: vporpo <vporpodas at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
Log Message:
-----------
[SandboxVec][Scheduler] Fix clear() to clear all state (#124214)
This patch fixes the scheduler's clear() function to also clear the
ReadyList. Not doing so is a bug and results in crashes when the
ReadyList contains stale instructions, because it was never clered.
Commit: 2f39d138dc38a1fdf4754e4e26dd0aeb7409b13d
https://github.com/llvm/llvm-project/commit/2f39d138dc38a1fdf4754e4e26dd0aeb7409b13d
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
Log Message:
-----------
[DirectX] Handle dx.RawBuffer in DXILResourceAccess (#121725)
This adds handling for raw and structured buffers when lowering resource
access via `llvm.dx.resource.getpointer`.
Fixes #121714
Commit: 6330f1e052dbec842e0d12e3d0cc44996e8663d2
https://github.com/llvm/llvm-project/commit/6330f1e052dbec842e0d12e3d0cc44996e8663d2
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a regression in `PointerAlignment: Left` (#124085)
Don't insert a space between a type declaration r_paren and &/&&.
Fixes #124073.
Commit: 3c79a04cc231fc770d40878fc481868d1f312132
https://github.com/llvm/llvm-project/commit/3c79a04cc231fc770d40878fc481868d1f312132
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
Log Message:
-----------
[AMDGPU] Add amdgpu-sw-lower-lds pass to NPM codegen addIRPasses. (#124102)
This PR adds amdgpu-sw-lower-lds pass to
AMDGPUCodeGenPassBuilder::addIRPasses()
Commit: a9c61e0d7655a11f45f8e94b9481193fba11302e
https://github.com/llvm/llvm-project/commit/a9c61e0d7655a11f45f8e94b9481193fba11302e
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/lib/CodeGen/LiveIntervals.cpp
Log Message:
-----------
[NewPM] LiveIntervals: Check dependencies for invalidation (#123563)
Commit: 9dd5aed4edf029d66f0c25e6ae6fae3dbb5870d8
https://github.com/llvm/llvm-project/commit/9dd5aed4edf029d66f0c25e6ae6fae3dbb5870d8
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_loongarch.h
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_relax_align.s
Log Message:
-----------
[JITLink][LoongArch] Support R_LARCH_ALIGN relaxation (#122259)
Linker relaxation is not implemented for jitlink now. But if
relaxation is enabled by clang, R_LARCH_RELAX and
R_LARCH_ALIGN relocations will be emitted.
This commit adapts lld's algorithm to jitlink. Currently, only
relaxing R_LARCH_ALIGN is implemented. Other relaxable
relocs can be implemented in the future.
Without this, interpreting C++ code using clang-repl or running
ir using lli when relaxation is enabled will occur error: `JIT
session error: Unsupported loongarch relocation:102: R_LARCH_ALIGN`.
Similar to https://github.com/llvm/llvm-project/commit/310473c536dd4837934832d1b5454d212f15d5cc but only implement align.
Commit: 212cdc9a377a1b3ac96be0da20212592ebd2c818
https://github.com/llvm/llvm-project/commit/212cdc9a377a1b3ac96be0da20212592ebd2c818
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/test/Interpreter/simple-exception.cpp
M compiler-rt/lib/orc/macho_platform.cpp
R compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions.cpp
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
R llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.h
R llvm/include/llvm/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.h
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
R llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.cpp
R llvm/lib/ExecutionEngine/JITLink/CompactUnwindSupport.h
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.h
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/CompileUtils.cpp
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
R llvm/lib/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.cpp
Log Message:
-----------
Revert "[ORC] Enable JIT support for the compact-unwind frame info format..."
This reverts 4f0325873faccfbe171bae4babceb65975ca892e and follow-up patches
(see below) while I investigate some ongoing failures on the buildbots.
---
Revert "[clang-repl] Try to XFAIL testcase on arm32 without affecting arm64
darwin."
This reverts commit fd174f0ff3e793fe96a6663b1488ed159cfe042f.
Revert "[clang-repl] The simple-exception test now passes on arm64-darwin."
This reverts commit c9bc242e387f4a4a3dfcd86561f3ec0ca8a72d62.
Revert "[ORC] Destroy defunct MaterializationUnits outside the session lock."
This reverts commit a001cc0e6cdcfa672b8aff9ce6d14782bb96356a.
Revert "[ORC] Add explicit narrowing casts to fix build errors."
This reverts commit 26fc07d5d88760ad659599184fd10181287d2d9e.
Revert "[ORC] Enable JIT support for the compact-unwind frame info format on
Darwin."
This reverts commit 4f0325873faccfbe171bae4babceb65975ca892e.
Commit: 45d83ae7df65a3c9843270d970119bc97957d830
https://github.com/llvm/llvm-project/commit/45d83ae7df65a3c9843270d970119bc97957d830
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/lib/Dialect/Math/TestExpandMath.cpp
Log Message:
-----------
[mlir] [math] Fix the precision issue of expand math (#120865)
The convertFloorOp pattern incurs precision loss when floating-point
numbers exceed the representable range of int64. This pattern should be
removed.
Fixes https://github.com/llvm/llvm-project/issues/119836
Commit: 8ef171ee831ff030e5aa81a74d68edc133d0cb4f
https://github.com/llvm/llvm-project/commit/8ef171ee831ff030e5aa81a74d68edc133d0cb4f
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
Log Message:
-----------
[msan] Handle horizontal add/subtract intrinsic by applying to shadow (#124159)
Horizontal add (hadd) and subtract (hsub) are currently heuristically
handled by `maybeHandleSimpleNomemIntrinsic()` (via
`handleUnknownIntrinsic()`), which computes the shadow by bitwise OR'ing
the two operands. This has false positives for hadd/hsub shadows. For
example, suppose the shadows for the two operands are 00000000 and
11111111 respectively. The expected shadow for the result is 00001111,
but `maybeHandleSimpleNomemIntrinsic` would compute it as 11111111.
This patch handles horizontal add using
`handleIntrinsicByApplyingToShadow` (from
https://github.com/llvm/llvm-project/pull/114490), which has no false
positives for hadd/hsub: if each pair of adjacent shadow values is zero
(fully initialized), the result will be zero (fully initialized). More
generally, it is precise for hadd/hsub if at least one of the two
adjacent shadow values in each pair is zero.
It does have some false negatives for hadd/hsub: if we add/subtract two
adjacent non-zero shadow values, some bits of the result may incorrectly
be zero. We consider this an acceptable tradeoff for performance. To
make shadow propagation precise, we want the equivalent of "horizontal
OR", but this is not available. Reducing horizontal OR to (permutation
plus bitwise OR) is left as an exercise for the reader.
Commit: b84b717f093bd081f290cedcc4fecb2abec27868
https://github.com/llvm/llvm-project/commit/b84b717f093bd081f290cedcc4fecb2abec27868
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[CostModel] getTypeBasedIntrinsicInstrCost - add default cost approximations for funnel shifts (#124175)
We only had handling for cases where we had argument data.
Commit: f6253f8fe9ff43f2f09f8e743bb095a84829154a
https://github.com/llvm/llvm-project/commit/f6253f8fe9ff43f2f09f8e743bb095a84829154a
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_reloc_addsub.s
Log Message:
-----------
[JITLink][LoongArch] Add label addition and subtraction relocations (#122262)
Commit: ddd2f57b29661f21308eec0400fa92a6d075b0c6
https://github.com/llvm/llvm-project/commit/ddd2f57b29661f21308eec0400fa92a6d075b0c6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-trunc-nowrap.ll
Log Message:
-----------
[X86] Use NSW/NUW flags on ISD::TRUNCATE nodes to improve X86 PACKSS/PACKUS lowering (#123956)
If the NSW/NUW flags are present, then we can assume the source value is within bounds and saturation will not occur with the PACKSS/PACKUS instructions.
Fixes #87485
Commit: 886adf8fb3ba5ec358a9a4fbe87e4da6b3ae8973
https://github.com/llvm/llvm-project/commit/886adf8fb3ba5ec358a9a4fbe87e4da6b3ae8973
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
Log Message:
-----------
[clang][ExprConst] Let diagnostics point to std::allocator calls (#123744)
Instead of the underlying operator new calls. This fixes a longstanding
FIXME comment in cxx2a-constexpr-dynalloc.cpp.
Commit: ee2722fc882ed5dbc7609686bd998b023c6645b2
https://github.com/llvm/llvm-project/commit/ee2722fc882ed5dbc7609686bd998b023c6645b2
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/avx10_2_512bf16intrin.h
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Sema/SemaX86.cpp
M clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt
M llvm/test/MC/X86/avx10.2-bf16-32-att.s
M llvm/test/MC/X86/avx10.2-bf16-32-intel.s
M llvm/test/MC/X86/avx10.2-bf16-64-att.s
M llvm/test/MC/X86/avx10.2-bf16-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (#123335)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: e289cb545adabd8f7b72c0c4a023dcf640823767
https://github.com/llvm/llvm-project/commit/e289cb545adabd8f7b72c0c4a023dcf640823767
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Host/posix/DomainSocket.cpp
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
Log Message:
-----------
[lldb] Remove more workrounds for Android that have been fixed upstream (#124176)
Issues that were fixed 10+ years ago with Bionic libc.
Commit: bfd9bc274586b0261e16e22ac50d50586a0152e2
https://github.com/llvm/llvm-project/commit/bfd9bc274586b0261e16e22ac50d50586a0152e2
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
Log Message:
-----------
[AMDGPU] SIPeepholeSDWA: Disable on existing SDWA instructions (#124131)
This PR reapplies the changes from PR #123942 which had to be reverted
because of a test failure. The test has been adjusted.
Commit: a6cfde62bb89e595db2bf7bb8ae810293d8edf26
https://github.com/llvm/llvm-project/commit/a6cfde62bb89e595db2bf7bb8ae810293d8edf26
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Host/posix/HostInfoPosix.cpp
Log Message:
-----------
[lldb] Check Android API for existence of getgrgid_r() introduced in 24 (#124182)
Commit: eda16991adeb078647b2d239fcf666ddece5c30a
https://github.com/llvm/llvm-project/commit/eda16991adeb078647b2d239fcf666ddece5c30a
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/source/Host/common/Host.cpp
Log Message:
-----------
[lldb] Enable the use of dladdr() on Android (#124187)
dladdr() was introduced 15 years ago.
Commit: 97df7411fd99eb6b2ee54e0eadece490ae7a5a88
https://github.com/llvm/llvm-project/commit/97df7411fd99eb6b2ee54e0eadece490ae7a5a88
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/TestingGuide.rst
Log Message:
-----------
[llvm][Docs] Make it clear where lit test files live (#124121)
As someone on Discord was understandably confused because the build
directory does contain folder structures that look remarkably like the
source directory.
I used this page to explain it but realised that this must be from when
llvm was a separate repository. So `<user home>/llvm` probably was a
common path.
Now it's in llvm-project. So make that obvious in the instructions.
Commit: 24e70e3930724ce499ad05d669bfbc4423c542e0
https://github.com/llvm/llvm-project/commit/24e70e3930724ce499ad05d669bfbc4423c542e0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/exception.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/leap_second.h
M libcxx/include/__chrono/local_info.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/sys_info.h
M libcxx/include/__chrono/time_zone.h
M libcxx/include/__chrono/time_zone_link.h
M libcxx/include/__chrono/tzdb.h
M libcxx/include/__chrono/tzdb_list.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__config
M libcxx/include/__numeric/pstl.h
M libcxx/include/execution
M libcxx/include/iosfwd
M libcxx/include/syncstream
M libcxx/include/version
M libcxx/modules/std/iosfwd.inc
M libcxx/modules/std/syncstream.inc
M libcxx/test/libcxx/experimental/fexperimental-library.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/syncstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/support/test_macros.h
M libcxx/test/tools/clang_tidy_checks/internal_ftm_use.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Switch experimental library macros to 0/1 macros (#124030)
This is a continuation of what's been started in #89178.
As a drive-by, this also changes the PSTL macro to say `EXPERIMENTAL`
instead of `INCOMPLETE`.
Commit: 196f7c2a4f472074668451c5ecc40e82731940f7
https://github.com/llvm/llvm-project/commit/196f7c2a4f472074668451c5ecc40e82731940f7
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/ValueMapper.h
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
Log Message:
-----------
[Utils] Identity map module-level debug info on first use in CloneFunction* (#118627)
Summary:
To avoid cloning module-level debug info (owned by the module rather
than the function), CloneFunction implementation used to eagerly
identity map such debug info into ValueMap's MD map. In larger modules
with meaningful volume of debug info this gets very expensive.
By passing such debug info metadata via an IdentityMD set for the
ValueMapper to map on first use, we get several benefits:
1. Mapping metadata is not cheap, particularly because of tracking. When
cloning a Function we identity map lots of global module-level
metadata to avoid cloning it, while only a fraction of it is actually
used by the function. Mapping on first use is a lot faster for
modules with meaningful amount of debug info.
2. Eagerly identity mapping metadata makes it harder to cache
module-level data (e.g. a set of metadata nodes in a \a DICompileUnit).
With this patch we can cache certain module-level metadata
calculations to speed things up further.
Anecdata from compiling a sample cpp file with full debug info shows that this moderately speeds up
CoroSplitPass which is one of the heavier users of cloning:
| | Baseline | IdentityMD set |
|-----------------|----------|----------------|
| CoroSplitPass | 306ms | 221ms |
| CoroCloner | 101ms | 72ms |
| Speed up | 1x | 1.4x |
Test Plan:
ninja check-llvm-unit
ninja check-llvm
Commit: df3bc54eff3baaa0ad2492b858029bcbf258a5d7
https://github.com/llvm/llvm-project/commit/df3bc54eff3baaa0ad2492b858029bcbf258a5d7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
Log Message:
-----------
[flang] Avoid repeated hash lookups (NFC) (#124230)
Commit: 990837f91de329b1e045f90fadb86ffe21611d9a
https://github.com/llvm/llvm-project/commit/990837f91de329b1e045f90fadb86ffe21611d9a
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/invalid.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
Log Message:
-----------
[mlir][arith][tensor] Disable index type for bitcast (#121455)
Fixes #121397.
Commit: 1fa56038f6ea2b35e7b51d8151cfe7dfcb3abcf3
https://github.com/llvm/llvm-project/commit/1fa56038f6ea2b35e7b51d8151cfe7dfcb3abcf3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
Log Message:
-----------
[CostModel][X86] getIntrinsicInstrCost - lrint/llrint costs can use getCastInstrCost without argument data
We don't use the IntrinsicCostAttributes arguments so, which allows us to use in type-only analysis in a future patch.
Commit: b4ef11d0e20b8263012613697503533fbb2119d6
https://github.com/llvm/llvm-project/commit/b4ef11d0e20b8263012613697503533fbb2119d6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124228)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect Source to be nonnull.
Commit: 148da06628507123f340c68b0ba732c31c3b6de9
https://github.com/llvm/llvm-project/commit/148da06628507123f340c68b0ba732c31c3b6de9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Sema/SemaInternal.h
Log Message:
-----------
[Sema] Migrate away from PointerUnion::dyn_cast (NFC) (#124229)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect UPP.first to be nonnull.
Commit: 1c0af8dced4a38967f3cb2d93fb6576535bc748b
https://github.com/llvm/llvm-project/commit/1c0af8dced4a38967f3cb2d93fb6576535bc748b
Author: gbMattN <146744444+gbMattN at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
A compiler-rt/test/tysan/ignorelist.c
A compiler-rt/test/tysan/ignorelist.h
A compiler-rt/test/tysan/preprocessor.c
Log Message:
-----------
[TySan] Added tests for methods of ignoring instrumentation (#124125)
TySan supports some preprocessor checks and ignorelists, but they are
currently untested. This PR adds some tests to make sure they all work.
@fhahn @AaronBallman, this is based off the discussion in the
documentation PR [#123595]
Commit: 4b6fc4934685c26f223e435d62b02b60544f76d3
https://github.com/llvm/llvm-project/commit/4b6fc4934685c26f223e435d62b02b60544f76d3
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/docs/Contributing.rst
M llvm/docs/DeveloperPolicy.rst
Log Message:
-----------
[llvm][Docs] Clarify the process for requesting a merge on your behalf (#124154)
This makes it more clear what you the author must do, and what reviewers
can expect you to do, before an approved PR can be merged. Spliting out
the email bit into a section also means we can link directly to it in
discussions.
This relies on one of those parties actually reading this, but I plan to
tackle the case where they don't with some new automation.
Commit: 0510d4ea59a185db453b5910f307e1c6e9184589
https://github.com/llvm/llvm-project/commit/0510d4ea59a185db453b5910f307e1c6e9184589
Author: Karlo Basioli <68535415+basioli-k at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel]Fix bazel build after 631a6e0004e57ca85569b99ea411418627925697
Commit: 865104a1042e824254b130c00c7f8ee0e0e0f6c5
https://github.com/llvm/llvm-project/commit/865104a1042e824254b130c00c7f8ee0e0e0f6c5
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
Log Message:
-----------
[AArch64][SME] Change output class of FORM_TRANSPOSED_REG_TUPLE pseudos (#123755)
The FORM_TRANSPOSED_REG_TUPLE pseudo nodes use either the ZPR2Mul2
or ZPR4Mul4 register classes for output. This patch changes the class
so that these can be extended to other multi-vector intrinsics which
instead create a ZPR2/ZPR4 register sequence.
Commit: 77465967130a502eb092a710a2f18be23ef2efff
https://github.com/llvm/llvm-project/commit/77465967130a502eb092a710a2f18be23ef2efff
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr.ll
Log Message:
-----------
[SLP][X86] Add VBMI2 coverage for funnel shift tests
VBMI2 CPUs actually have vector funnel shift instruction support
Commit: aff1242b8ee8b75d68812337f8e408a1405ab00f
https://github.com/llvm/llvm-project/commit/aff1242b8ee8b75d68812337f8e408a1405ab00f
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
Log Message:
-----------
[LV] Align debug location of the widen-phi to the original phi. (#120338)
This patch align the debug location of the widen-phi to the debug
location of original phi.
Split from: #120054
Commit: 3208801aec1867b83335418d84ee09b773ef5b2e
https://github.com/llvm/llvm-project/commit/3208801aec1867b83335418d84ee09b773ef5b2e
Author: David Green <david.green at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Add some bf16 GISel test coverage. NFC
Most of this is mis-compiling with +fullfp16 and should be disabled for GISel.
Commit: f8a56df36e39b01af667f2e7823d5c1d8bab73ee
https://github.com/llvm/llvm-project/commit/f8a56df36e39b01af667f2e7823d5c1d8bab73ee
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
Log Message:
-----------
AMDGPU/GlobalISel: AMDGPURegBankSelect (#112863)
Assign register banks to virtual registers. Does not use generic
RegBankSelect. After register bank selection all register operand of
G_ instructions have LLT and register banks exclusively. If they had
register class, reassign appropriate register bank.
Assign register banks using machine uniformity analysis:
Sgpr - uniform values and some lane masks
Vgpr - divergent, non S1, values
Vcc - divergent S1 values(lane masks)
AMDGPURegBankSelect does not consider available instructions and, in
some cases, G_ instructions with some register bank assignment can't be
inst-selected. This is solved in RegBankLegalize.
Exceptions when uniformity analysis does not work:
S32/S64 lane masks:
- need to end up with sgpr register class after instruction selection
- In most cases Uniformity analysis declares them as uniform
(forced by tablegen) resulting in sgpr S32/S64 reg bank
- When Uniformity analysis declares them as divergent (some phis),
use intrinsic lane mask analyzer to still assign sgpr register bank
temporal divergence copy:
- COPY to vgpr with implicit use of $exec inside of the cycle
- this copy is declared as uniform by uniformity analysis
- make sure that assigned bank is vgpr
Note: uniformity analysis does not consider that registers with vgpr def
are divergent (you can have uniform value in vgpr).
- TODO: implicit use of $exec could be implemented as indicator
that instruction is divergent
Commit: 625e0a40f1a97d181a4641f604495b6aea433bd8
https://github.com/llvm/llvm-project/commit/625e0a40f1a97d181a4641f604495b6aea433bd8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
Log Message:
-----------
[SLP][X86] Add missing SSE2/SSE4 checks from vector rotate tests
Commit: 9bb3c62948d0c6dd3fb233186ae6a79744012b8f
https://github.com/llvm/llvm-project/commit/9bb3c62948d0c6dd3fb233186ae6a79744012b8f
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/test/Driver/fast-math.f90
Log Message:
-----------
[Flang][Driver] Deprecate Ofast (#101701)
This is subject to agreement by the Flang community
(https://discourse.llvm.org/t/rfc-deprecate-ofast-in-flang/80243).
Commit: e6030d389571b3f1b0f0c5a35b7fa45937ed0f6c
https://github.com/llvm/llvm-project/commit/e6030d389571b3f1b0f0c5a35b7fa45937ed0f6c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Use std::allocator calls for Descriptor source (#123900)
... for the dynamic blocks created for operator new calls. This way we
get the type of memory allocated right. As a side-effect, the
diagnostics now point to the std::allocator calls, which is an
improvement.
Commit: 8e702735090388a3231a863e343f880d0f96fecb
https://github.com/llvm/llvm-project/commit/8e702735090388a3231a863e343f880d0f96fecb
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/IRMutator.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/BPF/BPFASpaceCastSimplifyPass.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/DivRemPairs.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopSink.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/Sink.cpp
M llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
M llvm/lib/Transforms/Utils/GuardUtils.cpp
M llvm/lib/Transforms/Utils/Instrumentation.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/tools/llvm-stress/llvm-stress.cpp
M llvm/unittests/Analysis/AssumeBundleQueriesTest.cpp
M llvm/unittests/Analysis/CGSCCPassManagerTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/IR/LegacyPassManagerTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/Support/ScopHelper.cpp
Log Message:
-----------
[NFC][DebugInfo] Use iterator moveBefore at many call-sites (#123583)
As part of the "RemoveDIs" project, BasicBlock::iterator now carries a
debug-info bit that's needed when getFirstNonPHI and similar feed into
instruction insertion positions. Call-sites where that's necessary were
updated a year ago; but to ensure some type safety however, we'd like to
have all calls to moveBefore use iterators.
This patch adds a (guaranteed dereferenceable) iterator-taking
moveBefore, and changes a bunch of call-sites where it's obviously safe
to change to use it by just calling getIterator() on an instruction
pointer. A follow-up patch will contain less-obviously-safe changes.
We'll eventually deprecate and remove the instruction-pointer
insertBefore, but not before adding concise documentation of what
considerations are needed (very few).
Commit: dac49e8ddd5dc0104c238f09cdd532e6fb5c4f1d
https://github.com/llvm/llvm-project/commit/dac49e8ddd5dc0104c238f09cdd532e6fb5c4f1d
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[Arm] Fix generating code with UB in NeonEmitter (#121802)
When generating `arm_neon.h`, NeonEmitter outputs code that
violates strict aliasing rules (C23 6.5 Expressions #7,
C++23 7.2.1 Value category [basic.lval] #11), for example:
bfloat16_t __reint = __p0;
uint32_t __reint1 = (uint32_t)(*(uint16_t *) &__reint) << 16;
__ret = *(float32_t *) &__reint1;
This patch fixed the offending code by replacing it with
a call to `__builtin_bit_cast`.
Commit: 33fc477e6e2614f71541f4287c1d68757b9203b0
https://github.com/llvm/llvm-project/commit/33fc477e6e2614f71541f4287c1d68757b9203b0
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Update `cxx_dr_status.html`
Commit: 965ff7fa309d4408b4ccf5df7e59fec264c905c5
https://github.com/llvm/llvm-project/commit/965ff7fa309d4408b4ccf5df7e59fec264c905c5
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/sm-version.ll
Log Message:
-----------
[NVPTX] Add SM versions for 101 and 120 (#124155)
This patch adds SM and PTX versions for SM
101, 120 and their arch-accelerated variants.
All these are supported in cuda-12.8.
sm120/120a requires ptx8.7 and the rest require ptx8.6.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 0ee037b861f94604907d95d0ff0ff87805b52428
https://github.com/llvm/llvm-project/commit/0ee037b861f94604907d95d0ff0ff87805b52428
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
Log Message:
-----------
AMDGPU/GlobalISel: AMDGPURegBankLegalize (#112864)
Lower G_ instructions that can't be inst-selected with register bank
assignment from AMDGPURegBankSelect based on uniformity analysis.
- Lower instruction to perform it on assigned register bank
- Put uniform value in vgpr because SALU instruction is not available
- Execute divergent instruction in SALU - "waterfall loop"
Given LLTs on all operands after legalizer, some register bank
assignments require lowering while other do not.
Note: cases where all register bank assignments would require lowering
are lowered in legalizer.
AMDGPURegBankLegalize goals:
- Define Rules: when and how to perform lowering
- Goal of defining Rules it to provide high level table-like brief
overview of how to lower generic instructions based on available
target features and uniformity info (uniform vs divergent).
- Fast search of Rules, depends on how complicated Rule.Predicate is
- For some opcodes there would be too many Rules that are essentially
all the same just for different combinations of types and banks.
Write custom function that handles all cases.
- Rules are made from enum IDs that correspond to each operand.
Names of IDs are meant to give brief description what lowering does
for each operand or the whole instruction.
- AMDGPURegBankLegalizeHelper implements lowering algorithms
Since this is the first patch that actually enables -new-reg-bank-select
here is the summary of regression tests that were added earlier:
- if instruction is uniform always select SALU instruction if available
- eliminate back to back vgpr to sgpr to vgpr copies of uniform values
- fast rules: small differences for standard and vector instruction
- enabling Rule based on target feature - salu_float
- how to specify lowering algorithm - vgpr S64 AND to S32
- on G_TRUNC in reg, it is up to user to deal with truncated bits
G_TRUNC in reg is treated as no-op.
- dealing with truncated high bits - ABS S16 to S32
- sgpr S1 phi lowering
- new opcodes for vcc-to-scc and scc-to-vcc copies
- lowering for vgprS1-to-vcc copy (formally this is vgpr-to-vcc G_TRUNC)
- S1 zext and sext lowering to select
- uniform and divergent S1 AND(OR and XOR) lowering - inst-selected into
SALU instruction
- divergent phi with uniform inputs
- divergent instruction with temporal divergent use, source instruction
is defined as uniform(AMDGPURegBankSelect) - missing temporal
divergence lowering
- uniform phi, because of undef incoming, is assigned to vgpr. Will be
fixed in AMDGPURegBankSelect via another fix in machine uniformity
analysis.
Commit: 88136f96452952b85b9c40e185b929e561e6e59f
https://github.com/llvm/llvm-project/commit/88136f96452952b85b9c40e185b929e561e6e59f
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Canonicalize gathers/scatters with trivial offsets (#117939)
Canonicalize gathers/scatters with contiguous (i.e. [0, 1, 2, ...])
offsets into vector masked load/store ops.
Commit: 46a08ce83262767b3aae5c9828fabcd13f2e8a96
https://github.com/llvm/llvm-project/commit/46a08ce83262767b3aae5c9828fabcd13f2e8a96
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidyProfiling.cpp
M clang-tools-extra/clang-tidy/ClangTidyProfiling.h
Log Message:
-----------
[clang-tidy][NFC] simplify `TimerGroup` in `ClangTidyProfiling` (#123958)
`TimerGroup` don't need to use as field of `ClangTidyProfiling`.
We can construct it local during destructing.
Commit: 8e6d6a55108c7979f0392bf8ad3444c92a2474e9
https://github.com/llvm/llvm-project/commit/8e6d6a55108c7979f0392bf8ad3444c92a2474e9
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] improve performance misc-unused-using-decls (#123454)
skip header file before register AST Matchers
it can avoid to matcher lots of ast node when lint header file
Commit: 4831fa8632f6ab89fe2c14b8e7ec09500e43c099
https://github.com/llvm/llvm-project/commit/4831fa8632f6ab89fe2c14b8e7ec09500e43c099
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for load (#112882)
Add IDs for bit width that cover multiple LLTs: B32 B64 etc.
"Predicate" wrapper class for bool predicate functions used to
write pretty rules. Predicates can be combined using &&, || and !.
Lowering for splitting and widening loads.
Write rules for loads to not change existing mir tests from old
regbankselect.
Commit: 5ce349589a4adcc18f5807551bf4b78091746aa8
https://github.com/llvm/llvm-project/commit/5ce349589a4adcc18f5807551bf4b78091746aa8
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroCloner.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[Coro] Prebuild a module-level debug info set and share it between all coroutine clones (#118628)
Summary:
CoroCloner, by calling into CloneFunctionInto, does a lot of repeated
work priming DIFinder and building a list of common module-level debug
info metadata. For programs compiled with full debug info this can get
very expensive.
This diff builds the data once and shares it between all clones.
Anecdata for a sample cpp source file compiled with full debug info:
| | Baseline | IdentityMD set | Prebuilt CommonDI (cur.) |
|-----------------|----------|----------------|--------------------------|
| CoroSplitPass | 306ms | 221ms | 68ms |
| CoroCloner | 101ms | 72ms | 0.5ms |
| CollectCommonDI | - | - | 63ms |
| Speed up | 1x | 1.4x | 4.5x |
Note that CollectCommonDebugInfo happens once *per coroutine* rather than per clone.
Test Plan:
ninja check-llvm-unit
ninja check-llvm
Compiled a sample internal source file, checked time trace output for scope timings.
Commit: b60c118f53e6f7e5328e54dc26b4d6787030c02b
https://github.com/llvm/llvm-project/commit/b60c118f53e6f7e5328e54dc26b4d6787030c02b
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSSAContext.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
Log Message:
-----------
MachineUniformityAnalysis: Improve isConstantOrUndefValuePhi (#112866)
Change existing code for G_PHI to match what LLVM-IR version is doing
via PHINode::hasConstantOrUndefValue. This is not safe for regular PHI
since it may appear with an undef operand and getVRegDef can fail.
Most notably this improves number of values that can be allocated
to sgpr in AMDGPURegBankSelect.
Common case here are phis that appear in structurize-cfg lowering
for cycles with multiple exits:
Undef incoming value is coming from block that reached cycle exit
condition, if other incoming is uniform keep the phi uniform despite
the fact it is joining values from pair of blocks that are entered
via divergent condition branch.
Commit: 57b48987f6c21e369e7bb1626dc79ca74aa34fdb
https://github.com/llvm/llvm-project/commit/57b48987f6c21e369e7bb1626dc79ca74aa34fdb
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M lldb/include/lldb/Symbol/Function.h
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Symbol/Function.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-function.s
Log Message:
-----------
[lldb] Use the first address range as the function address (#122440)
This is the behavior expected by DWARF. It also requires some fixups to
algorithms which were storing the addresses of some objects (Blocks and
Variables) relative to the beginning of the function.
There are plenty of things that still don't work in this setups, but
this change is sufficient for the expression evaluator to correctly
recognize the entry point of a function in this case.
Commit: acc13dbe4dcbfeafec24211148683a8b7e9c4cf0
https://github.com/llvm/llvm-project/commit/acc13dbe4dcbfeafec24211148683a8b7e9c4cf0
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[libc][workflow] improve ci coverage with windows-2025 and arm ubuntu (#123745)
Add the following workflows:
- `fullbuild` on aarch64 ubuntu
- `overlay` on windows 2025
- `overlay` on aarch64 ubuntu
`ccache` variant is used on `aarch64` due to
https://github.com/hendrikmuhs/ccache-action/issues/279
Commit: d6e0798a2a7cef94b2457f39c93f7083aaebd29d
https://github.com/llvm/llvm-project/commit/d6e0798a2a7cef94b2457f39c93f7083aaebd29d
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
A llvm/test/CodeGen/Mips/llvm-ir/sdiv-freebsd.ll
Log Message:
-----------
[Mips] Add the missing judgment when processing function handleMFLOSlot (#121463)
In function handleMFLOSlot, we may get a variable LastInstInFunction
with a value of true from function getNextMachineInstr and IInSlot may
be null which would trigger an assert.
So we need to skip this case.
Fix #118223.
Commit: f9c45b12160d5b46b1d533b7e83b6abddfa527dd
https://github.com/llvm/llvm-project/commit/f9c45b12160d5b46b1d533b7e83b6abddfa527dd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-24 (Fri, 24 Jan 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M clang-tools-extra/clang-tidy/ClangTidyProfiling.cpp
M clang-tools-extra/clang-tidy/ClangTidyProfiling.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/modularize/CoverageChecker.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/UnresolvedSet.h
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/include/clang/Basic/Attributes.h
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/CMakeLists.txt
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaInternal.h
M clang/include/clang/Sema/TemplateDeduction.h
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Headers/avx10_2_512bf16intrin.h
M clang/lib/Headers/avx10_2_512convertintrin.h
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Headers/avx10_2convertintrin.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaSPIRV.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-0x.cpp
M clang/test/CXX/temp/temp.param/p12.cpp
M clang/test/CodeCompletion/member-access.cpp
M clang/test/CodeGen/AArch64/cpu-supports-target.c
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c
M clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
M clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/avx10_2convert-builtins.c
R clang/test/CodeGenHLSL/builtins/reflect.hlsl
R clang/test/CodeGenSPIRV/Builtins/reflect.c
M clang/test/Driver/arm-mfpu.c
M clang/test/Driver/cuda-cross-compiling.c
A clang/test/Driver/fno-plt.c
M clang/test/Driver/linux-as.c
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mscq.c
A clang/test/Driver/loongarch-relax-features.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Headers/__cpuidex_conflict.c
A clang/test/Headers/crash-instantiated-in-scope-cxx-modules5.cpp
M clang/test/Modules/cxx-templates.cpp
M clang/test/Modules/empty.modulemap
A clang/test/Modules/module-local-hidden-friend-2.cppm
A clang/test/Preprocessor/builtin_aux_info.cpp
M clang/test/Preprocessor/init-loongarch.c
A clang/test/Preprocessor/macro-reserved-attrs-cxx11.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
M clang/test/SemaCXX/make_integer_seq.cpp
R clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
R clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M clang/test/SemaTemplate/cwg2398.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/SemaTemplate/temp_arg_nontype.cpp
M clang/test/SemaTemplate/temp_arg_template.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/test/Templight/templight-prior-template-arg.cpp
M clang/test/lit.cfg.py
M clang/unittests/Format/FormatTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M clang/www/cxx_dr_status.html
M compiler-rt/lib/asan/tests/asan_test.cpp
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/lsan/lsan_common_linux.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_getauxval.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
M compiler-rt/test/profile/Linux/Inputs/instrprof-value-merge.c
M compiler-rt/test/profile/Linux/binary-id.c
M compiler-rt/test/profile/Linux/profile-version.c
A compiler-rt/test/tysan/ignorelist.c
A compiler-rt/test/tysan/ignorelist.h
A compiler-rt/test/tysan/preprocessor.c
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/module/cudadevice.f90
M flang/runtime/CUDA/pointer.cpp
M flang/test/Driver/fast-math.f90
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/HLFIR/elemental-intrinsics.f90
M flang/test/Lower/Intrinsics/acos.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/trigonometric-intrinsics.f90
M flang/test/Semantics/cuf-device-procedures01.cuf
M flang/test/Semantics/cuf09.cuf
M flang/test/Semantics/reduce.cuf
M libc/benchmarks/distributions/README.md
M libc/benchmarks/gpu/CMakeLists.txt
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/CMakeLists.txt
M libc/docs/dev/printf_behavior.rst
M libc/docs/dev/undefined_behavior.rst
M libc/docs/gpu/rpc.rst
M libc/docs/headers/index.rst
M libc/docs/platform_support.rst
M libc/fuzzing/__support/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/pthread.yaml
M libc/include/stdfix.yaml
M libc/include/sys/uio.yaml
M libc/include/wchar.yaml
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/spin_lock.h
M libc/src/__support/time/windows/CMakeLists.txt
M libc/src/math/nvptx/CMakeLists.txt
M libc/src/stdlib/CMakeLists.txt
M libc/src/string/CMakeLists.txt
M libc/src/string/string_utils.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcslen.cpp
A libc/src/wchar/wcslen.h
M libc/test/src/__support/File/CMakeLists.txt
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/stdfix/CMakeLists.txt
M libc/test/src/sys/resource/CMakeLists.txt
M libc/test/src/sys/select/CMakeLists.txt
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/wait/CMakeLists.txt
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcslen_test.cpp
M libc/utils/docgen/aio.yaml
M libc/utils/docgen/net/if.yaml
M libc/utils/docgen/netinet/in.yaml
M libc/utils/docgen/sys/resource.yaml
M libc/utils/docgen/sys/stat.yaml
M libc/utils/docgen/sys/time.yaml
M libc/utils/docgen/sys/wait.yaml
M libc/utils/docgen/termios.yaml
A libc/utils/docgen/unistd.yaml
M libc/utils/mathtools/worst_case.sollya
M libclc/amdgpu/lib/SOURCES
R libclc/amdgpu/lib/math/nextafter.cl
M libclc/clc/include/clc/clcmacro.h
A libclc/clc/include/clc/math/binary_decl_with_scalar_second_arg.inc
A libclc/clc/include/clc/math/clc_nextafter.h
M libclc/clc/include/clc/relational/clc_isnan.h
A libclc/clc/include/clc/shared/binary_decl.inc
M libclc/clc/lib/clspv/SOURCES
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_nextafter.cl
M libclc/clc/lib/spirv/SOURCES
M libclc/clc/lib/spirv64/SOURCES
M libclc/clspv/lib/SOURCES
R libclc/clspv/lib/math/nextafter.cl
R libclc/clspv/lib/math/nextafter.inc
R libclc/generic/include/clc/math/binary_decl.inc
M libclc/generic/include/clc/math/fmax.h
M libclc/generic/include/clc/math/fmin.h
R libclc/generic/include/math/clc_nextafter.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/nextafter.cl
R libclc/ptx/lib/SOURCES
R libclc/ptx/lib/math/nextafter.cl
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/exception.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/leap_second.h
M libcxx/include/__chrono/local_info.h
M libcxx/include/__chrono/ostream.h
M libcxx/include/__chrono/sys_info.h
M libcxx/include/__chrono/time_zone.h
M libcxx/include/__chrono/time_zone_link.h
M libcxx/include/__chrono/tzdb.h
M libcxx/include/__chrono/tzdb_list.h
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/__compare/compare_three_way_result.h
M libcxx/include/__config
M libcxx/include/__cxx03/__locale_dir/locale_base_api/android.h
M libcxx/include/__format/format_arg.h
M libcxx/include/__locale_dir/locale_base_api/android.h
M libcxx/include/__numeric/pstl.h
M libcxx/include/__ranges/range_adaptor.h
M libcxx/include/__type_traits/add_cv_quals.h
M libcxx/include/__type_traits/add_lvalue_reference.h
M libcxx/include/__type_traits/add_pointer.h
M libcxx/include/__type_traits/add_rvalue_reference.h
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/alignment_of.h
M libcxx/include/__type_traits/common_reference.h
M libcxx/include/__type_traits/conditional.h
M libcxx/include/__type_traits/conjunction.h
M libcxx/include/__type_traits/datasizeof.h
M libcxx/include/__type_traits/decay.h
M libcxx/include/__type_traits/disjunction.h
M libcxx/include/__type_traits/enable_if.h
M libcxx/include/__type_traits/extent.h
M libcxx/include/__type_traits/has_unique_object_representation.h
M libcxx/include/__type_traits/has_virtual_destructor.h
M libcxx/include/__type_traits/integral_constant.h
M libcxx/include/__type_traits/invoke.h
M libcxx/include/__type_traits/is_abstract.h
M libcxx/include/__type_traits/is_aggregate.h
M libcxx/include/__type_traits/is_always_bitcastable.h
M libcxx/include/__type_traits/is_arithmetic.h
M libcxx/include/__type_traits/is_array.h
M libcxx/include/__type_traits/is_assignable.h
M libcxx/include/__type_traits/is_base_of.h
M libcxx/include/__type_traits/is_bounded_array.h
M libcxx/include/__type_traits/is_class.h
M libcxx/include/__type_traits/is_compound.h
M libcxx/include/__type_traits/is_const.h
M libcxx/include/__type_traits/is_constructible.h
M libcxx/include/__type_traits/is_convertible.h
M libcxx/include/__type_traits/is_destructible.h
M libcxx/include/__type_traits/is_empty.h
M libcxx/include/__type_traits/is_enum.h
M libcxx/include/__type_traits/is_execution_policy.h
M libcxx/include/__type_traits/is_final.h
M libcxx/include/__type_traits/is_floating_point.h
M libcxx/include/__type_traits/is_function.h
M libcxx/include/__type_traits/is_fundamental.h
M libcxx/include/__type_traits/is_implicit_lifetime.h
M libcxx/include/__type_traits/is_integral.h
M libcxx/include/__type_traits/is_literal_type.h
M libcxx/include/__type_traits/is_member_pointer.h
M libcxx/include/__type_traits/is_nothrow_assignable.h
M libcxx/include/__type_traits/is_nothrow_constructible.h
M libcxx/include/__type_traits/is_nothrow_convertible.h
M libcxx/include/__type_traits/is_nothrow_destructible.h
M libcxx/include/__type_traits/is_null_pointer.h
M libcxx/include/__type_traits/is_object.h
M libcxx/include/__type_traits/is_pod.h
M libcxx/include/__type_traits/is_pointer.h
M libcxx/include/__type_traits/is_polymorphic.h
M libcxx/include/__type_traits/is_reference.h
M libcxx/include/__type_traits/is_same.h
M libcxx/include/__type_traits/is_scalar.h
M libcxx/include/__type_traits/is_signed.h
M libcxx/include/__type_traits/is_standard_layout.h
M libcxx/include/__type_traits/is_swappable.h
M libcxx/include/__type_traits/is_trivial.h
M libcxx/include/__type_traits/is_trivially_assignable.h
M libcxx/include/__type_traits/is_trivially_constructible.h
M libcxx/include/__type_traits/is_trivially_copyable.h
M libcxx/include/__type_traits/is_trivially_destructible.h
M libcxx/include/__type_traits/is_unbounded_array.h
M libcxx/include/__type_traits/is_union.h
M libcxx/include/__type_traits/is_unsigned.h
M libcxx/include/__type_traits/is_void.h
M libcxx/include/__type_traits/is_volatile.h
M libcxx/include/__type_traits/make_signed.h
M libcxx/include/__type_traits/make_unsigned.h
M libcxx/include/__type_traits/negation.h
M libcxx/include/__type_traits/rank.h
M libcxx/include/__type_traits/remove_all_extents.h
M libcxx/include/__type_traits/remove_const.h
M libcxx/include/__type_traits/remove_cv.h
M libcxx/include/__type_traits/remove_cvref.h
M libcxx/include/__type_traits/remove_extent.h
M libcxx/include/__type_traits/remove_pointer.h
M libcxx/include/__type_traits/remove_reference.h
M libcxx/include/__type_traits/remove_volatile.h
M libcxx/include/__type_traits/type_identity.h
M libcxx/include/__type_traits/type_list.h
M libcxx/include/__type_traits/underlying_type.h
M libcxx/include/__type_traits/unwrap_ref.h
M libcxx/include/execution
M libcxx/include/iosfwd
M libcxx/include/streambuf
M libcxx/include/syncstream
M libcxx/include/variant
M libcxx/include/version
M libcxx/modules/std/iosfwd.inc
M libcxx/modules/std/syncstream.inc
M libcxx/src/verbose_abort.cpp
A libcxx/test/libcxx/algorithms/no_specializations.verify.cpp
M libcxx/test/libcxx/experimental/fexperimental-library.compile.pass.cpp
A libcxx/test/libcxx/language.support/no_specializations.verify.cpp
A libcxx/test/libcxx/ranges/no_specializations.verify.cpp
M libcxx/test/libcxx/type_traits/is_specialization.verify.cpp
A libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/format/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/no_specializations.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/syncstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/support/test_macros.h
M libcxx/test/tools/clang_tidy_checks/internal_ftm_use.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxxabi/src/abort_message.cpp
M lld/COFF/InputFiles.cpp
M lld/ELF/InputFiles.cpp
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/Options.td
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/docs/ReleaseNotes.rst
M lld/test/COFF/empty-section-decl.yaml
M lld/test/ELF/gnustack.s
M lld/test/MachO/cfstring-dedup.s
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/include/lldb/Host/Time.h
M lldb/include/lldb/Symbol/Function.h
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Host/CMakeLists.txt
R lldb/source/Host/android/LibcGlue.cpp
M lldb/source/Host/common/Host.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/posix/DomainSocket.cpp
M lldb/source/Host/posix/HostInfoPosix.cpp
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
M lldb/source/Host/windows/PipeWindows.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Symbol/Function.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/UnixSignals.cpp
M lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
M lldb/test/API/commands/frame/diagnose/array/TestArray.py
M lldb/test/API/commands/frame/diagnose/bad-reference/TestBadReference.py
M lldb/test/API/commands/frame/diagnose/complicated-expression/TestComplicatedExpression.py
M lldb/test/API/commands/frame/diagnose/dereference-argument/TestDiagnoseDereferenceArgument.py
M lldb/test/API/commands/frame/diagnose/dereference-function-return/TestDiagnoseDereferenceFunctionReturn.py
M lldb/test/API/commands/frame/diagnose/dereference-this/TestDiagnoseDereferenceThis.py
M lldb/test/API/commands/frame/diagnose/inheritance/TestDiagnoseInheritance.py
M lldb/test/API/commands/frame/diagnose/local-variable/TestLocalVariable.py
M lldb/test/API/commands/frame/diagnose/virtual-method-call/TestDiagnoseDereferenceVirtualMethodCall.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
M lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-function.s
M lldb/unittests/Signals/UnixSignalsTest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/docs/Contributing.rst
M llvm/docs/DeveloperPolicy.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/TestingGuide.rst
M llvm/examples/BrainF/BrainF.cpp
M llvm/examples/ExceptionDemo/CMakeLists.txt
M llvm/examples/ExceptionDemo/ExceptionDemo.cpp
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachineJumpTableInfo.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_loongarch.h
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/include/llvm/FuzzMutate/OpDescriptor.h
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/PassManagerInternal.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCELFStreamer.h
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/include/llvm/ObjCopy/ELF/ELFConfig.h
M llvm/include/llvm/Object/COFF.h
M llvm/include/llvm/Option/OptTable.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
A llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/include/llvm/Support/Threading.h
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/ValueMapper.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineLoopUtils.cpp
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/MachineSSAContext.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/CodeGen/StackColoring.cpp
A llvm/lib/CodeGen/StaticDataSplitter.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/FileCheck/FileCheckImpl.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/IRMutator.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/InlineAsm.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/ProfileSummary.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/lib/Option/OptTable.cpp
A llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/Unix/Signals.inc
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMCallingConv.cpp
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/BPF/BPFASpaceCastSimplifyPass.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.h
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/Coroutines/CoroCloner.h
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/DivRemPairs.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopSink.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/Sink.cpp
M llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/CodeMoverUtils.cpp
M llvm/lib/Transforms/Utils/GuardUtils.cpp
M llvm/lib/Transforms/Utils/Instrumentation.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/VNCoercion.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Analysis/ScalarEvolution/implied-via-division.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16.ll
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/abs_i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
A llvm/test/CodeGen/AMDGPU/lower-indirect-lds-references.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
A llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-ignorable-exec-use.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-lane-mask.mir
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.mir
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/pr51516.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
A llvm/test/CodeGen/Hexagon/swp-ws-live-intervals-issue123165.mir
A llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg-128.ll
M llvm/test/CodeGen/LoongArch/smul-with-overflow.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/CodeGen/Mips/cconv/vector.ll
A llvm/test/CodeGen/Mips/llvm-ir/sdiv-freebsd.ll
M llvm/test/CodeGen/Mips/msa/basic_operations.ll
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
A llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/sm-version.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
R llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
M llvm/test/CodeGen/SystemZ/machinelicm-sunk-kill-flags.mir
A llvm/test/CodeGen/SystemZ/pr124001.ll
M llvm/test/CodeGen/Thumb/smul_fix.ll
M llvm/test/CodeGen/Thumb/smul_fix_sat.ll
M llvm/test/CodeGen/Thumb/umul_fix.ll
M llvm/test/CodeGen/Thumb/umul_fix_sat.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
M llvm/test/CodeGen/X86/bit_ceil.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
M llvm/test/CodeGen/X86/i128-abi.ll
A llvm/test/CodeGen/X86/jump-table-partition.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/muloti.ll
M llvm/test/CodeGen/X86/pr89877.ll
M llvm/test/CodeGen/X86/pr90847.ll
M llvm/test/CodeGen/X86/pr92569.ll
M llvm/test/CodeGen/X86/scheduler-backtracking.ll
M llvm/test/CodeGen/X86/smul-with-overflow.ll
M llvm/test/CodeGen/X86/smul_fix_sat.ll
M llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
M llvm/test/CodeGen/X86/stack-clash-huge.ll
M llvm/test/CodeGen/X86/tail-dup-pred-succ-size.mir
M llvm/test/CodeGen/X86/uadd_sat_vec.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vector-trunc-nowrap.ll
M llvm/test/CodeGen/X86/xmulo.ll
A llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size-too-big.mir
M llvm/test/DebugInfo/X86/set.ll
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_relax_align.s
A llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_reloc_addsub.s
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt
M llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt
A llvm/test/MC/RISCV/rvv/xsfvfwmacc-invalid.s
A llvm/test/MC/RISCV/rvv/xsfvqmacc-invalid.s
A llvm/test/MC/RISCV/xqcilo-aliases-valid.s
A llvm/test/MC/RISCV/xqcilo-invalid.s
A llvm/test/MC/RISCV/xqcilo-valid.s
M llvm/test/MC/X86/avx10.2-bf16-32-att.s
M llvm/test/MC/X86/avx10.2-bf16-32-intel.s
M llvm/test/MC/X86/avx10.2-bf16-64-att.s
M llvm/test/MC/X86/avx10.2-bf16-64-intel.s
M llvm/test/MC/X86/avx10.2convert-32-att.s
M llvm/test/MC/X86/avx10.2convert-32-intel.s
M llvm/test/MC/X86/avx10.2convert-64-att.s
M llvm/test/MC/X86/avx10.2convert-64-intel.s
R llvm/test/Object/coff-sec-sym.test
M llvm/test/ObjectYAML/MachO/section_data.yaml
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/ThinLTO/X86/devirt_check.ll
M llvm/test/Transforms/ConstraintElimination/eq.ll
M llvm/test/Transforms/ConstraintElimination/ne.ll
M llvm/test/Transforms/ConstraintElimination/pr105785.ll
M llvm/test/Transforms/GVN/vscale.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
M llvm/test/Transforms/InstCombine/scalable-vector-struct.ll
M llvm/test/Transforms/InstCombine/select-cmp.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/deep-loop-nest.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
A llvm/test/Transforms/NewGVN/vscale.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/min_max.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
A llvm/test/Transforms/SandboxVectorizer/cross_bbs.ll
M llvm/test/Transforms/SandboxVectorizer/pack.ll
A llvm/test/Verifier/dicompositetype-elements-null.ll
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets.s
M llvm/test/tools/llvm-mca/X86/BtVer2/clear-super-register-1.s
A llvm/test/tools/llvm-objcopy/ELF/remove-note.test
M llvm/test/tools/llvm-profdata/cs-sample-nested-profile.test
M llvm/test/tools/llvm-profdata/general.proftext
M llvm/test/tools/llvm-profdata/sample-summary.test
M llvm/test/tools/llvm-profdata/suppl-instr-with-sample.test
M llvm/test/tools/llvm-profdata/vtable-value-prof.test
M llvm/test/tools/yaml2obj/ELF/custom-fill.yaml
M llvm/test/tools/yaml2obj/ELF/section-type.yaml
M llvm/tools/bugpoint/Miscompilation.cpp
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-stress/llvm-stress.cpp
M llvm/unittests/Analysis/AssumeBundleQueriesTest.cpp
M llvm/unittests/Analysis/CGSCCPassManagerTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/IR/LegacyPassManagerTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/Option/OptionMarshallingTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
M mlir/cmake/modules/AddMLIRPython.cmake
M mlir/docs/DefiningDialects/Assembly.md
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
M mlir/test/Dialect/Arith/invalid.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Target/Cpp/switch.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/Transforms/inlining-recursive-self.mlir
M mlir/test/Transforms/inlining-recursive.mlir
M mlir/test/lib/Dialect/Math/TestExpandMath.cpp
M mlir/tools/mlir-pdll/mlir-pdll.cpp
M offload/plugins-nextgen/common/include/MemoryManager.h
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/Support/ScopHelper.cpp
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Rebase
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/951d0fbc1005...f9c45b12160d
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