[all-commits] [llvm/llvm-project] 33c440: [RISCV] Support cR Inline Asm Constraint (#124174)

[Sam Elliott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 33c44074714d1d2f3d5f65c3fb842cddb6b689ac
      https://github.com/llvm/llvm-project/commit/33c44074714d1d2f3d5f65c3fb842cddb6b689ac
  Author: Sam Elliott <quic_aelliott at quicinc.com>
  Date:   2025-01-23 (Thu, 23 Jan 2025)

  Changed paths:
    M clang/lib/Basic/Targets/RISCV.cpp
    M clang/test/CodeGen/RISCV/riscv-inline-asm.c
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
    M llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
    M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll

  Log Message:
  -----------
  [RISCV] Support cR Inline Asm Constraint (#124174)

This denotes RVC-compatible GPR Pairs, which are used by the Zclsd
extension.

C API PR: riscv-non-isa/riscv-c-api-doc#102



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