[all-commits] [llvm/llvm-project] 2f6b0b: [RISCV] Add SiFive sf.vqmacc tests to vmv-copy.mir...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2f6b0b4a8522b540de07c9ebd3446433e7d99eb6
      https://github.com/llvm/llvm-project/commit/2f6b0b4a8522b540de07c9ebd3446433e7d99eb6
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-01-23 (Thu, 23 Jan 2025)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir

  Log Message:
  -----------
  [RISCV] Add SiFive sf.vqmacc tests to vmv-copy.mir. NFC (#124075)

The vqmaccu.2x8x2 test is currently being miscompiled. We need to use a
whole register move instead of vmv.v.v. The input has VL elements with
EEW=8 EMUL=4. The output has VL/4 elements with EEW=32 EMUL=4. We can't
use the original VL or input SEW for a vmv.v.v.



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