[all-commits] [llvm/llvm-project] 97d691: [IR][unittests] Replace of PointerType::get(Type) ...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Thu Jan 23 09:52:20 PST 2025
Branch: refs/heads/users/vitalybuka/spr/yaml2obj-dont-use-uninitialized-type
Home: https://github.com/llvm/llvm-project
Commit: 97d691b4b3f5ba446d6827fc29fbe15e44a7adac
https://github.com/llvm/llvm-project/commit/97d691b4b3f5ba446d6827fc29fbe15e44a7adac
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/unittests/CodeGen/LowLevelTypeTest.cpp
M llvm/unittests/FuzzMutate/OperationsTest.cpp
M llvm/unittests/FuzzMutate/RandomIRBuilderTest.cpp
M llvm/unittests/IR/ConstantsTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/Linker/LinkModulesTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[IR][unittests] Replace of PointerType::get(Type) with opaque version (NFC) (#123621)
In accordance with https://github.com/llvm/llvm-project/issues/123569
Commit: 4740e097031d231cd39680c16a31771d22fe84c9
https://github.com/llvm/llvm-project/commit/4740e097031d231cd39680c16a31771d22fe84c9
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang-tools-extra/clangd/FindTarget.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang/include/clang/Sema/HeuristicResolver.h
M clang/lib/Sema/HeuristicResolver.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
Log Message:
-----------
[clang][Sema] Respect qualification of methods in heuristic results (#123551)
Fixes https://github.com/llvm/llvm-project/issues/123549
Commit: c22364a4324218e29512740466a2b2cb1a406d8b
https://github.com/llvm/llvm-project/commit/c22364a4324218e29512740466a2b2cb1a406d8b
Author: Marius Kamp <msk at posteo.org>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/csel-cmp-cse.ll
Log Message:
-----------
[AArch64] Eliminate Common SUBS by Reassociating Non-Constants (#123344)
Commit 1eed46960c217f9480865702f06fb730c7521e61 added logic to
reassociate a (add (add x y) -c) operand to a CSEL instruction with a
comparison involving x and c (or a similar constant) in order to obtain
a common (SUBS x c) instruction.
This commit extends this logic to non-constants. In this way, we also
reassociate a (sub (add x y) z) operand of a CSEL instruction to
(add (sub x z) y) if the CSEL compares x and z, for example.
Alive proof: https://alive2.llvm.org/ce/z/SEVpR
Commit: 547bfda56b2e3f3a4c6d2357d3566dcd3fa996ad
https://github.com/llvm/llvm-project/commit/547bfda56b2e3f3a4c6d2357d3566dcd3fa996ad
Author: David Green <david.green at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/bf16-convert-intrinsics.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64] Improve bcvtn2 and remove aarch64_neon_bfcvt intrinsics (#120363)
This started out as trying to combine bf16 fpround to BFCVT2
instructions, but ended up removing the aarch64.neon.nfcvt intrinsics in
favour of generating fpround instructions directly. This simplifies the
patterns and can lead to other optimizations. The BFCVT2 instruction is
adjusted to makes sure the types are valid, and a bfcvt2 is now
generated in more place. The old intrinsics are auto-upgraded to fptrunc
instructions too.
Commit: 5658bc4ae75497edc5ec7c934931c8681d33fac8
https://github.com/llvm/llvm-project/commit/5658bc4ae75497edc5ec7c934931c8681d33fac8
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lldb/source/Plugins/Process/Utility/LinuxSignals.cpp
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
M lldb/test/API/linux/aarch64/gcs/main.c
Log Message:
-----------
[lldb][Linux] Add Control Protection Fault signal (#122917)
This will be sent by Arm's Guarded Control Stack extension when an
invalid return is executed.
The signal does have an address we could show, but it's the PC at which
the fault occured. The debugger has plenty of ways to show you that
already, so I've left it out.
```
(lldb) c
Process 460 resuming
Process 460 stopped
* thread #1, name = 'test', stop reason = signal SIGSEGV: control protection fault
frame #0: 0x0000000000400784 test`main at main.c:57:1
54 afunc();
55 printf("return from main\n");
56 return 0;
-> 57 }
(lldb) dis
<...>
-> 0x400784 <+100>: ret
```
The new test case generates the signal by corrupting the link register
then attempting to return. This will work whether we manually enable GCS
or the C library does it for us.
(in the former case you could just return from main and it would fault)
Commit: 2a8c12b29f8dc777a62868512bed1a2dae1ef8b2
https://github.com/llvm/llvm-project/commit/2a8c12b29f8dc777a62868512bed1a2dae1ef8b2
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-array.cpp
Log Message:
-----------
"Reland "[Wunsafe-buffer-usage] Fix false positive when const sized array is indexed by const evaluatable expressions (#119340)"" (#123713)
This reverts commit 7dd34baf5505d689161c3a8678322a394d7a2929.
Fixed the assertion violation reported by
7dd34baf5505d689161c3a8678322a394d7a2929
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: 67b9d3ffc2104e9c718510d83e93b3d26cb0872d
https://github.com/llvm/llvm-project/commit/67b9d3ffc2104e9c718510d83e93b3d26cb0872d
Author: Matthias Gehre <matthias.gehre at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
A mlir/test/Dialect/Linalg/tile-offset.mlir
Log Message:
-----------
[mlir] computeSliceParameters: Fix offset when m(0) != 0 (#122492)
For affine maps where `m(0) != 0`,
like `affine_map<(d0) -> (d0 + 3)` in
```
%generic = linalg.generic
{indexing_maps = [affine_map<(d0) -> (d0 + 3)>,
affine_map<(d0) -> (d0)>],
iterator_types = ["parallel"]} ins(%arg0: tensor<9xf32>) outs(%empty : tensor<6xf32>) {
^bb0(%in : f32, %out: f32):
linalg.yield %in : f32
} -> tensor<6xf32>
```
tiling currently computes the wrong slice offsets. When tiling above
example with a size of 3, it would compute
```
scf.for %i = ...
%slice = tensor.extract_slice %arg0[%i + 3] [6] [1]
linalg.generic
{indexing_maps = [affine_map<(d0) -> (d0 + 3)>,
affine_map<(d0) -> (d0)>],
iterator_types = ["parallel"]} ins(%slice: tensor<6xf32>)
```
and thus apply the `+3` twice (once in the extract slice and a second
time in the linalg.generic).
This PR fixes this to yield an offset of
`tensor.extract_slice %arg0[%i] [6] [1]` instead.
Commit: ebc502056448e950d41f4e2df7bae4e2bc60819e
https://github.com/llvm/llvm-project/commit/ebc502056448e950d41f4e2df7bae4e2bc60819e
Author: David Stuttard <david.stuttard at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
Log Message:
-----------
[AMDGPU] Update entry point name for PAL metadata (#123581)
Old entry-point metadata being updated. Nothing is required
to account for deprecation as nothing uses the old style
Commit: 455b3d6df20c9bb50cdba66fd2f3202bc43eb4ac
https://github.com/llvm/llvm-project/commit/455b3d6df20c9bb50cdba66fd2f3202bc43eb4ac
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/DLL.cpp
M lld/COFF/DLL.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/DriverUtils.cpp
M lld/COFF/MapFile.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/COFF/Writer.cpp
A lld/test/COFF/arm64x-export.test
Log Message:
-----------
[LLD][COFF] Separate EC and native exports for ARM64X (#123652)
Store exports in SymbolTable instead of Configuration.
Commit: b6b18f1eb8f85040629eaeb07a168e3362fdb97b
https://github.com/llvm/llvm-project/commit/b6b18f1eb8f85040629eaeb07a168e3362fdb97b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/test/Transforms/Reassociate/reassoc_bool_vec.ll
Log Message:
-----------
[Reassociate] Don't reassociate vXi1 logical expressions (#123329)
Extends what we already do for i1 types and don't serialize vXi1 logical expressions to improve ILP.
llvm-test-suite numbers
https://github.com/llvm/llvm-project/issues/64840#issuecomment-2053621740
indicate that both reassociations are a net win.
Fixes #64840
Fixes #63946
Commit: 9b6e8df89689c37821e0ec37c63ac3fd40ea5339
https://github.com/llvm/llvm-project/commit/9b6e8df89689c37821e0ec37c63ac3fd40ea5339
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
A llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h
M llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir
Log Message:
-----------
[AMDGPU][NewPM] Port SIFixVGPRCopies to NPM (#123592)
Extends NPM pipeline support till PostRegAlloc passes (greedy is in the
works)
Commit: 616979ebd7dc9ae63522788750ea3dc6a96aa69f
https://github.com/llvm/llvm-project/commit/616979ebd7dc9ae63522788750ea3dc6a96aa69f
Author: Sergey Kozub <skozub at nvidia.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.def
M clang/include/clang/Basic/Cuda.h
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M llvm/lib/Target/NVPTX/NVPTX.td
Log Message:
-----------
[NVPTX] Add support for PTX 8.6 and CUDA 12.6 (12.8) (#123398)
Add CUDA versions 12.7, 12.8, 12.9 which support PTX8.6+ (enables using Blackwell-specific instructions).
Commit: 7acad6893b9b3b43e5e4a8e56404b1b19c07c79f
https://github.com/llvm/llvm-project/commit/7acad6893b9b3b43e5e4a8e56404b1b19c07c79f
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
Log Message:
-----------
[AMDGPU][CodeGen] SILowerWWMCopies: Declare used analyses (#123710)
This prevents legacy PM from mistakenly removing these analyses if
`SILowerWWMCopies` is the last user of them. (it removes dead analyses
after its last use)
Commit: d96ec48068e03d1058b1c31581f7bc8738e12ee0
https://github.com/llvm/llvm-project/commit/d96ec48068e03d1058b1c31581f7bc8738e12ee0
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M libclc/clc/include/clc/relational/clc_select.h
R libclc/clc/include/clc/relational/clc_select.inc
A libclc/clc/include/clc/relational/clc_select_decl.inc
A libclc/clc/include/clc/relational/clc_select_impl.inc
M libclc/clc/lib/clspv/SOURCES
M libclc/clc/lib/generic/relational/clc_select.cl
R libclc/clc/lib/generic/relational/clc_select.inc
M libclc/clc/lib/spirv/SOURCES
M libclc/clc/lib/spirv64/SOURCES
M libclc/generic/include/clc/relational/select.h
R libclc/generic/include/clc/relational/select.inc
M libclc/generic/lib/relational/select.cl
R libclc/generic/lib/relational/select.inc
Log Message:
-----------
[libclc] Route select through __clc_select (#123647)
This was missed during the introduction of select. This also unifies the
various .inc files used for each, as they were essentially identical.
The __clc_select function is now also built for SPIR-V targets.
Commit: eaf3e1b0d1ebae590c9be94eafaa10da9e192a37
https://github.com/llvm/llvm-project/commit/eaf3e1b0d1ebae590c9be94eafaa10da9e192a37
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M libclc/clc/lib/generic/relational/clc_bitselect.cl
M libclc/generic/lib/relational/bitselect.cl
M libclc/generic/lib/relational/bitselect.inc
Log Message:
-----------
[libclc] Route int bitselect through CLC; add half (#123653)
The half variants were missing. The integer bitselect builtins weren't
going through __clc_bitselect due to an oversight when the CLC version
was introduced.
Commit: 84fa1755a5b7845ddaeaa513a3786013c76c9c88
https://github.com/llvm/llvm-project/commit/84fa1755a5b7845ddaeaa513a3786013c76c9c88
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/test/CodeGen/AArch64/targetattr.c
M clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c
M clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/test/MC/AArch64/spe.s
Log Message:
-----------
[AArch64] FEAT_SPEv1p2 is optional in v8.7-A and v9.2-A (#123336)
The FEAT_SPEv1p2 feature (known to LLVM as FeatureSPE_EEF and +spe-eef)
was incorrectly marked as a required feature of Armv8.7-A (and later),
which is incorrect because it is optional, and some CPUs do not
implement it. This moves it to the default features list, so that it is
still enabled by -march=armv8.7-a, but can be configured individually
for each processor.
For Cortex-A520 and Cortex-A520AE, I've checked that these do not have any of
the FEAT_SPE* features, so updated the tests accordingly. All other
Arm-designed v8.7A+ and v9.2A+ CPUs should continue to have it enabled. For
Ampere1B and Fujitsu Monaka, these CPUs do not have the feature, so I've
removed it from their tests. For Apple M4, I haven't found any reference for
whether that CPU should have this feature, so I've added it to the CPU
definition to avoid this being a functional change.
Commit: 50bfa85d7968690aa305ae1b30f0214ced64c4d7
https://github.com/llvm/llvm-project/commit/50bfa85d7968690aa305ae1b30f0214ced64c4d7
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
Log Message:
-----------
[DAGCombiner] Fix scalarizeExtractedBinOp for some SETCC cases (#123071)
PR https://github.com/llvm/llvm-project/pull/118823 added a
DAG combine for extracting elements of a vector returned from
SETCC, however it doesn't correctly deal with the case where
the vector element type is not i1. In this case we have to
take account of the boolean contents, which are represented
differently between vectors and scalars. The code now
explicitly performs an inreg sign extend in order to get the
same result.
Fixes https://github.com/llvm/llvm-project/issues/121372
Commit: 6dc356d6985fc49d1b69c20cc27f6b066742144a
https://github.com/llvm/llvm-project/commit/6dc356d6985fc49d1b69c20cc27f6b066742144a
Author: David Green <david.green at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[Clang] Add numeric for iota.
Hopefuly fixes MSVC build after 547bfda56b2e3f3a4c6d2357d3566dcd3fa996ad.
Commit: 3ff9368e58a9e73015cc2284788394e94e28e3bb
https://github.com/llvm/llvm-project/commit/3ff9368e58a9e73015cc2284788394e94e28e3bb
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/unittests/Target/SPIRV/SPIRVAPITest.cpp
Log Message:
-----------
[SPIR-V] Ensure that Module resource is managed locally wrt. a unit test case and fix a memory leak (#123725)
Adding SPIRV to LLVM_ALL_TARGETS
(https://github.com/llvm/llvm-project/pull/119653) revealed a series of
minor compilation problems and sanitizer complaints. This PR is to move
unit tests resources (a Module ptr) from the class-scope to a local
scope of the class member function to be sure that before the test env
is teared down the ptr is released.
Commit: cda81b1ec96e26cb7e47acc5656fe219383ffbc5
https://github.com/llvm/llvm-project/commit/cda81b1ec96e26cb7e47acc5656fe219383ffbc5
Author: Michal Paszkowski <michal at michalpaszkowski.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M .github/workflows/spirv-tests.yml
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[SPIR-V] Add SPIRV to LLVM_ALL_TARGETS (reapply) (#123733)
This commit promotes the SPIR-V backend from experimental to official
status. As a result, SPIR-V will be built by default, simplifying
integration and increasing accessibility for downstream projects.
Discussion and RFC on Discourse:
https://discourse.llvm.org/t/rfc-promoting-spir-v-to-an-official-target/83614
The PR reapplies the original patch
https://github.com/llvm/llvm-project/pull/119653 and consecutive
https://github.com/llvm/llvm-project/pull/123654, reverted due to
buildbot failures.
Commit: c7de642ece5745b5ade04e910ba4ff54728a1cd1
https://github.com/llvm/llvm-project/commit/c7de642ece5745b5ade04e910ba4ff54728a1cd1
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-uscvtf.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (5/11) (#116831)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`SCVTF`, and `UCVTF` instructions.
Commit: 13c6abfac84fca4bc55c0721d1853ce86a385678
https://github.com/llvm/llvm-project/commit/13c6abfac84fca4bc55c0721d1853ce86a385678
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/Headers/avx10_2_512minmaxintrin.h
M clang/lib/Headers/avx10_2minmaxintrin.h
M clang/lib/Sema/SemaX86.cpp
M clang/test/CodeGen/X86/avx10_2_512minmax-builtins.c
M clang/test/CodeGen/X86/avx10_2_512minmax-error.c
M clang/test/CodeGen/X86/avx10_2minmax-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
M llvm/test/MC/Disassembler/X86/avx10.2minmax-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2minmax-64.txt
M llvm/test/MC/X86/avx10.2minmax-32-att.s
M llvm/test/MC/X86/avx10.2minmax-32-intel.s
M llvm/test/MC/X86/avx10.2minmax-64-att.s
M llvm/test/MC/X86/avx10.2minmax-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2-MINMAX][NFC] Remove NE[P] from intrinsic and instruction (#123272)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: 733be4ed7dcf976719f424c0cb81b77a14f91f5a
https://github.com/llvm/llvm-project/commit/733be4ed7dcf976719f424c0cb81b77a14f91f5a
Author: Andrea Faulds <andrea.faulds at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/include/mlir/Conversion/GPUCommon/GPUCommonPass.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
A mlir/test/Conversion/GPUCommon/lower-launch-func-bare-ptr-intersperse-size.mlir
M mlir/test/lib/Pass/TestVulkanRunnerPipeline.cpp
M mlir/test/mlir-vulkan-runner/addi.mlir
M mlir/test/mlir-vulkan-runner/addi8.mlir
M mlir/test/mlir-vulkan-runner/mulf.mlir
M mlir/test/mlir-vulkan-runner/subf.mlir
M mlir/tools/mlir-vulkan-runner/vulkan-runtime-wrappers.cpp
Log Message:
-----------
[mlir][spirv] Add GpuToLLVM cconv suited to Vulkan, migrate last tests (#123384)
This commit is a follow-up to 99a562b3cb17e89273ba0fe77129f2fb17a19381,
which migrated some of the mlir-vulkan-runner tests to mlir-cpu-runner
using a new pipeline and set of wrappers. That commit could not migrate
all the tests, because the existing calling conventions/ABIs for kernel
arguments generated by GPUToLLVMConversionPass were not a good fit for
the Vulkan runtime. This commit fixes this and migrates the remaining
tests. With this commit, mlir-vulkan-runner and many related components
are now unused, and they will be removed in a later commit (see #73457).
The old calling conventions require both the caller (host LLVM code) and
callee (device code) to have compile-time knowledge of the precise
argument types. This works for CUDA, ROCm and SYCL, where there is a
C-like calling convention agreed between the host and device code, and
the runtime passes through arguments as raw data without comprehension.
For Vulkan, however, the interface declared by the shader/kernel is in a
more abstract form, so the device code has indirect access to the
argument data, and the runtime must process the arguments to set up and
bind appropriately-sized buffer descriptors.
This commit introduces a new calling convention option to meet the
Vulkan runtime's needs. It lowers memref arguments to {void*, size_t}
pairs, which can be trivially interpreted by the runtime without it
needing to know the original argument types. Unlike the stopgap measure
in the previous commit, this system can support memrefs of various ranks
and element types, which unblocked migrating the remaining tests.
Commit: 82944595fa5509fdbd574318e9041f2edab32e5f
https://github.com/llvm/llvm-project/commit/82944595fa5509fdbd574318e9041f2edab32e5f
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.h
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
Log Message:
-----------
[AMDGPU] Change scope of resource usage info symbols (#114810)
Change scope of resource usage info MC symbols to align with the function linkage type
Commit: 5d9c717597aef72e4ba27a2b143e9753c513e5c9
https://github.com/llvm/llvm-project/commit/5d9c717597aef72e4ba27a2b143e9753c513e5c9
Author: lialan <me at alanli.org>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shifts.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.prelegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
Log Message:
-----------
[GISel] Fold shifts to constant result. (#123510)
This resolves #123212
Commit: 33656932b0e9098354b2e685d6ed70bd0bcb246a
https://github.com/llvm/llvm-project/commit/33656932b0e9098354b2e685d6ed70bd0bcb246a
Author: Sirraide <aeternalmail at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/Format.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Rename ExportBlockIndentation -> IndentExportBlock (#123493)
This renames the `ExportBlockIndentation` option and adds a config parse
test, as requested in #110381.
Commit: d028eaaeb8b3ceaf64379a18d14223d8b154e927
https://github.com/llvm/llvm-project/commit/d028eaaeb8b3ceaf64379a18d14223d8b154e927
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dupq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_extq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tblq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tbxq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq2.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq2.c
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[AArch64] Update SVE untyped intrinsics to have FP8 variants (#123585)
Update the following intrinsics to have FP8 variants:
``` c
svuint8_t svdup_laneq[_u8](svuint8_t zn, uint64_t imm_idx);
svuint8_t svextq[_u8](svuint8_t zdn, svuint8_t zm, uint64_t imm);
svint8_t svtblq[_s8](svint8_t zn, svuint8_t zm);
svint8_t svtbxq[_s8](svint8_t fallback, svint8_t zn, svuint8_t zm);
svuint8_t svuzpq1[_u8](svuint8_t zn, svuint8_t zm);
svuint8_t svuzpq2[_u8](svuint8_t zn, svuint8_t zm);
svuint8_t svzipq1[_u8](svuint8_t zn, svuint8_t zm);
svuint8_t svzipq2[_u8](svuint8_t zn, svuint8_t zm);
```
Commit: 4b73f6a54884b6a34fbff16b5e24b7a2e480ebcb
https://github.com/llvm/llvm-project/commit/4b73f6a54884b6a34fbff16b5e24b7a2e480ebcb
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-counts-not.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (6/11) (#116832)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`CLS`, `CLZ`, `CNT`, `CNOT`, and `NOT` instructions.
Commit: 67a412f0721e09049bfb7cfc830d771dda2ff512
https://github.com/llvm/llvm-project/commit/67a412f0721e09049bfb7cfc830d771dda2ff512
Author: Emilio Cota <ecg at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/CommonTypeConstraints.td
Log Message:
-----------
[mlir][IR] CommonTypeConstraints: fully qualify low-precision FP type… (#123738)
…s isa<> calls in isa<> calls
To ease integration with downstream projects.
Follow-up to PR #123326.
Commit: ec6c3448d31056db5d63d7aed3e9f207edb49321
https://github.com/llvm/llvm-project/commit/ec6c3448d31056db5d63d7aed3e9f207edb49321
Author: kadir çetinkaya <kadircet at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang-tools-extra/clangd/Hover.cpp
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/include-cleaner/include/clang-include-cleaner/Analysis.h
M clang-tools-extra/include-cleaner/lib/Analysis.cpp
M clang-tools-extra/include-cleaner/lib/AnalysisInternal.h
M clang-tools-extra/include-cleaner/lib/FindHeaders.cpp
M clang-tools-extra/include-cleaner/lib/HTMLReport.cpp
M clang-tools-extra/include-cleaner/lib/LocateSymbol.cpp
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
M clang-tools-extra/include-cleaner/unittests/FindHeadersTest.cpp
M clang-tools-extra/include-cleaner/unittests/LocateSymbolTest.cpp
Log Message:
-----------
[include-cleaner] Respect langopts when analyzing macro names (#123634)
Fixes https://github.com/llvm/llvm-project/issues/113926.
Fixes https://github.com/llvm/llvm-project/issues/63976.
Commit: f233a54ae80b5fe7604aa20007d050cefdd5f663
https://github.com/llvm/llvm-project/commit/f233a54ae80b5fe7604aa20007d050cefdd5f663
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M offload/DeviceRTL/include/State.h
Log Message:
-----------
[OpenMP] Remove usage of pointer-to-member in lookup (#123671)
Summary:
This is buggy and is currently being tracked in
https://github.com/llvm/llvm-project/issues/123241. For now, replace it
with a macro so that we can use address spaces directly.
Commit: 9ca1323de1ad2583b02930d2ee5721c96f2d3a51
https://github.com/llvm/llvm-project/commit/9ca1323de1ad2583b02930d2ee5721c96f2d3a51
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
A llvm/test/CodeGen/AMDGPU/fix-crash-valu-hazard.ll
A llvm/test/CodeGen/AMDGPU/hazard-flat-instruction-valu-check.mir
Log Message:
-----------
[AMDGPU] Fix crash due to missing check for FLAT instructions that dont use vector registers when computing VALU hazard (#123627)
Commit: 29f7392c73dcd514a4581ba4b9c4ee0cee730145
https://github.com/llvm/llvm-project/commit/29f7392c73dcd514a4581ba4b9c4ee0cee730145
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Transforms/generic-loop-rewriting-todo.mlir
Log Message:
-----------
[flang][OpenMP] Rewrite standalone `loop` (without `bind`) directives to `simd` (#122632)
Extends conversion support for `loop` directives. This PR handles
standalone `loop` constructs that do not have a `bind` clause attached
by rewriting them to equivalent `simd` constructs. The reasoning behind
that decision is documented in the rewrite function itself.
Commit: 03744d2aaffee04bc1e4d0668c41556c3c20d406
https://github.com/llvm/llvm-project/commit/03744d2aaffee04bc1e4d0668c41556c3c20d406
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/LangOptions.cpp
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/test/CodeGenCXX/matrix-vector-bit-int.cpp
M clang/test/CodeGenOpenCL/amdgpu-alignment.cl
M clang/test/CodeGenOpenCL/preserve_vec3.cl
Log Message:
-----------
[Clang] Remove 3-element vector load and store special handling (#104661)
Clang uses a long-time special handling of the case where 3 element
vector loads and stores are performed as 4 element, and then a
shufflevector is used to extract the used elements. Odd sized vector
codegen should now work reasonably well.
This patch removes the compiler argument `-fpreserve-vec3-type` and adds
a target hook to determine if the special handling of vector type is
needed.
---------
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Commit: 5183ec471a9f45de1202a64c8c9ffe22d895a161
https://github.com/llvm/llvm-project/commit/5183ec471a9f45de1202a64c8c9ffe22d895a161
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/urem-seteq-vec-tautological.ll
Log Message:
-----------
[X86] urem-seteq-vec-tautological.ll - regenerate VPTERNLOG comment
Commit: 0eb7195d71fff491a6bc6a3a1ad280f3b635d925
https://github.com/llvm/llvm-project/commit/0eb7195d71fff491a6bc6a3a1ad280f3b635d925
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] LowerMUL/LowerRotate - avoid undefs in shuffle mask to prevent premature optimization
Later SimplifyDemandedVectorElts calls will simplify any remaining shuffles though the X86ISD::PMULUDQ node.
Avoids regression in #123596
Commit: 13918f5be867976fc3b6bfd22c4dfd5cb20834f1
https://github.com/llvm/llvm-project/commit/13918f5be867976fc3b6bfd22c4dfd5cb20834f1
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACCClause.cpp
Log Message:
-----------
[OpenACC] Remove unreachable code
As stated on the commit by @shafik, the previous patch left in some code
from development. This removes it, as it is unreachable.
Commit: 59dffce8c80eb9cefc96b8d3fe55473edfee9c4c
https://github.com/llvm/llvm-project/commit/59dffce8c80eb9cefc96b8d3fe55473edfee9c4c
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
Log Message:
-----------
[FIX] Include `<numeric>` in `clang/lib/CodeGen/CGExpr.cpp`
It uses `std::iota` but the header was not included.
Commit: aeffc01a7247cd95560b0c35b7a2c8d5a434b1f0
https://github.com/llvm/llvm-project/commit/aeffc01a7247cd95560b0c35b7a2c8d5a434b1f0
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
Log Message:
-----------
[lldb][DWARFASTParserClang][NFC] Remove redundant local variable
Tiny improvement to reviewability of an upcoming refactor.
Commit: c3d820553fa10368b7bf298674d978449416b11f
https://github.com/llvm/llvm-project/commit/c3d820553fa10368b7bf298674d978449416b11f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
Log Message:
-----------
[RegAllocFast] Don't convert MCRegUnit to MCRegister. NFC (#123705)
Commit: 0c217058fce0ffdbbd406ccf598a888e44178277
https://github.com/llvm/llvm-project/commit/0c217058fce0ffdbbd406ccf598a888e44178277
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/unittests/Analysis/CFGBuildResult.h
M clang/unittests/Analysis/CFGTest.cpp
Log Message:
-----------
[analysis][NFC] clean unittest log (#123758)
1. clean llvm::errs ouput
2. add -Wno-everything option to suppress clang warning during test
Commit: f5f32cef617c0796a7d980a464786949cbf21227
https://github.com/llvm/llvm-project/commit/f5f32cef617c0796a7d980a464786949cbf21227
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/LivePhysRegs.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/RDFLiveness.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
Log Message:
-----------
[CodeGen] Use MCRegister instead of MCPhysReg in RegisterMaskPair. NFC (#123688)
Update some other places to avoid implicit conversions this introduces,
but I probably missed some.
Commit: 8f5df8891840bb698fec682c1d98346708c038be
https://github.com/llvm/llvm-project/commit/8f5df8891840bb698fec682c1d98346708c038be
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/OpenMP/declare-target08.f90
Log Message:
-----------
[Flang][Semantics] Allow declare target to be used on functions external to the declare targets scope (#122546)
Whilst a little contrived, OpenMP allows you to utilise declare target
in the scope of one function to mark another function declare target,
currently this leads to a semantic error.
This appears to be because when we process the declare target directive
in the scope of another function (referring to another function), we do
not search externally from that functions scope to find possible prior
definitions, we only search in the current scope, this leads to us
implicitly defining a new variable and using that when implicit none is
not specified and then error'ng out or error'ng out earlier when implict
none is defined. This patch tries to address this behaviour by looking
externally for a function first and using that, before defaulting back
to the prior behaviour.
Commit: 70632f95664afba831cee7c819a32c56c002e80f
https://github.com/llvm/llvm-project/commit/70632f95664afba831cee7c819a32c56c002e80f
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmp_xx_f16 (#122943)
A bulk commit of true16 support for v_cmp_xx_f16 instructions including:
v_cmp_f_f16
v_cmp_eq_f16
v_cmp_le_f16
v_cmp_gt_f16
v_cmp_lg_f16
v_cmp_ge_f16
v_cmp_o_f16
v_cmp_u_f16
v_cmp_nge_f16
v_cmp_nlg_f16
v_cmp_ngt_f16
v_cmp_nle_f16
v_cmp_neq_f16
v_cmp_nlt_f16
v_cmp_t_f16
Added a GFX12 runline for fcmp.f16
Commit: e1c1e74a6fd71dd889155100d4c0f5e3284f7a22
https://github.com/llvm/llvm-project/commit/e1c1e74a6fd71dd889155100d4c0f5e3284f7a22
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmp_class_f16 (#122984)
True16 format for v_cmp_class_f16. Update VOPC_CLASS t16 and fake16
pseudo.
Commit: a53abb2386f9a96a8fc4a6d8e45e5543d1219b76
https://github.com/llvm/llvm-project/commit/a53abb2386f9a96a8fc4a6d8e45e5543d1219b76
Author: Karlo Basioli <68535415+basioli-k at users.noreply.github.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/CommonTypeConstraints.td
Log Message:
-----------
[mlir][IR] CommonTypeConstraints: fix syntax error (#123765)
Commit: 5deb4ef9ab1144542d748f71235b029bed06dd26
https://github.com/llvm/llvm-project/commit/5deb4ef9ab1144542d748f71235b029bed06dd26
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-loads-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/X86/long-full-reg-stores.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-extracted-and-externally-used.ll
M llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
Log Message:
-----------
[SLP]Initial non-power-of-2 (but still whole register) for remaining nodes
Added non-power-of-2 (but still whole registers) vectorization support
for nodes other than stores and reductions.
Reviewers: preames, RKSimon, hiraditya
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/113356
Commit: e7e3c45bc70904e24e2b3221ac8521e67eb84668
https://github.com/llvm/llvm-project/commit/e7e3c45bc70904e24e2b3221ac8521e67eb84668
Author: Andrea Faulds <andrea.faulds at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
R mlir/include/mlir/Conversion/GPUToVulkan/ConvertGPUToVulkanPass.h
M mlir/include/mlir/Conversion/Passes.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/CMakeLists.txt
R mlir/lib/Conversion/GPUToVulkan/CMakeLists.txt
R mlir/lib/Conversion/GPUToVulkan/ConvertGPULaunchFuncToVulkanLaunchFunc.cpp
R mlir/lib/Conversion/GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp
M mlir/lib/ExecutionEngine/CMakeLists.txt
A mlir/lib/ExecutionEngine/VulkanRuntime.cpp
A mlir/lib/ExecutionEngine/VulkanRuntime.h
A mlir/lib/ExecutionEngine/VulkanRuntimeWrappers.cpp
M mlir/test/CMakeLists.txt
R mlir/test/Conversion/GPUToVulkan/invoke-vulkan.mlir
R mlir/test/Conversion/GPUToVulkan/lower-gpu-launch-vulkan-launch.mlir
A mlir/test/Integration/GPU/Vulkan/addf.mlir
A mlir/test/Integration/GPU/Vulkan/addf_if.mlir
A mlir/test/Integration/GPU/Vulkan/addi.mlir
A mlir/test/Integration/GPU/Vulkan/addi8.mlir
A mlir/test/Integration/GPU/Vulkan/addui_extended.mlir
A mlir/test/Integration/GPU/Vulkan/lit.local.cfg
A mlir/test/Integration/GPU/Vulkan/mulf.mlir
A mlir/test/Integration/GPU/Vulkan/smul_extended.mlir
A mlir/test/Integration/GPU/Vulkan/subf.mlir
A mlir/test/Integration/GPU/Vulkan/time.mlir
A mlir/test/Integration/GPU/Vulkan/umul_extended.mlir
A mlir/test/Integration/GPU/Vulkan/vector-deinterleave.mlir
A mlir/test/Integration/GPU/Vulkan/vector-interleave.mlir
A mlir/test/Integration/GPU/Vulkan/vector-shuffle.mlir
M mlir/test/lib/Pass/TestVulkanRunnerPipeline.cpp
M mlir/test/lit.cfg.py
R mlir/test/mlir-vulkan-runner/addf.mlir
R mlir/test/mlir-vulkan-runner/addf_if.mlir
R mlir/test/mlir-vulkan-runner/addi.mlir
R mlir/test/mlir-vulkan-runner/addi8.mlir
R mlir/test/mlir-vulkan-runner/addui_extended.mlir
R mlir/test/mlir-vulkan-runner/lit.local.cfg
R mlir/test/mlir-vulkan-runner/mulf.mlir
R mlir/test/mlir-vulkan-runner/smul_extended.mlir
R mlir/test/mlir-vulkan-runner/subf.mlir
R mlir/test/mlir-vulkan-runner/time.mlir
R mlir/test/mlir-vulkan-runner/umul_extended.mlir
R mlir/test/mlir-vulkan-runner/vector-deinterleave.mlir
R mlir/test/mlir-vulkan-runner/vector-interleave.mlir
R mlir/test/mlir-vulkan-runner/vector-shuffle.mlir
M mlir/tools/CMakeLists.txt
R mlir/tools/mlir-vulkan-runner/CMakeLists.txt
R mlir/tools/mlir-vulkan-runner/VulkanRuntime.cpp
R mlir/tools/mlir-vulkan-runner/VulkanRuntime.h
R mlir/tools/mlir-vulkan-runner/mlir-vulkan-runner.cpp
R mlir/tools/mlir-vulkan-runner/vulkan-runtime-wrappers.cpp
Log Message:
-----------
[mlir] Remove mlir-vulkan-runner and GPUToVulkan conversion passes (#123750)
This follows up on 733be4ed7dcf976719f424c0cb81b77a14f91f5a, which made
mlir-vulkan-runner and its associated passes redundant, and completes
the main goal of #73457. The mlir-vulkan-runner tests become part of the
integration test suite, and the Vulkan runner runtime components become
part of ExecutionEngine, just as was done when removing other
target-specific runners.
Commit: 0dcb16ef5ea9202f09d727c50dfee070db303b88
https://github.com/llvm/llvm-project/commit/0dcb16ef5ea9202f09d727c50dfee070db303b88
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/Xtensa.td
A llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
M llvm/lib/Target/Xtensa/XtensaUtils.cpp
M llvm/lib/Target/Xtensa/XtensaUtils.h
A llvm/test/MC/Disassembler/Xtensa/windowed.txt
A llvm/test/MC/Disassembler/Xtensa/windowed_code_density.txt
A llvm/test/MC/Xtensa/windowed.s
A llvm/test/MC/Xtensa/windowed_code_density.s
A llvm/test/MC/Xtensa/windowed_invalid.s
Log Message:
-----------
[Xtensa] Implement Windowed Register Option. (#121118)
Commit: a79098bc726e8de85d3ed0050de5395015bca031
https://github.com/llvm/llvm-project/commit/a79098bc726e8de85d3ed0050de5395015bca031
Author: Kyle Evans <kevans at FreeBSD.org>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Posix/fake_stack_gc.cpp
M compiler-rt/test/asan/TestCases/Posix/unpoison-alternate-stack.cpp
M compiler-rt/test/lsan/TestCases/leak_check_before_thread_started.cpp
Log Message:
-----------
[compiler-rt] Destroy pthread attrs after use in tests (#114923)
The attr typically located on the stack is of an opaque pthread_attr_t
type, which may be a pointer that gets initialized by
pthread_attr_init(). Explicitly clean up the attr with
pthread_attr_destroy() to avoid a leak on such platforms to avoid
unexpected test failures with lsan enabled.
This primarily affects FreeBSD; NetBSD, musl, and glibc will seemingly
all use a full-sized pthread_attr_t.
Commit: 27f15add7c82efb99c15051a1c9b2c660843b356
https://github.com/llvm/llvm-project/commit/27f15add7c82efb99c15051a1c9b2c660843b356
Author: plognjen <Plavsic.Ognjen at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[MLIR][ROCDL] Add ops for LDS read transpose and global to LDS intrinsics (#123530)
This PR adds missing ds\.read.tr4\.b64, ds\.read\.tr8\.b64,
ds\.read\.tr6\.b96,
ds\.read\.tr16\.b64 and global\.load\.lds ops to
the ROCDL dialect.
The ops are converted to the corresponding intrinsic calls during the
translation from MLIR to LLVM IRs.
---------
Co-authored-by: Ognjen Plavsic <plognjen at amd.com>
Commit: 184c056e35ea4847ba824d1453fb0f24ba949df8
https://github.com/llvm/llvm-project/commit/184c056e35ea4847ba824d1453fb0f24ba949df8
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
Log Message:
-----------
[SLP][NFC]Update the test by replacing undefs with constant values, NFC
Commit: e3c16e003c041f2b354981f1b0d818907525e0e8
https://github.com/llvm/llvm-project/commit/e3c16e003c041f2b354981f1b0d818907525e0e8
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
Log Message:
-----------
[SPIR-V] Fix debug-type-pointer.ll test case (#123764)
Adding SPIRV to LLVM_ALL_TARGETS
(https://github.com/llvm/llvm-project/pull/119653) revealed a series of
minor compilation problems and sanitizer complaints. This PR is to fix
debug-type-pointer.ll test case.
Commit: 5e79ae60a67726805fcc27081f67c41cbd8a1e4e
https://github.com/llvm/llvm-project/commit/5e79ae60a67726805fcc27081f67c41cbd8a1e4e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll
M llvm/test/CodeGen/WebAssembly/simd.ll
M llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/CodeGen/X86/widen_shuffle-1.ll
Log Message:
-----------
DAG: Fix vector_shuffle -> splat fold defining undef lanes (#123596)
For shuffle vector splats with undef lanes in the mask,
this was introducing real values. Filter out build_vector
results based on the undef elements in the mask.
This avoids AMDGPU test regressions in a future change.
test/CodeGen/X86/urem-seteq-illegal-types.ll looks worse
but I didn't investigate.
Commit: 712359dae4c1ef18c69459e7bfc073369f29ff28
https://github.com/llvm/llvm-project/commit/712359dae4c1ef18c69459e7bfc073369f29ff28
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
Log Message:
-----------
[Flang] Fix -werror from recent resolve-names.cpp changes, left over unused variable
Commit: b7abc510c515c4df521c84c6f664a138f8cf01e0
https://github.com/llvm/llvm-project/commit/b7abc510c515c4df521c84c6f664a138f8cf01e0
Author: Danial Klimkin <dklimkin at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel]Fix bazel build past e7e3c45bc70904e24e2b3221ac8521e67eb84668 (#123780)
Commit: cf6d79ad6e4ad3a3e58c8b4d50fb08da3efc2918
https://github.com/llvm/llvm-project/commit/cf6d79ad6e4ad3a3e58c8b4d50fb08da3efc2918
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
Log Message:
-----------
[FMV][GlobalOpt] Add an option for static resolution of non-FMV callers. (#123757)
Adds `optimize-non-fmv-callers` (disabled by default) as a short term
workaround to keep the llvm testsuite bots green, until we decide what
is the right solution for the problem which was previously addressed
with https://github.com/llvm/llvm-project/pull/123383.
Commit: 485c80e1188192a4bb2a8cbddccdca82a6e33b81
https://github.com/llvm/llvm-project/commit/485c80e1188192a4bb2a8cbddccdca82a6e33b81
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/AST/ASTContext.cpp
M clang/test/CodeGenCXX/ptrauth-member-function-pointer.cpp
Log Message:
-----------
[PAC] Ignore noexcept on function type when computing discriminator of member function pointers (#109056)
This fixes a bug where a member function pointer signed using a function type with noexcept as the discriminator was being authenticated using a function type without noexcept.
Fixes https://github.com/llvm/llvm-project/issues/106487.
Commit: e6c9cd9c060c1fa8343398b9556a5a6c0f35d515
https://github.com/llvm/llvm-project/commit/e6c9cd9c060c1fa8343398b9556a5a6c0f35d515
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT] Drop parsing sample PC when processing LBR perf data (#123420)
Remove options to generate autofdo data (unused) and `use-event-pc`
(not beneficial).
Cuts down perf2bolt time for 11GB perf.data by 40s (11:10->10:30).
Commit: b4576bba44bc4f2b2dec12a4792b64c1f826d199
https://github.com/llvm/llvm-project/commit/b4576bba44bc4f2b2dec12a4792b64c1f826d199
Author: Philipp-Jan Honysz <philipp.honysz at icloud.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/llvm-tests.yml
M .github/workflows/release-documentation.yml
Log Message:
-----------
Update download and upload artifacts action usage to v4 ahead of deprecation (#123747)
Ahead of GitHub's
[deprecation](https://github.blog/changelog/#artifacts-v3-brownouts) of
v3 versions of both the `upload-artifact` and `download-artifact`
action, I suggest this PR, which bumps the used version of both actions
in all workflows to the newest v4 revision. Additionally, the versions
are hashpinned as suggested in f3524e9aebbfabed0c60d0087b39ce14d8f778da.
Commit: 4a1c33d34c31893aa781ac43285ae2100a540fd4
https://github.com/llvm/llvm-project/commit/4a1c33d34c31893aa781ac43285ae2100a540fd4
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/GSYM/CallSiteInfo.h
M llvm/include/llvm/DebugInfo/GSYM/LookupResult.h
M llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp
M llvm/lib/DebugInfo/GSYM/LookupResult.cpp
M llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-merged-callsites-dsym.yaml
M llvm/tools/llvm-gsymutil/Opts.td
M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
Log Message:
-----------
[llvm-gsymutil] Add support for merged functions lookup differentiation (#122409)
This update introduces the ability to filter merged functions during
lookups based on regex patterns derived from call site information in a
previous call to `llvm-gsymutil`. The regex patterns, extracted from
call sites, can then be passed to subsequent calls using the
`--merged-functions-filter` option along with `--merged-functions` and
`--address` (or `--addresses-from-stdin`). This allows for precise
filtering of functions during lookups, giving accurate results for call
stacks that contain merged functions.
Commit: 7c91435a0b74d9c3eae24c85ab72936494d0ebba
https://github.com/llvm/llvm-project/commit/7c91435a0b74d9c3eae24c85ab72936494d0ebba
Author: Henry Jiang <h243jian at uwaterloo.ca>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M flang/test/HLFIR/unroll-loops.fir
M flang/test/Integration/unroll-loops.f90
Log Message:
-----------
[Flang][PPC] XFAIL `-funroll-loops` to include both powerpc64 and powerpc64le target (#123672)
Include both `powerpc64` and `powerpc64le` target to XFAIL for the 2
test cases that are currently failing on `ppc64-flang-aix` and
`ppc64le-flang-rhel-clang`. A follow-up PR to #123661.
```
FAIL: Flang::unroll-loops.fir
FAIL: Flang::unroll-loops.f90
```
Commit: 59850c242eaf610270ff840d3717f801b297aa66
https://github.com/llvm/llvm-project/commit/59850c242eaf610270ff840d3717f801b297aa66
Author: Eric <eric at efcs.ca>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M .github/workflows/libcxx-restart-preempted-jobs.yaml
Log Message:
-----------
Attempt to fix libc++ actions runner restarter. (#120627)
It appears that introducing docker containers has broken the restarter
job since additional failure messages appear with the preemption
messages.
This should get jobs restarting on preemption again, but may do so
for jobs that also contain unrelated failures
Commit: e376f9cb77717146290504da58740c97d9dc7eae
https://github.com/llvm/llvm-project/commit/e376f9cb77717146290504da58740c97d9dc7eae
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vse.ll
M llvm/test/CodeGen/RISCV/rvv/vsse.ll
M llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll
Log Message:
-----------
[RISCV] Mark RVV stores and segmented loads as masked pseudo (#123106)
So that we can turn masked operations with all-ones masks into their
unmasked counterpart. Note: loads other than segmented ones had been
marked as masked.
Commit: e4f03b158c97098e1835cc1f00d0175398974f98
https://github.com/llvm/llvm-project/commit/e4f03b158c97098e1835cc1f00d0175398974f98
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp
Log Message:
-----------
[GSYM] Fix a warning
This patch fixes:
llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp:321:7: error: unannotated
fall-through between switch labels [-Werror,-Wimplicit-fallthrough]
Commit: 6518b121f037717fd211c36659f7b25266424719
https://github.com/llvm/llvm-project/commit/6518b121f037717fd211c36659f7b25266424719
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/include/llvm/Frontend/Offloading/Utility.h
M offload/docs/declare_target_indirect.md
M offload/include/OffloadEntry.h
M offload/include/PluginManager.h
M offload/include/Shared/APITypes.h
M offload/include/rtl.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/src/PluginManager.cpp
M offload/src/omptarget.cpp
M offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
Log Message:
-----------
[Offload][NFC] Factor out and rename the `__tgt_offload_entry` struct (#123785)
Summary:
This patch is an NFC renaming to make using the offloading entry type
more portable between other targets. Right now this is just moving its
definition to LLVM so others can use it. Future work will rework the
struct layout.
Commit: 4564ac91e181da116bd6850e623821c7a2a4e8f4
https://github.com/llvm/llvm-project/commit/4564ac91e181da116bd6850e623821c7a2a4e8f4
Author: Yi Qian <68618497+yiqian1 at users.noreply.github.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
Add gfx950 mfma instructions to ROCDL dialect (#123361)
Add ROCDL support to the following instructions:
V_MFMA_F32_16X16X32_BF16
V_MFMA_I32_16X16X64_I8
V_MFMA_F32_16X16X32_F16
V_MFMA_F32_32X32X16_BF16
V_MFMA_I32_32X32X32_I8
V_MFMA_F32_32X32X16_F16
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Co-authored-by: Jungwook Park <jungwook.park at amd.com>
Commit: a31e25396e8eca4eab2b5604912ad4c15496dc4a
https://github.com/llvm/llvm-project/commit/a31e25396e8eca4eab2b5604912ad4c15496dc4a
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] Fix recvmmsg rtsan interceptor for glibc < 2.21 (#123664)
linux/glibc prior to 2.21 had a different signature for recvmmsg.
Fix llvm#123484
Commit: baeedd71d2463448aa74e9bc6178946a74f1028e
https://github.com/llvm/llvm-project/commit/baeedd71d2463448aa74e9bc6178946a74f1028e
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M flang/test/Lower/OpenMP/Todo/allocate-clause-allocator.f90
Log Message:
-----------
[Flang][OpenMP] Fix run line w/ use mod_lib (#123762)
After the crude workaround in
https://github.com/llvm/llvm-project/pull/123666, @mjklemm suggested
this change instead to address the issue.
Local testing did not show errors, so I'm inclined to land it and see
what the buildbots think.
Commit: 1888a5f02fc53703c70abca2b12048e896d8c136
https://github.com/llvm/llvm-project/commit/1888a5f02fc53703c70abca2b12048e896d8c136
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[Github][CI] Remove premerge container (#123483)
This patch removes the container from the premerge job. We are moving
away from the kubernetes executor back to executing everything in the
same container due to reliability issues. This patch updates everything
in the premerge job to work.
This is part of a temp fix to
https://github.com/llvm/llvm-zorg/issues/362.
Commit: 106f1056991317af7eaaf19239de93942ac37267
https://github.com/llvm/llvm-project/commit/106f1056991317af7eaaf19239de93942ac37267
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[CI][Github] Disable premerge workflow on main
Trying to switch over to the normal execution mode and running into issues.
Turning this off on main for now while I investigate given my time
availability is a bit sparse today.
Commit: cdb4da32dbc362dc03125e965bf9847604856b31
https://github.com/llvm/llvm-project/commit/cdb4da32dbc362dc03125e965bf9847604856b31
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/test/CodeGen/NVPTX/f32-lg2.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll
Log Message:
-----------
[NVPTX] Fix failing test and incorrect `mcpu` reading in reflect
Summary:
Test uses nvptx in 32-bit mode and calling `mcpu` is broken and caused
asan failures.
Commit: 877012638278102206a09f5cb3ecab74db10eb91
https://github.com/llvm/llvm-project/commit/877012638278102206a09f5cb3ecab74db10eb91
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Remove stale comment for collectUsersInExitBlocks.
Remove stale section about wide inductions. Since 2c87133c6212d4bd0
all live-outs are modeled in VPlan.
Commit: 0ca6b2b0cc3a90e14da56a56bdfcf9911896ed4a
https://github.com/llvm/llvm-project/commit/0ca6b2b0cc3a90e14da56a56bdfcf9911896ed4a
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[MemProf] Fix an incorrect iterator increment (#123438)
We pass in a pointer to an Edge iterator to
moveEdgeToExistingCalleeClone, so that it can be correctly updated when
we remove edges during an edge iteration. We were not dereferencing this
pointer in one case, meaning we would increment the pointer and not the
iterator as intended.
This did not cause any issues, as it turns out that we would simply skip
the edge on the next iteration as it was already appropriately handled.
While in theory this incurred some extra compilation time, in practice
for a large application the effect was not significant. I confirmed that
there was no effect to any cloning from the fix.
I plan to send a follow up change to avoid the need to pass in an
iterator at all and simplify / consolidate the handling in the caller,
but want to fix this in case something requires a revert of the follow
on fix.
Commit: 662133a278f4f3553f061f7999759bae4e842820
https://github.com/llvm/llvm-project/commit/662133a278f4f3553f061f7999759bae4e842820
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M flang/include/flang/Lower/DirectivesCommon.h
A flang/include/flang/Optimizer/Builder/DirectivesCommon.h
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/OpenACC/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
Log Message:
-----------
[flang][OpenMP][OpenACC] remove libEvaluate dependency in passes (#123784)
Move OpenACC/OpenMP helpers from Lower/DirectivesCommon.h that are also
used in OpenACC and OpenMP mlir passes into a new
Optimizer/Builder/DirectivesCommon.h so that parser and evaluate headers
are not included in Optimizer libraries (this both introduce
compile-time and link-time pointless overheads).
This should fix https://github.com/llvm/llvm-project/issues/123377
Commit: a0ec385873dfe96bc5f286a3b13d83c598ee37da
https://github.com/llvm/llvm-project/commit/a0ec385873dfe96bc5f286a3b13d83c598ee37da
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lld/MachO/Arch/ARM64.cpp
Log Message:
-----------
[lld] Migrate away from PointerUnion::dyn_cast (NFC) (#123721)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses cast
because we know expect isa<InputSection *>(reloc.referent) to be true.
Commit: cdd321462aecf3a37b683d594a533a17e72a09e9
https://github.com/llvm/llvm-project/commit/cdd321462aecf3a37b683d594a533a17e72a09e9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[TargetLowering] Use getShiftAmountConstant. NFC (#123802)
Previously we always used the pointer size which might need to be
legalized on some targets.
Commit: b393a8758c4b6ac389ea9231b172ad93e32f43d0
https://github.com/llvm/llvm-project/commit/b393a8758c4b6ac389ea9231b172ad93e32f43d0
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/include/llvm/Target/Target.td
Log Message:
-----------
[NFC] Remove extra spaces from comments in Target.td (#123788)
Commit: cac67d39362b23466708e464c00ce84abe16bece
https://github.com/llvm/llvm-project/commit/cac67d39362b23466708e464c00ce84abe16bece
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclCXX.cpp
A clang/test/SemaCXX/warn-base-type-qualifiers.cpp
M libcxx/include/tuple
Log Message:
-----------
[Clang] emit -Wignored-qualifiers diagnostic for cv-qualified base classes (#121419)
Fixes #55474
Commit: 89f119cbdae0beb606229ca422cdd9e1400d0746
https://github.com/llvm/llvm-project/commit/89f119cbdae0beb606229ca422cdd9e1400d0746
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/intrinsic-vector-match.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vectors.ll
Log Message:
-----------
[RISCV] Update matchSplatAsGather to use the index of extract_elt if in-bounds (#118873)
This is a follow-up to #117878 and allows the usage of vrgather if the index
we are accessing in VT is constant and within bounds.
This patch replaces the previous behavior of bailing out if the length of the
search vector is greater than the vector of elements we are searching for.
Since matchSplatAsGather works on EXTRACT_VECTOR_ELT, and we know the index
from which the element is extracted, we only need to check if we are doing an
insert from a larger vector into a smaller one, in which we do an extract
instead.
Co-authored-by: Luke Lau luke_lau at icloud.com
Co-authored-by: Philip Reames preames at rivosinc.com
Commit: e7001061b73c97960a3b01537851b089e84b2a8e
https://github.com/llvm/llvm-project/commit/e7001061b73c97960a3b01537851b089e84b2a8e
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Revise naming and style in matchSplatAsGather [nfc]
Commit: bfafbe3a5cda14a0be5cc81eb58ca2c27c3c21f1
https://github.com/llvm/llvm-project/commit/bfafbe3a5cda14a0be5cc81eb58ca2c27c3c21f1
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-merged-callsites-dsym.yaml
Log Message:
-----------
[llvm-gsymutil] Fix flaky test (#123814)
The `macho-gsym-merged-callsites-dsym.yaml` test was failing with
expensive checks on. This is because we still can't reliably associate
line table information to functions until
https://github.com/llvm/llvm-project/pull/123391 is merged.
Example failure:
https://lab.llvm.org/buildbot/#/builders/16/builds/12374
Commit: 5651544c3647910ddb9f65414b8181f2560b999c
https://github.com/llvm/llvm-project/commit/5651544c3647910ddb9f65414b8181f2560b999c
Author: Un1q32 <joey.t.reinhart at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/test/Driver/darwin-version.c
Log Message:
-----------
Make armv6 iOS by default instead of macOS when targeting Darwin (#117243)
AFAIK the only publicly released armv6 devices that ran Darwin were the
iPhone 2G, iPhone 3G, iPod touch 1, and the iPod touch 2, all of which
were iOS devices.
Commit: c95d7894c904c097a3e27d9f5c85e0d30b366cd5
https://github.com/llvm/llvm-project/commit/c95d7894c904c097a3e27d9f5c85e0d30b366cd5
Author: Eric Fiselier <eric at efcs.ca>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M .github/workflows/libcxx-restart-preempted-jobs.yaml
Log Message:
-----------
Fix incorrect console.print -> console.log to fix libc++ restarter
Commit: e2d9e999a2adfb85008ca7d228e90c406baf9838
https://github.com/llvm/llvm-project/commit/e2d9e999a2adfb85008ca7d228e90c406baf9838
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/src/math/smoke/nan_test.cpp
M libc/test/src/math/smoke/nanf128_test.cpp
M libc/test/src/math/smoke/nanf16_test.cpp
M libc/test/src/math/smoke/nanf_test.cpp
M libc/test/src/math/smoke/nanl_test.cpp
Log Message:
-----------
[libc] fix -Wextra-semi (#123783)
Found while trying to consolidate our command line flags between tests and
underlying object files.
error: extra ';' after member function definition [-Werror,-Wextra-semi]
Link: #119281
Commit: 659e66e2b392677755436c981c92ea091af356b1
https://github.com/llvm/llvm-project/commit/659e66e2b392677755436c981c92ea091af356b1
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Writer.cpp
M lld/test/COFF/pdata-arm64ec.test
Log Message:
-----------
[LLD][COFF] Implement ARM64X relocations for the exception table (#123723)
Commit: 48b2ce9c12ec27176611e359db3ed9125a5da64b
https://github.com/llvm/llvm-project/commit/48b2ce9c12ec27176611e359db3ed9125a5da64b
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M libcxx/docs/CodingGuidelines.rst
Log Message:
-----------
[libc++] Document that internal aliases should be marked _LIBCPP_NODEBUG (#122175)
In #118710 we've added ``_LIBCPP_NODEBUG`` to all internal aliases, but
didn't actually document it. This patch adds documentation by adding the
new requirement and reasoning to the coding guidelines.
Commit: 2d317d903a6c469d4bf64298b21b6dac83f1fc8b
https://github.com/llvm/llvm-project/commit/2d317d903a6c469d4bf64298b21b6dac83f1fc8b
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M libcxx/include/__vector/vector_bool.h
M libcxx/test/std/containers/sequences/vector.bool/shrink_to_fit.pass.cpp
Log Message:
-----------
[libc++] Fix no-op shrink_to_fit for vector<bool> (#120495)
This PR addresses an issue where the `shrink_to_fit` function in
`vector<bool>` is effectively a no-op, meaning it will never shrink the
capacity.
Fixes #122502
Commit: 80097a1fa5c776790c1f0b313cfac923d86a82f9
https://github.com/llvm/llvm-project/commit/80097a1fa5c776790c1f0b313cfac923d86a82f9
Author: A. Jiang <de34 at live.cn>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M libcxx/include/string
M libcxx/test/std/strings/basic.string/string.cons/from_range.pass.cpp
M libcxx/test/std/strings/basic.string/string.modifiers/string_insert/insert_range.pass.cpp
Log Message:
-----------
[libc++] Fix input-only range handling for `basic_string` (#116890)
By calling `std::move` for related functions when the iterator is
possibly input-only. Also slightly changes the conditions of branch for
contiguous iterators to avoid error.
Fixes #116502
Commit: 733a98db4a264f474564cc2064b8862dedd8458f
https://github.com/llvm/llvm-project/commit/733a98db4a264f474564cc2064b8862dedd8458f
Author: A. Jiang <de34 at live.cn>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
M libcxx/test/std/containers/sequences/vector.bool/assign_range.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/construct_from_range.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/insert_range.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.cons/construct_from_range.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/assign_range.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_range.pass.cpp
Log Message:
-----------
[libc++] Fix input-only range handling for `vector` (#116157)
Changes:
- Carve out sized but input-only ranges for C++23.
- Call `std::move` for related functions when the iterator is possibly input-only.
Fixes #115727
Commit: 6c787ff6cfb5fdf489019a1389f8315391ad435f
https://github.com/llvm/llvm-project/commit/6c787ff6cfb5fdf489019a1389f8315391ad435f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
R llvm/test/Transforms/PhaseOrdering/AArch64/sve-interleave-vectorization.ll
Log Message:
-----------
Revert "[LV]: Teach LV to recursively (de)interleave. (#122989)"
This reverts commit 9491f75e1d912b277247450d1c7b6d56f7faf885.
This triggers an assert when building with SVE enabled.
https://lab.llvm.org/buildbot/#/builders/143/builds/4795
Commit: 3418cd082ae2c6d051d505014a62392429105fd4
https://github.com/llvm/llvm-project/commit/3418cd082ae2c6d051d505014a62392429105fd4
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses-cost.ll
Log Message:
-----------
[LV] Add test showing cost-model difference after 9491f75e1d9.
Reduced test case from
https://lab.llvm.org/buildbot/#/builders/143/builds/4847.
Commit: c59ede638f48a80644ba0a6de0573d541fc05bbc
https://github.com/llvm/llvm-project/commit/c59ede638f48a80644ba0a6de0573d541fc05bbc
Author: Chris B <chris.bieneman at me.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/docs/DeveloperPolicy.rst
Log Message:
-----------
Update Developer Policy for copyright notices (#123463)
This updates the developer policy to align with established community
norms for copyright notices in source code contributed to LLVM.
The updates clearly state that we do not accept code contianing explicit
copyright notices in source except where such code is a pre-existing
part of an external dependency that is being vendored into LLVM.
Explicit copyright notices in source add no value to the project since
copyright ownership is well tracked through git. Our policy already
requires that contributions made not by the original author have
appropriate attribution in git commit messsages or metadata.
Further, explicit copyright notices in code can easily get out of date
as the code is refactored, updated by additional authors or otherwise
changed over time. This leads to misleading out-of-date copyright
notices which do more harm than good.
This change should be viewed as a clarification and statement of
existing established policy, not a change in policy since it represents
the way the project has been operating.
Commit: 9457418e66766d8fafc81f85eb8045986220ca3e
https://github.com/llvm/llvm-project/commit/9457418e66766d8fafc81f85eb8045986220ca3e
Author: Martin Storsjö <martin at martin.st>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/test/COFF/empty-section-decl.yaml
M llvm/include/llvm/Object/COFF.h
R llvm/test/Object/coff-sec-sym.test
Log Message:
-----------
[LLD] [COFF] Fix linking MSVC generated implib header objects (#122811)
ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b tried to fix cases when LLD
links what seems to be import library header objects from MSVC. However,
the fix seems incorrect; the review at https://reviews.llvm.org/D133627
concluded that if this (treating this kind of symbol as a common symbol)
is what link.exe does, it's fine.
However, this is most probably not what link.exe does. The symbol
mentioned in the commit message of
ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b would be a common symbol with a
size of around 3 GB; this is not what might have been intended.
That commit tried to avoid running into the error ".idata$4 should not
refer to special section 0"; that issue is fixed for a similar style of
section symbols in 4a4a8a1476b1386b523dc5b292ba9a5a6748a9cf.
Therefore, revert ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b and extend
the fix from 4a4a8a1476b1386b523dc5b292ba9a5a6748a9cf to also work for
the section symbols in MSVC generated import libraries.
The main detail about them, is that for symbols of type
IMAGE_SYM_CLASS_SECTION, the Value field is not an offset, but it is an
optional set of flags, corresponding to the Characteristics of the
section header (although it may be empty).
Commit: 671ec34fb2d6b2cb1f82a69991d2aebb3bdc24bd
https://github.com/llvm/llvm-project/commit/671ec34fb2d6b2cb1f82a69991d2aebb3bdc24bd
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lld/COFF/SymbolTable.h
M lld/COFF/Writer.cpp
M lld/test/COFF/arm64x-export.test
Log Message:
-----------
[LLD][COFF] Add support for hybrid exports on ARM64X (#123724)
Commit: c912e98e8ea3678bf8344199a97530f7a310aed7
https://github.com/llvm/llvm-project/commit/c912e98e8ea3678bf8344199a97530f7a310aed7
Author: Martin Storsjö <martin at martin.st>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
A llvm/test/tools/llvm-lib/member-names.test
Log Message:
-----------
[llvm-lib] Don't rewrite paths for members in non-thin archives (#123416)
This matches what MS lib.exe does (and llvm-ar too); when adding files
to an archive, MS lib.exe stores the file name as it was given on the
command line, whereas llvm-lib rewrote it into a relative path name,
relative to the archive location. Such a rewrite makes sense for thin
archives, but not for regular archives. (MS lib.exe doesn't support
producing thin archives; that's an LLVM extension - see the
thin-relative.test testcase.)
The behaviour to rewrite these paths was added in
451c2ef199e9c5163007ac32e2d426fbfb37e664; it is unclear why it was
chosen to do the rewriting for non-thin archives as well. This quirk is
even pointed out in a code comment - but neither the code review at
https://reviews.llvm.org/D57842 nor the linked bug report at
https://crbug.com/41440160 mentions why this is done for all archives,
not only thin ones.
Therefore, assume that this only was done out of convenience, and change
llvm-lib to not adjust the paths for non-thin archives.
Normally, the actual member names doesn't matter for non-thin archives;
however for short import libraries, where each member is named e.g.
"foo.dll", the names do matter. If using llvm-lib to merge two import
libraries (as a non-thin library), preserve the original names rather
than making the member names relative.
Commit: af84ed8ae5c1a7af96fb745582244dd219e2e481
https://github.com/llvm/llvm-project/commit/af84ed8ae5c1a7af96fb745582244dd219e2e481
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/ObjectYAML/ELFEmitter.cpp
Log Message:
-----------
[ObjectYAML][NFC] Simplify ELFState<ELFT>::initProgramHeaders() (#123703)
This removes unused variables and dead code in the method.
Commit: dd860bcfb57df429c0a1ad2e2d869ff3b795bc4d
https://github.com/llvm/llvm-project/commit/dd860bcfb57df429c0a1ad2e2d869ff3b795bc4d
Author: Deric Cheung <cheung.deric at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
A clang/test/CodeGenHLSL/builtins/reflect.hlsl
A clang/test/CodeGenSPIRV/Builtins/reflect.c
A clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
A clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
A llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
Log Message:
-----------
[HLSL] Implement the `reflect` HLSL function (#122992)
Fixes #99152
Tasks completed:
- Implement `reflect` in `clang/lib/Headers/hlsl/hlsl_intrinsics.h`
- Implement the `reflect` SPIR-V target built-in in
`clang/include/clang/Basic/BuiltinsSPIRV.td`
- Add a SPIR-V fast path in `clang/lib/Headers/hlsl/hlsl_detail.h` in
the form
```c++
#if (__has_builtin(__builtin_spirv_reflect))
return __builtin_spirv_reflect(...);
#else
return ...; // regular behavior
#endif
```
- Add codegen for the SPIR-V `reflect` built-in to
`EmitSPIRVBuiltinExpr` in `clang/lib/CodeGen/CGBuiltin.cpp`
- Add HLSL codegen tests to
`clang/test/CodeGenHLSL/builtins/reflect.hlsl`
- Add SPIR-V built-in codegen tests to
`clang/test/CodeGenSPIRV/Builtins/reflect.c`
- Add sema tests to `clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl`
- Add SPIR-V sema tests to
`clang/test/CodeGenSPIRV/Builtins/reflect-errors.c`
- Create the `int_spv_reflect` intrinsic in
`llvm/include/llvm/IR/IntrinsicsSPIRV.td`
- In `llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp` create the
`reflect` lowering and map it to `int_spv_reflect` in
`SPIRVInstructionSelector::selectIntrinsic`
- Create a SPIR-V backend test case in
`llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll`
Additional tasks completed:
- Implement sema check for the `reflect` SPIR-V built-in in
`clang/lib/Sema/SemaSPIRV.cpp`
- Required for HLSL codegen to work via the SPIR-V fast path, because
the types defined in `clang/include/clang/Basic/BuiltinsSPIRV.td` are
being overridden
- Create SPIR-V backend error test case in
`llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll`
- Since `reflect` is only available in the GLSL extended instruction
set, using it in OpenCL should result in an error
Incomplete tasks:
- Create SPIR-V backend test case in
`llvm/test/CodeGen/SPIRV/opencl/reflect.ll`
- An OpenCL test is not applicable in this case because the [OpenCL
SPIR-V extended instruction
set](https://registry.khronos.org/SPIR-V/specs/unified1/OpenCL.ExtendedInstructionSet.100.html)
does not include a `reflect` function
Commit: 01045b75a16cfc6905ac38495e262a7da7183ef9
https://github.com/llvm/llvm-project/commit/01045b75a16cfc6905ac38495e262a7da7183ef9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
Log Message:
-----------
[CUDA] Add missing zero initializer for reflect
Commit: 81c0f3023fc38e3ea720045407a17f47653ea2ac
https://github.com/llvm/llvm-project/commit/81c0f3023fc38e3ea720045407a17f47653ea2ac
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter1/toy.cpp
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter2/toy.cpp
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/toy.cpp
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter4/toy.cpp
M llvm/examples/Kaleidoscope/Chapter4/toy.cpp
M llvm/examples/Kaleidoscope/Chapter5/toy.cpp
M llvm/examples/Kaleidoscope/Chapter6/toy.cpp
M llvm/examples/Kaleidoscope/Chapter7/toy.cpp
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorSymbolDef.h
M llvm/unittests/ExecutionEngine/Orc/ExecutorAddressTest.cpp
Log Message:
-----------
[ORC] Add ExecutorSymbolDef toPtr / fromPtr convenience functions.
This will simplify conversion of a number of APIs from ExecutorAddr to
ExecutorSymbolDef.
Commit: debe7bd9168b3e7c2fdcef4f66a0ce033b6b4b54
https://github.com/llvm/llvm-project/commit/debe7bd9168b3e7c2fdcef4f66a0ce033b6b4b54
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[memprof] Migrate away from PointerUnion::dyn_cast (NFC) (#123716)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses cast
because we expect the arguments to be of the requested types. Note
that all these cases have assert and/or dereferences just after cast,
implying that the return value from cast must be nonnull.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 4c91263045610391472fda0937893ac415f037c3
https://github.com/llvm/llvm-project/commit/4c91263045610391472fda0937893ac415f037c3
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
R clang/test/CodeGenHLSL/builtins/reflect.hlsl
R clang/test/CodeGenSPIRV/Builtins/reflect.c
R clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
R clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
R llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
Log Message:
-----------
Revert "[HLSL] Implement the `reflect` HLSL function" (#123846)
Reverts llvm/llvm-project#122992
Due to an included failing test-case the commit causes build failures.
Commit: d33e33fde770214e134ed58f992a5a95a522f7ff
https://github.com/llvm/llvm-project/commit/d33e33fde770214e134ed58f992a5a95a522f7ff
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lldb/bindings/interface/SBSaveCoreOptionsDocstrings.i
Log Message:
-----------
[LLDB] Add draft docstrings for SBSaveCoreOptions (#123132)
SBSaveCoreOptions has been around for awhile now, so I decided to draft
up some Docstrings describing the functionality better. Some of my
wording sounded a bit clunky due the optionality of each method call so
I would greatly appreciate feedback.
Includes the new method in #122541 so I will merge this as a follow up.
Commit: b821aae912706d038f2d2558d37eeafd5a87fe0d
https://github.com/llvm/llvm-project/commit/b821aae912706d038f2d2558d37eeafd5a87fe0d
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Gnu.cpp
Log Message:
-----------
Remove references to MipsAndroid as it is unsupported (#123810)
Commit: 635e154bbc94342080ccba583ff6fb16ea364f4b
https://github.com/llvm/llvm-project/commit/635e154bbc94342080ccba583ff6fb16ea364f4b
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
M clang/lib/Driver/ToolChains/Arch/Mips.h
Log Message:
-----------
Remove check for Android in Mips.cpp (#123793)
Commit: 83cdcd5da463cffc028e484774c7dff91ae31677
https://github.com/llvm/llvm-project/commit/83cdcd5da463cffc028e484774c7dff91ae31677
Author: Hyunsung Lee <ita9naiwa at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
Log Message:
-----------
[MLIR/linalg] Update arg name of `generalizeNamedOp` in `Transforms.h` (#123679)
`Generalization.cpp:53`
```cpp
FailureOr<GenericOp> mlir::linalg::generalizeNamedOp(RewriterBase &rewriter,
LinalgOp linalgOp) {
if (failed(generalizeNamedOpPrecondition(linalgOp)))
return rewriter.notifyMatchFailure(linalgOp, "preconditions not met");
SmallVector<Value> inputs = linalgOp.getDpsInputs();
ValueRange outputs = linalgOp.getDpsInits();
SmallVector<AffineMap> indexingMaps = linalgOp.getIndexingMapsArray();
SmallVector<utils::IteratorType> iterators = linalgOp.getIteratorTypesArray();
SmallVector<Type> resultTypes = linalgOp.hasPureTensorSemantics()
? TypeRange(ValueRange(outputs))
: TypeRange{};
...
```
`generalizeNamedOp` in `Generalization.cpp` has a different arg name
than `generalizeNamedOp` in `Transforms.h`
Sync to use `linalgOp`
Commit: 68fdc09eb528ac3b02605333054b4121ce47ec26
https://github.com/llvm/llvm-project/commit/68fdc09eb528ac3b02605333054b4121ce47ec26
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M utils/bazel/configure.bzl
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Add SPIRV
Commit: ec0958c0b7f3ef6233cf51697bea384322937a09
https://github.com/llvm/llvm-project/commit/ec0958c0b7f3ef6233cf51697bea384322937a09
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Reorder targets
Commit: 8a5f1ef88bd96a8b15937927d9d0cd51324ba6de
https://github.com/llvm/llvm-project/commit/8a5f1ef88bd96a8b15937927d9d0cd51324ba6de
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Log Message:
-----------
[ORC] Simplify error return. NFC.
Commit: 6ab9dafec807a64a4e940bfaecc815e23454dfe8
https://github.com/llvm/llvm-project/commit/6ab9dafec807a64a4e940bfaecc815e23454dfe8
Author: Vinicius Tadeu Zein <vtzein at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/test/Sema/pragma-clang-section.c
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
A llvm/test/CodeGen/X86/clang-section-coff.ll
Log Message:
-----------
[clang] Implement #pragma clang section on COFF targets (#112714)
This patch implements the directive #pragma clang section on COFF targets
with the exact same features available on ELF and Mach-O.
Commit: 7cf8addc2d487154dfb65db70829abc943345302
https://github.com/llvm/llvm-project/commit/7cf8addc2d487154dfb65db70829abc943345302
Author: Jason Eckhardt <jeckhardt at nvidia.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/include/llvm/Target/TargetLoweringObjectFile.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
Log Message:
-----------
[TLOF][NFC] Make emitLinkerDirectives virtual and public. (#123773)
Today, emitLinkerDirectives is private to TLOFCOFF-- it isolates parsing
and processing of the linker options. Similar processing is also done by
other TLOFs inline within emitModuleMetadata. This patch promotes
emitLinkerDirectives to a virtual (public) method so that this handling
is similarly isolated in the other TLOFs.
This also enables downstream targets to override just this handling
instead of the whole of emitModuleMetadata.
Commit: d540ebf6cbf97b8bac45af837a741bcb5bd1e1f6
https://github.com/llvm/llvm-project/commit/d540ebf6cbf97b8bac45af837a741bcb5bd1e1f6
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp
A llvm/test/CodeGen/AArch64/cfguard-arm64ec.ll
Log Message:
-----------
[ARM64EC] Avoid emitting unnecessary symbol references with /guard:cf. (#123235)
.gfids$y contains a list of indirect calls for Control Flow Guard. This
wasn't working properly for ARM64EC: direct calls were being treated as
indirect calls. Make sure we correctly filter out direct calls.
This improves the protection from Control Flow Guard, and also fixes a
link error when using certain functions from oldnames.lib.
Commit: d25a1f8887e59cb770749766af9b0c7caf88326e
https://github.com/llvm/llvm-project/commit/d25a1f8887e59cb770749766af9b0c7caf88326e
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
Log Message:
-----------
[mlir][Vector][NFC] Add `vector-transform-options` flag to ConvertVectorToLLVMPass (#123491)
This flag enables the configuration of some transformation such as the
lowering of contractions and transposes. The default configuration
preserves the existing behavior.
Commit: b9813ceb95a81506b0bdedfae5e7b4b9f4d9c6bc
https://github.com/llvm/llvm-project/commit/b9813ceb95a81506b0bdedfae5e7b4b9f4d9c6bc
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lldb/include/lldb/API/SBDebugger.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[LLDB][LLDB-DAP] Wire up DAP to listen to external progress events (#123826)
Recently I added SBProgress (#119052), and during that original commit I
tested if the progress event was sent over LLDB-DAP, and it was. However
upon the suggestion of @JDevlieghere and @labath we added an external
category (#120171), which I did not test.
This small patch wires up DAP to listen for external events by default,
and adds the external category to the SBDebugger enumeration.
Commit: e45de3dba7fad894bb5e10fd5018e5851061c672
https://github.com/llvm/llvm-project/commit/e45de3dba7fad894bb5e10fd5018e5851061c672
Author: William Huang <williamjhuang at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/test/Transforms/JumpThreading/thread-debug-info.ll
Log Message:
-----------
Move RemoveRedundantDbgInstrs outside of inner loop in JumpThreading (#123008)
This cleanup action only needs to be performed once when the entire
optimization is converged. Doing it in every iteration has a very high
time-complexity, as it queries every dbg value in a dense map
Compare before and after for one internal source file with many basic
blocks
>90% reduction in this extreme case.
Commit: c26e1a22df4aad4f6a0d82e46fb1bbe379e0ba88
https://github.com/llvm/llvm-project/commit/c26e1a22df4aad4f6a0d82e46fb1bbe379e0ba88
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][cuda] Allocate descriptor in managed memory when memref is a block argument (#123829)
Commit: 335f1a72b22560e61f6170efef740c9c26b24f1a
https://github.com/llvm/llvm-project/commit/335f1a72b22560e61f6170efef740c9c26b24f1a
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/test/Transforms/HipStdPar/allocation-interposition.ll
Log Message:
-----------
[opt][HIPSTDPAR] Handle `__hipstdpar_hidden_malloc` (#123150)
This patch adds support for replacing calls to
`__hipstdpar_hidden_malloc` with calls to `__libc_malloc`, similarly to
how we handle hidden `free`. A future paired change in the forwarding
header will leverage this capability in order to handle certain special
cases where it is not possible / desirable to allocate via the HIP
runtime.
Commit: 011b618644113996e2c0a8e57db40f89d20878e3
https://github.com/llvm/llvm-project/commit/011b618644113996e2c0a8e57db40f89d20878e3
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILConstants.h
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
M llvm/test/CodeGen/DirectX/CreateHandle.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
M llvm/test/CodeGen/DirectX/WaveActiveAllTrue.ll
M llvm/test/CodeGen/DirectX/WaveActiveAnyTrue.ll
M llvm/test/CodeGen/DirectX/WaveActiveCountBits.ll
M llvm/test/CodeGen/DirectX/WaveGetLaneIndex.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt-vec.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt.ll
M llvm/test/CodeGen/DirectX/abs.ll
M llvm/test/CodeGen/DirectX/acos.ll
M llvm/test/CodeGen/DirectX/asin.ll
M llvm/test/CodeGen/DirectX/atan.ll
M llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll
M llvm/test/CodeGen/DirectX/ceil.ll
M llvm/test/CodeGen/DirectX/comput_ids.ll
M llvm/test/CodeGen/DirectX/cos.ll
M llvm/test/CodeGen/DirectX/cosh.ll
M llvm/test/CodeGen/DirectX/countbits.ll
M llvm/test/CodeGen/DirectX/dot4add_i8packed.ll
M llvm/test/CodeGen/DirectX/dot4add_u8packed.ll
M llvm/test/CodeGen/DirectX/exp.ll
M llvm/test/CodeGen/DirectX/fdot.ll
M llvm/test/CodeGen/DirectX/firstbithigh.ll
M llvm/test/CodeGen/DirectX/floor.ll
M llvm/test/CodeGen/DirectX/fmad.ll
M llvm/test/CodeGen/DirectX/fmax.ll
M llvm/test/CodeGen/DirectX/fmin.ll
M llvm/test/CodeGen/DirectX/frac.ll
M llvm/test/CodeGen/DirectX/idot.ll
M llvm/test/CodeGen/DirectX/imad.ll
M llvm/test/CodeGen/DirectX/isinf.ll
M llvm/test/CodeGen/DirectX/log.ll
M llvm/test/CodeGen/DirectX/log10.ll
M llvm/test/CodeGen/DirectX/log2.ll
M llvm/test/CodeGen/DirectX/reversebits.ll
M llvm/test/CodeGen/DirectX/round.ll
M llvm/test/CodeGen/DirectX/rsqrt.ll
M llvm/test/CodeGen/DirectX/saturate.ll
M llvm/test/CodeGen/DirectX/sin.ll
M llvm/test/CodeGen/DirectX/sinh.ll
M llvm/test/CodeGen/DirectX/smax.ll
M llvm/test/CodeGen/DirectX/smin.ll
M llvm/test/CodeGen/DirectX/splitdouble.ll
M llvm/test/CodeGen/DirectX/sqrt.ll
M llvm/test/CodeGen/DirectX/tan.ll
M llvm/test/CodeGen/DirectX/tanh.ll
M llvm/test/CodeGen/DirectX/trunc.ll
M llvm/test/CodeGen/DirectX/umad.ll
M llvm/test/CodeGen/DirectX/umax.ll
M llvm/test/CodeGen/DirectX/umin.ll
M llvm/test/CodeGen/DirectX/wave_is_first_lane.ll
M llvm/utils/TableGen/DXILEmitter.cpp
Log Message:
-----------
[DXIL] Define and generate `DXILAttribute` and `DXILProperty` (#117072)
- Redefines `DXILAttribute` to denote a function attribute, compatible
to how it was define in DXC/LLVM 3.7
- Fix how `DXILAttribute` is emitted to be a struct of set attributes
instead of an "or" of the enums
- Implement the lowering of `DXILAttribute` to LLVM function attributes
in `DXILOpBuilder.cpp`. A custom mapping is defined.
- Audit all current ops to specify the correct attributes consistent
with DXC. This is done here to allow for testing.
- Update testcases in `llvm/test/CodeGen/DirectX` of all ops with
attributes to match that attributes are set
- Update testcases of ops that had previously incorrectly set attributes
to check there is no attributes set
- Defines `DXILProperty` to denote the other type of attributes from DXC
used to query properties.
- Emit `DXILProperty` as a struct of set attributes.
- Updates `DXIL.td` to specify applicable `DXILProperty`s on ops
Note: `DXILProperty` was referred to as 'queryable attributes' in design
discussion. Changed to property to allow for better expression in
`DXIL.td`
Resolves #114461
Resolves #115912
Commit: 4280316e3d0c684a1c9519212d1c7df71776f749
https://github.com/llvm/llvm-project/commit/4280316e3d0c684a1c9519212d1c7df71776f749
Author: Valentin Clement <clementval at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CMakeLists.txt
Log Message:
-----------
[flang][cuda] Fix link issue after c26e1a2
Commit: 76b01875d355eea97f3255b1ecb059b1db487757
https://github.com/llvm/llvm-project/commit/76b01875d355eea97f3255b1ecb059b1db487757
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M .github/workflows/build-ci-container.yml
Log Message:
-----------
[Github] Move agent container to separate tar archive
This patch makes the build container job save the agent container image to a
separate tar file rather than bundling it in with the existing tar file. For
some reason, running podman save with two container images and then loading
that single tar file gets rid of the agent image and we end up with two
copies of the original image. This means that premerge jobs will fail with
the agent image because they cannot find the run.sh script.
Commit: 9883aa925e4b5a730ed3705f88a73bfcb70e82e4
https://github.com/llvm/llvm-project/commit/9883aa925e4b5a730ed3705f88a73bfcb70e82e4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
Log Message:
-----------
[RISCV] Remove some unnecessary UnsupportedSched* that are implied by others. NFC
Tablegen is missing a check that should have caught that these
were duplicated. I'm working to restore that check.
Commit: 408931490735a87369462aac1685673c4bc22a3e
https://github.com/llvm/llvm-project/commit/408931490735a87369462aac1685673c4bc22a3e
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
Log Message:
-----------
[SandboxVec][DAG][NFC] Remove early return in notifyMoveInstr()
It used to early return when destination is same as origin. But it's redundant
because in that case the callback won't get called in the first place.
Commit: e8811ad3cc2a840dcacde2f7ddea599d82f3b4e3
https://github.com/llvm/llvm-project/commit/e8811ad3cc2a840dcacde2f7ddea599d82f3b4e3
Author: Shoreshen <372660931 at qq.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
A llvm/test/CodeGen/AMDGPU/sreg-xnull-regclass-bitwidth.mir
Log Message:
-----------
[AMDGPU] Fix unreachable reg bit width (#122107)
Add register class bit width for SReg_256_XNULL and SReg_128_XNULL
Commit: 12903fb3c73ad549c89585097f24d8b9952d849c
https://github.com/llvm/llvm-project/commit/12903fb3c73ad549c89585097f24d8b9952d849c
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/include/llvm/Passes/DroppedVariableStatsIR.h
M llvm/lib/Passes/DroppedVariableStatsIR.cpp
M llvm/unittests/IR/DroppedVariableStatsIRTest.cpp
Log Message:
-----------
[NFC] Include PassID for runBeforePass children.
Debugging the dropped variable statistics for large LLVM IR files can be
made easier if the functions called before an optimization pass is run
includes the PassID of the pass that will be run after statistics
metrics are collected. This patch adds that support.
Commit: ee5d60020ff55a74bdc01c6a8dece7e60322adf7
https://github.com/llvm/llvm-project/commit/ee5d60020ff55a74bdc01c6a8dece7e60322adf7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
Revert "[CI][Github] Disable premerge workflow on main"
This reverts commit 106f1056991317af7eaaf19239de93942ac37267.
Everything should be in working order now that the container job has been
updated to work properly. This has been tested on an individual job.
Commit: 18ee7e1792cf4cc9b287ae10063a7c2b7792da8f
https://github.com/llvm/llvm-project/commit/18ee7e1792cf4cc9b287ae10063a7c2b7792da8f
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lldb/bindings/interface/SBSaveCoreOptionsDocstrings.i
Log Message:
-----------
Revert "[LLDB] Add draft docstrings for SBSaveCoreOptions" (#123873)
Reverts llvm/llvm-project#123132
Commit: 8c2030b7d4c4f21270577187d6413c6b05784861
https://github.com/llvm/llvm-project/commit/8c2030b7d4c4f21270577187d6413c6b05784861
Author: Parth Arora <quic_partaror at quicinc.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lld/ELF/ScriptParser.cpp
M lld/test/ELF/linkerscript/diag.test
M lld/test/ELF/linkerscript/operators.test
Log Message:
-----------
[LLD] [ELF] Add support for linker script unary plus operator (#121508)
This commit adds support for linker script unary plus ('+') operator. It
is helpful for improving compatibility between LLD and GNU LD.
Closes #118047
Commit: 7c58d6363a40fc6d1cdf6a147da8f3bb0d4f96ec
https://github.com/llvm/llvm-project/commit/7c58d6363a40fc6d1cdf6a147da8f3bb0d4f96ec
Author: Shoreshen <372660931 at qq.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cmp_shrink.mir
M llvm/test/CodeGen/AMDGPU/commute-op-sel.mir
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
Log Message:
-----------
[AMDGPU] Add commute for some VOP3 inst (#121326)
add commute for some VOP3 inst, allow commute for both inline constant
operand, adjust tests
Fixes #111205
Commit: ceaaa2b9ae3487f7ba0de553b1876e581fdbd0eb
https://github.com/llvm/llvm-project/commit/ceaaa2b9ae3487f7ba0de553b1876e581fdbd0eb
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Fix warnings
This patch fixes:
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:2792:14: error: comparison of
integers of different signs: 'unsigned int' and 'int'
[-Werror,-Wsign-compare]
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:2797:14: error: comparison of
integers of different signs: 'unsigned int' and 'int'
[-Werror,-Wsign-compare]
Commit: 582fe3e0cac57cc47473f80dd96a2bd06ecd6290
https://github.com/llvm/llvm-project/commit/582fe3e0cac57cc47473f80dd96a2bd06ecd6290
Author: Scott Todd <scott.todd0 at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIRPython.cmake
Log Message:
-----------
[mlir][python][cmake] Remove unsupported argument from AddMLIRPython. (#123858)
See https://cmake.org/cmake/help/latest/policy/CMP0175.html
> The `OUTPUT` form does not accept `PRE_BUILD`, `PRE_LINK`, or
`POST_BUILD` keywords.
When using CMake version 3.31+, this results in ~2000 lines of warning
spam in my downstream project:
```
CMake Warning (dev) at build-gcc/lib/cmake/mlir/AddMLIRPython.cmake:606 (add_custom_command):
The following keywords are not supported when using
add_custom_command(OUTPUT): PRE_BUILD.
Policy CMP0175 is not set: add_custom_command() rejects invalid arguments.
Run "cmake --help-policy CMP0175" for policy details. Use the cmake_policy
command to set the policy and suppress this warning.
Call Stack (most recent call first):
build-gcc/lib/cmake/mlir/AddMLIRPython.cmake:222 (add_mlir_python_sources_target)
build-gcc/lib/cmake/mlir/AddMLIRPython.cmake:256 (_process_target)
compiler/bindings/python/CMakeLists.txt:239 (add_mlir_python_modules)
This warning is for project developers. Use -Wno-dev to suppress it.
```
General docs:
https://cmake.org/cmake/help/latest/command/add_custom_command.html.
Note that `PRE_BUILD` only appears in the _second_ signature for the
function (which takes `TARGET`) not the first (which takes `OUTPUT`).
Commit: 05861b39bafc9932d0acf5a5ca16aef2852539c5
https://github.com/llvm/llvm-project/commit/05861b39bafc9932d0acf5a5ca16aef2852539c5
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/vtable-in-explicit-instantiation.cppm
Log Message:
-----------
[C++20] [Modules] Make sure vtable are generated for explicit template instantiation definition (#123871)
Close https://github.com/llvm/llvm-project/issues/123719
The reason is, we thought the external explicit template instantiation
declaration as the external definition incorrectly.
Commit: c53faf63ff6bb60a383e0be17f1b9107adb62fda
https://github.com/llvm/llvm-project/commit/c53faf63ff6bb60a383e0be17f1b9107adb62fda
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/test/COFF/empty-section-decl.yaml
M llvm/include/llvm/Object/COFF.h
A llvm/test/Object/coff-sec-sym.test
Log Message:
-----------
Revert "[LLD] [COFF] Fix linking MSVC generated implib header objects" (#123877)
Reverts llvm/llvm-project#122811 due to buildbot breakage e.g.,
https://lab.llvm.org/buildbot/#/builders/52/builds/5421/steps/11/logs/stdio
ASan output from local re-run:
```
==2780289==ERROR: AddressSanitizer: use-after-poison on address 0x7e0b87e28d28 at pc 0x55a979a99e7e bp 0x7ffe4b18f0b0 sp 0x7ffe4b18f0a8
READ of size 1 at 0x7e0b87e28d28 thread T0
#0 0x55a979a99e7d in getStorageClass /usr/local/google/home/thurston/buildbot_repro/llvm-project/llvm/include/llvm/Object/COFF.h:344
#1 0x55a979a99e7d in isSectionDefinition /usr/local/google/home/thurston/buildbot_repro/llvm-project/llvm/include/llvm/Object/COFF.h:429:9
#2 0x55a979a99e7d in getSymbols /usr/local/google/home/thurston/buildbot_repro/llvm-project/lld/COFF/LLDMapFile.cpp:54:42
#3 0x55a979a99e7d in lld::coff::writeLLDMapFile(lld::coff::COFFLinkerContext const&) /usr/local/google/home/thurston/buildbot_repro/llvm-project/lld/COFF/LLDMapFile.cpp:103:40
#4 0x55a979a16879 in (anonymous namespace)::Writer::run() /usr/local/google/home/thurston/buildbot_repro/llvm-project/lld/COFF/Writer.cpp:810:3
#5 0x55a979a00aac in lld::coff::writeResult(lld::coff::COFFLinkerContext&) /usr/local/google/home/thurston/buildbot_repro/llvm-project/lld/COFF/Writer.cpp:354:15
#6 0x55a97985f7ed in lld::coff::LinkerDriver::linkerMain(llvm::ArrayRef<char const*>) /usr/local/google/home/thurston/buildbot_repro/llvm-project/lld/COFF/Driver.cpp:2826:3
#7 0x55a97984cdd3 in lld::coff::link(llvm::ArrayRef<char const*>, llvm::raw_ostream&, llvm::raw_ostream&, bool, bool) /usr/local/google/home/thurston/buildbot_repro/llvm-project/lld/COFF/Driver.cpp:97:15
#8 0x55a9797f9793 in lld::unsafeLldMain(llvm::ArrayRef<char const*>, llvm::raw_ostream&, llvm::raw_ostream&, llvm::ArrayRef<lld::DriverDef>, bool) /usr/local/google/home/thurston/buildbot_repro/llvm-project/lld/Common/DriverDispatcher.cpp:163:12
#9 0x55a9797fa3b6 in operator() /usr/local/google/home/thurston/buildbot_repro/llvm-project/lld/Common/DriverDispatcher.cpp:188:15
#10 0x55a9797fa3b6 in void llvm::function_ref<void ()>::callback_fn<lld::lldMain(llvm::ArrayRef<char const*>, llvm::raw_ostream&, llvm::raw_ostream&, llvm::ArrayRef<lld::DriverDef>)::$_0>(long) /usr/local/google/home/thurston/buildbot_repro/llvm-project/llvm/include/llvm/ADT/STLFunctionalExtras.h:46:12
#11 0x55a97966cb93 in operator() /usr/local/google/home/thurston/buildbot_repro/llvm-project/llvm/include/llvm/ADT/STLFunctionalExtras.h:69:12
#12 0x55a97966cb93 in llvm::CrashRecoveryContext::RunSafely(llvm::function_ref<void ()>) /usr/local/google/home/thurston/buildbot_repro/llvm-project/llvm/lib/Support/CrashRecoveryContext.cpp:426:3
#13 0x55a9797f9dc3 in lld::lldMain(llvm::ArrayRef<char const*>, llvm::raw_ostream&, llvm::raw_ostream&, llvm::ArrayRef<lld::DriverDef>) /usr/local/google/home/thurston/buildbot_repro/llvm-project/lld/Common/DriverDispatcher.cpp:187:14
#14 0x55a979627512 in lld_main(int, char**, llvm::ToolContext const&) /usr/local/google/home/thurston/buildbot_repro/llvm-project/lld/tools/lld/lld.cpp:103:14
#15 0x55a979628731 in main /usr/local/google/home/thurston/buildbot_repro/llvm_build_asan/tools/lld/tools/lld/lld-driver.cpp:17:10
#16 0x7ffb8b202c89 in __libc_start_call_main csu/../sysdeps/nptl/libc_start_call_main.h:58:16
#17 0x7ffb8b202d44 in __libc_start_main csu/../csu/libc-start.c:360:3
#18 0x55a97953ef60 in _start (/usr/local/google/home/thurston/buildbot_repro/llvm_build_asan/bin/lld+0x8fd1f60)
```
Commit: 9d0bfea9fa8663b9d98483fb12f0ac2b199a8a0c
https://github.com/llvm/llvm-project/commit/9d0bfea9fa8663b9d98483fb12f0ac2b199a8a0c
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
Log Message:
-----------
[ORC] Remove an unimplemented method decl. NFC.
Commit: ae139988ae2547a6ee4be5850201dedbd3d0ec66
https://github.com/llvm/llvm-project/commit/ae139988ae2547a6ee4be5850201dedbd3d0ec66
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
Log Message:
-----------
[JITLink] Fix comment: addSection no longer takes an alignment. NFC.
Commit: 2841cdbfda92b3fb5fbec726f3376b198106d496
https://github.com/llvm/llvm-project/commit/2841cdbfda92b3fb5fbec726f3376b198106d496
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lldb/include/lldb/Host/Editline.h
M lldb/include/lldb/Utility/AnsiTerminal.h
M lldb/source/Core/IOHandler.cpp
M lldb/source/Host/common/Editline.cpp
M lldb/test/API/terminal/TestEditline.py
M lldb/unittests/Editline/EditlineTest.cpp
M lldb/unittests/Utility/AnsiTerminalTest.cpp
Log Message:
-----------
[lldb] Support format string in the prompt (#123430)
Implement ansi::StripAnsiTerminalCodes and fix a long standing bug where
using format strings in lldb's prompt resulted in an incorrect prompt
column width.
Commit: 3bd8b02aa0c5fcbb005f6d72f58f4a05421e7823
https://github.com/llvm/llvm-project/commit/3bd8b02aa0c5fcbb005f6d72f58f4a05421e7823
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/Format/QualifierAlignmentFixer.cpp
M clang/unittests/Format/QualifierFixerTest.cpp
Log Message:
-----------
[clang-format] Handle leading C++11 attribute in QualifierAlignment (#123690)
Fixes #123573.
Commit: 9cbc1f29cabc01c02a523c11d098c00650f6955c
https://github.com/llvm/llvm-project/commit/9cbc1f29cabc01c02a523c11d098c00650f6955c
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToSMMLAPattern.cpp
M mlir/lib/Dialect/Linalg/TransformOps/GPUHeuristics.cpp
M mlir/lib/Dialect/Linalg/Transforms/BlockPackMatmul.cpp
M mlir/lib/Dialect/Linalg/Transforms/TransposeConv2D.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
Log Message:
-----------
[mlir][NFC] Avoid using braced initializer lists to call a constructor. (#123714)
In the LLVM style guide, we prefer not using braced initializer lists to
call a constructor. Also, we prefer using an equal before the open curly
brace if we use a braced initializer list when initializing a variable.
See
https://llvm.org/docs/CodingStandards.html#do-not-use-braced-initializer-lists-to-call-a-constructor
for more details.
The style guide does not explain the reason well. There is an article
from abseil, which mentions few benefits. E.g., we can avoid the most
vexing parse, etc. See https://abseil.io/tips/88 for more details.
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: 5d76642a3e385ca87ff2feee353b1c10c2280c0a
https://github.com/llvm/llvm-project/commit/5d76642a3e385ca87ff2feee353b1c10c2280c0a
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/include/clang/Format/Format.h
Log Message:
-----------
[clang-format][NFC] Keep option names sorted in Format.h
Commit: 07d03c84620582a3c205254898aaffdf62df27fd
https://github.com/llvm/llvm-project/commit/07d03c84620582a3c205254898aaffdf62df27fd
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
A clang/test/Modules/module-local-hidden-friend.cppm
Log Message:
-----------
[NFC] [C++20] [Modules] Add two tests for comparison lookup within modules
Commit: 65df99c208ed40271f6dcdfc29bed56540467ce7
https://github.com/llvm/llvm-project/commit/65df99c208ed40271f6dcdfc29bed56540467ce7
Author: schittir <sindhu.chittireddy at intel.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[NFC] Avoid potential nullptr deref by using castAs<> (#123395)
Use castAs<> instead of getAs<>
Commit: 527c030df8b18071553721329339326bfe82e2a5
https://github.com/llvm/llvm-project/commit/527c030df8b18071553721329339326bfe82e2a5
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
Log Message:
-----------
[RISCV][test] Add VANDN tests with constants
Commit: 7256c91ad29c1407320d5949414fd4736d1f2644
https://github.com/llvm/llvm-project/commit/7256c91ad29c1407320d5949414fd4736d1f2644
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
M llvm/include/llvm/ExecutionEngine/JITLink/MachO.h
M llvm/lib/ExecutionEngine/JITLink/MachO.cpp
Log Message:
-----------
[JITLink][MachO] Add getOrCreateLocalMachOHeader utility.
This function can be called on a LinkGraph to get an anonymous symbol pointing
to the start of a mach_header / mach_header_64 block with suitable cputype and
cpusubtype values for the LinkGraph, and with filetype = MachO::MH_OBJECT.
This functionality will be used in the upcoming compact-unwind support patch:
For graphs that do not have a suitable existing header to use (indicated by the
presence of a "__jitlink$libunwind_dso_base" symbol) the compact-unwind support
plugin will create a local header to use as the dso-base to report to
libunwind.
Commit: 382bafc9579f40bd834b78df671ac45308310462
https://github.com/llvm/llvm-project/commit/382bafc9579f40bd834b78df671ac45308310462
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Log Message:
-----------
[ORC][MachO] Prepare MachOPlatform for compact-unwind support.
The MachOPlatform::MachOPlatformPlugin class will now inject a
"__jitlink$libunwind_dso_base" symbol into each LinkGraph pointing to the Mach
header for the containing JITDylib. The compact-unwind support plugin will use
this symbol as the dso-base for the __unwind_info sections. (Failure to inject
this symbol would result in the compact-unwind support plugin creating a new
header for every graph).
Commit: 6aeffcdb913052e43335130e129e36babaa9b252
https://github.com/llvm/llvm-project/commit/6aeffcdb913052e43335130e129e36babaa9b252
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Target/TargetSelectionDAG.td
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td
A llvm/test/TableGen/SDNodeInfoEmitter/basic.td
A llvm/test/TableGen/SDNodeInfoEmitter/namespace.td
A llvm/test/TableGen/SDNodeInfoEmitter/skipped-nodes.td
M llvm/utils/TableGen/CMakeLists.txt
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
A llvm/utils/TableGen/SDNodeInfoEmitter.cpp
Log Message:
-----------
[TableGen] Add a backend generating SDNode descriptions (#123002)
This patch adds a simplistic backend that gathers all target-specific
SelectionDAG nodes and emits descriptions for most of them.
This includes generating node enumeration, node names, and information
about node "prototype" that can be used to verify that a node is valid.
The patch also extends SDNode by adding target-specific flags, which are
also included in the generated tables.
Part of #119709,
[RFC](https://discourse.llvm.org/t/rfc-tablegen-erating-sdnode-descriptions/83627).
Pull Request: https://github.com/llvm/llvm-project/pull/123002
Commit: 3630d9ef65b30af7e4ca78e668649bbc48b5be66
https://github.com/llvm/llvm-project/commit/3630d9ef65b30af7e4ca78e668649bbc48b5be66
Author: TiborGY <tibor.gyori at chem.u-szeged.hu>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
Log Message:
-----------
[PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (#122654)
I am planning to add some optimization remarks to the
`PartiallyInlineLibCalls` pass. However, since this pass does not emit any
optimization remarks yet, I have to add the "infrastructure" for that first, which
is what this PR is about.
Commit: 8fad58a6482c300c012ab30105f0ae0118081fcd
https://github.com/llvm/llvm-project/commit/8fad58a6482c300c012ab30105f0ae0118081fcd
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] process_vm_readv/process_vm_writev interception. (#123839)
Commit: 1d23fb976bdcc263c48ed2f5186e5589fca3d267
https://github.com/llvm/llvm-project/commit/1d23fb976bdcc263c48ed2f5186e5589fca3d267
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/test/CodeCompletion/member-access.cpp
Log Message:
-----------
[clang][CodeComplete] Use HeuristicResolver to resolve pointee types (#121315)
Fixes https://github.com/clangd/clangd/issues/810
Commit: ebb27ccb08e0579825a53b218ff5b2ddc492626a
https://github.com/llvm/llvm-project/commit/ebb27ccb08e0579825a53b218ff5b2ddc492626a
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
Log Message:
-----------
[RISCV] Select Zvkb VANDN for shorter constant loading sequences (#123345)
This extends PR #120221 to vector instructions.
Commit: a88f31d7fe1aa71d2d59974b961e649c288b8dc7
https://github.com/llvm/llvm-project/commit/a88f31d7fe1aa71d2d59974b961e649c288b8dc7
Author: mconst <mconst at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
A llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
A llvm/test/CodeGen/X86/stack-clash-huge.ll
Log Message:
-----------
[X86] Fix overflow with large stack probes on x86-64 (#113219)
When emitting an inline stack probe loop, we can't use SUBri to
calculate the loop bound if it doesn't fit in a 32-bit (possibly
sign-extended) immediate.
Fixes #113218.
Commit: 830bd0e8f263c6efcfd37f38cc621b0476582b83
https://github.com/llvm/llvm-project/commit/830bd0e8f263c6efcfd37f38cc621b0476582b83
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Type.h
M llvm/lib/SandboxIR/Type.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
Log Message:
-----------
[SandboxIR] Remove sandboxir::PointerType::get(Type) (#123885)
This was just an alias for getting the LLVM Context from the type.
We are in the process of removing the same function for the regular LLVM
type in https://github.com/llvm/llvm-project/issues/123569
Commit: b7b9ccf44988edf49886743ae5c3cf4184db211f
https://github.com/llvm/llvm-project/commit/b7b9ccf44988edf49886743ae5c3cf4184db211f
Author: Robert O'Callahan <rocallahan at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/StopInfo.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Target/ThreadList.h
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/include/lldb/Target/ThreadPlanBase.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
A lldb/packages/Python/lldbsuite/test/lldbgdbproxy.py
A lldb/packages/Python/lldbsuite/test/lldbreverse.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadList.cpp
M lldb/source/Target/ThreadPlanBase.cpp
A lldb/test/API/functionalities/reverse-execution/Makefile
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueBreakpoints.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueNotSupported.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueWatchpoints.py
A lldb/test/API/functionalities/reverse-execution/main.c
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
Log Message:
-----------
[lldb] Implement basic support for reverse-continue (#112079)
This commit adds support for a
`SBProcess::ContinueInDirection()` API. A user-accessible command for
this will follow in a later commit.
This feature depends on a gdbserver implementation (e.g. `rr`) providing
support for the `bc` and `bs` packets. `lldb-server` does not support
those packets, and there is no plan to change that. For testing
purposes, this commit adds a Python implementation of *very limited*
record-and-reverse-execute functionality, implemented as a proxy between
lldb and lldb-server in `lldbreverse.py`. This should not (and in
practice cannot) be used for anything except testing.
The tests here are quite minimal but we test that simple breakpoints and
watchpoints work as expected during reverse execution, and that
conditional breakpoints and watchpoints work when the condition calls a
function that must be executed in the forward direction.
Commit: d839c06719128700bdd033361b20aa6899f6620a
https://github.com/llvm/llvm-project/commit/d839c06719128700bdd033361b20aa6899f6620a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Avoid repeated map lookups (NFC) (#123892)
Commit: 4c6242ebf50dde0597df2bace49d534b61122496
https://github.com/llvm/llvm-project/commit/4c6242ebf50dde0597df2bace49d534b61122496
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIR.cmake
M mlir/lib/CAPI/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/SparseTensor/CMakeLists.txt
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
M mlir/test/lib/Conversion/FuncToLLVM/CMakeLists.txt
M mlir/test/lib/Conversion/MathToVCIX/CMakeLists.txt
M mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
M mlir/test/lib/Conversion/VectorToSPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Affine/CMakeLists.txt
M mlir/test/lib/Dialect/Arith/CMakeLists.txt
M mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
M mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
M mlir/test/lib/Dialect/ControlFlow/CMakeLists.txt
M mlir/test/lib/Dialect/DLTI/CMakeLists.txt
M mlir/test/lib/Dialect/Func/CMakeLists.txt
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/LLVM/CMakeLists.txt
M mlir/test/lib/Dialect/Linalg/CMakeLists.txt
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/MemRef/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/NVGPU/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
M mlir/test/lib/Dialect/SPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Shape/CMakeLists.txt
M mlir/test/lib/Dialect/Tensor/CMakeLists.txt
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lib/IR/CMakeLists.txt
M mlir/test/lib/Interfaces/LoopLikeInterface/CMakeLists.txt
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/test/lib/Reducer/CMakeLists.txt
M mlir/test/lib/Rewrite/CMakeLists.txt
M mlir/test/lib/Tools/PDLL/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/test/python/lib/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
Log Message:
-----------
[mlir] Link libraries that aren't included in libMLIR to libMLIR (#123781)
Use `mlir_target_link_libraries()` to link dependencies of libraries
that are not included in libMLIR, to ensure that they link to the dylib
when they are used in Flang. Otherwise, they implicitly pull in all
their static dependencies, effectively causing Flang binaries to
simultaneously link to the dylib and to static libraries, which is never
a good idea.
I have only covered the libraries that are used by Flang. If you wish, I
can extend this approach to all non-libMLIR libraries in MLIR, making
MLIR itself also link to the dylib consistently.
[v2 with fixed `-DBUILD_SHARED_LIBS=ON` build]
Commit: 53ea5ffcb38d428e446d357f310e9c28957eaec7
https://github.com/llvm/llvm-project/commit/53ea5ffcb38d428e446d357f310e9c28957eaec7
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/ExprMutationAnalyzer.h
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
Log Message:
-----------
[mutation analyzer] support mutation analysis for pointee (#118593)
This patch wants to add mutation analyzer for pointee object.
Commit: f7d8336a2fb4fad4a6efe5af9b0a10ddd970f6d3
https://github.com/llvm/llvm-project/commit/f7d8336a2fb4fad4a6efe5af9b0a10ddd970f6d3
Author: Venkata Ramanaiah Nalamothu <quic_vnalamot at quicinc.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARC/ARCInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.h
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.h
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.h
M llvm/lib/Target/BPF/BPFInstrInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.h
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.h
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.h
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.h
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.h
M llvm/lib/Target/Mips/MipsInstrInfo.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.h
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
Log Message:
-----------
[llvm] Pass MachineInstr flags to storeRegToStackSlot/loadRegFromStackSlot (NFC) (#120622)
This patch is in preparation to enable setting the MachineInstr::MIFlag
flags, i.e. FrameSetup/FrameDestroy, on callee saved register
spill/reload instructions in prologue/epilogue. This eventually helps in
setting the prologue_end and epilogue_begin markers more accurately.
The DWARF Spec in "6.4 Call Frame Information" says:
The code that allocates space on the call frame stack and performs the
save
operation is called the subroutine’s prologue, and the code that
performs
the restore operation and deallocates the frame is called its epilogue.
which means the callee saved register spills and reloads are part of
prologue (a.k.a frame setup) and epilogue (a.k.a frame destruction),
respectively. And, IIUC, LLVM backend uses FrameSetup/FrameDestroy flags
to identify instructions that are part of call frame setup and
destruction.
In the trunk, while most targets consistently set
FrameSetup/FrameDestroy on save/restore call frame information (CFI)
instructions of callee saved registers, they do not consistently set
those flags on the actual callee saved register spill/reload
instructions.
I believe this patch provides a clean mechanism to set
FrameSetup/FrameDestroy flags on the actual callee saved register
spill/reload instructions as needed. And, by having default argument of
MachineInstr::NoFlags for Flags, this patch is a NFC.
With this patch, the targets have to just pass FrameSetup/FrameDestroy
flag to the storeRegToStackSlot/loadRegFromStackSlot calls from the
target derived spillCalleeSavedRegisters and restoreCalleeSavedRegisters
to set those flags on callee saved register spill/reload instructions.
Also, this patch makes it very easy to set the source line information
on callee saved register spill/reload instructions which is needed by
the DwarfDebug.cpp implementation to set prologue_end and epilogue_begin
markers more accurately.
As per DwarfDebug.cpp implementation:
prologue_end is the first known non-DBG_VALUE and non-FrameSetup
location
that marks the beginning of the function body
epilogue_begin is the first FrameDestroy location that has been seen in
the
epilogue basic block
With this patch, the targets have to just do the following to set the
source line information on callee saved register spill/reload
instructions, without hampering the LLVM's efforts to avoid adding
source line information on the artificial code generated by the
compiler.
<Foo>InstrInfo::storeRegToStackSlot() {
...
DebugLoc DL =
Flags & MachineInstr::FrameSetup ? DebugLoc() : MBB.findDebugLoc(I);
...
}
<Foo>InstrInfo::loadRegFromStackSlot() {
...
DebugLoc DL =
Flags & MachineInstr::FrameDestroy ? MBB.findDebugLoc(I) : DebugLoc();
...
}
While I understand this patch would break out-of-tree backend builds, I
think it is in the right direction.
One immediate use case that can benefit from this patch is fixing
#120553 becomes simpler.
Commit: ca65055e792a497551d580c8adf30c28090e45cd
https://github.com/llvm/llvm-project/commit/ca65055e792a497551d580c8adf30c28090e45cd
Author: Calvin Beck <Chobbes at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
Remove mention of conditional branches in undefined values section. (#122980)
This statement is somewhat confusing when paired with the later
statement that says "Branching on an undefined value is undefined
behavior". Furthermore, this example does not show any conditional
branches, so this comment seems to be outdated.
See issue #122532 for more details.
Commit: 69d0c4c1675c90cf99126210679a9c3ae0a8637e
https://github.com/llvm/llvm-project/commit/69d0c4c1675c90cf99126210679a9c3ae0a8637e
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
Log Message:
-----------
[Clang] SubstituteConstraintExpressionWithoutSatisfaction needs an unevaluated context (#123883)
It turns out that the substitution for expression comparing also needs
an unevaluated context, otherwise any reference to immediate functions
might not be properly handled.
As a fallout, this also guards the VLA transformation under unevaluated
context
with `InConditionallyConstantEvaluateContext` to avoid duplicate
diagnostics.
Fixes https://github.com/llvm/llvm-project/issues/123472
---------
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: 9decc24c6ba5398f7cb1b2a0c26bd36e2da479f8
https://github.com/llvm/llvm-project/commit/9decc24c6ba5398f7cb1b2a0c26bd36e2da479f8
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIR.cmake
M mlir/lib/CAPI/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/SparseTensor/CMakeLists.txt
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
M mlir/test/lib/Conversion/FuncToLLVM/CMakeLists.txt
M mlir/test/lib/Conversion/MathToVCIX/CMakeLists.txt
M mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
M mlir/test/lib/Conversion/VectorToSPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Affine/CMakeLists.txt
M mlir/test/lib/Dialect/Arith/CMakeLists.txt
M mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
M mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
M mlir/test/lib/Dialect/ControlFlow/CMakeLists.txt
M mlir/test/lib/Dialect/DLTI/CMakeLists.txt
M mlir/test/lib/Dialect/Func/CMakeLists.txt
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/LLVM/CMakeLists.txt
M mlir/test/lib/Dialect/Linalg/CMakeLists.txt
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/MemRef/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/NVGPU/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
M mlir/test/lib/Dialect/SPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Shape/CMakeLists.txt
M mlir/test/lib/Dialect/Tensor/CMakeLists.txt
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lib/IR/CMakeLists.txt
M mlir/test/lib/Interfaces/LoopLikeInterface/CMakeLists.txt
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/test/lib/Reducer/CMakeLists.txt
M mlir/test/lib/Rewrite/CMakeLists.txt
M mlir/test/lib/Tools/PDLL/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/test/python/lib/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
Log Message:
-----------
Revert "[mlir] Link libraries that aren't included in libMLIR to libMLIR (#123781)"
This reverts commit 4c6242ebf50dde0597df2bace49d534b61122496. More
BUILD_SHARED_LIBS=ON regressions, sigh.
Commit: a5159e200eb25c2873fb8db432962394a879e887
https://github.com/llvm/llvm-project/commit/a5159e200eb25c2873fb8db432962394a879e887
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/AST/Decl.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#123890)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect TemplateOrSpecialization to be nonnull.
Commit: aaf0643dd5d09bdce12298e48310a2c979be5f9a
https://github.com/llvm/llvm-project/commit/aaf0643dd5d09bdce12298e48310a2c979be5f9a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lld/MachO/SyntheticSections.cpp
Log Message:
-----------
[lld] Migrate away from PointerUnion::dyn_cast (NFC) (#123891)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses cast
because we know expect isa<Symbol *>(rel.referent) to be true.
Commit: 8ad4f1a9c110632e419cc64931d432e91559407a
https://github.com/llvm/llvm-project/commit/8ad4f1a9c110632e419cc64931d432e91559407a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#123893)
Commit: 19a7fe03b4f58c4f73ea91d5e63bc4c6e61f987b
https://github.com/llvm/llvm-project/commit/19a7fe03b4f58c4f73ea91d5e63bc4c6e61f987b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#123894)
Commit: 0a9c08c59ba61e727e9dee6d71883d9106963442
https://github.com/llvm/llvm-project/commit/0a9c08c59ba61e727e9dee6d71883d9106963442
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/APValue.h
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
A clang/test/SemaCXX/constant-expression-p2280r4.cpp
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Implement P2280R4 Using unknown pointers and references in constant expressions (#95474)
P2280R4 allows the use of references in pointers of unknown origins in a
constant expression context but only in specific cases that could be
constant expressions.
We track whether a variable is a constexpr unknown in a constant
expression by setting a flag in either APValue or LValue and using this
flag to prevent using unknown values in places where it is not allowed.
Fixes: https://github.com/llvm/llvm-project/issues/63139 https://github.com/llvm/llvm-project/issues/63117
Commit: 0369ac8d2555423fc6c41b2aed12aadf3eb9b0cd
https://github.com/llvm/llvm-project/commit/0369ac8d2555423fc6c41b2aed12aadf3eb9b0cd
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/www/cxx_status.html
Log Message:
-----------
Fix markup in cxx_status.html
Commit: bc6f84a2db6e7d60d70cf9be8d6cce2a101d0faa
https://github.com/llvm/llvm-project/commit/bc6f84a2db6e7d60d70cf9be8d6cce2a101d0faa
Author: Chandler Carruth <chandlerc at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/tools/diagtool/DiagnosticNames.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M llvm/include/llvm/ADT/StringTable.h
Log Message:
-----------
[StrTable] Switch diag group names to `llvm::StringTable` (#123302)
Previously, they used a hand-rolled Pascal-string encoding different
from all the other string tables produced from TableGen. This moves them
to use the newly introduced runtime abstraction, and enhances that
abstraction to support iterating over the string table as used in this
case.
>From what I can tell the Pascal-string encoding isn't critical here to
avoid expensive `strlen` calls, so I think this is a simpler and more
consistent model. But if folks would prefer a Pascal-string style
encoding, I can instead work to switch the `StringTable` abstraction
towards that. It would require some tricky tradeoffs though to make it
reasonably general: either using 4 bytes instead of 1 byte to encode the
size, or having a fallback to `strlen` for long strings.
Commit: 22561cfb443267905d4190f0e2a738e6b412457f
https://github.com/llvm/llvm-project/commit/22561cfb443267905d4190f0e2a738e6b412457f
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/StopInfo.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Target/ThreadList.h
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/include/lldb/Target/ThreadPlanBase.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
R lldb/packages/Python/lldbsuite/test/lldbgdbproxy.py
R lldb/packages/Python/lldbsuite/test/lldbreverse.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadList.cpp
M lldb/source/Target/ThreadPlanBase.cpp
R lldb/test/API/functionalities/reverse-execution/Makefile
R lldb/test/API/functionalities/reverse-execution/TestReverseContinueBreakpoints.py
R lldb/test/API/functionalities/reverse-execution/TestReverseContinueNotSupported.py
R lldb/test/API/functionalities/reverse-execution/TestReverseContinueWatchpoints.py
R lldb/test/API/functionalities/reverse-execution/main.c
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
Log Message:
-----------
Revert "[lldb] Implement basic support for reverse-continue" (#123906)
Reverts llvm/llvm-project#112079 due to failures on the arm bot.
Commit: 957213f60b258a5f6cab04e50c78c0a0c1c304c2
https://github.com/llvm/llvm-project/commit/957213f60b258a5f6cab04e50c78c0a0c1c304c2
Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaOpenCL/invalid-block.cl
Log Message:
-----------
[OpenCL] Diagnose block references in selection operator (#114824)
In addition to the invocation case that is already diagnosed, also
diagnose when a block reference appears on either side of a ternary
selection operator.
Until now, clang would accept the added test case only to crash during
code generation.
Commit: 3088c316994f078833cba11086b6c5cb29df2aae
https://github.com/llvm/llvm-project/commit/3088c316994f078833cba11086b6c5cb29df2aae
Author: Elizaveta Noskova <159026035+enoskova-sc at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/lib/CodeGen/ShrinkWrap.cpp
Log Message:
-----------
[llvm] Add NCD search on Array of basic blocks (NFC) (#119355)
Shrink-Wrap points split Part 2.
RFC:
https://discourse.llvm.org/t/shrink-wrap-save-restore-points-splitting/83581
Part 1: https://github.com/llvm/llvm-project/pull/117862
Part 3: https://github.com/llvm/llvm-project/pull/119357
Part 4: https://github.com/llvm/llvm-project/pull/119358
Part 5: https://github.com/llvm/llvm-project/pull/119359
Commit: 047e8e47c1f9d872aec835b915935802e195c555
https://github.com/llvm/llvm-project/commit/047e8e47c1f9d872aec835b915935802e195c555
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIR.cmake
M mlir/lib/CAPI/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/SparseTensor/CMakeLists.txt
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
M mlir/test/lib/Conversion/FuncToLLVM/CMakeLists.txt
M mlir/test/lib/Conversion/MathToVCIX/CMakeLists.txt
M mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
M mlir/test/lib/Conversion/VectorToSPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Affine/CMakeLists.txt
M mlir/test/lib/Dialect/Arith/CMakeLists.txt
M mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
M mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
M mlir/test/lib/Dialect/ControlFlow/CMakeLists.txt
M mlir/test/lib/Dialect/DLTI/CMakeLists.txt
M mlir/test/lib/Dialect/Func/CMakeLists.txt
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/LLVM/CMakeLists.txt
M mlir/test/lib/Dialect/Linalg/CMakeLists.txt
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/MemRef/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/NVGPU/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
M mlir/test/lib/Dialect/SPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Shape/CMakeLists.txt
M mlir/test/lib/Dialect/Tensor/CMakeLists.txt
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lib/IR/CMakeLists.txt
M mlir/test/lib/Interfaces/LoopLikeInterface/CMakeLists.txt
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/test/lib/Reducer/CMakeLists.txt
M mlir/test/lib/Rewrite/CMakeLists.txt
M mlir/test/lib/Tools/PDLL/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/test/python/lib/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/unittests/ExecutionEngine/CMakeLists.txt
Log Message:
-----------
Reapply "[mlir] Link libraries that aren't included in libMLIR to libMLIR" (#123910)
Use `mlir_target_link_libraries()` to link dependencies of libraries
that are not included in libMLIR, to ensure that they link to the dylib
when they are used in Flang. Otherwise, they implicitly pull in all
their static dependencies, effectively causing Flang binaries to
simultaneously link to the dylib and to static libraries, which is never
a good idea.
I have only covered the libraries that are used by Flang. If you wish, I
can extend this approach to all non-libMLIR libraries in MLIR, making
MLIR itself also link to the dylib consistently.
[v3 with more `-DBUILD_SHARED_LIBS=ON` fixes]
Commit: 7bb949ec612ff19bb4bfbc6a591b928d6d4ee475
https://github.com/llvm/llvm-project/commit/7bb949ec612ff19bb4bfbc6a591b928d6d4ee475
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/IndirectionUtilsTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/ConstantsTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[IR][unittests] Replace of PointerType::getUnqual(Type) with opaque version (NFC) (#123901)
Follow up to https://github.com/llvm/llvm-project/issues/123569
Commit: 76672e3349bbc7bc58b0ae93d5cc994f3e16971a
https://github.com/llvm/llvm-project/commit/76672e3349bbc7bc58b0ae93d5cc994f3e16971a
Author: Karthika Devi C <quic_kartc at quicinc.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M polly/include/polly/CodeGen/IRBuilder.h
M polly/lib/CodeGen/IRBuilder.cpp
M polly/lib/CodeGen/LoopGenerators.cpp
A polly/test/CodeGen/Metadata/basic_vec_annotate.ll
Log Message:
-----------
[Polly] Add vectorize metadata to loops identified as vectorizable by polly (#113994)
This patch introduces the initial implementation for annotating loops
created by Polly. Polly generates RunTimeChecks (RTCs), which result in
loop versioning. Specifically, the loop created by Polly is executed
when the RTCs pass, otherwise, the original loop is executed.
This patch adds the "llvm.loop.vectorize.enable" metadata, setting it to
true for loops created by Polly. Disabling vectorization for the original
fallback loop is already merged in #119188.
This behavior is controlled by the 'polly-annotate-metadata-vectorize'
flag, and the annotations are applied only when this flag is enabled.
This flag is set to false by default.
NOTE: This commit is initial patch in effort to make polly interact with
Loop Vectorizer via metadata.
---------
Co-authored-by: Michael Kruse <github at meinersbur.de>
Commit: 4df6d3df24ae9cff07c70c96a1663cbba6e1dca5
https://github.com/llvm/llvm-project/commit/4df6d3df24ae9cff07c70c96a1663cbba6e1dca5
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
M llvm/test/CodeGen/AArch64/implicit-def-subreg-to-reg-regression.ll
M llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
A llvm/test/CodeGen/AArch64/reduced-coalescer-issue.ll
A llvm/test/CodeGen/AArch64/register-coalesce-implicit-def-subreg-to-reg.mir
M llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/combine-fneg.ll
M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
M llvm/test/CodeGen/PowerPC/frem.ll
M llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
M llvm/test/CodeGen/PowerPC/ldexp.ll
M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
A llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness.ll
M llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
A llvm/test/CodeGen/X86/coalescing-subreg-to-reg-requires-subrange-update.mir
A llvm/test/CodeGen/X86/pr76416.ll
M llvm/test/CodeGen/X86/subreg-fail.mir
A llvm/test/CodeGen/X86/subreg-to-reg-coalescing.mir
M llvm/test/CodeGen/X86/vector-compress.ll
Log Message:
-----------
Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)
This PR aims to reland work done by @arsenm which was previously
reverted due to some tangentially related scheduler issues as discussed
on #76416.
This PR cherry-picks the original commit (0e46b49de433), and adds
another patch on top with the following changes:
* The code in `updateRegDefsUses` now updates subranges when
subreg-liveness-tracking is enabled.
* When adding an implicit-def operand for the super-register,
the code in `reMaterializeTrivialDef` which tries to remove
undefined subranges should now take into account that the lanes
from the super-reg are no longer undefined.
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Commit: 6e1ea7e5a7b6e581bf9a030b98a7f63ee2833278
https://github.com/llvm/llvm-project/commit/6e1ea7e5a7b6e581bf9a030b98a7f63ee2833278
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/test/CodeGen/AArch64/outlining-with-streaming-mode-changes.ll
M llvm/test/CodeGen/AArch64/sme-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/sme-darwin-sve-vg.ll
M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
M llvm/test/CodeGen/AArch64/sme-lazy-save-call.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sme-streaming-body-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-body.ll
M llvm/test/CodeGen/AArch64/sme-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-mode-changing-call-disable-stackslot-scavenging.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
A llvm/test/CodeGen/AArch64/stack-hazard-defaults.ll
M llvm/test/CodeGen/AArch64/streaming-compatible-memory-ops.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
Log Message:
-----------
[AArch64] Set the default streaming hazard size to 1024 for +sme,+sve (#123753)
The default for all other feature combinations remains at zero (i.e. no
streaming hazards). This value may be adjusted in the future (e.g. based
on the processor family), for now, it is set conservatively.
Commit: d064d3fc2cf8841963151f428988475aab09ff56
https://github.com/llvm/llvm-project/commit/d064d3fc2cf8841963151f428988475aab09ff56
Author: Sylvestre Ledru <sylvestre at debian.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/Xtensa.td
R llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
M llvm/lib/Target/Xtensa/XtensaUtils.cpp
M llvm/lib/Target/Xtensa/XtensaUtils.h
R llvm/test/MC/Disassembler/Xtensa/windowed.txt
R llvm/test/MC/Disassembler/Xtensa/windowed_code_density.txt
R llvm/test/MC/Xtensa/windowed.s
R llvm/test/MC/Xtensa/windowed_code_density.s
R llvm/test/MC/Xtensa/windowed_invalid.s
Log Message:
-----------
Revert "[Xtensa] Implement Windowed Register Option." (#123913)
Reverts llvm/llvm-project#121118
for causing #123817
Commit: 937cbce14c9aa956342a9c818c26a8a557802843
https://github.com/llvm/llvm-project/commit/937cbce14c9aa956342a9c818c26a8a557802843
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/OpenMP/associate.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/critical.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/hlfir-wsloop.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/location.f90
M flang/test/Lower/OpenMP/order-clause.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
M flang/test/Lower/OpenMP/same_var_first_lastprivate.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-chunks.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-monotonic.f90
M flang/test/Lower/OpenMP/wsloop-nonmonotonic.f90
M flang/test/Lower/OpenMP/wsloop-ordered.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-2-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multi.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/OpenMP/wsloop-schedule.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/OpenMP/wsloop.f90
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
R mlir/test/Target/LLVMIR/openmp-wsloop-private-late-alloca-workaround.mlir
Log Message:
-----------
Revert "[flang][OpenMP] Enable delayed privatization by default `omp.wsloop` (#122471)" (#123324)
This seems to have caused some regressions in Fujitsu's test-suite:
https://linaro.atlassian.net/browse/LLVM-1521
This reverts commit 6f82408bb53f57a859953d8f1114f1634a5d3ee9.
Commit: 70f8040f099368b2e10f9b12d7f7fdee35c24cee
https://github.com/llvm/llvm-project/commit/70f8040f099368b2e10f9b12d7f7fdee35c24cee
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
Log Message:
-----------
[LoongArch] Simplify some Args.getLastArg() calls with AddTargetFeature(). NFC
Commit: 9178708c3bf926fe0d7767e26344f3f98b1e92ec
https://github.com/llvm/llvm-project/commit/9178708c3bf926fe0d7767e26344f3f98b1e92ec
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
A lld/test/ELF/aarch64-tlsdesc-pauth.s
Log Message:
-----------
[PAC][lld][AArch64][ELF] Support signed TLSDESC (#113817)
Depends on #120010
Support `R_AARCH64_AUTH_TLSDESC_ADR_PAGE21`, `R_AARCH64_AUTH_TLSDESC_LD64_LO12`
and `R_AARCH64_AUTH_TLSDESC_LD64_LO12` static relocations and
`R_AARCH64_AUTH_TLSDESC` dynamic relocation. IE/LE optimization is not
currently supported for AUTH TLSDESC.
Commit: 2ee36d40f0e717dc005fde19aa62f1acaaa04528
https://github.com/llvm/llvm-project/commit/2ee36d40f0e717dc005fde19aa62f1acaaa04528
Author: Yi Kong <yikong at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] Fix sendmmsg and recvmmsg rtsan interceptor for MUSL (#123907)
MUSL have different signatures for sendmmsg and recvmmsg.
This fixes build breakage from #123484.
Commit: 23fd8f6f263d14d43fd4b2a599652beaadc9920e
https://github.com/llvm/llvm-project/commit/23fd8f6f263d14d43fd4b2a599652beaadc9920e
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
Log Message:
-----------
[lldb][DWARFASTParserClang][NFCI] Simplify ParseChildParameters (#123790)
This patch refactors `ParseChildParameters` in a way which makes it (in
my opinion) more readable, removing some redundant local variables in
the process and reduces the scope of some variables.
**Motivation**
Since `DW_AT_object_pointer`s are now attached to declarations, we can
test for their existence to check whether a C++ method is static or not
(whereas currently we're deducing this from `ParseChildParameters` based
on some heuristics we know are true for most compilers). So my plan is
to move the code for determining `type_quals` and `is_static` out of
`ParseChildParameters`. The refactoring in this PR will make this
follow-up patch hopefully easier to review.
**Testing**
* This should be NFC. The main change is that we now no longer iterate
over `GetAttributes()` but instead retrieve the name, type and
is_artificial attributes of the parameters individually.
Commit: 5f40570714b355a0ce10ef3e137dc0dc540611d6
https://github.com/llvm/llvm-project/commit/5f40570714b355a0ce10ef3e137dc0dc540611d6
Author: bernhardu <bernhardu at mailbox.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Support some more 5 byte instructions. (#123844)
This patch adds several instructions seen when trying to run a
executable built with ASan with llvm-mingw.
(x86 and x86_64, using the git tip in llvm-project).
Also includes instructions collected by
Roman Pišl and Eric Pouech in the Wine bug reports below.
```
Related: https://github.com/llvm/llvm-project/issues/96270
Co-authored-by: Roman Pišl <rpisl at seznam.cz>
https://bugs.winehq.org/show_bug.cgi?id=50993
https://bugs.winehq.org/attachment.cgi?id=70233
Co-authored-by: Eric Pouech <eric.pouech at gmail.com>
https://bugs.winehq.org/show_bug.cgi?id=52386
https://bugs.winehq.org/attachment.cgi?id=71626
```
Commit: a343b8e595d56bde91800aeaa7826cbed4e0a18d
https://github.com/llvm/llvm-project/commit/a343b8e595d56bde91800aeaa7826cbed4e0a18d
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
A llvm/lib/Target/AMDGPU/SILowerWWMCopies.h
A llvm/test/CodeGen/AMDGPU/si-lower-wwm-copies.mir
Log Message:
-----------
[AMDGPU][NewPM] Port SILowerWWMCopies to NPM (#123695)
Commit: d2e510360fc9b17a3ad536582f076795c4c37634
https://github.com/llvm/llvm-project/commit/d2e510360fc9b17a3ad536582f076795c4c37634
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaLookup.cpp
A clang/test/Modules/visibility-for-implicit-global-module.cppm
Log Message:
-----------
[C++20] [Modules] Correct the visibility of decls in implicit global module of other units in the same TU
See the test for the case. It is similar with
https://github.com/llvm/llvm-project/commit/baa5b769f2f76baa0ce1ebfe28236dee2c761f0d
Commit: 0d24130008c61296f6ef80da172f7c6d47337357
https://github.com/llvm/llvm-project/commit/0d24130008c61296f6ef80da172f7c6d47337357
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[llvm][Docs] Add lldb user expressions related release notes (#123772)
Commit: 56592a81084e9b504dbff9a50c1a604cad7f2416
https://github.com/llvm/llvm-project/commit/56592a81084e9b504dbff9a50c1a604cad7f2416
Author: bernhardu <bernhardu at mailbox.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Support some more 4 byte instructions. (#123709)
This patch adds several instructions seen when trying to run a
executable built with ASan with llvm-mingw.
(x86 and x86_64, using the git tip in llvm-project).
Also includes instructions collected by
Roman Pišl and Eric Pouech in the Wine bug reports below.
```
Related: https://github.com/llvm/llvm-project/issues/96270
Co-authored-by: Roman Pišl <rpisl at seznam.cz>
https://bugs.winehq.org/show_bug.cgi?id=50993
https://bugs.winehq.org/attachment.cgi?id=70233
Co-authored-by: Eric Pouech <eric.pouech at gmail.com>
https://bugs.winehq.org/show_bug.cgi?id=52386
https://bugs.winehq.org/attachment.cgi?id=71626
```
Commit: 2b0e2255d6067872e844ff07d67342a6c97d8049
https://github.com/llvm/llvm-project/commit/2b0e2255d6067872e844ff07d67342a6c97d8049
Author: Petr Polezhaev <petr.polezhaev at ratigorsk-12.ru>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.h
M clang-tools-extra/clangd/ProjectModules.h
M clang-tools-extra/clangd/ScanningProjectModules.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] Support .clangd command line modifications for C++ modules (#122606)
Tunnels `Manger` object into the `ScanningAllProjectModules` so it can
be used to perform necessary command-line modifications (which also adds
`--resources` path previously added there explicitly). This allows using
the experimental C++ modules support with gcc.
This was discussed in the issue with @ChuanqiXu9 and @kadircet
Closes #112635
Commit: dedf014901cecd7ba3bbc1aadb17098a5a95b8a7
https://github.com/llvm/llvm-project/commit/dedf014901cecd7ba3bbc1aadb17098a5a95b8a7
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
A llvm/test/CodeGen/LoongArch/lasx/scalar-to-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
A llvm/test/CodeGen/LoongArch/lsx/scalar-to-vector.ll
M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
Log Message:
-----------
[LoongArch] lower SCALAR_TO_VECTOR to INSERT_VECTOR_ELT (#122863)
```llvm
define <16 x i8> @scalar_to_16xi8(i8 %val) {
%ret = insertelement <16 x i8> undef, i8 %val, i32 0
ret <16 x i8> %ret
}
```
before
```asm
addi.d $sp, $sp, -16
st.b $a0, $sp, 0
vld $vr0, $sp, 0
addi.d $sp, $sp, 16
ret
```
after
```asm
vinsgr2vr.b $vr0, $a0, 0
ret
```
---------
Co-authored-by: Lu Weining <luweining at loongson.cn>
Commit: ef37c3dd038da7b7b208b9464f2176ad3988f6f5
https://github.com/llvm/llvm-project/commit/ef37c3dd038da7b7b208b9464f2176ad3988f6f5
Author: Alexey Merzlyakov <60094858+AlexeyMerzlyakov at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[llvm][Docs] Release note for LLDB optionally disabled regsets for RV64 (#123363)
This PR adds the release note point for LLDB 20, discussed in
https://github.com/llvm/llvm-project/pull/104547#issuecomment-2587479877
for the same ticket
---------
Co-authored-by: David Spickett <david.spickett at linaro.org>
Commit: 9e0b2b68c2246332fc6035ee70d48a651c2dd6ca
https://github.com/llvm/llvm-project/commit/9e0b2b68c2246332fc6035ee70d48a651c2dd6ca
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libclc/clc/include/clc/clcmacro.h
M libclc/generic/lib/math/acos.cl
M libclc/generic/lib/math/acosh.cl
M libclc/generic/lib/math/acospi.cl
M libclc/generic/lib/math/asinh.cl
M libclc/generic/lib/math/atan.cl
M libclc/generic/lib/math/atan2.cl
M libclc/generic/lib/math/atan2pi.cl
M libclc/generic/lib/math/atanh.cl
M libclc/generic/lib/math/atanpi.cl
M libclc/generic/lib/math/cbrt.cl
M libclc/generic/lib/math/cos.cl
M libclc/generic/lib/math/cosh.cl
M libclc/generic/lib/math/cospi.cl
M libclc/generic/lib/math/exp.cl
M libclc/generic/lib/math/expm1.cl
M libclc/generic/lib/math/lgamma.cl
M libclc/generic/lib/math/log1p.cl
M libclc/generic/lib/math/logb.cl
M libclc/generic/lib/math/sin.cl
M libclc/generic/lib/math/sinh.cl
M libclc/generic/lib/math/sinpi.cl
M libclc/generic/lib/math/tanh.cl
Log Message:
-----------
[libclc] Don't rely on fp16 pragma guards in headers (#122751)
Having the fp16 pragmas enabled in the header file is risky. The macros
defined by that header don't (and can't) include the pragmas that make
fp16 types themselves legal, and another header may disable the fp16
pragma before the macro's use.
The safest thing to do is the use of pragmas surrounding each use of the
macro in the implementation files. This pattern is also far more common
across the codebase.
Commit: 28c819cf8c9fb67712225d7f57bdf923f2da5de2
https://github.com/llvm/llvm-project/commit/28c819cf8c9fb67712225d7f57bdf923f2da5de2
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/test/AST/ByteCode/cxx2a.cpp
Log Message:
-----------
[Clang] Fix tests broken by 0a9c08c
Commit: 4a2ebd6661cf1c929c280e863e4299164800413e
https://github.com/llvm/llvm-project/commit/4a2ebd6661cf1c929c280e863e4299164800413e
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
Log Message:
-----------
[LV][NFC] Refactor structures used to maintain uncountable exit info (#123219)
I've removed the HasUncountableEarlyExit variable, since we can
already determine whether or not a loop has an early exit by seeing
if we found an uncountable exit.
I have also deleted the old UncountableExitingBlocks and
UncountableExitBlocks lists and replaced them with a single
uncountable edge. This means we don't need to worry about keeping the
list entries in sync and makes it clear which exiting block
corresponds to which exit block.
Commit: 0165d043a9d62197468e0d4f7578cd7a5e4084f8
https://github.com/llvm/llvm-project/commit/0165d043a9d62197468e0d4f7578cd7a5e4084f8
Author: Xeonacid <h.dwwwwww at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/HIPUtility.cpp
Log Message:
-----------
[HIP] [NFC] Rename to `ClangArgs`
#112041 replaced `llvm-mc` with `clang`.
The args are now feeding to clang.
Commit: 6123a81b478fe9611b49169b274dfa167ab41931
https://github.com/llvm/llvm-project/commit/6123a81b478fe9611b49169b274dfa167ab41931
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] Fix process_vm_readv/process_vm_writev signatures. (#123914)
missing pid_t first argument. Fix #123839
Commit: 974f678d31969cf83a5b2828cc63120734ac82f3
https://github.com/llvm/llvm-project/commit/974f678d31969cf83a5b2828cc63120734ac82f3
Author: Xeonacid <h.dwwwwww at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/HIPUtility.cpp
Log Message:
-----------
[HIP] [NFC] Rename to ClangArgs (really)
Fixes 0165d04
Commit: 6b1db79887df19bc8e8c946108966aa6021c8b87
https://github.com/llvm/llvm-project/commit/6b1db79887df19bc8e8c946108966aa6021c8b87
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
M llvm/test/CodeGen/AArch64/implicit-def-subreg-to-reg-regression.ll
M llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
R llvm/test/CodeGen/AArch64/reduced-coalescer-issue.ll
R llvm/test/CodeGen/AArch64/register-coalesce-implicit-def-subreg-to-reg.mir
M llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/combine-fneg.ll
M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
M llvm/test/CodeGen/PowerPC/frem.ll
M llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
M llvm/test/CodeGen/PowerPC/ldexp.ll
M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
R llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness.ll
M llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
R llvm/test/CodeGen/X86/coalescing-subreg-to-reg-requires-subrange-update.mir
R llvm/test/CodeGen/X86/pr76416.ll
M llvm/test/CodeGen/X86/subreg-fail.mir
R llvm/test/CodeGen/X86/subreg-to-reg-coalescing.mir
M llvm/test/CodeGen/X86/vector-compress.ll
Log Message:
-----------
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)"
There's a regression with one of the bootstrap builds for x86.
I'll revert this while I investigate.
This reverts commit 4df6d3df24ae9cff07c70c96a1663cbba6e1dca5.
Commit: c745ece25460824ab85055e6015026642c565800
https://github.com/llvm/llvm-project/commit/c745ece25460824ab85055e6015026642c565800
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] page regions api interception update. (#123601)
madvise/mprotect/msync/mincore calls with care for signature difference
for the latter.
Commit: 099fd018d1b04013ef46c0e26ed008585ab8bcbb
https://github.com/llvm/llvm-project/commit/099fd018d1b04013ef46c0e26ed008585ab8bcbb
Author: Tejas Vipin <108227905+meltq at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
Log Message:
-----------
[mlir][Vector] Remove Vector{Load|Store}ToMemrefLoadLowering (#121454)
0-d vectors are supported now and so these patterns are no longer
required. This covers a part of this issue
https://github.com/llvm/llvm-project/issues/112913 . Additionally this
removes %arg2 in mlir/test/Conversion/GPUCommon/transfer_write.mlir and
renames %arg3 to %arg2 as %arg2 was originally not required.
Commit: 1a1dbac5bc4eab4239b365c1b296e2729031a62e
https://github.com/llvm/llvm-project/commit/1a1dbac5bc4eab4239b365c1b296e2729031a62e
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps4-sdk-root.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/ps5-sdk-root.c
Log Message:
-----------
[PS4/PS5][Driver] Observe <sysroot>/target/lib for libraries (#123350)
On PS5, if a custom --sysroot is supplied, `<sysroot>/target/lib` should
be added to the library search paths (this already occurs if the default
`--sysroot` is not overridden). Until now, this has been hardcoded as a
downstream patch in lld. Add it to the driver so that the private patch
can be removed.
On PS4 the library search paths remain unchanged. The proprietary linker
will continue to handle this aspect.
On either platform, warn if `<sysroot>/target/lib` is absent.
Previously, such warnings were emitted only when the default --sysroot
was not overridden.
SIE tracker: TOOLCHAIN-16704
Commit: 58be6fd1b4f6f0697148edda63e30ec0f74d412a
https://github.com/llvm/llvm-project/commit/58be6fd1b4f6f0697148edda63e30ec0f74d412a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/fixup-bw-inst.ll
Log Message:
-----------
[X86] fixup-bw-inst.ll - regenerate test checks to simplify diff for #123787
Commit: c4ef805b0bda16f734276086b0984583c2e21db6
https://github.com/llvm/llvm-project/commit/c4ef805b0bda16f734276086b0984583c2e21db6
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/Expr.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/atomic-test-and-set.c
M clang/test/Sema/atomic-ops.c
Log Message:
-----------
[Clang] Re-write codegen for atomic_test_and_set and atomic_clear (#121943)
Re-write the sema and codegen for the atomic_test_and_set and
atomic_clear builtin functions to go via AtomicExpr, like the other
atomic builtins do. This simplifies the code, because AtomicExpr already
handles things like generating code for to dynamically select the memory
ordering, which was duplicated for these builtins. This also fixes a few
crash bugs, one when passing an integer to the pointer argument, and one
when using an array.
This also adds diagnostics for the memory orderings which are not valid
for atomic_clear according to
https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-Builtins.html, which
were missing before.
Fixes https://github.com/llvm/llvm-project/issues/111293.
This is a re-land of #120449, modified to allow any non-const pointer
type for the first argument.
Commit: ffde2687be1fcb92c0c686aee441b83e71531457
https://github.com/llvm/llvm-project/commit/ffde2687be1fcb92c0c686aee441b83e71531457
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/builtins/arm/adddf3vfp.S
M compiler-rt/lib/builtins/arm/aeabi_dcmp.S
M compiler-rt/lib/builtins/arm/divdf3vfp.S
M compiler-rt/lib/builtins/arm/eqdf2vfp.S
M compiler-rt/lib/builtins/arm/extendsfdf2vfp.S
M compiler-rt/lib/builtins/arm/fixdfsivfp.S
M compiler-rt/lib/builtins/arm/fixunsdfsivfp.S
M compiler-rt/lib/builtins/arm/floatsidfvfp.S
M compiler-rt/lib/builtins/arm/floatunssidfvfp.S
M compiler-rt/lib/builtins/arm/gedf2vfp.S
M compiler-rt/lib/builtins/arm/gtdf2vfp.S
M compiler-rt/lib/builtins/arm/ledf2vfp.S
M compiler-rt/lib/builtins/arm/ltdf2vfp.S
M compiler-rt/lib/builtins/arm/muldf3vfp.S
M compiler-rt/lib/builtins/arm/nedf2vfp.S
M compiler-rt/lib/builtins/arm/subdf3vfp.S
M compiler-rt/lib/builtins/arm/truncdfsf2vfp.S
M compiler-rt/lib/builtins/arm/unorddf2vfp.S
M compiler-rt/lib/builtins/assembly.h
Log Message:
-----------
[compiler-rt] Make Arm builtins aware of endianness in VMOVs (#123204)
This patch makes Arm builtins aware of endianness in VMOVs.
Before this patch, the functions' definitions assumed little endian,
which made any program compiled for big endian incorrect.
Commit: b7423e94be572bac58b75d7b5e8dc502e9db7fcf
https://github.com/llvm/llvm-project/commit/b7423e94be572bac58b75d7b5e8dc502e9db7fcf
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Log Message:
-----------
[AMDGPU] Remove .i32 suffix from comments documenting intrinsics (#123919)
These intrinsics are overloaded. The documentation should not single out
the i32 overload.
Commit: d03fab1be38508f2a732330242a14744e4907ff9
https://github.com/llvm/llvm-project/commit/d03fab1be38508f2a732330242a14744e4907ff9
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
A llvm/test/tools/llvm-mca/RISCV/SiFive7/jump.s
Log Message:
-----------
[RISCV] Add precommit test for #123882
Add MCA test for jump instructions.
Commit: 9d676e2cb6a62b7dd4ee7d530e847dea8c185280
https://github.com/llvm/llvm-project/commit/9d676e2cb6a62b7dd4ee7d530e847dea8c185280
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/test/tools/llvm-mca/RISCV/SiFive7/jump.s
Log Message:
-----------
[MCA] Use MCInstrAnalysis to analyse call/return instructions (#123882)
The flag set in `MCInstrDesc` is not accurate and we should use
the result of `MCInstrAnalysis`.
Commit: 97c3a990f05606cb807faf53bc41302fb62c7980
https://github.com/llvm/llvm-project/commit/97c3a990f05606cb807faf53bc41302fb62c7980
Author: Sergey Kozub <skozub at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/Cuda.h
M clang/lib/Basic/Cuda.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
Log Message:
-----------
Remove incorrect CUDA defines (#123898)
Remove CUDA_127 and CUDA_129 defines incorrectly added in
https://github.com/llvm/llvm-project/pull/123398
Commit: c6c647588f911770170d2f7975b325f3d70cf89b
https://github.com/llvm/llvm-project/commit/c6c647588f911770170d2f7975b325f3d70cf89b
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
Log Message:
-----------
[SLP][NFC] Update test for PR #118055 (#122696)
This patch updates the motivating test for the above PR so that it does
not conflict with urem PR #122236
Commit: fbd86d05fe51d45f19df8d63aee41d979c268f8f
https://github.com/llvm/llvm-project/commit/fbd86d05fe51d45f19df8d63aee41d979c268f8f
Author: Clement Courbet <courbet at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
M clang-tools-extra/clang-tidy/utils/LexerUtils.cpp
M clang-tools-extra/test/clang-reorder-fields/Comments.cpp
M clang/include/clang/Lex/Lexer.h
M clang/lib/Lex/Lexer.cpp
M clang/unittests/Lex/LexerTest.cpp
Log Message:
-----------
[clang-reorder-fields] Reorder leading comments (#123740)
Similarly to https://github.com/llvm/llvm-project/pull/122918, leading
comments are currently not being moved.
```
struct Foo {
// This one is the cool field.
int a;
int b;
};
```
becomes:
```
struct Foo {
// This one is the cool field.
int b;
int a;
};
```
but should be:
```
struct Foo {
int b;
// This one is the cool field.
int a;
};
```
Commit: 5136c6d9d207b72135c92567e58e5cdbb86efc09
https://github.com/llvm/llvm-project/commit/5136c6d9d207b72135c92567e58e5cdbb86efc09
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/docs/Docker.rst
M llvm/utils/docker/build_docker_image.sh
R llvm/utils/docker/debian10/Dockerfile
A llvm/utils/docker/debian12/Dockerfile
M llvm/utils/docker/example/Dockerfile
M llvm/utils/docker/nvidia-cuda/Dockerfile
M llvm/utils/docker/scripts/checkout.sh
Log Message:
-----------
[Tools][Docker] Update Dockerfiles and Docker guide (#123841)
Fixes #123669
- Update Dockerfiles to work with the LLVM trunk
- Adapt Documentation accordingly
- Fix duplicate `-c` flag
Commit: bd56950b9cd5b6b07e1ccb9b02c5d8a7125a23b6
https://github.com/llvm/llvm-project/commit/bd56950b9cd5b6b07e1ccb9b02c5d8a7125a23b6
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
Log Message:
-----------
[clang] Refine the temporay object member access filtering for GSL pointer (#122088)
We currently have ad-hoc filtering logic for temporary object member
access in `VisitGSLPointerArg`. This logic filters out more cases than
it should, leading to false negatives. Furthermore, this location lacks
sufficient context to implement a more accurate solution.
This patch refines the filtering logic by moving it to the central
filtering location, `analyzePathForGSLPointer`, consolidating the logic
and avoiding scattered filtering across multiple places. As a result,
the special handling for conditional operators (#120233) is no longer
necessary.
This change also resolves #120543.
Commit: 729f958c4f7548c2d5be5f024b7254cd3ea25c64
https://github.com/llvm/llvm-project/commit/729f958c4f7548c2d5be5f024b7254cd3ea25c64
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
R mlir/test/Dialect/Tosa/broadcast.mlir
M mlir/test/Dialect/Tosa/constant_folding.mlir
M mlir/test/Dialect/Tosa/inlining.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[TOSA] Add SameOperandsAndResultRank to TOSA Ops (#104501)
[note: this is blocked by:
https://github.com/tensorflow/tensorflow/pull/73891 otherwise tensorflow
may have lit test failures]
This patch adds SameOperandsAndResultRank trait to TOSA operators with
ResultsBroadcastableShape trait. SameOperandsAndResultRank trait
requiring that all operands and results have matching ranks unless the
operand/result is unranked.
This also renders the TosaMakeBroadcastable pass unnecessary - but this
pass is left in for now just in case it is still used in some flows. The
lit test, broadcast.mlir, is removed.
This also adds verify of the SameOperandsAndResultRank trait in the
TosaInferShapes pass to validate inferred shapes.
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 7986e0cad10f3bf9efbbe31110ece68af5cb8751
https://github.com/llvm/llvm-project/commit/7986e0cad10f3bf9efbbe31110ece68af5cb8751
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[TOSA] bug fix infer shape for slice (#113497)
This fixes the infer output shape of TOSA slice op for start/size values
that are out-of-bound or -1
added tests to check:
- size = -1
- size is out of bound
- start is out of bound
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: ff0f1dd341cb2fdc1281a14413b3aa93bf9a20c7
https://github.com/llvm/llvm-project/commit/ff0f1dd341cb2fdc1281a14413b3aa93bf9a20c7
Author: Peter Hawkins <phawkins at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/python/mlir/dialects/_ods_common.py
Log Message:
-----------
[mlir:python] Small optimization to get_op_result_or_results. (#123866)
* We can call .results without figuring out whether we have an Operation
or an OpView, and that's likely the common case anyway.
* If we have one or more results, we can return them directly, with no
need for a call to get_op_result_or_value. We're guaranteed that
.results returns a PyOpResultList, so we have either an OpResult or
sequence of OpResults, just as the API expects.
This saves a few 100ms during IR construction in an LLM JAX benchmark.
Commit: 43177b524ee06dfc09cbc357ff277d4f53f5dc15
https://github.com/llvm/llvm-project/commit/43177b524ee06dfc09cbc357ff277d4f53f5dc15
Author: lialan <me at alanli.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
Log Message:
-----------
[GISel] Add more FP opcodes to CSE (#123624)
This fixes #122724
Commit: f4125e0226e03295f73c4b2dd9cfa540d872d162
https://github.com/llvm/llvm-project/commit/f4125e0226e03295f73c4b2dd9cfa540d872d162
Author: Peter Hawkins <phawkins at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
Log Message:
-----------
[mlir python] Change PyOpView constructor to construct operations. (#123777)
Previously ODS-generated Python operations had code like this:
```
super().__init__(self.build_generic(attributes=attributes, operands=operands, successors=_ods_successors, regions=regions, loc=loc, ip=ip))
```
we change it to:
```
super().__init__(self.OPERATION_NAME, self._ODS_REGIONS, self._ODS_OPERAND_SEGMENTS, self._ODS_RESULT_SEGMENTS, attributes=attributes, operands=operands, successors=_ods_successors, regions=regions, loc=loc, ip=ip)
```
This:
a) avoids an extra call dispatch (to `build_generic`), and
b) passes the class attributes directly to the constructor. Benchmarks
show that it is faster to pass these as arguments rather than having the
C++ code look up attributes on the class.
This PR improves the timing of the following benchmark on my workstation
from 5.3s to 4.5s:
```
def main(_):
with ir.Context(), ir.Location.unknown():
typ = ir.IntegerType.get_signless(32)
m = ir.Module.create()
with ir.InsertionPoint(m.body):
start = time.time()
for i in range(1000000):
arith.ConstantOp(typ, i)
end = time.time()
print(f"time: {end - start}")
```
Since this change adds an additional overload to the constructor and
does not alter any existing behaviors, it should be backwards
compatible.
Commit: d7fb4a275c98f4035d1083b5eb3edd2ffb2da00e
https://github.com/llvm/llvm-project/commit/d7fb4a275c98f4035d1083b5eb3edd2ffb2da00e
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/MC/MCELFStreamer.h
A llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/lib/MC/MCELFStreamer.cpp
A llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[LLVM][Clang][AArch64] Implement AArch64 build attributes (#118771)
- Added support for AArch64-specific build attributes.
- Print AArch64 build attributes to assembly.
- Parse AArch64 build attributes from assembly.
- Emit AArch64 build attributes to ELF.
Specification:
https://github.com/ARM-software/abi-aa/pull/230
Commit: e30b703060bb6741fb5e5e05e6b37802bc29b4ce
https://github.com/llvm/llvm-project/commit/e30b703060bb6741fb5e5e05e6b37802bc29b4ce
Author: Peter Hawkins <phawkins at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
Log Message:
-----------
[mlir:python] Construct PyOperation objects in-place on the Python heap. (#123813)
Currently we make two memory allocations for each PyOperation: a Python
object, and the PyOperation class itself. With some care we can allocate
the PyOperation inline inside the Python object, saving us a malloc()
call per object and perhaps improving cache locality.
Commit: d80eb928c78ab3f3a3320014b2b7d513642b1a7e
https://github.com/llvm/llvm-project/commit/d80eb928c78ab3f3a3320014b2b7d513642b1a7e
Author: Yeaseen <yeaseen.arafat96 at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/Transforms/ADCE/2017-08-21-DomTree-deletions.ll
M llvm/test/Transforms/ADCE/preserve-memoryssa-if-only-remove-debug.ll
M llvm/test/Transforms/AddDiscriminators/inlined.ll
M llvm/test/Transforms/AddDiscriminators/invoke.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/combine_ignore_debug.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_unreachable_bb.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_vector_instrs.ll
M llvm/test/Transforms/AlignmentFromAssumptions/simple.ll
M llvm/test/Transforms/AlignmentFromAssumptions/simple32.ll
M llvm/test/Transforms/ArgumentPromotion/crash.ll
M llvm/test/Transforms/ArgumentPromotion/min-legal-vector-width.ll
M llvm/test/Transforms/ArgumentPromotion/pr32917.ll
Log Message:
-----------
[llvm] Remove `undef` from `llvm/test/Transforms` tests (#123889)
This PR replaces some instances of `undef` with `function argument
value` or `poison` or `concrete values` in several tests under
`llvm/test/Transforms/` directory. These changes align with modern LLVM
standards for better-defined behavior and test determinism. If this
small PR is okay and gets merged, I will work on the rest.
This is inspired by [this
project](https://discourse.llvm.org/t/gsoc-2024-remove-undefined-behavior-from-tests/77236/29),
work done on this by @leewei05
Commit: ccd77953d0f1e367d268df89e7cc1c663c475ba7
https://github.com/llvm/llvm-project/commit/ccd77953d0f1e367d268df89e7cc1c663c475ba7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/alternate-vectorization-split-node.ll
Log Message:
-----------
[SLP][NFC]Add a test with potential alternate node, marked for minbitwidth size
Commit: 4f40b07533eabceeaf56fb89d27b020c6f7aae7e
https://github.com/llvm/llvm-project/commit/4f40b07533eabceeaf56fb89d27b020c6f7aae7e
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/Headers/avx10_2_512satcvtintrin.h
M clang/lib/Headers/avx10_2satcvtintrin.h
M clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
M clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
M llvm/test/MC/X86/avx10.2satcvt-32-att.s
M llvm/test/MC/X86/avx10.2satcvt-32-intel.s
M llvm/test/MC/X86/avx10.2satcvt-64-att.s
M llvm/test/MC/X86/avx10.2satcvt-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2-SATCVT][NFC] Remove NE from intrinsic and instruction name (#123275)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: 1df50e6245cbc04f3b28de3c40127ad61d46b43b
https://github.com/llvm/llvm-project/commit/1df50e6245cbc04f3b28de3c40127ad61d46b43b
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Don't link with --build-id when -static (#123930)
Users of the PlayStation SDK aren't given the means to create or run
static executables. Uses of `-static` are limited a few specialized
cases within SIE. A `--build-id` isn't wanted in those cases.
SIE tracker: TOOLCHAIN-16704
Commit: a2063ba7ffdbbb4faf5da5f32739ab761c2e4289
https://github.com/llvm/llvm-project/commit/a2063ba7ffdbbb4faf5da5f32739ab761c2e4289
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
Log Message:
-----------
[clangd][NFC] Delete a pessimizing move
Commit: a7a8694c5a23c04322f22bf8ce5685cb4b1dddc3
https://github.com/llvm/llvm-project/commit/a7a8694c5a23c04322f22bf8ce5685cb4b1dddc3
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
Log Message:
-----------
Remove references to mips within Android (#123856)
Commit: 70a16b90ff391ff82ef54d4ae6ffcb5eb50162a0
https://github.com/llvm/llvm-project/commit/70a16b90ff391ff82ef54d4ae6ffcb5eb50162a0
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/Driver/linker-wrapper-image.c
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
Log Message:
-----------
[HIP] Support managed variables using the new driver (#123437)
Summary:
Previously, managed variables didn't work in rdc mode using the new
driver because we just didn't register them. This was previously ignored
because we didn't have enough space in the current struct format. This
patch amends that by just emitting a struct pair for the two variables
and using the single pointer.
In the future, a more extensible entry format would be nice, but that
can be done later.
Commit: 4170d6123c51e088fde0ce8c11008b442077fa00
https://github.com/llvm/llvm-project/commit/4170d6123c51e088fde0ce8c11008b442077fa00
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
Log Message:
-----------
[gn] port 6aeffcdb9130
Commit: d0a89e71791736d67d5a5d77fce184f106dc3d3e
https://github.com/llvm/llvm-project/commit/d0a89e71791736d67d5a5d77fce184f106dc3d3e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[gn] fix mistake in d7fb4a275c98f
Commit: c938436f7120872d2e2f72272b7adf2913d91783
https://github.com/llvm/llvm-project/commit/c938436f7120872d2e2f72272b7adf2913d91783
Author: Danial Klimkin <dklimkin at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
Log Message:
-----------
Revert "[GISel] Add more FP opcodes to CSE (#123624)" (#123954)
This reverts commit 43177b524ee06dfc09cbc357ff277d4f53f5dc15.
Commit: aa580c2ec5eb4217c945a47a561181be7e7b1032
https://github.com/llvm/llvm-project/commit/aa580c2ec5eb4217c945a47a561181be7e7b1032
Author: qt-tatiana <tatiana.borisova at qt.io>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-integer-sign-comparison.rst
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-integer-sign-comparison-qt.cpp
Log Message:
-----------
[clang-tidy] Add `EnableQtSupport` option to modernize-use-integer-sign-comprison (#122127)
- add an option `EnableQtSupport`, that makes C++17 `q20::cmp_*`
alternative available for Qt-based applications.
Commit: 93d35ad5f53a69606eac0dabb8ceef066ce4d407
https://github.com/llvm/llvm-project/commit/93d35ad5f53a69606eac0dabb8ceef066ce4d407
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
R llvm/test/CodeGen/AMDGPU/power-sched-no-cycle.mir
Log Message:
-----------
AMDGPU: Delete FillMFMAShadowMutation (#123861)
No test changes with this removed and it appears to
be obsolete.
Commit: 6b486f458fe40919577d9249fa754daa913795d1
https://github.com/llvm/llvm-project/commit/6b486f458fe40919577d9249fa754daa913795d1
Author: flopop01 <florin.popa at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Preprocessor/arm-target-features.c
Log Message:
-----------
[Clang][Arch] Disable mve.fp when explicit -mfpu option (#123028)
Commit: b0d35cf22e15be5c62835d689f3c7e301d9f22cd
https://github.com/llvm/llvm-project/commit/b0d35cf22e15be5c62835d689f3c7e301d9f22cd
Author: Joshua Cranmer <joshua.cranmer at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SSAUpdater.h
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
Log Message:
-----------
[SSAUpdater] Avoid scanning basic blocks to find instruction order. (#123803)
This fixes a compile-time regression caused by #116645, where an entry
basic block with a very large number of allocas and other instructions
caused SROA to take ~100× its expected runtime, as every alloca (with ~2
uses) now calls this method to find the order of those few instructions,
rescanning the very large basic block every single time.
Since this code was originally written, Instructions now have ordering
numbers available to determine relative order without unnecessarily
scanning the basic block.
Commit: 58c6d440f8c24ef1532d12e50302e290e1907a87
https://github.com/llvm/llvm-project/commit/58c6d440f8c24ef1532d12e50302e290e1907a87
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/cmake/config-ix.cmake
M llvm/include/llvm/Config/config.h.cmake
M llvm/lib/Support/Unix/DynamicLibrary.inc
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Unix/Signals.inc
M llvm/lib/Support/Unix/Unix.h
M llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/config.h
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
[CMake] Remove HAVE_DLFCN_H and HAVE_DLADDR (#123879)
It is sufficient to just use `HAVE_DLOPEN`.
Commit: 5a9b74d20d5f3b7f92c01d68d28778108dfb1308
https://github.com/llvm/llvm-project/commit/5a9b74d20d5f3b7f92c01d68d28778108dfb1308
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp:309:7: error:
variable 'errs' set but not used [-Werror,-Wunused-but-set-variable]
Commit: 75ce2dc475b12c12419904cd67b9d12b79a66242
https://github.com/llvm/llvm-project/commit/75ce2dc475b12c12419904cd67b9d12b79a66242
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
M llvm/lib/Target/AArch64/AArch64Processors.td
Log Message:
-----------
[llvm][AArch64] apple-m4 does not have FEAT_{SPEv1p2,SEL2,MPAM} (#123827)
This commit addresses some uncertainty raised in 84fa1755a5b7845ddaeaa513a3786013c76c9c88 as to which features Apple M4 has.
Commit: fa6f88af102cb79a0371725b487e929cb0bcfcb2
https://github.com/llvm/llvm-project/commit/fa6f88af102cb79a0371725b487e929cb0bcfcb2
Author: Petr Kurapov <petr.a.kurapov at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
Log Message:
-----------
[MLIR][XeGPU] Allow some nd ops to have argument shapes mismatch for … (#120566)
…the distributed IR case.
This patch allows `nd_load` and `nd_store` to preserve the tensor
descriptor shape during distribution to SIMT. The validation now expects
the distributed instruction to retain the `sg_map` attribute and uses it
to verify the consistency.
Commit: 13d09dfad6d1f6a15721688822ce33b74b44a8d8
https://github.com/llvm/llvm-project/commit/13d09dfad6d1f6a15721688822ce33b74b44a8d8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[X86] Simplify ArrayRef construction. NFC (#123899)
I think the std::begin/end were to work around an old gcc bug. Hopefully
we don't need them anymore.
Commit: 9e6494c0fb29dfb5d4d2b7bf3ed7af261efee034
https://github.com/llvm/llvm-project/commit/9e6494c0fb29dfb5d4d2b7bf3ed7af261efee034
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
Log Message:
-----------
[CodeGen] Rename RegisterMaskPair to VRegMaskOrUnit. NFC (#123799)
This holds a physical register unit or virtual register and mask.
While I was here I've used emplace_back and removed an unneeded use of a
template.
Commit: f63e8ed16ef1fd2deb80cd88b5ca9d5b631b1c36
https://github.com/llvm/llvm-project/commit/f63e8ed16ef1fd2deb80cd88b5ca9d5b631b1c36
Author: Ilya Biryukov <ibiryukov at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/AST/Attr.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTRecordReader.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/Modules/preferred_name.cppm
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
Revert "[Modules] Delay deserialization of preferred_name attribute at r… (#122726)"
This reverts commit c3ba6f378ef80d750e2278560c6f95a300114412.
We are seeing performance regressions of up to 40% on some compilations
with this patch, we will investigate and reland after fixing performance
issues.
Commit: 16298e4cf23d351fcd789fd027d8a30d9329fa81
https://github.com/llvm/llvm-project/commit/16298e4cf23d351fcd789fd027d8a30d9329fa81
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/var-permute-256.ll
Log Message:
-----------
[X86] var-permute-256.ll - regenerate VPTERNLOG comments
Commit: 603529b29eb5441fe7d32f8d154a0ed876038ef2
https://github.com/llvm/llvm-project/commit/603529b29eb5441fe7d32f8d154a0ed876038ef2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
Log Message:
-----------
[X86] add/sub signed sat vec tests - regenerate VPTERNLOG comments
Commit: e6c7d6a56a850228ccb7b1659e383dd5a55e7bdb
https://github.com/llvm/llvm-project/commit/e6c7d6a56a850228ccb7b1659e383dd5a55e7bdb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
Log Message:
-----------
[X86] avx512-broadcast-unfold.ll - regenerate VPTERNLOG comments
Commit: bb754f2c98ddeeadf75f21e6fbc6bd03898f008c
https://github.com/llvm/llvm-project/commit/bb754f2c98ddeeadf75f21e6fbc6bd03898f008c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512-intrinsics.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
Log Message:
-----------
[X86] avx512 intrinsics tests - regenerate VPTERNLOG comments
Commit: a25f2cb3e6953691fade076c8e0ccebf1016d3d9
https://github.com/llvm/llvm-project/commit/a25f2cb3e6953691fade076c8e0ccebf1016d3d9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
Log Message:
-----------
[X86] vector rotate tests - regenerate VPTERNLOG comments
Commit: 44f316811016e677ca3e6c6237619e71bae28986
https://github.com/llvm/llvm-project/commit/44f316811016e677ca3e6c6237619e71bae28986
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
M llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll
M llvm/test/CodeGen/X86/vector-reduce-and-scalar.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
Log Message:
-----------
[X86] vector reduction tests - regenerate VPTERNLOG comments
Commit: 2476417232cdf2e1fce1a1df466b0995cdf559c5
https://github.com/llvm/llvm-project/commit/2476417232cdf2e1fce1a1df466b0995cdf559c5
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/Transforms/Instrumentation/LowerAllowCheckPass.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
Reapply "[sanitizer][NFCI] Add Options parameter to LowerAllowCheckPass" (#122833) (#122994)
This reverts commit 1515caf7a59dc20cb932b724b2ef5c1d1a593427
(https://github.com/llvm/llvm-project/pull/122833) i.e., relands
7d8b4eb0ead277f41ff69525ed807f9f6e227f37
(https://github.com/llvm/llvm-project/pull/122765), with LowerAllowCheckPass::Options moved inside the callback to fix a stack use-after-scope error.
---------
Co-authored-by: Vitaly Buka <vitalybuka at gmail.com>
Commit: f3c3a9b8829760b730b6651e460f9035065dd4c5
https://github.com/llvm/llvm-project/commit/f3c3a9b8829760b730b6651e460f9035065dd4c5
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libc/CMakeLists.txt
Log Message:
-----------
[libc][cmake] error if user disables sanitizers but wants scudo (#123834)
I found this out the hard way...though we don't suggest in our docs setting or
unsetting COMPILER_RT_BUILD_SANITIZERS, I had this explicitly disabled in a
cmake script I was using to setup an llvm-libc based sysroot. While the libc
compiled, hello world failed to link due to missing references to malloc at
link time. Though I had set the cmake variables to opt into using scudo,
apparently explicitly disabling sanitizers will still prevent scudo from being
built... Check for this at configure time and stop the build then.
Commit: ddb8607fe8b0b74a6d89c79d4fcc158673ac765a
https://github.com/llvm/llvm-project/commit/ddb8607fe8b0b74a6d89c79d4fcc158673ac765a
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
Log Message:
-----------
[libc][docs] disable pthreads docs (#123824)
Having a target named pthreads is breaking when multiple runtimes are enabled.
Disable this target for now so that the builds go back to green (and sites get
updated).
Link: https://github.com/llvm/llvm-zorg/issues/359#issuecomment-2600285688
Link: #122006
Link: #122497
Link: #123821
Commit: 8e79ade49d68c49aeb8ba008b59f559b86d22765
https://github.com/llvm/llvm-project/commit/8e79ade49d68c49aeb8ba008b59f559b86d22765
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libc/src/__support/macros/null_check.h
M libc/test/src/math/smoke/nan_test.cpp
M libc/test/src/math/smoke/nanf128_test.cpp
M libc/test/src/math/smoke/nanf16_test.cpp
M libc/test/src/math/smoke/nanf_test.cpp
M libc/test/src/math/smoke/nanl_test.cpp
Log Message:
-----------
[libc][LIBC_ADD_NULL_CHECKS] replace volatile deref with __builtin_trap (#123401)
Also, update the unit tests that were checking for SIGSEGV to not check for a
specific signal.
To further improve this check, it may be worth:
- renaming the configuration option/macro/docs to be clearer about intent.
- swap __builtin_trap for __builtin_unreachable, removing the preprocessor
variants of LIBC_CRASH_ON_NULLPTR, then unconditionally using
`-fsanitize=unreachable -fsanitize-trap=unreachable` in cmake flags when
LIBC_ADD_NULL_CHECKS is enabled.
- building with `-fno-delete-null-pointer-checks` when LIBC_ADD_NULL_CHECKS (or
when some larger yet to be added hardening config) is enabled.
Link: #111546
Commit: f78359cf43cb990f66412059383cdd95ab6e6ec4
https://github.com/llvm/llvm-project/commit/f78359cf43cb990f66412059383cdd95ab6e6ec4
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td
A mlir/include/mlir/Dialect/SPIRV/IR/SPIRVPrimitiveOps.td
M mlir/test/Dialect/SPIRV/IR/availability.mlir
A mlir/test/Dialect/SPIRV/IR/primitive-ops.mlir
A mlir/test/Target/SPIRV/primitive-ops.mlir
Log Message:
-----------
[mlir][spirv] Add definition for OpEmitVertex and OpEndPrimitive (#123759)
This is hopefully the first patch in the series of patches adding some
missing SPIR-V ops to MLIR over the next weeks/months, starting with
something simple: `OpEmitVertex` and `OpEndPrimitive`. Since the ops
have no input and outputs, and the only condition is "This instruction
must only be used when only one stream is present.", which I don't think
can be validate at the instruction level in isolation, I set
`hasVerifier` to 0. I hope I didn't miss anything, but I'm more than
happy to address any comments.
Commit: 511dc261ab94da7db6e67b05cdcef9dcff44798a
https://github.com/llvm/llvm-project/commit/511dc261ab94da7db6e67b05cdcef9dcff44798a
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
Log Message:
-----------
[lldb][DWARFASTParserClang][NFCI] Factor out CV-qualifier/is_static parsing from ParseChildParameters (#123951)
This patch continues simplifying `ParseChildParameters` by moving out
the logic that parses the first parameter of a function DIE into a
helper function. Since with GCC (and lately Clang) function declarations
have `DW_AT_object_pointer`s, we should be able to check for the
attribute's existence to determine if a function is static (and also
deduce CV-qualifiers from it). This will be useful for cases where the
object parameter is explicit (which is possible since C++23).
This should be NFC. I added a FIXME to places where we assume an
implicit object parameter (which will be addressed in a follow-up
patch).
We used to guard parsing of the CV-qualifiers of the "this" parameter
with a `encoding_mask & Type::eEncodingIsPointerUID`, which is
incorrect, because `eEncodingIsPointerUID` cannot be used as a bitmask
directly (see https://github.com/llvm/llvm-project/issues/120856). This
patch corrects this, but it should still be NFC because any parameter in
C++ called "this" *is* an implicit object parameter.
Commit: b1943f40e74dcfe4ebd6213e1a8a01403bd5ffa9
https://github.com/llvm/llvm-project/commit/b1943f40e74dcfe4ebd6213e1a8a01403bd5ffa9
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
Log Message:
-----------
[BranchFolding] Remove getBranchDebugLoc() (#114613)
Commit: a56ba1fab07b2c9b1d0287bdf56cdad4d54a5f33
https://github.com/llvm/llvm-project/commit/a56ba1fab07b2c9b1d0287bdf56cdad4d54a5f33
Author: goldsteinn <35538541+goldsteinn at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/ScalarEvolution/cycled_phis.ll
M llvm/test/Analysis/ScalarEvolution/unknown_phis.ll
M llvm/test/Transforms/InstCombine/known-phi-recurse.ll
M llvm/test/Transforms/SimplifyCFG/switch-branch-fold-indirectbr-102351.ll
Log Message:
-----------
[ValueTracking] Handle recursive select/PHI in ComputeKnownBits (#114689)
Finish porting #114008 to `KnownBits` (Follow up to #113707).
Commit: afcbcae668f1d8061974247f2828190173aef742
https://github.com/llvm/llvm-project/commit/afcbcae668f1d8061974247f2828190173aef742
Author: Anchu Rajendran S <asudhaku at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] inscan reduction modifier and scan op mlir support (#114737)
Scan directive allows to specify scan reductions within an worksharing
loop, worksharing loop simd or simd directive which should have an
`InScan` modifier associated with it. This change adds the mlir support
for the same.
Related PR: [Parsing and Semantic Support for
scan](https://github.com/llvm/llvm-project/pull/102792)
Commit: 9f83c4ed1c8d09bf4c246ec6dd758bde1756f60c
https://github.com/llvm/llvm-project/commit/9f83c4ed1c8d09bf4c246ec6dd758bde1756f60c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][cuda] Allocate descriptor in managed memory on rebox block argument (#123971)
Another case where the descriptor must be allocated with the CUF runtime
and not a simple alloca instruction.
Commit: 7bf188fa991338e981e8dff120a4ed341ad7f4bd
https://github.com/llvm/llvm-project/commit/7bf188fa991338e981e8dff120a4ed341ad7f4bd
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGExprCXX.cpp
Log Message:
-----------
[NFC] Minor fix to tryEmitAbstract type in EmitCXXNewAllocSize (#123433)
In EmitCXXNewAllocSize, when handling a constant array size, we were
calling tryEmitAbstract with the type of the object being allocated rather
than the expected type of the array size. This worked out because the
allocated type was always a pointer and tryEmitAbstract only ends up
using the size of the type to extend or truncate the constant, and in this
case the destination type should be size_t, which is usually the same
width as the pointer. This change fixes the type, but it makes no
functional difference with the current constant emitter implementation.
Commit: b40739a6e90cfb000b49de819251c1581fd5ee50
https://github.com/llvm/llvm-project/commit/b40739a6e90cfb000b49de819251c1581fd5ee50
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/MC/MCELFStreamer.h
R llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/lib/MC/MCELFStreamer.cpp
R llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
Revert "[LLVM][Clang][AArch64] Implement AArch64 build attributes (#118771)"
This reverts commit d7fb4a275c98f4035d1083b5eb3edd2ffb2da00e.
Buildbots failing:
https://lab.llvm.org/buildbot/#/builders/169/builds/7671
https://lab.llvm.org/buildbot/#/builders/65/builds/11046
Commit: 195a1fc5b05d7a42b2e3fa383edb9a7e8b34a9c5
https://github.com/llvm/llvm-project/commit/195a1fc5b05d7a42b2e3fa383edb9a7e8b34a9c5
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CXX/temp/temp.res/temp.dep/temp.dep.type/p4.cpp
Log Message:
-----------
Reapply "[Clang][Sema] Use the correct lookup context when building overloaded 'operator->' in the current instantiation (#104458)" (#109422)
Reapplies #104458, fixing a bug that occurs when a class member access expression calls an `operator->` operator function that returns a non-dependent class type.
Commit: 137d706739653304294adef84ed758e3e498d975
https://github.com/llvm/llvm-project/commit/137d706739653304294adef84ed758e3e498d975
Author: Julian Nagele <j.nagele at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
Log Message:
-----------
[SCEV] Do not attempt to collect loop guards for loops without predecessor. (#123662)
Attempting to collect loop guards for loops without a predecessor can
lead to non-terminating recursion trying to construct a SCEV.
Fixes https://github.com/llvm/llvm-project/issues/122913.
Commit: 146ee98caa9ab1f717216b08cfe72bd1ab2e0b8b
https://github.com/llvm/llvm-project/commit/146ee98caa9ab1f717216b08cfe72bd1ab2e0b8b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
Log Message:
-----------
[RISCV] Remove duplicate WriteRes<WriteJalr for MIPSP8700. (#123865)
We had two WriteRes for WriteJalr with difference latencies. Drop the
duplicate and change the latency of Jal to 1 based on review feedback
Commit: ec15b242505a46ea7d195a6520fb869a80a2cd10
https://github.com/llvm/llvm-project/commit/ec15b242505a46ea7d195a6520fb869a80a2cd10
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CMakeLists.txt
M llvm/test/Other/crash-stack-trace.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
Log Message:
-----------
[llvm][Support] Only enable backtrace test when it's enabled (#123852)
rdar://138554797
Commit: 589593254eede2f624f29390dc1018725e536505
https://github.com/llvm/llvm-project/commit/589593254eede2f624f29390dc1018725e536505
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOpt] Reorganize visit order and worklist management (#123973)
This implements a suggestion by Craig in PR #123878. We can move the
worklist management out of the per-instruction work and do it once at
the end of scanning all the instructions. This should reduce repeat
visitation of the same instruction when no changes can be made.
Note that this does not remove the inherent O(N^2) in the algorithm.
We're still potentially visiiting every user of every def.
I also included a guard for unreachable blocks since that had been
mentioned as a possible cause. It seems we've rulled that out, but
guarding for this case is still a good idea.
Commit: 340706f311e088f51002593b8cc7291500ca024e
https://github.com/llvm/llvm-project/commit/340706f311e088f51002593b8cc7291500ca024e
Author: Stefan Pintilie <stefanp at ca.ibm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
Log Message:
-----------
[PowerPC] Fix saving of Link Register when using ROP Protect (#123101)
An optimization was added that tries to move the uses of the mflr
instruction away from the instruction itself. However, this doesn't work
when we are using the hashst instruction because that instruction needs
to be run before the stack frame is obtained.
This patch disables moving instructions away from the mflr in the case
where ROP protection is being used.
---------
Co-authored-by: Lei Huang <lei at ca.ibm.com>
Commit: 1687aa2a996f4059f275c83d5db635d43165d36c
https://github.com/llvm/llvm-project/commit/1687aa2a996f4059f275c83d5db635d43165d36c
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
A llvm/test/CodeGen/RISCV/rvv/vlopt-same-vl.ll
Log Message:
-----------
[RISCV][VLOPT] Don't reduce the VL is the same as CommonVL (#123878)
This fixes the slowdown in #123862.
Commit: 5ede7b6a6bc22aee86e592835ccc4eaa9459e5cd
https://github.com/llvm/llvm-project/commit/5ede7b6a6bc22aee86e592835ccc4eaa9459e5cd
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CXX/temp/temp.res/temp.dep/temp.dep.type/p4.cpp
Log Message:
-----------
Revert "Reapply "[Clang][Sema] Use the correct lookup context when building overloaded 'operator->' in the current instantiation (#104458)"" (#123982)
Reverts llvm/llvm-project#109422
Commit: 7ad8a3da4771ce8abbd146611124104d42a4e63e
https://github.com/llvm/llvm-project/commit/7ad8a3da4771ce8abbd146611124104d42a4e63e
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[MemProf] Simplify edge iterations (NFC) (#123469)
Remove edge iterator parameters from the various helpers that move edges
onto other nodes, and their associated iterator update code, and instead
iterate over copies of the edge lists in the caller loops. This also
avoids the need to increment these iterators at every early loop
continue.
This simplifies the code, makes it less error prone when updating, and
in particular, facilitates adding handling of recursive contexts.
There were no measurable compile time and memory overhead effects for a
large target.
Commit: 3057d0f14af5e073be3b7c7942dfff2a975ac4cb
https://github.com/llvm/llvm-project/commit/3057d0f14af5e073be3b7c7942dfff2a975ac4cb
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
Log Message:
-----------
Android defaults to pic (#123955)
Commit: 7e622b61320543b3706711609f1f32fd9ea3788d
https://github.com/llvm/llvm-project/commit/7e622b61320543b3706711609f1f32fd9ea3788d
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeConv2D.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-conv2d.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[TOSA] Change PadOp padding to tosa.shape (#123133)
This patch changes PadOp's padding input to type !tosa.shape<2 * rank>,
(where rank is the rank of the PadOp's input), instead of a <rank x 2>
tensor.
This patch is also a part of TOSA v1.0 effort:
https://discourse.llvm.org/t/rfc-tosa-dialect-increment-to-v1-0/83708
This patch updates the PadOp to match all against the TOSA v1.0 form.
Original Authors include:
@Tai78641
@wonjeon
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: 719f0d92538c917306004e541f38c79717d0c07d
https://github.com/llvm/llvm-project/commit/719f0d92538c917306004e541f38c79717d0c07d
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
Log Message:
-----------
[HLSL] Fix global resource initialization (#123394)
Create separate resource initialization function for each resource and
add them to CodeGenModule's `CXXGlobalInits` list.
Fixes #120636 and addresses this [comment
](https://github.com/llvm/llvm-project/pull/119755/files#r1894093603).
Commit: 1cf0af3d321e3aca57e348b9c0675d153c7b6968
https://github.com/llvm/llvm-project/commit/1cf0af3d321e3aca57e348b9c0675d153c7b6968
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmpx_class_f16 (#123251)
True16 format for v_cmpx_class_f16. Update VOPCX_CLASS t16 and fake16
pseudo.
Commit: 18e9d3dbe5386dd3b88df7e3352f81498cfa6182
https://github.com/llvm/llvm-project/commit/18e9d3dbe5386dd3b88df7e3352f81498cfa6182
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmpx_xx_u/i16 (#123424)
A bulk commit of true16 support for v_cmp_xx_i/u16 instructions
including:
v_cmpx_lt_i16
v_cmpx_eq_i16
v_cmpx_le_i16
v_cmpx_gt_i16
v_cmpx_ne_i16
v_cmpx_ge_i16
v_cmpx_lt_u16
v_cmpx_eq_u16
v_cmpx_le_u16
v_cmpx_gt_u16
v_cmpx_ne_u16
v_cmpx_ge_u16
Commit: 213e03ca1174177370715a8776a6423ee29b10ca
https://github.com/llvm/llvm-project/commit/213e03ca1174177370715a8776a6423ee29b10ca
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Decl.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
Log Message:
-----------
[Clang] Fix handling of immediate escalation for inherited constructors (#112860)
Fixes #112677
Commit: c6e7b4a61ab8718d9ac9d1d32f7d2d0cd0b19a7f
https://github.com/llvm/llvm-project/commit/c6e7b4a61ab8718d9ac9d1d32f7d2d0cd0b19a7f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.cpp
Log Message:
-----------
[flang][cuda][NFC] Add kernel name in translation error (#123987)
Commit: 2656928d0ca78e38c91315020876755e46ccecbf
https://github.com/llvm/llvm-project/commit/2656928d0ca78e38c91315020876755e46ccecbf
Author: Deric Cheung <cheung.deric at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
A clang/test/CodeGenHLSL/builtins/reflect.hlsl
A clang/test/CodeGenSPIRV/Builtins/reflect.c
A clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
A clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
A llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
Log Message:
-----------
Reland "[HLSL] Implement the `reflect` HLSL function" (#123853)
This PR relands
[#122992](https://github.com/llvm/llvm-project/pull/122992).
Some machines were failing to run the `reflect-error.ll` test due to the
RUN lines
```llvm
; RUN: not %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o /dev/null 2>&1 -filetype=obj %}
; RUN: not %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o /dev/null 2>&1 -filetype=obj %}
```
which failed when `spirv-tools` was not present on the machine due to
running the command `not` without any arguments.
These RUN lines have been removed since they don't actually test
anything new compared to the other two RUN lines due to the expected
error during instruction selection.
```llvm
; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s
; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s
```
Commit: 8fb42300a02c887740825cd1b60fc4fcd8d2f933
https://github.com/llvm/llvm-project/commit/8fb42300a02c887740825cd1b60fc4fcd8d2f933
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/RecursiveASTVisitor.h
A clang/include/clang/AST/StmtSYCL.h
M clang/include/clang/AST/StmtVisitor.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Sema/SemaSYCL.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-entry-point.cpp
M clang/test/SemaSYCL/sycl-kernel-entry-point-attr-appertainment.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[SYCL] AST support for SYCL kernel entry point functions. (#122379)
A SYCL kernel entry point function is a non-member function or a static
member function declared with the `sycl_kernel_entry_point` attribute.
Such functions define a pattern for an offload kernel entry point
function to be generated to enable execution of a SYCL kernel on a
device. A SYCL library implementation orchestrates the invocation of
these functions with corresponding SYCL kernel arguments in response to
calls to SYCL kernel invocation functions specified by the SYCL 2020
specification.
The offload kernel entry point function (sometimes referred to as the
SYCL kernel caller function) is generated from the SYCL kernel entry
point function by a transformation of the function parameters followed
by a transformation of the function body to replace references to the
original parameters with references to the transformed ones. Exactly how
parameters are transformed will be explained in a future change that
implements non-trivial transformations. For now, it suffices to state
that a given parameter of the SYCL kernel entry point function may be
transformed to multiple parameters of the offload kernel entry point as
needed to satisfy offload kernel argument passing requirements.
Parameters that are decomposed in this way are reconstituted as local
variables in the body of the generated offload kernel entry point
function.
For example, given the following SYCL kernel entry point function
definition:
```
template<typename KernelNameType, typename KernelType>
[[clang::sycl_kernel_entry_point(KernelNameType)]]
void sycl_kernel_entry_point(KernelType kernel) {
kernel();
}
```
and the following call:
```
struct Kernel {
int dm1;
int dm2;
void operator()() const;
};
Kernel k;
sycl_kernel_entry_point<class kernel_name>(k);
```
the corresponding offload kernel entry point function that is generated
might look as follows (assuming `Kernel` is a type that requires
decomposition):
```
void offload_kernel_entry_point_for_kernel_name(int dm1, int dm2) {
Kernel kernel{dm1, dm2};
kernel();
}
```
Other details of the generated offload kernel entry point function, such
as its name and calling convention, are implementation details that need
not be reflected in the AST and may differ across target devices. For
that reason, only the transformation described above is represented in
the AST; other details will be filled in during code generation.
These transformations are represented using new AST nodes introduced
with this change. `OutlinedFunctionDecl` holds a sequence of
`ImplicitParamDecl` nodes and a sequence of statement nodes that
correspond to the transformed parameters and function body.
`SYCLKernelCallStmt` wraps the original function body and associates it
with an `OutlinedFunctionDecl` instance. For the example above, the AST
generated for the `sycl_kernel_entry_point<kernel_name>` specialization
would look as follows:
```
FunctionDecl 'sycl_kernel_entry_point<kernel_name>(Kernel)'
TemplateArgument type 'kernel_name'
TemplateArgument type 'Kernel'
ParmVarDecl kernel 'Kernel'
SYCLKernelCallStmt
CompoundStmt
<original statements>
OutlinedFunctionDecl
ImplicitParamDecl 'dm1' 'int'
ImplicitParamDecl 'dm2' 'int'
CompoundStmt
VarDecl 'kernel' 'Kernel'
<initialization of 'kernel' with 'dm1' and 'dm2'>
<transformed statements with redirected references of 'kernel'>
```
Any ODR-use of the SYCL kernel entry point function will (with future
changes) suffice for the offload kernel entry point to be emitted. An
actual call to the SYCL kernel entry point function will result in a
call to the function. However, evaluation of a `SYCLKernelCallStmt`
statement is a no-op, so such calls will have no effect other than to
trigger emission of the offload kernel entry point.
Additionally, as a related change inspired by code review feedback,
these changes disallow use of the `sycl_kernel_entry_point` attribute
with functions defined with a _function-try-block_. The SYCL 2020
specification prohibits the use of C++ exceptions in device functions.
Even if exceptions were not prohibited, it is unclear what the semantics
would be for an exception that escapes the SYCL kernel entry point
function; the boundary between host and device code could be an implicit
noexcept boundary that results in program termination if violated, or
the exception could perhaps be propagated to host code via the SYCL
library. Pending support for C++ exceptions in device code and clear
semantics for handling them at the host-device boundary, this change
makes use of the `sycl_kernel_entry_point` attribute with a function
defined with a _function-try-block_ an error.
Commit: 517334bdb83deaae3be6fbc4fa5f1d721b01c0f0
https://github.com/llvm/llvm-project/commit/517334bdb83deaae3be6fbc4fa5f1d721b01c0f0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[TableGen] Add maps from Write/ReadType to the parent WriteRes/ReadAdvance. NFC (#123876)
Use this to improve performance of SubtargetEmitter::findWriteResources
and SubtargetEmitter::findReadAdvance. Now we can do a map lookup
instead of a linear search through all WriteRes/ReadAdvance records.
This reduces the build time of RISCVGenSubtargetInfo.inc on my
machine from 43 seconds to 10 seconds.
Commit: ac94fade6075fec89eb29c7dedf01ef59601e61d
https://github.com/llvm/llvm-project/commit/ac94fade6075fec89eb29c7dedf01ef59601e61d
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/unittests/Target/SPIRV/SPIRVAPITest.cpp
Log Message:
-----------
[SPIR-V] Rename internal command line flags for optimization level and mtriple used when passing options into the translate API call (#123975)
Rename internal command line flags for optimization level and mtriple
used when passing options into the translate API call.
Commit: 68c6b2e18809342e3747d50eb0dc84246393941b
https://github.com/llvm/llvm-project/commit/68c6b2e18809342e3747d50eb0dc84246393941b
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
Log Message:
-----------
[ASTMatchers][NFC] use `Matcher<QualType>` instead of `DynTypedMatcher` in `TypeLocTypeMatcher` (#123450)
There are no template in `TypeLocTypeMatcher`. So we do not need to use
`DynTypedMatcher` which can improve performance
Commit: a2c683b665e99831c5d6343a9afeeae2877b393a
https://github.com/llvm/llvm-project/commit/a2c683b665e99831c5d6343a9afeeae2877b393a
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/test/COFF/arm64x-export.test
Log Message:
-----------
[LLD][COFF] Use EC symbol table for exports defined in module definition files (#123849)
Commit: 4e9d5a3a307b362529583969e59070bc17909f23
https://github.com/llvm/llvm-project/commit/4e9d5a3a307b362529583969e59070bc17909f23
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Options.td
M lld/test/COFF/arm64x-export.test
Log Message:
-----------
[LLD][COFF] Add support for the -defArm64Native argument (#123850)
MSVC ignores the `/defArm64Native` argument on non-ARM64X targets.
It is also ignored if the `/def` option is not specified.
Commit: a77250fd782530f42a90f8562bcef0eb26abb010
https://github.com/llvm/llvm-project/commit/a77250fd782530f42a90f8562bcef0eb26abb010
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/CAPI/ir.c
M mlir/test/python/ir/location.py
Log Message:
-----------
[mlir] Add C and Python interface for file range (#123276)
Plumbs through creating file ranges to C and Python.
Commit: 223bd0ca81f871beb31d40b4f02753493c30b5b2
https://github.com/llvm/llvm-project/commit/223bd0ca81f871beb31d40b4f02753493c30b5b2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/copy_cvref.h
Log Message:
-----------
[libc++] Avoid unnecessary instantiations for __copy_cvref_t (#123718)
This changes the implementation of `__copy_cvref_t` to only template the
implementation class on the `_From` parameter, avoiding instantiations
for every combination of `_From` and `_To`.
Commit: 27ccc99c4f4300115aa0d619e8e4693f18b2af9d
https://github.com/llvm/llvm-project/commit/27ccc99c4f4300115aa0d619e8e4693f18b2af9d
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOpt] Minor worklist invariant cleanup [NFC] (#123989)
In retrospect, this probably should have been rolled into #123973. It
seemed more involved when I first decided to split. :)
Commit: e0ae8890460d6c6a90dd27fe6762128b2161000b
https://github.com/llvm/llvm-project/commit/e0ae8890460d6c6a90dd27fe6762128b2161000b
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/docs/SandboxIR.md
Log Message:
-----------
[SandboxIR][Doc] Add Quick start notes (#123992)
Commit: 630177ccdde44b0dd8faa13b34002d15c4b0af8d
https://github.com/llvm/llvm-project/commit/630177ccdde44b0dd8faa13b34002d15c4b0af8d
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] Fix madvise/posix_madvise for macOs. (#124020)
only bsd and linux intercept these syscalls.
Fix #123601
Commit: 939f2900d03c6ab0a89ba619ff25c8542bd11a5a
https://github.com/llvm/llvm-project/commit/939f2900d03c6ab0a89ba619ff25c8542bd11a5a
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] getsockopt/setsockopt interception. (#124004)
Commit: fd087135efe1b62b506c3caef3fef83242a8e504
https://github.com/llvm/llvm-project/commit/fd087135efe1b62b506c3caef3fef83242a8e504
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
Log Message:
-----------
[SandboxVec][Legality] Diamond reuse multi input (#123426)
This patch implements the diamond pattern where we are vectorizing
toward the top of the diamond from both edges, but the second edge may
use elements from a different vector or just scalar values. This
requires some additional packing code (see lit test).
Commit: 64360899c76cb2e687ef1fcea617ef455e8a2621
https://github.com/llvm/llvm-project/commit/64360899c76cb2e687ef1fcea617ef455e8a2621
Author: Yeoul Na <yeoul_na at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/docs/BoundsSafety.rst
A clang/docs/BoundsSafetyAdoptionGuide.rst
M clang/docs/index.rst
Log Message:
-----------
[BoundsSafety][Doc] Add BoundsSafetyAdoptionGuide.rst (#120674)
This adds an instruction to adopt `-fbounds-safety` using the preview
implementation available in the fork of llvm-project.
Commit: a939a9fd53d98f33b94f9121646d5906a2b9f598
https://github.com/llvm/llvm-project/commit/a939a9fd53d98f33b94f9121646d5906a2b9f598
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
A lldb/test/API/tools/lldb-dap/progress/Makefile
A lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
A lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
A lldb/test/API/tools/lldb-dap/progress/main.cpp
M lldb/tools/lldb-dap/ProgressEvent.cpp
M lldb/tools/lldb-dap/ProgressEvent.h
Log Message:
-----------
[LLDB-DAP] Send Progress update message over DAP (#123837)
When testing my SBProgress DAP PR (#123826), I noticed Progress update
messages aren't sent over DAP. This patch adds the lldb progress event's
message to the body when sent over DAP.
Before
Now
Tested with my [progress tester
command](https://gist.github.com/Jlalond/48d85e75a91f7a137e3142e6a13d0947),
testing 10 events 5 seconds apart 1-10
Commit: 6e498bc2cd765f4c421d32d610bdc0effec62b42
https://github.com/llvm/llvm-project/commit/6e498bc2cd765f4c421d32d610bdc0effec62b42
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
A flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/CUDA/pointer.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Handle simple device pointer allocation (#123996)
Commit: 98de5dfe6a8cbb70f21de545acec4710a77294ed
https://github.com/llvm/llvm-project/commit/98de5dfe6a8cbb70f21de545acec4710a77294ed
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/Attributes.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/IR/Attributes.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/OperationSupport.cpp
Log Message:
-----------
[mlir] Add NamedAttribute ctor taking StringRef. NFC. (#123974)
This is a small QoL improvement so that we don't have to go through
helpers when building `NamedAttribute`s.
Commit: 2dc1c95595e409c74a8a3d743afb7898e1af3255
https://github.com/llvm/llvm-project/commit/2dc1c95595e409c74a8a3d743afb7898e1af3255
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][VecUtils] Implement VecUtils::getLowest() (#124024)
VecUtils::getLowest(Valse) returns the lowest instruction in the BB among Vals.
If the instructions are not in the same BB, or if none of them is an
instruction it returns nullptr.
Commit: 96dbd0006c3c4c9de5f1fe4f3bbac3c74acac436
https://github.com/llvm/llvm-project/commit/96dbd0006c3c4c9de5f1fe4f3bbac3c74acac436
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
Log Message:
-----------
[RISCV] Re-generate test checks so we pick up implicit on whole register moves. NFC
Commit: 9fbf5cfebcd770fbe0e453f36ee7c74809339f18
https://github.com/llvm/llvm-project/commit/9fbf5cfebcd770fbe0e453f36ee7c74809339f18
Author: Ben Langmuir <blangmuir at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/CodeGen/BackendUtil.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
A clang/test/Modules/gmodules-codegenopts.c
Log Message:
-----------
[clang][modules] Partially revert 48d0eb518 to fix -gmodules output (#124003)
With the changes in 48d0eb518, the CodeGenOptions used to emit .pcm
files with -fmodule-format=obj (-gmodules) were the ones from the
original invocation, rather than the ones specifically crafted for
outputting the pcm. This was causing the pcm to be written with only the
debug info and without the __clangast section in some cases (e.g. -O2).
This unforunately was not covered by existing tests, because compiling
and loading a module within a single compilation load the ast content
from the in-memory module cache rather than reading it from the pcm file
that was written. This broke bootstrapping a build of clang with modules
enabled on Darwin.
rdar://143418834
Commit: 8f45452c5309d0ae59dd383de6dae1aa4eabbb9c
https://github.com/llvm/llvm-project/commit/8f45452c5309d0ae59dd383de6dae1aa4eabbb9c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Restrict jobs based on owner instead of repo (#123797)
Not really any functional change, just a clean up that could make it
easier to share snippets with other repos.
Commit: 8110af75b1500be2313e523a2d2da6bb7806b700
https://github.com/llvm/llvm-project/commit/8110af75b1500be2313e523a2d2da6bb7806b700
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/pack.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Fix codegen when packing constants. (#124033)
Before this patch packing a bundle of constants would crash because
`getInsertPointAfterInstrs()` expected instructions. This patch fixes
this.
Commit: d5457e4c1619e5dbeefd49841e284cbc24d35cb4
https://github.com/llvm/llvm-project/commit/d5457e4c1619e5dbeefd49841e284cbc24d35cb4
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/test/Index/crash-recovery-modules.m
Log Message:
-----------
[NFC][Index] Disable LSAN on crash recovery tests (#124035)
Avoiding leaks in such cases is very hard.
There are similar suppression in other Index tests.
Commit: eaaac050588ec67afcdbb347df5597458a9b10d1
https://github.com/llvm/llvm-project/commit/eaaac050588ec67afcdbb347df5597458a9b10d1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaSYCL.cpp
Log Message:
-----------
[Sema] Fix a warning
This patch fixes:
clang/lib/Sema/SemaSYCL.cpp:428:25: error: unused variable 'SKI'
[-Werror,-Wunused-variable]
Commit: a9d2834508e276d0a3cc09ac549132b56796e87f
https://github.com/llvm/llvm-project/commit/a9d2834508e276d0a3cc09ac549132b56796e87f
Author: Hua Tian <akiratian at tencent.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
A llvm/test/CodeGen/Hexagon/swp-ws-live-intervals-issue123165.mir
Log Message:
-----------
[llvm][CodeGen] Fix the issue caused by live interval checking in window scheduler (#123184)
At some corner cases, the cloned MI still retains an old slot index,
which leads to the compiler crashing. This patch update the slot index
map before delete the recycled MI.
https://github.com/llvm/llvm-project/issues/123165
Commit: 847acbbc529133b2300721a809751891200f37f5
https://github.com/llvm/llvm-project/commit/847acbbc529133b2300721a809751891200f37f5
Author: epitavy <32581827+epitavy at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/examples/ExceptionDemo/CMakeLists.txt
M llvm/examples/ExceptionDemo/ExceptionDemo.cpp
Log Message:
-----------
[ExceptionDemo] Transition example from MCJIT to ORC and fix errors (#92504)
ExceptionDemo has been broken for some time. This patch fixes the
compilation errors and moves the example from MCJIT to ORC.
Commit: 23d2a1862a8b60cf5a04ffabdf5c1ea776120d04
https://github.com/llvm/llvm-project/commit/23d2a1862a8b60cf5a04ffabdf5c1ea776120d04
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove unnecessary check for null TargetInstrInfo (#123929)
This can never happen.
Commit: d3aea77f50a2215a9fa50c1bfa5f4b9717d8e928
https://github.com/llvm/llvm-project/commit/d3aea77f50a2215a9fa50c1bfa5f4b9717d8e928
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Move transformMaskAfterShuffle into BaseShuffleAnalysis and use it as much as possible. (#123896)
Commit: 1042ddc31b594511657ff70a82d71e2d037e2e35
https://github.com/llvm/llvm-project/commit/1042ddc31b594511657ff70a82d71e2d037e2e35
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[gn] port ec15b242505
Commit: 6f69adeed6728e49c16d47bdde658285f49c8ed7
https://github.com/llvm/llvm-project/commit/6f69adeed6728e49c16d47bdde658285f49c8ed7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove null TargetRegisterInfo check (#123933)
This cannot happen. Also simplify the LaneBitmask check from !none
to any.
Commit: 2646e2d487027e61c4e3cba5ceecfd95cedce0fe
https://github.com/llvm/llvm-project/commit/2646e2d487027e61c4e3cba5ceecfd95cedce0fe
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Stop allocating tiny helper classes (NFC) (#123936)
This was allocating tiny helper classes for every instruction
visited. We can just dispatch over the cases in the visitor
function instead.
Commit: ba70368f1380f8d22494fc8c100d2ab894a3cf94
https://github.com/llvm/llvm-project/commit/ba70368f1380f8d22494fc8c100d2ab894a3cf94
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
A clang/test/Driver/loongarch-relax-features.c
Log Message:
-----------
[Clang][Driver] Support linker relaxation options for LoongArch (#123587)
This commit completed four tasks:
- Add `-mrelax/-mno-relax` options support for LoongArch in clang
driver.
- Print error for `-gsplit-dwarf` with LoongArch linker relaxation
(`-mrelax`).
- Pass `-X` to linker to discard a plethora of `.L` symbols due to
linker relaxation.
- Forward `--no-relax` option to linker.
Commit: 15c2d4baf17292b4966d335846b30c50063f0265
https://github.com/llvm/llvm-project/commit/15c2d4baf17292b4966d335846b30c50063f0265
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove check for subreg index on a def operand (#123943)
This is looking at operand 0 of a REG_SEQUENCE, which can never
have a subregister index.
Commit: 9cefa3e6fccf30959433b96a8a275417b1429f4e
https://github.com/llvm/llvm-project/commit/9cefa3e6fccf30959433b96a8a275417b1429f4e
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan] Generalize handleIntrinsicByApplyingToShadow by adding bitcasting (#123474)
`handleIntrinsicByApplyingToShadow` (introduced in
https://github.com/llvm/llvm-project/pull/114490) requires that the
intrinsic supports integer-ish operands; this is not the case for all
intrinsics. This patch generalizes the function to bitcast the shadow
arguments to be the same type as the original intrinsic, thus
guaranteeing that the intrinsic exists. Additionally, it casts the
computed shadow to be an appropriate shadow type.
This function assumes that the intrinsic will handle arbitrary
bit-patterns (for example, if the intrinsic accepts floats for var1, we
assume that it works normally even if inputs are NaNs etc.).
Commit: ba3e6f0f0f2bebeb2b82e976ea1b5df007784862
https://github.com/llvm/llvm-project/commit/ba3e6f0f0f2bebeb2b82e976ea1b5df007784862
Author: Luke Lau <luke at igalia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOPT] Remove dead passthru check in getOperandLog2EEW. NFC (#123911)
We already bail if the user is tied in checkUsers, which is true for all
passthrus. Remove the check in getOperandLog2EEW so that it only worries
about computing the OperandInfo, and leaves the passthru correctness to
checkUsers.
Commit: 0fe8e70c6609ff86cd40fbb45a85a8ed04c153c2
https://github.com/llvm/llvm-project/commit/0fe8e70c6609ff86cd40fbb45a85a8ed04c153c2
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
R clang/test/CodeGenHLSL/builtins/reflect.hlsl
R clang/test/CodeGenSPIRV/Builtins/reflect.c
R clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
R clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
R llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
Log Message:
-----------
Revert "Reland "[HLSL] Implement the `reflect` HLSL function"" (#124046)
Reverts llvm/llvm-project#123853
The introduction of `reflect-error.ll` surfaced a bug with the use of
`report_fatal_error` in `SPIRVInstructionSelector` that was propagated
into the pr. This has caused a build-bot breakage, and the work to solve
the underlying issue is tracked here:
https://github.com/llvm/llvm-project/issues/124045. We can re-apply this
commit when the underlying issue is resolved.
Commit: 3ef90f843fee74ff811ef88246734475f50e2073
https://github.com/llvm/llvm-project/commit/3ef90f843fee74ff811ef88246734475f50e2073
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Target/Cpp/switch.mlir
Log Message:
-----------
[emitc] Fix the translation switchop with argument of expressionop (#123701)
Now a `emitc.switch` with argument of `emitc.expression` wouldn't emit
its argument to cpp. This patch fix it.
Commit: b46fcb9fa32f24660b1b8858d5c4cbdb76ef9d8b
https://github.com/llvm/llvm-project/commit/b46fcb9fa32f24660b1b8858d5c4cbdb76ef9d8b
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Implement CWG 2628 "Implicit deduction guides should propagate constraints" (#111143)
Closes https://github.com/llvm/llvm-project/issues/98592
Commit: 652ff20140d79544db4dfa21314fc62c3c9182e5
https://github.com/llvm/llvm-project/commit/652ff20140d79544db4dfa21314fc62c3c9182e5
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/module/cudadevice.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Semantics/cuf-device-procedures01.cuf
Log Message:
-----------
[flang][cuda] Adding atomicadd as a cudadevice intrinsic and converting it LLVM dialect (#123840)
With these changes, CUF atomic operations are handled as cudadevice
intrinsics and are converted straight to the LLVM dialect with the
`llvm.atomicrw` operation.
I am only submitting changes for `atomicadd` to gather feedback. If we
are to proceed with these changes I will add support for all other
applicable atomic operations following this pattern.
Commit: 892a804d93d44ddfd7cd351852fe6aef32d4dcd0
https://github.com/llvm/llvm-project/commit/892a804d93d44ddfd7cd351852fe6aef32d4dcd0
Author: Akshay Deodhar <adeodhar at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
Log Message:
-----------
[NVPTX] Stop using 16-bit CAS instructions from PTX (#120220)
Increases minimum CAS size from 16 bit to 32 bit, for better SASS
codegen.
When atomics are emulated using atom.cas.b16, the SASS generated
includes 2 (nested) emulation loops. When emulated using an atom.cas.b32
loop, the SASS too has a single emulation loop. Using 32 bit CAS thus
results in better codegen.
Commit: 1c5d971e425ff080dffd4d9a9a7734ead042d323
https://github.com/llvm/llvm-project/commit/1c5d971e425ff080dffd4d9a9a7734ead042d323
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[Signals] Exclude dladdr for AIX after #123879
Widely supported but missing on AIX
https://www.austingroupbugs.net/view.php?id=993
Commit: 75750722737e9128500b81363ba66c62fea1e4fe
https://github.com/llvm/llvm-project/commit/75750722737e9128500b81363ba66c62fea1e4fe
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets.s
Log Message:
-----------
[llvm-exegesis] Disable exhaustive tests on Windows
When looking at the slowest lit tests, I'm seeing these four tests take
two to eight minutes. Test coverage on Linux should be sufficient for
the functionality on top of it not really being useful on Windows at
all.
This was observed when hacking on the new premerge in a windows VM.
Commit: 19834b4623fd1e7ae5185ed76031b407c3fa7a47
https://github.com/llvm/llvm-project/commit/19834b4623fd1e7ae5185ed76031b407c3fa7a47
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mscq.c
M clang/test/Preprocessor/init-loongarch.c
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
A llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg-128.ll
Log Message:
-----------
[LoongArch] Support sc.q instruction for 128bit cmpxchg operation (#116771)
Two options for clang
-mno-scq: Disable sc.q instruction.
-mscq: Enable sc.q instruction.
The default is -mno-scq.
Commit: 0bcf34e422683b900ed504c5e4605038b257f1ee
https://github.com/llvm/llvm-project/commit/0bcf34e422683b900ed504c5e4605038b257f1ee
Author: MagentaTreehouse <99200384+MagentaTreehouse at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/AST/UnresolvedSet.h
Log Message:
-----------
[Clang] [NFC] Mark `UnresolvedSetImpl`'s move operations as defaulted (#97930)
Commit: d80b814c010580b0fd02c1b1a9521a0b640a358a
https://github.com/llvm/llvm-project/commit/d80b814c010580b0fd02c1b1a9521a0b640a358a
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[LoongArch] Summary llvm20 release notes
Commit: 3c7a878d919c6483c9e78a3ed4578d4ee2f54408
https://github.com/llvm/llvm-project/commit/3c7a878d919c6483c9e78a3ed4578d4ee2f54408
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[LoongArch] Summary clang20 release notes
Commit: aa273fd83eccb55215f4cb18285f8462a1013f5c
https://github.com/llvm/llvm-project/commit/aa273fd83eccb55215f4cb18285f8462a1013f5c
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/docs/ReleaseNotes.rst
Log Message:
-----------
[LoongArch] Update lld20 release notes
Commit: 163935a48df69bde944fae2b4581541dab30c730
https://github.com/llvm/llvm-project/commit/163935a48df69bde944fae2b4581541dab30c730
Author: quic_hchandel <165007698+hchandel at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcilo-aliases-valid.s
A llvm/test/MC/RISCV/xqcilo-invalid.s
A llvm/test/MC/RISCV/xqcilo-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcilo (Large Offset Load Store) extension (#123881)
This extension adds eight 48 bit load store instructions.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
---------
Co-authored-by: Harsh Chandel <hchandel at qti.qualcomm.com>
Commit: de209fa11b5455155228bcdba012b6074388b917
https://github.com/llvm/llvm-project/commit/de209fa11b5455155228bcdba012b6074388b917
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineJumpTableInfo.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
A llvm/lib/CodeGen/StaticDataSplitter.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
A llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
[CodeGen] Introduce Static Data Splitter pass (#122183)
https://discourse.llvm.org/t/rfc-profile-guided-static-data-partitioning/83744
proposes to partition static data sections.
This patch introduces a codegen pass. This patch produces jump table
hotness in the in-memory states (machine jump table info and entries).
Target-lowering and asm-printer consume the states and produce `.hot`
section suffix. The follow up PR
https://github.com/llvm/llvm-project/pull/122215 implements such
changes.
---------
Co-authored-by: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Commit: d15f3e828d3d3335aa9b92b9013a590b71e56b92
https://github.com/llvm/llvm-project/commit/d15f3e828d3d3335aa9b92b9013a590b71e56b92
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/deep-loop-nest.ll
Log Message:
-----------
[LoopInterchange] Constrain LI within supported loop nest depth (#118656)
This patch is an extension to #115128.
After profiling LLVM test-suite, I see a lot of loop nest of depth more
than `MaxLoopNestDepth` which is 10. Early exit for them would save
compile-time as it would avoid computing DependenceInfo and CacheCost.
Please see 'bound-max-depth' branch on compile-time-tracker.
Commit: 646f034e4e228f9d5d6a0142210e5e28f2ea7872
https://github.com/llvm/llvm-project/commit/646f034e4e228f9d5d6a0142210e5e28f2ea7872
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port de209fa11b54
Commit: daa18205c6f0a3b5dd62ba2e65948e1a9182a60f
https://github.com/llvm/llvm-project/commit/daa18205c6f0a3b5dd62ba2e65948e1a9182a60f
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/OpenMP/copyin.f90
Log Message:
-----------
[Flang][OpenMP] Fix copyin allocatable lowering to MLIR (#122097)
Fixes https://github.com/llvm/llvm-project/issues/113191
Issue: [flang][OpenMP] Runtime segfault when an allocatable variable is
used with copyin
Rootcause: The value of the threadprivate variable is not being copied
from the primary thread to the other threads within a parallel region.
As a result it tries to access a null pointer inside a parallel region
which causes segfault.
Fix: When allocatables used with copyin clause need to ensure that, on
entry to any parallel region each thread’s copy of a variable will
acquire the allocation status of the primary thread, before copying the
value of a threadprivate variable of the primary thread to the
threadprivate variable of each other member of the team.
Commit: ea49d474fd355a9fdc3d549c4f927b970181f4c9
https://github.com/llvm/llvm-project/commit/ea49d474fd355a9fdc3d549c4f927b970181f4c9
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
Specify triple for llc test
Commit: 5d8390d48e5c03235b3c83748e4a2eec0a19ae65
https://github.com/llvm/llvm-project/commit/5d8390d48e5c03235b3c83748e4a2eec0a19ae65
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
Temporarily disable test on Fuchsia
Commit: c3dfd34e54c1cb9e0e6c7472a6d30d03a63f6f0a
https://github.com/llvm/llvm-project/commit/c3dfd34e54c1cb9e0e6c7472a6d30d03a63f6f0a
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
Log Message:
-----------
[WebAssembly] Add unreachable before catch destinations (#123915)
When `try_table`'s catch clause's destination has a return type, as in
the case of catch with a concrete tag, catch_ref, and catch_all_ref. For
example:
```wasm
block exnref
try_table (catch_all_ref 0)
...
end_try_table
end_block
... use exnref ...
```
This code is not valid because the block's body type is not exnref. So
we add an unreachable after the 'end_try_table' to make the code valid
here:
```wasm
block exnref
try_table (catch_all_ref 0)
...
end_try_table
unreachable ;; Newly added
end_block
```
Because 'unreachable' is a terminator we also need to split the BB.
---
We need to handle the same thing for unwind mismatch handling. In the
code below, we create a "trampoline BB" that will be the destination for
the nested `try_table`~`end_try_table` added to fix a unwind mismatch:
```wasm
try_table (catch ... )
block exnref
...
try_table (catch_all_ref N)
some code
end_try_table
...
end_block ;; Trampoline BB
throw_ref
end_try_table
```
While the `block` added for the trampoline BB has the return type
`exnref`, its body, which contains the nested `try_table` and other
code, wouldn't have the `exnref` return type. Most times it didn't
become a problem because the block's body ended with something like `br`
or `return`, but that may not always be the case, especially when there
is a loop. So we add an `unreachable` to make the code valid here too:
```wasm
try_table (catch ... )
block exnref
...
try_table (catch_all_ref N)
some code
end_try_table
...
unreachable ;; Newly added
end_block ;; Trampoline BB
throw_ref
end_try_table
```
In this case we just append the `unreachable` at the end of the layout
predecessor BB. (This was tricky to do in the first (non-mismatch) case
because there `end_try_table` and `end_block` were added in the
beginning of an EH pad in `placeTryTableMarker` and moving
`end_try_table` and the new `unreachable` to the previous BB caused
other problems.)
---
This adds many `unreaachable`s to the output, but this adds
`unreachable` to only a few places to see if this is working. The
FileCheck lines in `exception.ll` and `cfg-stackify-eh.ll` are already
heavily redacted to only leave important control-flow instructions, so I
don't think it's worth adding `unreachable`s everywhere.
Commit: ba174855203403f6c3e2a46bdd79dbb3e27ac6a4
https://github.com/llvm/llvm-project/commit/ba174855203403f6c3e2a46bdd79dbb3e27ac6a4
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/test/CodeCompletion/member-access.cpp
Log Message:
-----------
[clang][CodeComplete] Use HeuristicResolver to resolve DependentNameTypes (#123818)
Fixes https://github.com/clangd/clangd/issues/1249
Commit: 220004d2f8692e3a224dc75f7a7c6001711d3d58
https://github.com/llvm/llvm-project/commit/220004d2f8692e3a224dc75f7a7c6001711d3d58
Author: Alan Li <me at alanli.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
Log Message:
-----------
[GISel] Add more FP opcodes to CSE (#123949)
Resubmit, previously PR has compilation issues.
Commit: 3fb8c5b43195d6e11ff0557d07e75700343d369f
https://github.com/llvm/llvm-project/commit/3fb8c5b43195d6e11ff0557d07e75700343d369f
Author: mconst <mconst at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
M llvm/test/CodeGen/X86/stack-clash-huge.ll
Log Message:
-----------
[X86] Fix invalid instructions on x32 with large stack frames (#124041)
`X86FrameLowering::emitSPUpdate()` assumes that 64-bit targets use a
64-bit stack pointer, but that's not true on x32.
When checking the stack pointer size, we need to look at
`Uses64BitFramePtr` rather than `Is64Bit`. This avoids generating
invalid instructions like `add esp, rcx`.
For impossibly-large stack frames (4 GiB or larger with a 32-bit stack
pointer), we were also generating invalid instructions like `mov eax,
5000000000`. The inline stack probe code already had a check for that
situation; I've moved the check into `emitSPUpdate()`, so any attempt to
allocate a 4 GiB stack frame with a 32-bit stack pointer will now trap
rather than adjusting ESP by the wrong amount. This also fixes the
"can't have 32-bit 16GB stack frame" assertion, which used to be
triggerable by user code but is now correct.
To help catch situations like this in the future, I've added
`-verify-machineinstrs` to the stack clash tests that generate large
stack frames.
This fixes the expensive-checks buildbot failure caused by #113219.
Commit: 8eb99bbe6e8878bfd73fb301899ced6bb5dfff38
https://github.com/llvm/llvm-project/commit/8eb99bbe6e8878bfd73fb301899ced6bb5dfff38
Author: Martin Storsjö <martin at martin.st>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/test/COFF/empty-section-decl.yaml
M llvm/include/llvm/Object/COFF.h
R llvm/test/Object/coff-sec-sym.test
Log Message:
-----------
Reland [LLD] [COFF] Fix linking MSVC generated implib header objects (#123916)
ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b tried to fix cases when LLD
links what seems to be import library header objects from MSVC. However,
the fix seems incorrect; the review at https://reviews.llvm.org/D133627
concluded that if this (treating this kind of symbol as a common symbol)
is what link.exe does, it's fine.
However, this is most probably not what link.exe does. The symbol
mentioned in the commit message of
ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b would be a common symbol with a
size of around 3 GB; this is not what might have been intended.
That commit tried to avoid running into the error ".idata$4 should not
refer to special section 0"; that issue is fixed for a similar style of
section symbols in 4a4a8a1476b1386b523dc5b292ba9a5a6748a9cf.
Therefore, revert ecb5ea6a266d5cc4e05252f6db4c73613b73cc3b and extend
the fix from 4a4a8a1476b1386b523dc5b292ba9a5a6748a9cf to also work for
the section symbols in MSVC generated import libraries.
The main detail about them, is that for symbols of type
IMAGE_SYM_CLASS_SECTION, the Value field is not an offset, but it is an
optional set of flags, corresponding to the Characteristics of the
section header (although it may be empty).
This is a reland of a previous version of this commit, earlier merged in
9457418e66766d8fafc81f85eb8045986220ca3e / #122811. The previous version
failed tests when run with address sanitizer. The issue was that the
synthesized coff_symbol_generic object actually will be used to access a
full coff_symbol16 or coff_symbol32 struct, see
DefinedCOFF::getCOFFSymbol. Therefore, we need to make a copy of the
full size of either of them.
Commit: cd5694ecea2da1990365f46f9737be1b29d94f0c
https://github.com/llvm/llvm-project/commit/cd5694ecea2da1990365f46f9737be1b29d94f0c
Author: Chandler Carruth <chandlerc at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M llvm/include/llvm/Option/OptTable.h
M llvm/lib/Option/OptTable.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/unittests/Option/OptionMarshallingTest.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
Log Message:
-----------
[StrTable] Switch the option parser to `llvm::StringTable` (#123308)
Now that we have a dedicated abstraction for string tables, switch the
option parser library's string table over to it rather than using a raw
`const char*`. Also try to use the `StringTable::Offset` type rather
than a raw `unsigned` where we can to avoid accidental increments or
other issues.
This is based on review feedback for the initial switch of options to a
string table. Happy to tweak or adjust if desired here.
Commit: 2b67eceeef6e04ae5a4093bec9a0f0b048c70958
https://github.com/llvm/llvm-project/commit/2b67eceeef6e04ae5a4093bec9a0f0b048c70958
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Driver/arm-mfpu.c
M clang/test/Driver/linux-as.c
Log Message:
-----------
Android no longer supports arm < 7 (#123952)
Commit: 2a51a0d39a659feeeee57b6d1d768bf08d378c5e
https://github.com/llvm/llvm-project/commit/2a51a0d39a659feeeee57b6d1d768bf08d378c5e
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
Log Message:
-----------
Remove reference to android-mips (#124021)
Commit: 091741a880c2df9d3d161068a12655d289633eee
https://github.com/llvm/llvm-project/commit/091741a880c2df9d3d161068a12655d289633eee
Author: Paweł Bylica <pawel at ethereum.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerFlags.def
Log Message:
-----------
[libfuzzer] Clarify -max_len behavior on bigger files (#123095)
Commit: 70d7c847fd1b73c8bb453eac11a4a1ae03bb0d86
https://github.com/llvm/llvm-project/commit/70d7c847fd1b73c8bb453eac11a4a1ae03bb0d86
Author: Hongren Zheng <i at zenithal.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/docs/DefiningDialects/Assembly.md
Log Message:
-----------
[mlir][docs] Add usage/example of OpAsmOpInterface (#123610)
This is part of
https://discourse.llvm.org/t/rfc-introduce-opasm-type-attr-interface-for-pretty-print-in-asmprinter/83792.
OpAsmOpInterface controls the SSA Name/Block Name and Default Dialect
Prefix. This PR adds the usage of them by existing examples in MLIR.
Commit: 4b0df28a68a4ed4ec5829fb4d8722a0e701d1796
https://github.com/llvm/llvm-project/commit/4b0df28a68a4ed4ec5829fb4d8722a0e701d1796
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
Log Message:
-----------
[clang][Tooling] Prefer <atomic> for atomic_* family in C++
Commit: 778138114e9e42e28fcb51c0a38224e667a3790c
https://github.com/llvm/llvm-project/commit/778138114e9e42e28fcb51c0a38224e667a3790c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
Log Message:
-----------
[SDAG] Use BatchAAResults for querying alias analysis (AA) results (#123934)
Once we get to SelectionDAG the IR should not be changing anymore, so we
can use BatchAAResults rather than AAResults to cache AA queries.
This should be a NFC change for targets that enable AA during codegen
(such as AArch64), but also give a nice compile-time improvement in some
cases. See:
https://github.com/llvm/llvm-project/pull/123787#issuecomment-2606797041
Note: This follows Nikita's suggestion on #123787.
Commit: d7c14c8f976fd291984e0c7eed75dd3331b1ed6d
https://github.com/llvm/llvm-project/commit/d7c14c8f976fd291984e0c7eed75dd3331b1ed6d
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/examples/BrainF/BrainF.cpp
M llvm/include/llvm/FuzzMutate/OpDescriptor.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/InlineAsm.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/tools/bugpoint/Miscompilation.cpp
Log Message:
-----------
[IR] Replace of PointerType::getUnqual(Type) with opaque version (NFC) (#123909)
Follow up to https://github.com/llvm/llvm-project/issues/123569
Commit: 9fd92634749c75b39be829c22240567ccda3ffce
https://github.com/llvm/llvm-project/commit/9fd92634749c75b39be829c22240567ccda3ffce
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxxabi/src/abort_message.cpp
Log Message:
-----------
[libc++abi] Remove support for Android 4 and older (#124054)
Commit: 6bc68d0fe94e7fbdec40e1306bf8db1b0db3110c
https://github.com/llvm/llvm-project/commit/6bc68d0fe94e7fbdec40e1306bf8db1b0db3110c
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/__cxx03/__locale_dir/locale_base_api/android.h
M libcxx/include/__locale_dir/locale_base_api/android.h
M libcxx/src/verbose_abort.cpp
Log Message:
-----------
[libc++] Remove support for Android 4 and older (#124062)
Commit: 0429bfea49615882e89ee2350ffde777ce77fb95
https://github.com/llvm/llvm-project/commit/0429bfea49615882e89ee2350ffde777ce77fb95
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/common_reference.h
M libcxx/include/__type_traits/datasizeof.h
M libcxx/include/__type_traits/is_always_bitcastable.h
M libcxx/include/__type_traits/make_signed.h
M libcxx/include/__type_traits/make_unsigned.h
M libcxx/include/__type_traits/remove_cvref.h
M libcxx/include/__type_traits/type_list.h
Log Message:
-----------
[libc++] Remove a few unused includes (#124025)
Commit: ee99c4d4845db66c4daa2373352133f4b237c942
https://github.com/llvm/llvm-project/commit/ee99c4d4845db66c4daa2373352133f4b237c942
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/MC/MCELFStreamer.h
A llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/lib/MC/MCELFStreamer.cpp
A llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[LLVM][Clang][AArch64] Implement AArch64 build attributes (#123990)
- Added support for AArch64-specific build attributes.
- Print AArch64 build attributes to assembly.
- Emit AArch64 build attributes to ELF.
Specification: https://github.com/ARM-software/abi-aa/pull/230
Commit: 7fb97bee9269f0d4239908ac8def70be696991c6
https://github.com/llvm/llvm-project/commit/7fb97bee9269f0d4239908ac8def70be696991c6
Author: Stephen Senran Zhang <zsrkmyn at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/eq.ll
M llvm/test/Transforms/ConstraintElimination/ne.ll
M llvm/test/Transforms/ConstraintElimination/pr105785.ll
Log Message:
-----------
[ConstraintElimination] Add eq/ne facts to signed constraint system (#121423)
Facts of eq/ne were added to unsigned system only, causing some missing
optimizations. This patch adds eq/ne facts to both signed & unsigned
constraint system.
Fixes #117961.
Commit: 08195f31ab1c484ad59dea125bfd61316a07eee8
https://github.com/llvm/llvm-project/commit/08195f31ab1c484ad59dea125bfd61316a07eee8
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/streambuf
Log Message:
-----------
[libc++] Inline basic_streambuf functions (#123379)
Most of the `basic_streambuf` functions are really simple, which makes
most of the implementation when they are out of line boilerplate.
Commit: 8388040fc9e75d49cd000b3371e2610c6c3548ba
https://github.com/llvm/llvm-project/commit/8388040fc9e75d49cd000b3371e2610c6c3548ba
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/ops.mlir
Log Message:
-----------
[mlir][tosa] Add NaN Propagation Mode Support (#121951)
The TOSA-V1.0 specification adds "nan propagation" modes as attributes
for several operators. Adjust the ODS definitions of the relevant
operations to include this attribute.
The defined modes are "PROPAGATE" and "IGNORE" and the PROPAGATE mode is
set by default.
MAXIMUM, MINIMUM, REDUCE_MAX, REDUCE_MIN, MAX_POOL, CLAMP, and ARGMAX
support this attribute.
Signed-off-by: Jack Frankland <jack.frankland at arm.com>
Co-authored-by: TatWai Chong <tatwai.chong at arm.com>
Commit: 19306351a2c45e266fa11b41eb1362b20b6ca56d
https://github.com/llvm/llvm-project/commit/19306351a2c45e266fa11b41eb1362b20b6ca56d
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/test/Modules/empty.modulemap
Log Message:
-----------
[clang][Modules] Raise empty.modulemap expected size to <70KB to fix RISC-V failure (#123959)
I'm not sure why the test is larger for RISC-V than other targets, but
we saw this before with #111360.
The file is just over the current 60KB limit:
```
62772 /home/asb/llvm-project/build/stage2/tools/clang/test/Modules/Output/empty.modulemap.tmp/base.pcm
```
Commit: cad6bbade0d7dc57b9c43d9ed8c38260345d50bf
https://github.com/llvm/llvm-project/commit/cad6bbade0d7dc57b9c43d9ed8c38260345d50bf
Author: Dmitry Polukhin <34227995+dmpolukhin at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/Headers/crash-instantiated-in-scope-cxx-modules5.cpp
Log Message:
-----------
[C++20][Modules] Fix crash/compiler error due broken AST links (#123648)
Summary:
This PR fixes bugreport
https://github.com/llvm/llvm-project/issues/122493 The root problem is
the same as before lambda function and DeclRefExpr references a variable
that does not belong to the same module as the enclosing function body.
Therefore iteration over the function body doesn’t visit the VarDecl.
Before this change RelatedDeclsMap was created only for canonical decl
but in reality it has to be done for the definition of the function that
does not always match the canonical decl.
Test Plan: check-clang
Commit: 2e6cc79f816d942ab09d6a310cd925c1da148aa9
https://github.com/llvm/llvm-project/commit/2e6cc79f816d942ab09d6a310cd925c1da148aa9
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Migrate CpAsyncOp to intrinsics (#123789)
Intrinsics are available for the 'cpSize'
variants also. So, this patch migrates the Op
to lower to the intrinsics for all cases.
* Update the existing tests to check the lowering to intrinsics.
* Add newer cp_async_zfill tests to verify the lowering for the 'cpSize'
variants.
* Tidy-up CHECK lines in cp_async() function in nvvmir.mlir (NFC)
PTX spec link:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-async
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: cb714e74cc0efd5bfdb3e5e80978239425bd83d4
https://github.com/llvm/llvm-project/commit/cb714e74cc0efd5bfdb3e5e80978239425bd83d4
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
A llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size-too-big.mir
Log Message:
-----------
[DebugInfo][InstrRef] Avoid producing broken DW_OP_deref_sizes (#123967)
We use variable locations such as DBG_VALUE $xmm0 as shorthand to refer
to "the low lane of $xmm0", and this is reflected in how DWARF is
interpreted too. However InstrRefBasedLDV tries to be smart and
interprets such a DBG_VALUE as a 128-bit reference. We then issue a
DW_OP_deref_size of 128 bits to the stack, which isn't permitted by
DWARF (it's larger than a pointer).
Solve this for now by not using DW_OP_deref_size if it would be illegal.
Instead we'll use DW_OP_deref, and the consumer will load the variable
type from the stack, which should be correct.
There's still a risk of imprecision when LLVM decides to use smaller or
larger value types than the source-variable type, which manifests as
too-little or too-much memory being read from the stack. However we
can't solve that without putting more type information in debug-info.
fixes #64093
Commit: ad6d808906075c3386bbeada3c37d8d3e6afe248
https://github.com/llvm/llvm-project/commit/ad6d808906075c3386bbeada3c37d8d3e6afe248
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
Log Message:
-----------
[lldb][DWARFASTParserClang] Make C++ method parsing aware of explicit object parameters (#124096)
LLDB deduces the CV-qualifiers and storage class of a C++ method from
the object parameter. Currently it assumes that parameter is implicit
(and is a pointer type with the name "this"). This isn't true anymore in
C++23 with explicit object parameters. To support those we can simply
check the `DW_AT_object_pointer` of the subprogram DIE (works for both
declarations and definitions) when searching for the object parameter.
We can also remove the check for `eEncodingIsPointerUID`, because in C++
an artificial parameter called `this` is only ever the implicit object
parameter (at least for all the major compilers).
Commit: fa7f0e582bc25a91d89dab7c488a1619060f9bef
https://github.com/llvm/llvm-project/commit/fa7f0e582bc25a91d89dab7c488a1619060f9bef
Author: Abhilash Majumder <30946547+abhilash1910 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
Log Message:
-----------
[NVPTX] Add Bulk Copy Prefetch Intrinsics (#123226)
This patch adds NVVM intrinsics and NVPTX codegen for:
- cp.async.bulk.prefetch.L2.* variants
- These intrinsics optionally support cache_hints as indicated by the
boolean flag argument.
- Lit tests are added for all combinations of these intrinsics in
cp-async-bulk.ll.
- The generated PTX is verified with a 12.3 ptxas executable.
- Added docs for these intrinsics in NVPTXUsage.rst file.
PTX Spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-async-bulk-prefetch
Co-authored-by: abmajumder <abmajumder at nvidia.com>
Commit: 17756aa9c9d2f54a29dba3a2805f217cc1723ff0
https://github.com/llvm/llvm-project/commit/17756aa9c9d2f54a29dba3a2805f217cc1723ff0
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang] [Release Notes] Implicit lifetimes are a C++23 feature
Commit: a8020930a8174d84da04fa91b6fef244207f42f5
https://github.com/llvm/llvm-project/commit/a8020930a8174d84da04fa91b6fef244207f42f5
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
Log Message:
-----------
Revert "[lldb][DWARFASTParserClang] Make C++ method parsing aware of explicit object parameters" (#124100)
Reverts llvm/llvm-project#124096
Broke linux CI:
```
Note: This is test shard 7 of 42.
[==========] Running 1 test from 1 test suite.
[----------] Global test environment set-up.
[----------] 1 test from DWARFASTParserClangTests
[ RUN ] DWARFASTParserClangTests.TestParseSubroutine_ExplicitObjectParameter
Expected<T> must be checked before access or destruction.
Expected<T> value was in success state. (Note: Expected<T> values in success mode must still be checked prior to being destroyed).
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0 SymbolFileDWARFTests 0x0000560271ee5ba7
1 SymbolFileDWARFTests 0x0000560271ee3a2c
2 SymbolFileDWARFTests 0x0000560271ee63ea
3 libc.so.6 0x00007f3e54e5b050
4 libc.so.6 0x00007f3e54ea9e2c
5 libc.so.6 0x00007f3e54e5afb2 gsignal + 18
6 libc.so.6 0x00007f3e54e45472 abort + 211
7 SymbolFileDWARFTests 0x0000560271e79d51
8 SymbolFileDWARFTests 0x0000560271e724f7
9 SymbolFileDWARFTests 0x0000560271f39e2c
10 SymbolFileDWARFTests 0x0000560271f3b368
11 SymbolFileDWARFTests 0x0000560271f3c053
12 SymbolFileDWARFTests 0x0000560271f4cf67
13 SymbolFileDWARFTests 0x0000560271f4c18a
14 SymbolFileDWARFTests 0x0000560271f2561c
15 libc.so.6 0x00007f3e54e4624a
16 libc.so.6 0x00007f3e54e46305 __libc_start_main + 133
17 SymbolFileDWARFTests 0x0000560271e65161
```
Commit: 05fbc3830d05878a0521a3e07aa1e469905ce732
https://github.com/llvm/llvm-project/commit/05fbc3830d05878a0521a3e07aa1e469905ce732
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Move VPBlockUtils to VPlanUtils.h (NFC)
Nothing in VPlan.h directly uses VPBlockUtils.h. Move it out to the more
appropriate VPlanUtils.h to reduce the size of the widely included VPlan.h.
Commit: 4bcdb26dac4cdadd7f8850a5f9b2e775b73aaf7f
https://github.com/llvm/llvm-project/commit/4bcdb26dac4cdadd7f8850a5f9b2e775b73aaf7f
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
Log Message:
-----------
Revert "[lldb][test] Remove compiler version check and use regex" (#124101)
Reverts llvm/llvm-project#123393
This is causing `TestVectorOfVectorsFromStdModule.py` to fail on the the
macOS clang-15 matrix bot.
Commit: 4f26edd5e9eb3b6cea19e15ca8fb2c8416b82fa8
https://github.com/llvm/llvm-project/commit/4f26edd5e9eb3b6cea19e15ca8fb2c8416b82fa8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/lib/Support/YAMLTraits.cpp
Log Message:
-----------
[NFC][YAML] Add `IO::error()` (#123475)
For #123280
Commit: 1311b36acea0ac0d94c23452fcb0109bb18373cb
https://github.com/llvm/llvm-project/commit/1311b36acea0ac0d94c23452fcb0109bb18373cb
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[llvm][Support] Put back filename into FileToRemoveList (#124065)
Prevents avoidable memory leaks.
Looks like exchange added in aa1333a91f8d8a060bcf5b14aa32a6e8bab74e8c
didn't take "continue" into account.
```
==llc==2150782==ERROR: LeakSanitizer: detected memory leaks
Direct leak of 10 byte(s) in 1 object(s) allocated from:
#0 0x5f1b0f9ac14a in strdup llvm-project/compiler-rt/lib/asan/asan_interceptors.cpp:593:3
#1 0x5f1b1768428d in FileToRemoveList llvm-project/llvm/lib/Support/Unix/Signals.inc:105:55
```
Commit: 636bc72f672712cb848729c0f130d8b42c86f1cb
https://github.com/llvm/llvm-project/commit/636bc72f672712cb848729c0f130d8b42c86f1cb
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
Log Message:
-----------
Reland "[lldb][DWARFASTParserClang] Make C++ method parsing aware of explicit object parameters" (#124100)"
This reverts commit a8020930a8174d84da04fa91b6fef244207f42f5.
Relands original commit but fixing the unit-test to consume the
`llvm::Expected` error object.
Commit: 3ea2b546a8d17014d3ecf05356ecfaadf26ed846
https://github.com/llvm/llvm-project/commit/3ea2b546a8d17014d3ecf05356ecfaadf26ed846
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Host/windows/PipeWindows.cpp
Log Message:
-----------
[lldb/windows] Make "anonymous" pipe names more unique (#123905)
Using a "random" name for an "anonymous" pipe seems to be the state of
the art on windows (according to stack overflow, new windows versions
may have something better, but it involves calling kernel APIs directly
and generally a lot of dark magic).
The problem with the current method was that is does not produce unique
names if one has two copies of the pipe code in the same process, which
is what happened with #120457 (because liblldb only exposes the public
api, and we've started using the pipe code in lldb-dap as well).
This patch works around the problem by adding the address of the counter
variable to the pipe name.
Replicating the multiple-copies setup in a test would be very difficult,
which is why I'm not adding a test for this scenario.
Commit: 0236cb689550ed2dac406443c652efb723cb2602
https://github.com/llvm/llvm-project/commit/0236cb689550ed2dac406443c652efb723cb2602
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Target/UnixSignals.cpp
M lldb/test/API/commands/frame/diagnose/array/TestArray.py
M lldb/test/API/commands/frame/diagnose/bad-reference/TestBadReference.py
M lldb/test/API/commands/frame/diagnose/complicated-expression/TestComplicatedExpression.py
M lldb/test/API/commands/frame/diagnose/dereference-argument/TestDiagnoseDereferenceArgument.py
M lldb/test/API/commands/frame/diagnose/dereference-function-return/TestDiagnoseDereferenceFunctionReturn.py
M lldb/test/API/commands/frame/diagnose/dereference-this/TestDiagnoseDereferenceThis.py
M lldb/test/API/commands/frame/diagnose/inheritance/TestDiagnoseInheritance.py
M lldb/test/API/commands/frame/diagnose/local-variable/TestLocalVariable.py
M lldb/test/API/commands/frame/diagnose/virtual-method-call/TestDiagnoseDereferenceVirtualMethodCall.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
M lldb/unittests/Signals/UnixSignalsTest.cpp
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb] Enable "frame diagnose" on linux (#123217)
.. by changing the signal stop reason format :facepalm:
The reason this did not work is because the code in
`StopInfo::GetCrashingDereference` was looking for the string "address="
to extract the address of the crash. Macos stop reason strings have the
form
```
EXC_BAD_ACCESS (code=1, address=0xdead)
```
while on linux they look like:
```
signal SIGSEGV: address not mapped to object (fault address: 0xdead)
```
Extracting the address from a string sounds like a bad idea, but I
suppose there's some value in using a consistent format across
platforms, so this patch changes the signal format to use the equals
sign as well. All of the diagnose tests pass except one, which appears
to fail due to something similar #115453 (disassembler reports
unrelocated call targets).
I've left the tests disabled on windows, as the stop reason reporting
code works very differently there, and I suspect it won't work out of
the box. If I'm wrong -- the XFAIL will let us know.
Commit: 6f684816e25d8b4e5fb2cbc7d0560d608a8bd938
https://github.com/llvm/llvm-project/commit/6f684816e25d8b4e5fb2cbc7d0560d608a8bd938
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libcxx/include/__compare/compare_three_way_result.h
M libcxx/include/__config
M libcxx/include/__format/format_arg.h
M libcxx/include/__ranges/range_adaptor.h
M libcxx/include/__type_traits/add_cv_quals.h
M libcxx/include/__type_traits/add_lvalue_reference.h
M libcxx/include/__type_traits/add_pointer.h
M libcxx/include/__type_traits/add_rvalue_reference.h
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/alignment_of.h
M libcxx/include/__type_traits/conditional.h
M libcxx/include/__type_traits/conjunction.h
M libcxx/include/__type_traits/decay.h
M libcxx/include/__type_traits/disjunction.h
M libcxx/include/__type_traits/enable_if.h
M libcxx/include/__type_traits/extent.h
M libcxx/include/__type_traits/has_unique_object_representation.h
M libcxx/include/__type_traits/has_virtual_destructor.h
M libcxx/include/__type_traits/integral_constant.h
M libcxx/include/__type_traits/invoke.h
M libcxx/include/__type_traits/is_abstract.h
M libcxx/include/__type_traits/is_aggregate.h
M libcxx/include/__type_traits/is_arithmetic.h
M libcxx/include/__type_traits/is_array.h
M libcxx/include/__type_traits/is_assignable.h
M libcxx/include/__type_traits/is_base_of.h
M libcxx/include/__type_traits/is_bounded_array.h
M libcxx/include/__type_traits/is_class.h
M libcxx/include/__type_traits/is_compound.h
M libcxx/include/__type_traits/is_const.h
M libcxx/include/__type_traits/is_constructible.h
M libcxx/include/__type_traits/is_convertible.h
M libcxx/include/__type_traits/is_destructible.h
M libcxx/include/__type_traits/is_empty.h
M libcxx/include/__type_traits/is_enum.h
M libcxx/include/__type_traits/is_execution_policy.h
M libcxx/include/__type_traits/is_final.h
M libcxx/include/__type_traits/is_floating_point.h
M libcxx/include/__type_traits/is_function.h
M libcxx/include/__type_traits/is_fundamental.h
M libcxx/include/__type_traits/is_implicit_lifetime.h
M libcxx/include/__type_traits/is_integral.h
M libcxx/include/__type_traits/is_literal_type.h
M libcxx/include/__type_traits/is_member_pointer.h
M libcxx/include/__type_traits/is_nothrow_assignable.h
M libcxx/include/__type_traits/is_nothrow_constructible.h
M libcxx/include/__type_traits/is_nothrow_convertible.h
M libcxx/include/__type_traits/is_nothrow_destructible.h
M libcxx/include/__type_traits/is_null_pointer.h
M libcxx/include/__type_traits/is_object.h
M libcxx/include/__type_traits/is_pod.h
M libcxx/include/__type_traits/is_pointer.h
M libcxx/include/__type_traits/is_polymorphic.h
M libcxx/include/__type_traits/is_reference.h
M libcxx/include/__type_traits/is_same.h
M libcxx/include/__type_traits/is_scalar.h
M libcxx/include/__type_traits/is_signed.h
M libcxx/include/__type_traits/is_standard_layout.h
M libcxx/include/__type_traits/is_swappable.h
M libcxx/include/__type_traits/is_trivial.h
M libcxx/include/__type_traits/is_trivially_assignable.h
M libcxx/include/__type_traits/is_trivially_constructible.h
M libcxx/include/__type_traits/is_trivially_copyable.h
M libcxx/include/__type_traits/is_trivially_destructible.h
M libcxx/include/__type_traits/is_unbounded_array.h
M libcxx/include/__type_traits/is_union.h
M libcxx/include/__type_traits/is_unsigned.h
M libcxx/include/__type_traits/is_void.h
M libcxx/include/__type_traits/is_volatile.h
M libcxx/include/__type_traits/make_signed.h
M libcxx/include/__type_traits/make_unsigned.h
M libcxx/include/__type_traits/negation.h
M libcxx/include/__type_traits/rank.h
M libcxx/include/__type_traits/remove_all_extents.h
M libcxx/include/__type_traits/remove_const.h
M libcxx/include/__type_traits/remove_cv.h
M libcxx/include/__type_traits/remove_cvref.h
M libcxx/include/__type_traits/remove_extent.h
M libcxx/include/__type_traits/remove_pointer.h
M libcxx/include/__type_traits/remove_reference.h
M libcxx/include/__type_traits/remove_volatile.h
M libcxx/include/__type_traits/type_identity.h
M libcxx/include/__type_traits/underlying_type.h
M libcxx/include/__type_traits/unwrap_ref.h
M libcxx/include/execution
M libcxx/include/variant
A libcxx/test/libcxx/algorithms/no_specializations.verify.cpp
A libcxx/test/libcxx/language.support/no_specializations.verify.cpp
A libcxx/test/libcxx/ranges/no_specializations.verify.cpp
A libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/format/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/no_specializations.verify.cpp
Log Message:
-----------
[libc++] Use [[clang::no_specializations]] to diagnose invalid user specializations (#118167)
Some templates in the standard library are illegal to specialize for users
(even if the specialization contains user-defined types). The [[clang::no_specializations]]
attribute allows marking such base templates so that the compiler will
diagnose if users try adding a specialization.
Commit: 9705500582b9c2b2e1dd6de14f03a94d270a9250
https://github.com/llvm/llvm-project/commit/9705500582b9c2b2e1dd6de14f03a94d270a9250
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M libclc/amdgpu/lib/SOURCES
R libclc/amdgpu/lib/math/nextafter.cl
M libclc/clc/include/clc/clcmacro.h
A libclc/clc/include/clc/math/binary_decl_with_scalar_second_arg.inc
A libclc/clc/include/clc/math/clc_nextafter.h
M libclc/clc/include/clc/relational/clc_isnan.h
A libclc/clc/include/clc/shared/binary_decl.inc
M libclc/clc/lib/clspv/SOURCES
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_nextafter.cl
M libclc/clc/lib/spirv/SOURCES
M libclc/clc/lib/spirv64/SOURCES
M libclc/clspv/lib/SOURCES
R libclc/clspv/lib/math/nextafter.cl
R libclc/clspv/lib/math/nextafter.inc
R libclc/generic/include/clc/math/binary_decl.inc
M libclc/generic/include/clc/math/fmax.h
M libclc/generic/include/clc/math/fmin.h
R libclc/generic/include/math/clc_nextafter.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/nextafter.cl
R libclc/ptx/lib/SOURCES
R libclc/ptx/lib/math/nextafter.cl
Log Message:
-----------
[libclc] Move nextafter to the CLC library (#124097)
There were two implementations of this - one that implemented nextafter
in software, and another that called a clang builtin. No in-tree targets
called the builtin, so all targets build the software version. The
builtin version has been removed, and the software version has been
renamed to be the "default".
This commit also optimizes nextafter, to avoid scalarization as much as
possible. Note however that the (CLC) relational builtins still
scalarize; those will be optimized in a separate commit.
Since nextafter is used by some convert_type builtins, the diff to IR
codegen is not limited to the builtin itself.
Commit: e069518f82bc3699dc4fc81bbc99ae4a6d44449e
https://github.com/llvm/llvm-project/commit/e069518f82bc3699dc4fc81bbc99ae4a6d44449e
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/implied-via-division.ll
Log Message:
-----------
SCEV: cover a codepath in isImpliedCondBalancedTypes (#123070)
The code that checks a predicate against a swapped predicate in
isImpliedCondBalancedTypes is not covered by any existing test, within
any Analysis or Transform. Fix this by adding a test to SCEV.
Commit: 0e944a30954e666cba2bf17497fafe835e4b3519
https://github.com/llvm/llvm-project/commit/0e944a30954e666cba2bf17497fafe835e4b3519
Author: Tuomas Kärnä <tuomas.karna at intel.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
Log Message:
-----------
[SCFToGPU] Convert scf.parallel+scf.reduce to gpu.all_reduce (#122782)
Support reductions in SCFToGPU: `scf.parallel` and `scf.reduce` op
combination is now converted to a `gpu.all_reduce` op.
Commit: 90e9895a9373b3d83eefe15b34d2dc83c7bcc88f
https://github.com/llvm/llvm-project/commit/90e9895a9373b3d83eefe15b34d2dc83c7bcc88f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/test/CodeGen/X86/bit_ceil.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/pr89877.ll
M llvm/test/CodeGen/X86/pr90847.ll
M llvm/test/CodeGen/X86/pr92569.ll
M llvm/test/CodeGen/X86/scheduler-backtracking.ll
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/tools/llvm-mca/X86/BtVer2/clear-super-register-1.s
Log Message:
-----------
[X86] Handle BSF/BSR "zero-input pass through" behaviour (#123623)
Intel docs have been updated to be similar to AMD and now describe
BSF/BSR as not changing the destination register if the input value was
zero, which allows us to support CTTZ/CTLZ zero-input cases by setting
the destination to support a NumBits result (BSR is a bit messy as it
has to be XOR'd to create a CTLZ result). VIA/Zhaoxin x86_64 CPUs have also
been confirmed to match this behaviour.
This patch adjusts the X86ISD::BSF/BSR nodes to take a "pass through"
argument for zero-input cases, by default this is set to UNDEF to match
existing behaviour, but it can be set to a suitable value if supported.
There are still some limits to this - its only supported for x86_64
capable processors (and I've only enabled it for x86_64 codegen), and
Intel CPUs sometimes zero the upper 32-bits of a pass through register
when used for BSR32/BSF32 with a zero source value (i.e. the whole
64bits may not get passed through).
Fixes #122004
Commit: 0c66644270abc1455e92301a44232b9af75fafc6
https://github.com/llvm/llvm-project/commit/0c66644270abc1455e92301a44232b9af75fafc6
Author: Danial Klimkin <dklimkin at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel]Fix bazel build past 2e6cc79f816d942ab09d6a310cd925c1da148aa9 (#124112)
Split target under LLVMIR/Transforms to avoid deps loop.
Commit: 590e5e20b12f9fd956d0ba7de83aa2ab44c9faeb
https://github.com/llvm/llvm-project/commit/590e5e20b12f9fd956d0ba7de83aa2ab44c9faeb
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/M68k/pipeline.ll
Log Message:
-----------
[M68k] Fix llc pass test after 3630d9ef65b30af7e4ca78e668649bbc48b5be66
Commit: d3d605b7cdee132929d32f8b71b01641eb1d6d37
https://github.com/llvm/llvm-project/commit/d3d605b7cdee132929d32f8b71b01641eb1d6d37
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/FileCheck/FileCheckImpl.h
Log Message:
-----------
[FileCheck] Use move semantics instead of std::swap. NFC. (#123304)
This code was using a pre-move-semantics trick of using std::swap to
avoid expensive vector copies.
Commit: fb3fa41aee4733e549620a4aa444525aacb075f7
https://github.com/llvm/llvm-project/commit/fb3fa41aee4733e549620a4aa444525aacb075f7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
Log Message:
-----------
MachineRegisterInfo: Use variable for TRI
Commit: 6fdaaafd89d7cbc15dafe3ebf1aa3235d148aaab
https://github.com/llvm/llvm-project/commit/6fdaaafd89d7cbc15dafe3ebf1aa3235d148aaab
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
Log Message:
-----------
[AMDGPU] SIPeepholeSDWA: Disable on existing SDWA instructions (#123942)
This is meant as a short-term workaround for an invalid conversion in
this pass that occurs because existing SDWA selections are not correctly
taken into account during the conversion.
See the draft PR #123221 for an attempt to fix the actual issue.
---------
Co-authored-by: Frederik Harwath <fharwath at amd.com>
Commit: d8eb4ac41d881a19bea7673d753ba92e6a11f5d6
https://github.com/llvm/llvm-project/commit/d8eb4ac41d881a19bea7673d753ba92e6a11f5d6
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/Support/Threading.h
Log Message:
-----------
[Support] Remove ciso646 include (#123578)
This header has been removed in C++20 and causes a large amount of
deprecation spam when building against libstdc++ 15 in C++17 mode.
As far as I understand, we just need to include *some* STL header to get
access to the version macros, and as this header also includes
<optional> nowadays we can just drop the <cstd646> include entirely.
Commit: ff55c9bc63ddd1bbe13376c25ae1fc327e3d5da2
https://github.com/llvm/llvm-project/commit/ff55c9bc63ddd1bbe13376c25ae1fc327e3d5da2
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
A llvm/test/CodeGen/AMDGPU/lower-indirect-lds-references.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
Log Message:
-----------
[llvm][amdgpu] Handle indirect refs to LDS GVs during LDS lowering (#124089)
Fixes #123800
Extends LDS lowering by allowing it to discover transitive
indirect/escpaing references to LDS GVs.
For example, given the following input:
```llvm
@lds_item_to_indirectly_load = internal addrspace(3) global ptr undef, align 8
%store_type = type { i32, ptr }
@place_to_store_indirect_caller = internal addrspace(3) global %store_type undef, align 8
define amdgpu_kernel void @offloading_kernel() {
store ptr @indirectly_load_lds, ptr addrspace(3) getelementptr inbounds nuw (i8, ptr addrspace(3) @place_to_store_indirect_caller, i32 0), align 8
call void @call_unknown()
ret void
}
define void @call_unknown() {
%1 = alloca ptr, align 8
%2 = call i32 %1()
ret void
}
define void @indirectly_load_lds() {
call void @directly_load_lds()
ret void
}
define void @directly_load_lds() {
%2 = load ptr, ptr addrspace(3) @lds_item_to_indirectly_load, align 8
ret void
}
```
With the above input, prior to this patch, LDS lowering failed to lower
the reference to `@lds_item_to_indirectly_load` because:
1. it is indirectly called by a function whose address is taken in the
kernel.
2. we did not check if the kernel indirectly makes any calls to unknown
functions (we only checked the direct calls).
Co-authored-by: Jon Chesterfield <jonathan.chesterfield at amd.com>
Commit: 92b839e9c82450a3c465d349de73818e6aad59f3
https://github.com/llvm/llvm-project/commit/92b839e9c82450a3c465d349de73818e6aad59f3
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[gn] fix mistake in ee99c4d4845db
Commit: e28e93550a74752714db6fffe50233aa96e536a5
https://github.com/llvm/llvm-project/commit/e28e93550a74752714db6fffe50233aa96e536a5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
Log Message:
-----------
AMDGPU: Make vector_shuffle legal for v2i32 with v_pk_mov_b32 (#123684)
For VALU shuffles, this saves an instruction in some case.
Commit: 0c71fdd1575b826cbb3c252ee0b15fc84559abec
https://github.com/llvm/llvm-project/commit/0c71fdd1575b826cbb3c252ee0b15fc84559abec
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Driver/cuda-cross-compiling.c
Log Message:
-----------
[NVPTX] Fix ctor / dtor lowering when NVPTX target is not enabled (#124116)
Summary:
We pass the `-nvptx-lower-global-ctor-dtor` option to support the `libc`
like use-case which needs global constructors sometimes. This only
affects the backend. If the NVPTX target is not enabled this option will
be unknown which prevents you from compiling generic IR for this.
Commit: 99d450e9f51683bad608bf801e1b29e5c54b8917
https://github.com/llvm/llvm-project/commit/99d450e9f51683bad608bf801e1b29e5c54b8917
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
R llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
R llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
Log Message:
-----------
Revert "[AMDGPU] SIPeepholeSDWA: Disable on existing SDWA instructions (#123942)"
This reverts commit 6fdaaafd89d7cbc15dafe3ebf1aa3235d148aaab.
Breaks check-llvm, see
https://github.com/llvm/llvm-project/pull/123942#issuecomment-2609861953
Commit: 4d3a5309248e167021913736dfd5276ee536f4ce
https://github.com/llvm/llvm-project/commit/4d3a5309248e167021913736dfd5276ee536f4ce
Author: Danial Klimkin <dklimkin at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel]Fix(2) bazel build past 2e6cc79f816d942ab09d6a310cd925c1da148aa9 (#124118)
Fix caused link errors downstream.
Commit: 25653e558c292e9582d8132134af47a1af55499b
https://github.com/llvm/llvm-project/commit/25653e558c292e9582d8132134af47a1af55499b
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/Headers/avx10_2_512convertintrin.h
M clang/lib/Headers/avx10_2convertintrin.h
M clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
M clang/test/CodeGen/X86/avx10_2convert-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt
M llvm/test/MC/X86/avx10.2convert-32-att.s
M llvm/test/MC/X86/avx10.2convert-32-intel.s
M llvm/test/MC/X86/avx10.2convert-64-att.s
M llvm/test/MC/X86/avx10.2convert-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[AVX10.2] Update convert chapter intrinsic and mnemonics names (#123656)
Intel spec for avx10.2
(https://cdrdv2.intel.com/v1/dl/getContent/828965) has been updated.
This PR changes relevant names from the "AVX10 CONVERT INSTRUCTIONS"
chapter .
Commit: 1f0964f81e5ae90e1c50fcdd103ec9c838b995e0
https://github.com/llvm/llvm-project/commit/1f0964f81e5ae90e1c50fcdd103ec9c838b995e0
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/Contributing.rst
Log Message:
-----------
[llvm][Docs] Clarify finding maintainers
By noting where the files are to be found, and adding some
whitespace to break up large blocks.
(the merge on behalf bit needs a refresh but this will go
into review later after this)
Commit: 26b61e143b7e6117b57df2b58bbcb146a6f0f4d4
https://github.com/llvm/llvm-project/commit/26b61e143b7e6117b57df2b58bbcb146a6f0f4d4
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
Log Message:
-----------
[LoopVectorizer] Propagate underlying instruction to the cloned instances of VPPartialReductionRecipes (#123638)
Commit: 6206f5444fc0732e6495703c75a67f1f90f5b418
https://github.com/llvm/llvm-project/commit/6206f5444fc0732e6495703c75a67f1f90f5b418
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/abs_i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.mir
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/pr51516.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
Log Message:
-----------
[AMDGPU] Occupancy w.r.t. workgroup size range is also a range (#123748)
Occupancy (i.e., the number of waves per EU) depends, in addition to
register usage, on per-workgroup LDS usage as well as on the range of
possible workgroup sizes. Mirroring the latter, occupancy should
therefore be expressed as a range since different group sizes generally
yield different achievable occupancies.
`getOccupancyWithLocalMemSize` currently returns a scalar occupancy
based on the maximum workgroup size and LDS usage. With respect to the
workgroup size range, this scalar can be the minimum, the maximum, or
neither of the two of the range of achievable occupancies. This commit
fixes the function by making it compute and return the range of
achievable occupancies w.r.t. workgroup size and LDS usage; it also
renames it to `getOccupancyWithWorkGroupSizes` since it is the range of
workgroup sizes that produces the range of achievable occupancies.
Computing the achievable occupancy range is surprisingly involved.
Minimum/maximum workgroup sizes do not necessarily yield maximum/minimum
occupancies i.e., sometimes workgroup sizes inside the range yield the
occupancy bounds. The implementation finds these sizes in constant time;
heavy documentation explains the rationale behind the sometimes
relatively obscure calculations.
As a justifying example, consider a target with 10 waves / EU, 4 EUs/CU,
64-wide waves. Also consider a function with no LDS usage and a flat
workgroup size range of [513,1024].
- A group of 513 items requires 9 waves per group. Only 4 groups made up
of 9 waves each can fit fully on a CU at any given time, for a total of
36 waves on the CU, or 9 per EU. However, filling as much as possible
the remaining 40-36=4 wave slots without decreasing the number of groups
reveals that a larger group of 640 items yields 40 waves on the CU, or
10 per EU.
- Similarly, a group of 1024 items requires 16 waves per group. Only 2
groups made up of 16 waves each can fit fully on a CU ay any given time,
for a total of 32 waves on the CU, or 8 per EU. However, removing as
many waves as possible from the groups without being able to fit another
equal-sized group on the CU reveals that a smaller group of 896 items
yields 28 waves on the CU, or 7 per EU.
Therefore the achievable occupancy range for this function is not [8,9]
as the group size bounds directly yield, but [7,10].
Naturally this change causes a lot of test churn as instruction
scheduling is driven by achievable occupancy estimates. In most unit
tests the flat workgroup size range is the default [1,1024] which,
ignoring potential LDS limitations, would previously produce a scalar
occupancy of 8 (derived from 1024) on a lot of targets, whereas we now
consider the maximum occupancy to be 10 in such cases. Most tests are
updated automatically and checked manually for sanity. I also manually
changed some non-automatically generated assertions when necessary.
Fixes #118220.
Commit: c3b40c7ea215487ffc3b9d146f3f8f9a7ac8d407
https://github.com/llvm/llvm-project/commit/c3b40c7ea215487ffc3b9d146f3f8f9a7ac8d407
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/uadd_sat_vec.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
Log Message:
-----------
[X86] Regenerate test checks (NFC)
Regenerate some tests for the new vpternlog printing.
Commit: f61d93ffc456d94df729529642ea180b40ef9d19
https://github.com/llvm/llvm-project/commit/f61d93ffc456d94df729529642ea180b40ef9d19
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/HLFIR/elemental-intrinsics.f90
M flang/test/Lower/Intrinsics/acos.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/trigonometric-intrinsics.f90
Log Message:
-----------
[Flang] Generate math.acos op for non-precise acos intrinsic calls (#123641)
This patch changes the codgegn for non-precise acos calls to generate
math.acos ops. This wasn't done before because the math dialect did not
have a acos operation at the time.
Commit: 6fe0fc60341b05bf30ccc16012dab9eeb55a338d
https://github.com/llvm/llvm-project/commit/6fe0fc60341b05bf30ccc16012dab9eeb55a338d
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/ARM/ARMCallingConv.cpp
Log Message:
-----------
[CallingConv] Return ArrayRef from AllocateRegBlock() (NFC) (#124120)
Instead of returning the first register, return the ArrayRef containing
the whole block.
Existing users rely on the fact that the register block only contains
adjacently-numbered registers and it's possible to get the remaining
registers in the block by just incrementing the register. Returning an
ArrayRef allows more generic usage with non-adjacent registers.
Commit: e1aa1e43decf9275175845bea970ef6d7c2b1af6
https://github.com/llvm/llvm-project/commit/e1aa1e43decf9275175845bea970ef6d7c2b1af6
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/test/ThinLTO/X86/devirt_check.ll
Log Message:
-----------
[WPD]Provide branch weight for checking mode. (#124084)
Checking mode aims to help diagnose and confirm undefined behavior. In
most cases, source code don't cast pointers between unrelated types for
virtual calls, so we expect direct calls in the frequent branch and
debug trap in the unlikely branch.
This way, the overhead of checking mode is not higher than an indirect
call promotion for a hot callsite as long as the callsite doesn't run the debug trap
branch.
Commit: 96410edd4748a78e6b736eef8a5ff1ca4bb29be5
https://github.com/llvm/llvm-project/commit/96410edd4748a78e6b736eef8a5ff1ca4bb29be5
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
mark test as unsupported as I investigate test failure on certain environments
Commit: cb426b18c2f683ed3b4be325f257d62976d22f00
https://github.com/llvm/llvm-project/commit/cb426b18c2f683ed3b4be325f257d62976d22f00
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXIL.td
Log Message:
-----------
[NFC][DirectX] Clean-up of `DXIL.td` (#124005)
- Runs clang-format on `DXIL.td`
Note: this does not include the suggested formatting changes to `defset
list<DXILOpClasses> OpClasses` as it does not enforce the formatting
that is primarily used elsewhere
- Reorders currently defined `DXIL` ops by opcode in ascending order to
be consistent with other definitions
This is a small cleanup moved to be separate from
[#115912](https://github.com/llvm/llvm-project/issues/115912) for
reviewability.
Commit: 4bd0440bd2a653644987dddf8ec8d9d1f258ce31
https://github.com/llvm/llvm-project/commit/4bd0440bd2a653644987dddf8ec8d9d1f258ce31
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
A llvm/test/MC/RISCV/rvv/xsfvfwmacc-invalid.s
A llvm/test/MC/RISCV/rvv/xsfvqmacc-invalid.s
Log Message:
-----------
[RISCV] Add RVVConstraint to SiFive custom matrix multiply instructions. (#124055)
The instructions don't allow the vs1 encoded register to overlap vd.
Confusingly these instructions order their operands vd, vs1, vs2 while
every other vector instruction is vd, vs2, vs1. So we need to use
VS2Constraint for this since it checks the first operand after vd.
2 of the 3 extensions have instruction that produce a result with
EMUL=2*LMUL. This makes them subject to the widening constraints for
vs2. So for these extensions we use WidenV which includes VS2Constraint.
Commit: 1937a36209bc5f3636e7c98a1638ee9f082b4d2b
https://github.com/llvm/llvm-project/commit/1937a36209bc5f3636e7c98a1638ee9f082b4d2b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Add @earlyclobber to SiFive custom matrix multiply instruction. (#124060)
All of these have a constraint that vd and vs1 cannot overlap. Some of
them have an additional widening constraint for vs2. We should use
earlyclobber to protect this.
This is unlikely to be an issue in practice due to the instrinsic being
ternary so vd is also a source. The intrinsic has a different type for
this source than the other sources. You would have to do something crazy
to get the register allocator to overlap the registers.
Commit: df299958e64c73d73b427afc70b960ec039586ac
https://github.com/llvm/llvm-project/commit/df299958e64c73d73b427afc70b960ec039586ac
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
Log Message:
-----------
[mlir] Fix warnings
This patch fixes:
mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp:403:5: error:
'ClampRange' may not intend to support class template argument
deduction [-Werror,-Wctad-maybe-unsupported]
mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp:404:5: error:
'ClampRange' may not intend to support class template argument
deduction [-Werror,-Wctad-maybe-unsupported]
Commit: bca6dbd3a241f4a2cb6cfa5ed4c2f94cf76d3f17
https://github.com/llvm/llvm-project/commit/bca6dbd3a241f4a2cb6cfa5ed4c2f94cf76d3f17
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/i128-abi.ll
Log Message:
-----------
[X86] Add additional i128 abi test (NFC)
Commit: 7db4ba3916d33e57fb5244214f4873bf74e273f0
https://github.com/llvm/llvm-project/commit/7db4ba3916d33e57fb5244214f4873bf74e273f0
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalMerge.cpp
Log Message:
-----------
[GlobalMerge][NFC] Fix inaccurate comments (#124136)
I was studying the code here and realized that the comments were talking
about grouping by basic blocks when the code was grouping by Function.
Fix the comments so they reflect what the code is actually doing.
Commit: fa299294c068b1857d8d7ee74a512080898f194d
https://github.com/llvm/llvm-project/commit/fa299294c068b1857d8d7ee74a512080898f194d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Modernize code base in several places
Commit: e622468f164f6ba223e6862d8235eea5f555f927
https://github.com/llvm/llvm-project/commit/e622468f164f6ba223e6862d8235eea5f555f927
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/AST/JSONNodeDumper.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#124074)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect CO to be nonnull.
Commit: 113e1fdc8c7f9085d5a48ca16b270cf53e9f189d
https://github.com/llvm/llvm-project/commit/113e1fdc8c7f9085d5a48ca16b270cf53e9f189d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
[CodeGen] Migrate away from PointerUnion::dyn_cast (NFC) (#124076)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect Pos to be nonnull.
Commit: d05008363d4ed87b1350701831032ea5070d5b98
https://github.com/llvm/llvm-project/commit/d05008363d4ed87b1350701831032ea5070d5b98
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lldb/source/Target/DynamicRegisterInfo.cpp
Log Message:
-----------
[lldb] Avoid repeated map lookups (NFC) (#124077)
Commit: bb019dd165ceeb5b9c9e4a0bf3c9ee9bc886e7fc
https://github.com/llvm/llvm-project/commit/bb019dd165ceeb5b9c9e4a0bf3c9ee9bc886e7fc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineLoopUtils.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#124078)
Commit: bda39a6067833c9353adbc42bddb1b5808bcf44b
https://github.com/llvm/llvm-project/commit/bda39a6067833c9353adbc42bddb1b5808bcf44b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
Log Message:
-----------
[ExecutionEngine] Include <map> (#124083)
This patch reinstates an include of <map>, fixing a build failure
caused by:
commit 1f4d91ecb8529678a3d3919d7523743bd21942ca
Author: Kazu Hirata <kazu at google.com>
Date: Tue Nov 19 19:41:59 2024 -0800
[ExecutionEngine] Remove unused includes (NFC) (#116749)
---------
Co-authored-by: h-vetinari <h.vetinari at gmx.com>
Commit: 7ddeea359811ec49a07db948bbf3f6b6c915f675
https://github.com/llvm/llvm-project/commit/7ddeea359811ec49a07db948bbf3f6b6c915f675
Author: Acim Maravic <Acim.Maravic at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
Log Message:
-----------
[LLVM][AMDGPU] MC support for ds_bpermute_fi_b32 (#124108)
Added assembler/disassembler support for ds_bpermute_fi_b32 instruction,
as well as tests.
Commit: d8cd8d56ea980d9a9c1e70bcc2dd7207d1236f94
https://github.com/llvm/llvm-project/commit/d8cd8d56ea980d9a9c1e70bcc2dd7207d1236f94
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/min_max.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
Log Message:
-----------
[SLP] getSpillCost - fully populate IntrinsicCostAttributes to improve cost analysis. (#124129)
We were only constructing the IntrinsicCostAttributes with the arg type info, and not the args themselves, preventing more detailed cost analysis (constant / uniform args etc.)
Just pass the whole IntrinsicInst to the constructor and let it resolve everything it can.
Noticed while having yet another attempt at #63980
Commit: 2f76e2b27d9ddd4fa0a1098f77b96fa51905bdb1
https://github.com/llvm/llvm-project/commit/2f76e2b27d9ddd4fa0a1098f77b96fa51905bdb1
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/fno-plt.c
Log Message:
-----------
[Driver] -fno-plt: warn for unsupported targets
-fno-plt is an ELF specific option that is only implemented for x86 (for
a long time) and AArch64 (#78890). GCC doesn't bother to give a
diagnostic on Windows. -fno-plt is somewhat popular and we've been
ignoring it for unsupported targets for a while, so just report a
warning for unsupported targets.
Pull Request: https://github.com/llvm/llvm-project/pull/124081
Commit: 082b148041ec8bb5024246da3a33e8246dc5e01b
https://github.com/llvm/llvm-project/commit/082b148041ec8bb5024246da3a33e8246dc5e01b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
Log Message:
-----------
[TableGen] Pass CodeGenProcModel reference instead of index to addWriteRes/addReadAdvance. NFC
2 of the 3 callers of each of these already had a reference they
converted to index. Use that reference and make the one caller
that only has an index responsible for looking up the reference from it.
Commit: 1a8f49fdda5b14ccc894aacee653f19130df3a30
https://github.com/llvm/llvm-project/commit/1a8f49fdda5b14ccc894aacee653f19130df3a30
Author: Scott Todd <scott.todd0 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIRPython.cmake
Log Message:
-----------
[mlir][python][cmake] Allow skipping nanobind compile options changes. (#123997)
Context:
https://github.com/llvm/llvm-project/pull/107103#discussion_r1925834532
This code is brittle, especially when called from a superproject that
adds the `nanobind-*` target in a different source directory:
```cmake
get_property(all_targets DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} PROPERTY BUILDSYSTEM_TARGETS)
```
The changes here do help with my downstream build, but I'm not sure if
using the `MLIR_DISABLE_CONFIGURE_PYTHON_DEV_PACKAGES` option introduced
in https://github.com/llvm/llvm-project/pull/117934 is the right fix
given that the option is currently scoped directly to one location with
a matching name:
https://github.com/llvm/llvm-project/blob/7ad8a3da4771ce8abbd146611124104d42a4e63e/mlir/cmake/modules/MLIRDetectPythonEnv.cmake#L4-L5
Some other solutions to consider:
1. Search through an explicit list of target names using `if (TARGET)`
2. Iterate over _all_ targets in the project, not just the targets in
the current directory, using code like
https://stackoverflow.com/a/62311397
3. Iterate over targets in the directory known to MLIR
(`llvm-project/mlir/python`)
4. Move this `target_compile_options` setup into
`mlir_configure_python_dev_packages` (I started on this, but that runs
into similar issues where the target is defined in a different
directory)
Commit: 8c138bee6e5afc963e77644a1b92e4b228ca34ad
https://github.com/llvm/llvm-project/commit/8c138bee6e5afc963e77644a1b92e4b228ca34ad
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/pointer.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Handle pointer allocation with source (#124070)
Commit: caf0540b91b0fee31353dc7049ae836e0f814cff
https://github.com/llvm/llvm-project/commit/caf0540b91b0fee31353dc7049ae836e0f814cff
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
Log Message:
-----------
[LoopVectorizer] Add support for chaining partial reductions (#120272)
Chaining partial reductions, where multiple partial reductions share an
accumulator, allow for more values to be combined together as part of
the reduction without discarding the semantics of the partial reduction
itself.
Commit: a2453097e3b4010162efacb4e7edcb121da8607f
https://github.com/llvm/llvm-project/commit/a2453097e3b4010162efacb4e7edcb121da8607f
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M compiler-rt/test/profile/Linux/Inputs/instrprof-value-merge.c
M compiler-rt/test/profile/Linux/binary-id.c
M compiler-rt/test/profile/Linux/profile-version.c
M llvm/lib/IR/ProfileSummary.cpp
M llvm/test/tools/llvm-profdata/cs-sample-nested-profile.test
M llvm/test/tools/llvm-profdata/general.proftext
M llvm/test/tools/llvm-profdata/sample-summary.test
M llvm/test/tools/llvm-profdata/suppl-instr-with-sample.test
M llvm/test/tools/llvm-profdata/vtable-value-prof.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Add block percent to detailed summary (#105915)
Commit: e00f1f843610416f18a2fe4779c19310e808a1a4
https://github.com/llvm/llvm-project/commit/e00f1f843610416f18a2fe4779c19310e808a1a4
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/test/ELF/gnustack.s
Log Message:
-----------
[ELF] Error for executable .note.GNU-stack unless -z execstack or -r
.note.GNU-stack with the SHF_EXECINSTR flag requires an executable
stack. This is exceedingly rare. We report an error to force
the user to explicitly request an executable stack.
Close #121234
Pull Request: https://github.com/llvm/llvm-project/pull/124068
Commit: 6d4e72abb85a4b302204dee881894271a84dd322
https://github.com/llvm/llvm-project/commit/6d4e72abb85a4b302204dee881894271a84dd322
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/Transforms/GVN/vscale.ll
A llvm/test/Transforms/NewGVN/vscale.ll
Log Message:
-----------
[GVN] Add extra vscale tests with different types. NFC
Commit: 3d72619d751994f3b2b13c1fbb38f5f2541ea0ae
https://github.com/llvm/llvm-project/commit/3d72619d751994f3b2b13c1fbb38f5f2541ea0ae
Author: David Green <david.green at arm.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/scalable-vector-struct.ll
Log Message:
-----------
[InstCombine] Add a test for splitting scalable structs. NFC
Commit: e0622245967514c27b538cc10e04184323c5f96e
https://github.com/llvm/llvm-project/commit/e0622245967514c27b538cc10e04184323c5f96e
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/test/Transforms/inlining-recursive-self.mlir
M mlir/test/Transforms/inlining-recursive.mlir
Log Message:
-----------
[test] Remove misleading ''
Commit: ed512710a5e855a029a05f399335e03db0e704bd
https://github.com/llvm/llvm-project/commit/ed512710a5e855a029a05f399335e03db0e704bd
Author: hidekisaito <hidekido at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M offload/plugins-nextgen/common/include/MemoryManager.h
Log Message:
-----------
[Offload] Make MemoryManager threshold ENV var size_t type. (#124063)
Commit: 6a97897d5c159a52975bac19ac22c7913672c549
https://github.com/llvm/llvm-project/commit/6a97897d5c159a52975bac19ac22c7913672c549
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang-tools-extra/modularize/CoverageChecker.cpp
Log Message:
-----------
[NFC][modules] Create objects on the stack (#124034)
`ClangTool` change to fix memory leak.
`FixedCompilationDatabase` changed just to makes it simpler.
Commit: eb389d2a517fd3a351e8491053f996e2183891c8
https://github.com/llvm/llvm-project/commit/eb389d2a517fd3a351e8491053f996e2183891c8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M .github/workflows/build-ci-container.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-restart-preempted-jobs.yaml
M .github/workflows/llvm-tests.yml
M .github/workflows/premerge.yaml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/spirv-tests.yml
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.h
M clang-tools-extra/clang-tidy/utils/LexerUtils.cpp
M clang-tools-extra/clangd/FindTarget.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.h
M clang-tools-extra/clangd/Hover.cpp
M clang-tools-extra/clangd/ProjectModules.h
M clang-tools-extra/clangd/ScanningProjectModules.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-integer-sign-comparison.rst
M clang-tools-extra/include-cleaner/include/clang-include-cleaner/Analysis.h
M clang-tools-extra/include-cleaner/lib/Analysis.cpp
M clang-tools-extra/include-cleaner/lib/AnalysisInternal.h
M clang-tools-extra/include-cleaner/lib/FindHeaders.cpp
M clang-tools-extra/include-cleaner/lib/HTMLReport.cpp
M clang-tools-extra/include-cleaner/lib/LocateSymbol.cpp
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
M clang-tools-extra/include-cleaner/unittests/FindHeadersTest.cpp
M clang-tools-extra/include-cleaner/unittests/LocateSymbolTest.cpp
M clang-tools-extra/modularize/CoverageChecker.cpp
M clang-tools-extra/test/clang-reorder-fields/Comments.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-integer-sign-comparison-qt.cpp
M clang/docs/BoundsSafety.rst
A clang/docs/BoundsSafetyAdoptionGuide.rst
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/index.rst
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/Attr.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/RecursiveASTVisitor.h
A clang/include/clang/AST/StmtSYCL.h
M clang/include/clang/AST/StmtVisitor.h
M clang/include/clang/AST/UnresolvedSet.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Analysis/Analyses/ExprMutationAnalyzer.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsNVPTX.def
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/Cuda.h
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CodeGen/BackendUtil.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Format/Format.h
M clang/include/clang/Lex/Lexer.h
M clang/include/clang/Sema/HeuristicResolver.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaCodeCompletion.h
M clang/include/clang/Sema/SemaSYCL.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTRecordReader.h
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
M clang/lib/Driver/ToolChains/Arch/Mips.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/QualifierAlignmentFixer.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/avx10_2_512convertintrin.h
M clang/lib/Headers/avx10_2_512minmaxintrin.h
M clang/lib/Headers/avx10_2_512satcvtintrin.h
M clang/lib/Headers/avx10_2convertintrin.h
M clang/lib/Headers/avx10_2minmaxintrin.h
M clang/lib/Headers/avx10_2satcvtintrin.h
M clang/lib/Lex/Lexer.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/HeuristicResolver.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StdSpecialSymbolMap.inc
M clang/test/AST/ByteCode/cxx2a.cpp
A clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-entry-point.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/CodeCompletion/member-access.cpp
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dupq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_extq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tblq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tbxq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq2.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq2.c
M clang/test/CodeGen/AArch64/targetattr.c
M clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
M clang/test/CodeGen/X86/avx10_2_512minmax-builtins.c
M clang/test/CodeGen/X86/avx10_2_512minmax-error.c
M clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
M clang/test/CodeGen/X86/avx10_2convert-builtins.c
M clang/test/CodeGen/X86/avx10_2minmax-builtins.c
M clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
A clang/test/CodeGen/atomic-test-and-set.c
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/CodeGenCXX/matrix-vector-bit-int.cpp
M clang/test/CodeGenCXX/ptrauth-member-function-pointer.cpp
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
M clang/test/CodeGenOpenCL/amdgpu-alignment.cl
M clang/test/CodeGenOpenCL/preserve_vec3.cl
M clang/test/Driver/arm-mfpu.c
M clang/test/Driver/cuda-cross-compiling.c
M clang/test/Driver/darwin-version.c
A clang/test/Driver/fno-plt.c
M clang/test/Driver/linker-wrapper-image.c
M clang/test/Driver/linux-as.c
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mscq.c
A clang/test/Driver/loongarch-relax-features.c
M clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
M clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c
M clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/ps4-sdk-root.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/ps5-sdk-root.c
A clang/test/Headers/crash-instantiated-in-scope-cxx-modules5.cpp
M clang/test/Index/crash-recovery-modules.m
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M clang/test/Modules/empty.modulemap
A clang/test/Modules/gmodules-codegenopts.c
A clang/test/Modules/module-local-hidden-friend.cppm
M clang/test/Modules/preferred_name.cppm
A clang/test/Modules/visibility-for-implicit-global-module.cppm
A clang/test/Modules/vtable-in-explicit-instantiation.cppm
M clang/test/Preprocessor/arm-target-features.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/atomic-ops.c
M clang/test/Sema/pragma-clang-section.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
A clang/test/SemaCXX/constant-expression-p2280r4.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
A clang/test/SemaCXX/warn-base-type-qualifiers.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-array.cpp
M clang/test/SemaOpenCL/invalid-block.cl
M clang/test/SemaSYCL/sycl-kernel-entry-point-attr-appertainment.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/tools/diagtool/DiagnosticNames.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/unittests/Analysis/CFGBuildResult.h
M clang/unittests/Analysis/CFGTest.cpp
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/QualifierFixerTest.cpp
M clang/unittests/Lex/LexerTest.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M compiler-rt/lib/builtins/arm/adddf3vfp.S
M compiler-rt/lib/builtins/arm/aeabi_dcmp.S
M compiler-rt/lib/builtins/arm/divdf3vfp.S
M compiler-rt/lib/builtins/arm/eqdf2vfp.S
M compiler-rt/lib/builtins/arm/extendsfdf2vfp.S
M compiler-rt/lib/builtins/arm/fixdfsivfp.S
M compiler-rt/lib/builtins/arm/fixunsdfsivfp.S
M compiler-rt/lib/builtins/arm/floatsidfvfp.S
M compiler-rt/lib/builtins/arm/floatunssidfvfp.S
M compiler-rt/lib/builtins/arm/gedf2vfp.S
M compiler-rt/lib/builtins/arm/gtdf2vfp.S
M compiler-rt/lib/builtins/arm/ledf2vfp.S
M compiler-rt/lib/builtins/arm/ltdf2vfp.S
M compiler-rt/lib/builtins/arm/muldf3vfp.S
M compiler-rt/lib/builtins/arm/nedf2vfp.S
M compiler-rt/lib/builtins/arm/subdf3vfp.S
M compiler-rt/lib/builtins/arm/truncdfsf2vfp.S
M compiler-rt/lib/builtins/arm/unorddf2vfp.S
M compiler-rt/lib/builtins/assembly.h
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/test/asan/TestCases/Posix/fake_stack_gc.cpp
M compiler-rt/test/asan/TestCases/Posix/unpoison-alternate-stack.cpp
M compiler-rt/test/lsan/TestCases/leak_check_before_thread_started.cpp
M compiler-rt/test/profile/Linux/Inputs/instrprof-value-merge.c
M compiler-rt/test/profile/Linux/binary-id.c
M compiler-rt/test/profile/Linux/profile-version.c
M flang/include/flang/Lower/DirectivesCommon.h
A flang/include/flang/Optimizer/Builder/DirectivesCommon.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
A flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.cpp
M flang/lib/Optimizer/OpenACC/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/module/cudadevice.f90
M flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/CUDA/pointer.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/HLFIR/unroll-loops.fir
M flang/test/Integration/unroll-loops.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/HLFIR/elemental-intrinsics.f90
M flang/test/Lower/Intrinsics/acos.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
M flang/test/Lower/OpenMP/Todo/allocate-clause-allocator.f90
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/OpenMP/associate.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/critical.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/hlfir-wsloop.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/location.f90
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/OpenMP/order-clause.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
M flang/test/Lower/OpenMP/same_var_first_lastprivate.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-chunks.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-monotonic.f90
M flang/test/Lower/OpenMP/wsloop-nonmonotonic.f90
M flang/test/Lower/OpenMP/wsloop-ordered.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-2-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multi.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/OpenMP/wsloop-schedule.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/OpenMP/wsloop.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/trigonometric-intrinsics.f90
A flang/test/Semantics/OpenMP/declare-target08.f90
M flang/test/Semantics/cuf-device-procedures01.cuf
M flang/test/Transforms/generic-loop-rewriting-todo.mlir
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
M libc/src/__support/macros/null_check.h
M libc/test/src/math/smoke/nan_test.cpp
M libc/test/src/math/smoke/nanf128_test.cpp
M libc/test/src/math/smoke/nanf16_test.cpp
M libc/test/src/math/smoke/nanf_test.cpp
M libc/test/src/math/smoke/nanl_test.cpp
M libclc/amdgpu/lib/SOURCES
R libclc/amdgpu/lib/math/nextafter.cl
M libclc/clc/include/clc/clcmacro.h
A libclc/clc/include/clc/math/binary_decl_with_scalar_second_arg.inc
A libclc/clc/include/clc/math/clc_nextafter.h
M libclc/clc/include/clc/relational/clc_isnan.h
M libclc/clc/include/clc/relational/clc_select.h
R libclc/clc/include/clc/relational/clc_select.inc
A libclc/clc/include/clc/relational/clc_select_decl.inc
A libclc/clc/include/clc/relational/clc_select_impl.inc
A libclc/clc/include/clc/shared/binary_decl.inc
M libclc/clc/lib/clspv/SOURCES
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_nextafter.cl
M libclc/clc/lib/generic/relational/clc_bitselect.cl
M libclc/clc/lib/generic/relational/clc_select.cl
R libclc/clc/lib/generic/relational/clc_select.inc
M libclc/clc/lib/spirv/SOURCES
M libclc/clc/lib/spirv64/SOURCES
M libclc/clspv/lib/SOURCES
R libclc/clspv/lib/math/nextafter.cl
R libclc/clspv/lib/math/nextafter.inc
R libclc/generic/include/clc/math/binary_decl.inc
M libclc/generic/include/clc/math/fmax.h
M libclc/generic/include/clc/math/fmin.h
M libclc/generic/include/clc/relational/select.h
R libclc/generic/include/clc/relational/select.inc
R libclc/generic/include/math/clc_nextafter.h
M libclc/generic/lib/SOURCES
M libclc/generic/lib/math/acos.cl
M libclc/generic/lib/math/acosh.cl
M libclc/generic/lib/math/acospi.cl
M libclc/generic/lib/math/asinh.cl
M libclc/generic/lib/math/atan.cl
M libclc/generic/lib/math/atan2.cl
M libclc/generic/lib/math/atan2pi.cl
M libclc/generic/lib/math/atanh.cl
M libclc/generic/lib/math/atanpi.cl
M libclc/generic/lib/math/cbrt.cl
R libclc/generic/lib/math/clc_nextafter.cl
M libclc/generic/lib/math/cos.cl
M libclc/generic/lib/math/cosh.cl
M libclc/generic/lib/math/cospi.cl
M libclc/generic/lib/math/exp.cl
M libclc/generic/lib/math/expm1.cl
M libclc/generic/lib/math/lgamma.cl
M libclc/generic/lib/math/log1p.cl
M libclc/generic/lib/math/logb.cl
M libclc/generic/lib/math/nextafter.cl
M libclc/generic/lib/math/sin.cl
M libclc/generic/lib/math/sinh.cl
M libclc/generic/lib/math/sinpi.cl
M libclc/generic/lib/math/tanh.cl
M libclc/generic/lib/relational/bitselect.cl
M libclc/generic/lib/relational/bitselect.inc
M libclc/generic/lib/relational/select.cl
R libclc/generic/lib/relational/select.inc
R libclc/ptx/lib/SOURCES
R libclc/ptx/lib/math/nextafter.cl
M libcxx/docs/CodingGuidelines.rst
M libcxx/include/__compare/compare_three_way_result.h
M libcxx/include/__config
M libcxx/include/__cxx03/__locale_dir/locale_base_api/android.h
M libcxx/include/__format/format_arg.h
M libcxx/include/__locale_dir/locale_base_api/android.h
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__ranges/range_adaptor.h
M libcxx/include/__type_traits/add_cv_quals.h
M libcxx/include/__type_traits/add_lvalue_reference.h
M libcxx/include/__type_traits/add_pointer.h
M libcxx/include/__type_traits/add_rvalue_reference.h
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/alignment_of.h
M libcxx/include/__type_traits/common_reference.h
M libcxx/include/__type_traits/conditional.h
M libcxx/include/__type_traits/conjunction.h
M libcxx/include/__type_traits/copy_cvref.h
M libcxx/include/__type_traits/datasizeof.h
M libcxx/include/__type_traits/decay.h
M libcxx/include/__type_traits/disjunction.h
M libcxx/include/__type_traits/enable_if.h
M libcxx/include/__type_traits/extent.h
M libcxx/include/__type_traits/has_unique_object_representation.h
M libcxx/include/__type_traits/has_virtual_destructor.h
M libcxx/include/__type_traits/integral_constant.h
M libcxx/include/__type_traits/invoke.h
M libcxx/include/__type_traits/is_abstract.h
M libcxx/include/__type_traits/is_aggregate.h
M libcxx/include/__type_traits/is_always_bitcastable.h
M libcxx/include/__type_traits/is_arithmetic.h
M libcxx/include/__type_traits/is_array.h
M libcxx/include/__type_traits/is_assignable.h
M libcxx/include/__type_traits/is_base_of.h
M libcxx/include/__type_traits/is_bounded_array.h
M libcxx/include/__type_traits/is_class.h
M libcxx/include/__type_traits/is_compound.h
M libcxx/include/__type_traits/is_const.h
M libcxx/include/__type_traits/is_constructible.h
M libcxx/include/__type_traits/is_convertible.h
M libcxx/include/__type_traits/is_destructible.h
M libcxx/include/__type_traits/is_empty.h
M libcxx/include/__type_traits/is_enum.h
M libcxx/include/__type_traits/is_execution_policy.h
M libcxx/include/__type_traits/is_final.h
M libcxx/include/__type_traits/is_floating_point.h
M libcxx/include/__type_traits/is_function.h
M libcxx/include/__type_traits/is_fundamental.h
M libcxx/include/__type_traits/is_implicit_lifetime.h
M libcxx/include/__type_traits/is_integral.h
M libcxx/include/__type_traits/is_literal_type.h
M libcxx/include/__type_traits/is_member_pointer.h
M libcxx/include/__type_traits/is_nothrow_assignable.h
M libcxx/include/__type_traits/is_nothrow_constructible.h
M libcxx/include/__type_traits/is_nothrow_convertible.h
M libcxx/include/__type_traits/is_nothrow_destructible.h
M libcxx/include/__type_traits/is_null_pointer.h
M libcxx/include/__type_traits/is_object.h
M libcxx/include/__type_traits/is_pod.h
M libcxx/include/__type_traits/is_pointer.h
M libcxx/include/__type_traits/is_polymorphic.h
M libcxx/include/__type_traits/is_reference.h
M libcxx/include/__type_traits/is_same.h
M libcxx/include/__type_traits/is_scalar.h
M libcxx/include/__type_traits/is_signed.h
M libcxx/include/__type_traits/is_standard_layout.h
M libcxx/include/__type_traits/is_swappable.h
M libcxx/include/__type_traits/is_trivial.h
M libcxx/include/__type_traits/is_trivially_assignable.h
M libcxx/include/__type_traits/is_trivially_constructible.h
M libcxx/include/__type_traits/is_trivially_copyable.h
M libcxx/include/__type_traits/is_trivially_destructible.h
M libcxx/include/__type_traits/is_unbounded_array.h
M libcxx/include/__type_traits/is_union.h
M libcxx/include/__type_traits/is_unsigned.h
M libcxx/include/__type_traits/is_void.h
M libcxx/include/__type_traits/is_volatile.h
M libcxx/include/__type_traits/make_signed.h
M libcxx/include/__type_traits/make_unsigned.h
M libcxx/include/__type_traits/negation.h
M libcxx/include/__type_traits/rank.h
M libcxx/include/__type_traits/remove_all_extents.h
M libcxx/include/__type_traits/remove_const.h
M libcxx/include/__type_traits/remove_cv.h
M libcxx/include/__type_traits/remove_cvref.h
M libcxx/include/__type_traits/remove_extent.h
M libcxx/include/__type_traits/remove_pointer.h
M libcxx/include/__type_traits/remove_reference.h
M libcxx/include/__type_traits/remove_volatile.h
M libcxx/include/__type_traits/type_identity.h
M libcxx/include/__type_traits/type_list.h
M libcxx/include/__type_traits/underlying_type.h
M libcxx/include/__type_traits/unwrap_ref.h
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/execution
M libcxx/include/streambuf
M libcxx/include/string
M libcxx/include/tuple
M libcxx/include/variant
M libcxx/src/verbose_abort.cpp
A libcxx/test/libcxx/algorithms/no_specializations.verify.cpp
A libcxx/test/libcxx/language.support/no_specializations.verify.cpp
A libcxx/test/libcxx/ranges/no_specializations.verify.cpp
A libcxx/test/libcxx/type_traits/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/format/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/no_specializations.verify.cpp
M libcxx/test/std/containers/sequences/vector.bool/assign_range.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/construct_from_range.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/insert_range.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/shrink_to_fit.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.cons/construct_from_range.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/assign_range.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_range.pass.cpp
M libcxx/test/std/strings/basic.string/string.cons/from_range.pass.cpp
M libcxx/test/std/strings/basic.string/string.modifiers/string_insert/insert_range.pass.cpp
M libcxxabi/src/abort_message.cpp
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Config.h
M lld/COFF/DLL.cpp
M lld/COFF/DLL.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/DriverUtils.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/MapFile.cpp
M lld/COFF/Options.td
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/COFF/Writer.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/ScriptParser.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/SyntheticSections.cpp
M lld/docs/ReleaseNotes.rst
A lld/test/COFF/arm64x-export.test
M lld/test/COFF/empty-section-decl.yaml
M lld/test/COFF/pdata-arm64ec.test
A lld/test/ELF/aarch64-tlsdesc-pauth.s
M lld/test/ELF/gnustack.s
M lld/test/ELF/linkerscript/diag.test
M lld/test/ELF/linkerscript/operators.test
M lldb/include/lldb/API/SBDebugger.h
M lldb/include/lldb/Host/Editline.h
M lldb/include/lldb/Utility/AnsiTerminal.h
M lldb/source/Core/IOHandler.cpp
M lldb/source/Host/common/Editline.cpp
M lldb/source/Host/windows/PipeWindows.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Plugins/Process/Utility/LinuxSignals.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/UnixSignals.cpp
M lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
M lldb/test/API/commands/frame/diagnose/array/TestArray.py
M lldb/test/API/commands/frame/diagnose/bad-reference/TestBadReference.py
M lldb/test/API/commands/frame/diagnose/complicated-expression/TestComplicatedExpression.py
M lldb/test/API/commands/frame/diagnose/dereference-argument/TestDiagnoseDereferenceArgument.py
M lldb/test/API/commands/frame/diagnose/dereference-function-return/TestDiagnoseDereferenceFunctionReturn.py
M lldb/test/API/commands/frame/diagnose/dereference-this/TestDiagnoseDereferenceThis.py
M lldb/test/API/commands/frame/diagnose/inheritance/TestDiagnoseInheritance.py
M lldb/test/API/commands/frame/diagnose/local-variable/TestLocalVariable.py
M lldb/test/API/commands/frame/diagnose/virtual-method-call/TestDiagnoseDereferenceVirtualMethodCall.py
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
M lldb/test/API/linux/aarch64/gcs/main.c
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/API/terminal/TestEditline.py
A lldb/test/API/tools/lldb-dap/progress/Makefile
A lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
A lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
A lldb/test/API/tools/lldb-dap/progress/main.cpp
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
M lldb/tools/lldb-dap/ProgressEvent.cpp
M lldb/tools/lldb-dap/ProgressEvent.h
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/unittests/Editline/EditlineTest.cpp
M lldb/unittests/Signals/UnixSignalsTest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
M lldb/unittests/Utility/AnsiTerminalTest.cpp
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/cmake/config-ix.cmake
M llvm/docs/Contributing.rst
M llvm/docs/DeveloperPolicy.rst
M llvm/docs/Docker.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SandboxIR.md
M llvm/examples/BrainF/BrainF.cpp
M llvm/examples/ExceptionDemo/CMakeLists.txt
M llvm/examples/ExceptionDemo/ExceptionDemo.cpp
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter1/toy.cpp
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter2/toy.cpp
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/toy.cpp
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter4/toy.cpp
M llvm/examples/Kaleidoscope/Chapter4/toy.cpp
M llvm/examples/Kaleidoscope/Chapter5/toy.cpp
M llvm/examples/Kaleidoscope/Chapter6/toy.cpp
M llvm/examples/Kaleidoscope/Chapter7/toy.cpp
M llvm/include/llvm/ADT/StringTable.h
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachineJumpTableInfo.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/include/llvm/Config/config.h.cmake
M llvm/include/llvm/DebugInfo/GSYM/CallSiteInfo.h
M llvm/include/llvm/DebugInfo/GSYM/LookupResult.h
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
M llvm/include/llvm/ExecutionEngine/JITLink/MachO.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorSymbolDef.h
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/include/llvm/FuzzMutate/OpDescriptor.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCELFStreamer.h
M llvm/include/llvm/Object/COFF.h
M llvm/include/llvm/Option/OptTable.h
M llvm/include/llvm/Passes/DroppedVariableStatsIR.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/SandboxIR/Type.h
A llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/Threading.h
M llvm/include/llvm/Support/YAMLTraits.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/Target/TargetLoweringObjectFile.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/include/llvm/Transforms/Instrumentation/LowerAllowCheckPass.h
M llvm/include/llvm/Transforms/Utils/SSAUpdater.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LivePhysRegs.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineLoopUtils.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/RDFLiveness.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
A llvm/lib/CodeGen/StaticDataSplitter.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp
M llvm/lib/DebugInfo/GSYM/LookupResult.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/FileCheck/FileCheckImpl.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/InlineAsm.cpp
M llvm/lib/IR/ProfileSummary.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/Option/OptTable.cpp
M llvm/lib/Passes/DroppedVariableStatsIR.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/SandboxIR/Type.cpp
A llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/Unix/DynamicLibrary.inc
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Unix/Signals.inc
M llvm/lib/Support/Unix/Unix.h
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
A llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
A llvm/lib/Target/AMDGPU/SILowerWWMCopies.h
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARC/ARCInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMCallingConv.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.h
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.h
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.h
M llvm/lib/Target/BPF/BPFInstrInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.h
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.h
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILConstants.h
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.h
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.h
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.h
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
M llvm/test/Analysis/ScalarEvolution/cycled_phis.ll
M llvm/test/Analysis/ScalarEvolution/implied-via-division.ll
M llvm/test/Analysis/ScalarEvolution/unknown_phis.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/bf16-convert-intrinsics.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
A llvm/test/CodeGen/AArch64/cfguard-arm64ec.ll
M llvm/test/CodeGen/AArch64/csel-cmp-cse.ll
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
M llvm/test/CodeGen/AArch64/outlining-with-streaming-mode-changes.ll
M llvm/test/CodeGen/AArch64/sme-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/sme-darwin-sve-vg.ll
M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
M llvm/test/CodeGen/AArch64/sme-lazy-save-call.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sme-streaming-body-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-body.ll
M llvm/test/CodeGen/AArch64/sme-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-mode-changing-call-disable-stackslot-scavenging.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
A llvm/test/CodeGen/AArch64/stack-hazard-defaults.ll
M llvm/test/CodeGen/AArch64/streaming-compatible-memory-ops.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
A llvm/test/CodeGen/AArch64/zeroing-forms-counts-not.ll
A llvm/test/CodeGen/AArch64/zeroing-forms-uscvtf.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shifts.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.prelegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/abs_i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cmp_shrink.mir
M llvm/test/CodeGen/AMDGPU/commute-op-sel.mir
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
A llvm/test/CodeGen/AMDGPU/fix-crash-valu-hazard.ll
M llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/half.ll
A llvm/test/CodeGen/AMDGPU/hazard-flat-instruction-valu-check.mir
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
A llvm/test/CodeGen/AMDGPU/lower-indirect-lds-references.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.mir
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
R llvm/test/CodeGen/AMDGPU/power-sched-no-cycle.mir
M llvm/test/CodeGen/AMDGPU/pr51516.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
A llvm/test/CodeGen/AMDGPU/si-lower-wwm-copies.mir
M llvm/test/CodeGen/AMDGPU/sra.ll
A llvm/test/CodeGen/AMDGPU/sreg-xnull-regclass-bitwidth.mir
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
M llvm/test/CodeGen/DirectX/CreateHandle.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
M llvm/test/CodeGen/DirectX/WaveActiveAllTrue.ll
M llvm/test/CodeGen/DirectX/WaveActiveAnyTrue.ll
M llvm/test/CodeGen/DirectX/WaveActiveCountBits.ll
M llvm/test/CodeGen/DirectX/WaveGetLaneIndex.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt-vec.ll
M llvm/test/CodeGen/DirectX/WaveReadLaneAt.ll
M llvm/test/CodeGen/DirectX/abs.ll
M llvm/test/CodeGen/DirectX/acos.ll
M llvm/test/CodeGen/DirectX/asin.ll
M llvm/test/CodeGen/DirectX/atan.ll
M llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll
M llvm/test/CodeGen/DirectX/ceil.ll
M llvm/test/CodeGen/DirectX/comput_ids.ll
M llvm/test/CodeGen/DirectX/cos.ll
M llvm/test/CodeGen/DirectX/cosh.ll
M llvm/test/CodeGen/DirectX/countbits.ll
M llvm/test/CodeGen/DirectX/dot4add_i8packed.ll
M llvm/test/CodeGen/DirectX/dot4add_u8packed.ll
M llvm/test/CodeGen/DirectX/exp.ll
M llvm/test/CodeGen/DirectX/fdot.ll
M llvm/test/CodeGen/DirectX/firstbithigh.ll
M llvm/test/CodeGen/DirectX/floor.ll
M llvm/test/CodeGen/DirectX/fmad.ll
M llvm/test/CodeGen/DirectX/fmax.ll
M llvm/test/CodeGen/DirectX/fmin.ll
M llvm/test/CodeGen/DirectX/frac.ll
M llvm/test/CodeGen/DirectX/idot.ll
M llvm/test/CodeGen/DirectX/imad.ll
M llvm/test/CodeGen/DirectX/isinf.ll
M llvm/test/CodeGen/DirectX/log.ll
M llvm/test/CodeGen/DirectX/log10.ll
M llvm/test/CodeGen/DirectX/log2.ll
M llvm/test/CodeGen/DirectX/reversebits.ll
M llvm/test/CodeGen/DirectX/round.ll
M llvm/test/CodeGen/DirectX/rsqrt.ll
M llvm/test/CodeGen/DirectX/saturate.ll
M llvm/test/CodeGen/DirectX/sin.ll
M llvm/test/CodeGen/DirectX/sinh.ll
M llvm/test/CodeGen/DirectX/smax.ll
M llvm/test/CodeGen/DirectX/smin.ll
M llvm/test/CodeGen/DirectX/splitdouble.ll
M llvm/test/CodeGen/DirectX/sqrt.ll
M llvm/test/CodeGen/DirectX/tan.ll
M llvm/test/CodeGen/DirectX/tanh.ll
M llvm/test/CodeGen/DirectX/trunc.ll
M llvm/test/CodeGen/DirectX/umad.ll
M llvm/test/CodeGen/DirectX/umax.ll
M llvm/test/CodeGen/DirectX/umin.ll
M llvm/test/CodeGen/DirectX/wave_is_first_lane.ll
A llvm/test/CodeGen/Hexagon/swp-ws-live-intervals-issue123165.mir
A llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg-128.ll
A llvm/test/CodeGen/LoongArch/lasx/scalar-to-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
A llvm/test/CodeGen/LoongArch/lsx/scalar-to-vector.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
M llvm/test/CodeGen/NVPTX/f32-lg2.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
M llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/intrinsic-vector-match.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vlopt-same-vl.ll
M llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
M llvm/test/CodeGen/RISCV/rvv/vse.ll
M llvm/test/CodeGen/RISCV/rvv/vsse.ll
M llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/simd.ll
M llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
M llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512-intrinsics.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/bit_ceil.ll
A llvm/test/CodeGen/X86/clang-section-coff.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/cttz.ll
M llvm/test/CodeGen/X86/fixup-bw-inst.ll
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
M llvm/test/CodeGen/X86/i128-abi.ll
A llvm/test/CodeGen/X86/jump-table-partition.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/pr89877.ll
M llvm/test/CodeGen/X86/pr90847.ll
M llvm/test/CodeGen/X86/pr92569.ll
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/scheduler-backtracking.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
A llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
A llvm/test/CodeGen/X86/stack-clash-huge.ll
M llvm/test/CodeGen/X86/uadd_sat_vec.ll
M llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/X86/urem-seteq-vec-tautological.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
M llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll
M llvm/test/CodeGen/X86/vector-reduce-and-scalar.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
M llvm/test/CodeGen/X86/widen_shuffle-1.ll
A llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size-too-big.mir
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
M llvm/test/MC/AArch64/spe.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
M llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt
M llvm/test/MC/Disassembler/X86/avx10.2minmax-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2minmax-64.txt
A llvm/test/MC/RISCV/rvv/xsfvfwmacc-invalid.s
A llvm/test/MC/RISCV/rvv/xsfvqmacc-invalid.s
A llvm/test/MC/RISCV/xqcilo-aliases-valid.s
A llvm/test/MC/RISCV/xqcilo-invalid.s
A llvm/test/MC/RISCV/xqcilo-valid.s
M llvm/test/MC/X86/avx10.2convert-32-att.s
M llvm/test/MC/X86/avx10.2convert-32-intel.s
M llvm/test/MC/X86/avx10.2convert-64-att.s
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M llvm/test/MC/X86/avx10.2minmax-32-att.s
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M llvm/test/MC/X86/avx10.2minmax-64-intel.s
M llvm/test/MC/X86/avx10.2satcvt-32-att.s
M llvm/test/MC/X86/avx10.2satcvt-32-intel.s
M llvm/test/MC/X86/avx10.2satcvt-64-att.s
M llvm/test/MC/X86/avx10.2satcvt-64-intel.s
R llvm/test/Object/coff-sec-sym.test
M llvm/test/Other/crash-stack-trace.ll
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td
A llvm/test/TableGen/SDNodeInfoEmitter/basic.td
A llvm/test/TableGen/SDNodeInfoEmitter/namespace.td
A llvm/test/TableGen/SDNodeInfoEmitter/skipped-nodes.td
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/ThinLTO/X86/devirt_check.ll
M llvm/test/Transforms/ADCE/2017-08-21-DomTree-deletions.ll
M llvm/test/Transforms/ADCE/preserve-memoryssa-if-only-remove-debug.ll
M llvm/test/Transforms/AddDiscriminators/inlined.ll
M llvm/test/Transforms/AddDiscriminators/invoke.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/combine_ignore_debug.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_unreachable_bb.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_vector_instrs.ll
M llvm/test/Transforms/AlignmentFromAssumptions/simple.ll
M llvm/test/Transforms/AlignmentFromAssumptions/simple32.ll
M llvm/test/Transforms/ArgumentPromotion/crash.ll
M llvm/test/Transforms/ArgumentPromotion/min-legal-vector-width.ll
M llvm/test/Transforms/ArgumentPromotion/pr32917.ll
M llvm/test/Transforms/ConstraintElimination/eq.ll
M llvm/test/Transforms/ConstraintElimination/ne.ll
M llvm/test/Transforms/ConstraintElimination/pr105785.ll
M llvm/test/Transforms/GVN/vscale.ll
M llvm/test/Transforms/HipStdPar/allocation-interposition.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
M llvm/test/Transforms/InstCombine/known-phi-recurse.ll
M llvm/test/Transforms/InstCombine/scalable-vector-struct.ll
M llvm/test/Transforms/JumpThreading/thread-debug-info.ll
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/deep-loop-nest.ll
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
A llvm/test/Transforms/NewGVN/vscale.ll
R llvm/test/Transforms/PhaseOrdering/AArch64/sve-interleave-vectorization.ll
M llvm/test/Transforms/Reassociate/reassoc_bool_vec.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/alternate-vectorization-split-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/min_max.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-loads-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/X86/long-full-reg-stores.ll
M llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-extracted-and-externally-used.ll
M llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
A llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/test/Transforms/SimplifyCFG/switch-branch-fold-indirectbr-102351.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets.s
M llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-merged-callsites-dsym.yaml
A llvm/test/tools/llvm-lib/member-names.test
A llvm/test/tools/llvm-mca/RISCV/SiFive7/jump.s
M llvm/test/tools/llvm-mca/X86/BtVer2/clear-super-register-1.s
M llvm/test/tools/llvm-profdata/cs-sample-nested-profile.test
M llvm/test/tools/llvm-profdata/general.proftext
M llvm/test/tools/llvm-profdata/sample-summary.test
M llvm/test/tools/llvm-profdata/suppl-instr-with-sample.test
M llvm/test/tools/llvm-profdata/vtable-value-prof.test
M llvm/tools/bugpoint/Miscompilation.cpp
M llvm/tools/llvm-gsymutil/Opts.td
M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
M llvm/unittests/CodeGen/LowLevelTypeTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ExecutorAddressTest.cpp
M llvm/unittests/ExecutionEngine/Orc/IndirectionUtilsTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/FuzzMutate/OperationsTest.cpp
M llvm/unittests/FuzzMutate/RandomIRBuilderTest.cpp
M llvm/unittests/IR/ConstantsTest.cpp
M llvm/unittests/IR/DroppedVariableStatsIRTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/Linker/LinkModulesTest.cpp
M llvm/unittests/Option/OptionMarshallingTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
M llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
M llvm/unittests/Target/SPIRV/SPIRVAPITest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/TableGen/CMakeLists.txt
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
M llvm/utils/TableGen/DXILEmitter.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
A llvm/utils/TableGen/SDNodeInfoEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/docker/build_docker_image.sh
R llvm/utils/docker/debian10/Dockerfile
A llvm/utils/docker/debian12/Dockerfile
M llvm/utils/docker/example/Dockerfile
M llvm/utils/docker/nvidia-cuda/Dockerfile
M llvm/utils/docker/scripts/checkout.sh
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
M mlir/cmake/modules/AddMLIR.cmake
M mlir/cmake/modules/AddMLIRPython.cmake
M mlir/docs/DefiningDialects/Assembly.md
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Conversion/GPUCommon/GPUCommonPass.h
R mlir/include/mlir/Conversion/GPUToVulkan/ConvertGPUToVulkanPass.h
M mlir/include/mlir/Conversion/Passes.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td
A mlir/include/mlir/Dialect/SPIRV/IR/SPIRVPrimitiveOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/IR/Attributes.h
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/ExecutionEngine/CMakeLists.txt
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/Conversion/CMakeLists.txt
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
R mlir/lib/Conversion/GPUToVulkan/CMakeLists.txt
R mlir/lib/Conversion/GPUToVulkan/ConvertGPULaunchFuncToVulkanLaunchFunc.cpp
R mlir/lib/Conversion/GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToSMMLAPattern.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/TransformOps/GPUHeuristics.cpp
M mlir/lib/Dialect/Linalg/Transforms/BlockPackMatmul.cpp
M mlir/lib/Dialect/Linalg/Transforms/TransposeConv2D.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeConv2D.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/SparseTensor/CMakeLists.txt
A mlir/lib/ExecutionEngine/VulkanRuntime.cpp
A mlir/lib/ExecutionEngine/VulkanRuntime.h
A mlir/lib/ExecutionEngine/VulkanRuntimeWrappers.cpp
M mlir/lib/IR/Attributes.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/OperationSupport.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/python/mlir/dialects/_ods_common.py
M mlir/test/CAPI/ir.c
M mlir/test/CMakeLists.txt
A mlir/test/Conversion/GPUCommon/lower-launch-func-bare-ptr-intersperse-size.mlir
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
R mlir/test/Conversion/GPUToVulkan/invoke-vulkan.mlir
R mlir/test/Conversion/GPUToVulkan/lower-gpu-launch-vulkan-launch.mlir
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
A mlir/test/Dialect/Linalg/tile-offset.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SPIRV/IR/availability.mlir
A mlir/test/Dialect/SPIRV/IR/primitive-ops.mlir
R mlir/test/Dialect/Tosa/broadcast.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant_folding.mlir
M mlir/test/Dialect/Tosa/inlining.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-conv2d.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
A mlir/test/Integration/GPU/Vulkan/addf.mlir
A mlir/test/Integration/GPU/Vulkan/addf_if.mlir
A mlir/test/Integration/GPU/Vulkan/addi.mlir
A mlir/test/Integration/GPU/Vulkan/addi8.mlir
A mlir/test/Integration/GPU/Vulkan/addui_extended.mlir
A mlir/test/Integration/GPU/Vulkan/lit.local.cfg
A mlir/test/Integration/GPU/Vulkan/mulf.mlir
A mlir/test/Integration/GPU/Vulkan/smul_extended.mlir
A mlir/test/Integration/GPU/Vulkan/subf.mlir
A mlir/test/Integration/GPU/Vulkan/time.mlir
A mlir/test/Integration/GPU/Vulkan/umul_extended.mlir
A mlir/test/Integration/GPU/Vulkan/vector-deinterleave.mlir
A mlir/test/Integration/GPU/Vulkan/vector-interleave.mlir
A mlir/test/Integration/GPU/Vulkan/vector-shuffle.mlir
M mlir/test/Target/Cpp/switch.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
R mlir/test/Target/LLVMIR/openmp-wsloop-private-late-alloca-workaround.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
A mlir/test/Target/SPIRV/primitive-ops.mlir
M mlir/test/Transforms/inlining-recursive-self.mlir
M mlir/test/Transforms/inlining-recursive.mlir
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
M mlir/test/lib/Conversion/FuncToLLVM/CMakeLists.txt
M mlir/test/lib/Conversion/MathToVCIX/CMakeLists.txt
M mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
M mlir/test/lib/Conversion/VectorToSPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Affine/CMakeLists.txt
M mlir/test/lib/Dialect/Arith/CMakeLists.txt
M mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
M mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
M mlir/test/lib/Dialect/ControlFlow/CMakeLists.txt
M mlir/test/lib/Dialect/DLTI/CMakeLists.txt
M mlir/test/lib/Dialect/Func/CMakeLists.txt
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/LLVM/CMakeLists.txt
M mlir/test/lib/Dialect/Linalg/CMakeLists.txt
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/MemRef/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/NVGPU/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
M mlir/test/lib/Dialect/SPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Shape/CMakeLists.txt
M mlir/test/lib/Dialect/Tensor/CMakeLists.txt
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lib/IR/CMakeLists.txt
M mlir/test/lib/Interfaces/LoopLikeInterface/CMakeLists.txt
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/test/lib/Pass/TestVulkanRunnerPipeline.cpp
M mlir/test/lib/Reducer/CMakeLists.txt
M mlir/test/lib/Rewrite/CMakeLists.txt
M mlir/test/lib/Tools/PDLL/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/test/lit.cfg.py
M mlir/test/mlir-tblgen/op-python-bindings.td
R mlir/test/mlir-vulkan-runner/addf.mlir
R mlir/test/mlir-vulkan-runner/addf_if.mlir
R mlir/test/mlir-vulkan-runner/addi.mlir
R mlir/test/mlir-vulkan-runner/addi8.mlir
R mlir/test/mlir-vulkan-runner/addui_extended.mlir
R mlir/test/mlir-vulkan-runner/lit.local.cfg
R mlir/test/mlir-vulkan-runner/mulf.mlir
R mlir/test/mlir-vulkan-runner/smul_extended.mlir
R mlir/test/mlir-vulkan-runner/subf.mlir
R mlir/test/mlir-vulkan-runner/time.mlir
R mlir/test/mlir-vulkan-runner/umul_extended.mlir
R mlir/test/mlir-vulkan-runner/vector-deinterleave.mlir
R mlir/test/mlir-vulkan-runner/vector-interleave.mlir
R mlir/test/mlir-vulkan-runner/vector-shuffle.mlir
M mlir/test/python/ir/location.py
M mlir/test/python/lib/CMakeLists.txt
M mlir/tools/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
R mlir/tools/mlir-vulkan-runner/CMakeLists.txt
R mlir/tools/mlir-vulkan-runner/VulkanRuntime.cpp
R mlir/tools/mlir-vulkan-runner/VulkanRuntime.h
R mlir/tools/mlir-vulkan-runner/mlir-vulkan-runner.cpp
R mlir/tools/mlir-vulkan-runner/vulkan-runtime-wrappers.cpp
M mlir/unittests/ExecutionEngine/CMakeLists.txt
M offload/DeviceRTL/include/State.h
M offload/docs/declare_target_indirect.md
M offload/include/OffloadEntry.h
M offload/include/PluginManager.h
M offload/include/Shared/APITypes.h
M offload/include/rtl.h
M offload/plugins-nextgen/common/include/MemoryManager.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/src/PluginManager.cpp
M offload/src/omptarget.cpp
M offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
M polly/include/polly/CodeGen/IRBuilder.h
M polly/lib/CodeGen/IRBuilder.cpp
M polly/lib/CodeGen/LoopGenerators.cpp
A polly/test/CodeGen/Metadata/basic_vec_annotate.ll
M utils/bazel/configure.bzl
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/config.h
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm_configs/config.h.cmake
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