[all-commits] [llvm/llvm-project] ebb27c: [RISCV] Select Zvkb VANDN for shorter constant loa...
Nathan Ridge via All-commits
all-commits at lists.llvm.org
Wed Jan 22 22:21:43 PST 2025
Branch: refs/heads/users/HighCommander4/clangd-issue-1249
Home: https://github.com/llvm/llvm-project
Commit: ebb27ccb08e0579825a53b218ff5b2ddc492626a
https://github.com/llvm/llvm-project/commit/ebb27ccb08e0579825a53b218ff5b2ddc492626a
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
Log Message:
-----------
[RISCV] Select Zvkb VANDN for shorter constant loading sequences (#123345)
This extends PR #120221 to vector instructions.
Commit: a88f31d7fe1aa71d2d59974b961e649c288b8dc7
https://github.com/llvm/llvm-project/commit/a88f31d7fe1aa71d2d59974b961e649c288b8dc7
Author: mconst <mconst at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
A llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
A llvm/test/CodeGen/X86/stack-clash-huge.ll
Log Message:
-----------
[X86] Fix overflow with large stack probes on x86-64 (#113219)
When emitting an inline stack probe loop, we can't use SUBri to
calculate the loop bound if it doesn't fit in a 32-bit (possibly
sign-extended) immediate.
Fixes #113218.
Commit: 830bd0e8f263c6efcfd37f38cc621b0476582b83
https://github.com/llvm/llvm-project/commit/830bd0e8f263c6efcfd37f38cc621b0476582b83
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Type.h
M llvm/lib/SandboxIR/Type.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
Log Message:
-----------
[SandboxIR] Remove sandboxir::PointerType::get(Type) (#123885)
This was just an alias for getting the LLVM Context from the type.
We are in the process of removing the same function for the regular LLVM
type in https://github.com/llvm/llvm-project/issues/123569
Commit: b7b9ccf44988edf49886743ae5c3cf4184db211f
https://github.com/llvm/llvm-project/commit/b7b9ccf44988edf49886743ae5c3cf4184db211f
Author: Robert O'Callahan <rocallahan at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/StopInfo.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Target/ThreadList.h
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/include/lldb/Target/ThreadPlanBase.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
A lldb/packages/Python/lldbsuite/test/lldbgdbproxy.py
A lldb/packages/Python/lldbsuite/test/lldbreverse.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadList.cpp
M lldb/source/Target/ThreadPlanBase.cpp
A lldb/test/API/functionalities/reverse-execution/Makefile
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueBreakpoints.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueNotSupported.py
A lldb/test/API/functionalities/reverse-execution/TestReverseContinueWatchpoints.py
A lldb/test/API/functionalities/reverse-execution/main.c
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
Log Message:
-----------
[lldb] Implement basic support for reverse-continue (#112079)
This commit adds support for a
`SBProcess::ContinueInDirection()` API. A user-accessible command for
this will follow in a later commit.
This feature depends on a gdbserver implementation (e.g. `rr`) providing
support for the `bc` and `bs` packets. `lldb-server` does not support
those packets, and there is no plan to change that. For testing
purposes, this commit adds a Python implementation of *very limited*
record-and-reverse-execute functionality, implemented as a proxy between
lldb and lldb-server in `lldbreverse.py`. This should not (and in
practice cannot) be used for anything except testing.
The tests here are quite minimal but we test that simple breakpoints and
watchpoints work as expected during reverse execution, and that
conditional breakpoints and watchpoints work when the condition calls a
function that must be executed in the forward direction.
Commit: d839c06719128700bdd033361b20aa6899f6620a
https://github.com/llvm/llvm-project/commit/d839c06719128700bdd033361b20aa6899f6620a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Avoid repeated map lookups (NFC) (#123892)
Commit: 4c6242ebf50dde0597df2bace49d534b61122496
https://github.com/llvm/llvm-project/commit/4c6242ebf50dde0597df2bace49d534b61122496
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIR.cmake
M mlir/lib/CAPI/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/SparseTensor/CMakeLists.txt
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
M mlir/test/lib/Conversion/FuncToLLVM/CMakeLists.txt
M mlir/test/lib/Conversion/MathToVCIX/CMakeLists.txt
M mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
M mlir/test/lib/Conversion/VectorToSPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Affine/CMakeLists.txt
M mlir/test/lib/Dialect/Arith/CMakeLists.txt
M mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
M mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
M mlir/test/lib/Dialect/ControlFlow/CMakeLists.txt
M mlir/test/lib/Dialect/DLTI/CMakeLists.txt
M mlir/test/lib/Dialect/Func/CMakeLists.txt
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/LLVM/CMakeLists.txt
M mlir/test/lib/Dialect/Linalg/CMakeLists.txt
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/MemRef/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/NVGPU/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
M mlir/test/lib/Dialect/SPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Shape/CMakeLists.txt
M mlir/test/lib/Dialect/Tensor/CMakeLists.txt
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lib/IR/CMakeLists.txt
M mlir/test/lib/Interfaces/LoopLikeInterface/CMakeLists.txt
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/test/lib/Reducer/CMakeLists.txt
M mlir/test/lib/Rewrite/CMakeLists.txt
M mlir/test/lib/Tools/PDLL/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/test/python/lib/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
Log Message:
-----------
[mlir] Link libraries that aren't included in libMLIR to libMLIR (#123781)
Use `mlir_target_link_libraries()` to link dependencies of libraries
that are not included in libMLIR, to ensure that they link to the dylib
when they are used in Flang. Otherwise, they implicitly pull in all
their static dependencies, effectively causing Flang binaries to
simultaneously link to the dylib and to static libraries, which is never
a good idea.
I have only covered the libraries that are used by Flang. If you wish, I
can extend this approach to all non-libMLIR libraries in MLIR, making
MLIR itself also link to the dylib consistently.
[v2 with fixed `-DBUILD_SHARED_LIBS=ON` build]
Commit: 53ea5ffcb38d428e446d357f310e9c28957eaec7
https://github.com/llvm/llvm-project/commit/53ea5ffcb38d428e446d357f310e9c28957eaec7
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/ExprMutationAnalyzer.h
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
Log Message:
-----------
[mutation analyzer] support mutation analysis for pointee (#118593)
This patch wants to add mutation analyzer for pointee object.
Commit: f7d8336a2fb4fad4a6efe5af9b0a10ddd970f6d3
https://github.com/llvm/llvm-project/commit/f7d8336a2fb4fad4a6efe5af9b0a10ddd970f6d3
Author: Venkata Ramanaiah Nalamothu <quic_vnalamot at quicinc.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARC/ARCInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.h
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.h
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.h
M llvm/lib/Target/BPF/BPFInstrInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.h
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.h
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.h
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.h
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.h
M llvm/lib/Target/Mips/MipsInstrInfo.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.h
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
Log Message:
-----------
[llvm] Pass MachineInstr flags to storeRegToStackSlot/loadRegFromStackSlot (NFC) (#120622)
This patch is in preparation to enable setting the MachineInstr::MIFlag
flags, i.e. FrameSetup/FrameDestroy, on callee saved register
spill/reload instructions in prologue/epilogue. This eventually helps in
setting the prologue_end and epilogue_begin markers more accurately.
The DWARF Spec in "6.4 Call Frame Information" says:
The code that allocates space on the call frame stack and performs the
save
operation is called the subroutine’s prologue, and the code that
performs
the restore operation and deallocates the frame is called its epilogue.
which means the callee saved register spills and reloads are part of
prologue (a.k.a frame setup) and epilogue (a.k.a frame destruction),
respectively. And, IIUC, LLVM backend uses FrameSetup/FrameDestroy flags
to identify instructions that are part of call frame setup and
destruction.
In the trunk, while most targets consistently set
FrameSetup/FrameDestroy on save/restore call frame information (CFI)
instructions of callee saved registers, they do not consistently set
those flags on the actual callee saved register spill/reload
instructions.
I believe this patch provides a clean mechanism to set
FrameSetup/FrameDestroy flags on the actual callee saved register
spill/reload instructions as needed. And, by having default argument of
MachineInstr::NoFlags for Flags, this patch is a NFC.
With this patch, the targets have to just pass FrameSetup/FrameDestroy
flag to the storeRegToStackSlot/loadRegFromStackSlot calls from the
target derived spillCalleeSavedRegisters and restoreCalleeSavedRegisters
to set those flags on callee saved register spill/reload instructions.
Also, this patch makes it very easy to set the source line information
on callee saved register spill/reload instructions which is needed by
the DwarfDebug.cpp implementation to set prologue_end and epilogue_begin
markers more accurately.
As per DwarfDebug.cpp implementation:
prologue_end is the first known non-DBG_VALUE and non-FrameSetup
location
that marks the beginning of the function body
epilogue_begin is the first FrameDestroy location that has been seen in
the
epilogue basic block
With this patch, the targets have to just do the following to set the
source line information on callee saved register spill/reload
instructions, without hampering the LLVM's efforts to avoid adding
source line information on the artificial code generated by the
compiler.
<Foo>InstrInfo::storeRegToStackSlot() {
...
DebugLoc DL =
Flags & MachineInstr::FrameSetup ? DebugLoc() : MBB.findDebugLoc(I);
...
}
<Foo>InstrInfo::loadRegFromStackSlot() {
...
DebugLoc DL =
Flags & MachineInstr::FrameDestroy ? MBB.findDebugLoc(I) : DebugLoc();
...
}
While I understand this patch would break out-of-tree backend builds, I
think it is in the right direction.
One immediate use case that can benefit from this patch is fixing
#120553 becomes simpler.
Commit: ca65055e792a497551d580c8adf30c28090e45cd
https://github.com/llvm/llvm-project/commit/ca65055e792a497551d580c8adf30c28090e45cd
Author: Calvin Beck <Chobbes at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
Remove mention of conditional branches in undefined values section. (#122980)
This statement is somewhat confusing when paired with the later
statement that says "Branching on an undefined value is undefined
behavior". Furthermore, this example does not show any conditional
branches, so this comment seems to be outdated.
See issue #122532 for more details.
Commit: 69d0c4c1675c90cf99126210679a9c3ae0a8637e
https://github.com/llvm/llvm-project/commit/69d0c4c1675c90cf99126210679a9c3ae0a8637e
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
Log Message:
-----------
[Clang] SubstituteConstraintExpressionWithoutSatisfaction needs an unevaluated context (#123883)
It turns out that the substitution for expression comparing also needs
an unevaluated context, otherwise any reference to immediate functions
might not be properly handled.
As a fallout, this also guards the VLA transformation under unevaluated
context
with `InConditionallyConstantEvaluateContext` to avoid duplicate
diagnostics.
Fixes https://github.com/llvm/llvm-project/issues/123472
---------
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: 9decc24c6ba5398f7cb1b2a0c26bd36e2da479f8
https://github.com/llvm/llvm-project/commit/9decc24c6ba5398f7cb1b2a0c26bd36e2da479f8
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIR.cmake
M mlir/lib/CAPI/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/SparseTensor/CMakeLists.txt
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
M mlir/test/lib/Conversion/FuncToLLVM/CMakeLists.txt
M mlir/test/lib/Conversion/MathToVCIX/CMakeLists.txt
M mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
M mlir/test/lib/Conversion/VectorToSPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Affine/CMakeLists.txt
M mlir/test/lib/Dialect/Arith/CMakeLists.txt
M mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
M mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
M mlir/test/lib/Dialect/ControlFlow/CMakeLists.txt
M mlir/test/lib/Dialect/DLTI/CMakeLists.txt
M mlir/test/lib/Dialect/Func/CMakeLists.txt
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/LLVM/CMakeLists.txt
M mlir/test/lib/Dialect/Linalg/CMakeLists.txt
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/MemRef/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/NVGPU/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
M mlir/test/lib/Dialect/SPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Shape/CMakeLists.txt
M mlir/test/lib/Dialect/Tensor/CMakeLists.txt
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lib/IR/CMakeLists.txt
M mlir/test/lib/Interfaces/LoopLikeInterface/CMakeLists.txt
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/test/lib/Reducer/CMakeLists.txt
M mlir/test/lib/Rewrite/CMakeLists.txt
M mlir/test/lib/Tools/PDLL/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/test/python/lib/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
Log Message:
-----------
Revert "[mlir] Link libraries that aren't included in libMLIR to libMLIR (#123781)"
This reverts commit 4c6242ebf50dde0597df2bace49d534b61122496. More
BUILD_SHARED_LIBS=ON regressions, sigh.
Commit: a5159e200eb25c2873fb8db432962394a879e887
https://github.com/llvm/llvm-project/commit/a5159e200eb25c2873fb8db432962394a879e887
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/AST/Decl.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#123890)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect TemplateOrSpecialization to be nonnull.
Commit: aaf0643dd5d09bdce12298e48310a2c979be5f9a
https://github.com/llvm/llvm-project/commit/aaf0643dd5d09bdce12298e48310a2c979be5f9a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lld/MachO/SyntheticSections.cpp
Log Message:
-----------
[lld] Migrate away from PointerUnion::dyn_cast (NFC) (#123891)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses cast
because we know expect isa<Symbol *>(rel.referent) to be true.
Commit: 8ad4f1a9c110632e419cc64931d432e91559407a
https://github.com/llvm/llvm-project/commit/8ad4f1a9c110632e419cc64931d432e91559407a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#123893)
Commit: 19a7fe03b4f58c4f73ea91d5e63bc4c6e61f987b
https://github.com/llvm/llvm-project/commit/19a7fe03b4f58c4f73ea91d5e63bc4c6e61f987b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#123894)
Commit: 0a9c08c59ba61e727e9dee6d71883d9106963442
https://github.com/llvm/llvm-project/commit/0a9c08c59ba61e727e9dee6d71883d9106963442
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/APValue.h
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
A clang/test/SemaCXX/constant-expression-p2280r4.cpp
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Implement P2280R4 Using unknown pointers and references in constant expressions (#95474)
P2280R4 allows the use of references in pointers of unknown origins in a
constant expression context but only in specific cases that could be
constant expressions.
We track whether a variable is a constexpr unknown in a constant
expression by setting a flag in either APValue or LValue and using this
flag to prevent using unknown values in places where it is not allowed.
Fixes: https://github.com/llvm/llvm-project/issues/63139 https://github.com/llvm/llvm-project/issues/63117
Commit: 0369ac8d2555423fc6c41b2aed12aadf3eb9b0cd
https://github.com/llvm/llvm-project/commit/0369ac8d2555423fc6c41b2aed12aadf3eb9b0cd
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/www/cxx_status.html
Log Message:
-----------
Fix markup in cxx_status.html
Commit: bc6f84a2db6e7d60d70cf9be8d6cce2a101d0faa
https://github.com/llvm/llvm-project/commit/bc6f84a2db6e7d60d70cf9be8d6cce2a101d0faa
Author: Chandler Carruth <chandlerc at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/tools/diagtool/DiagnosticNames.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M llvm/include/llvm/ADT/StringTable.h
Log Message:
-----------
[StrTable] Switch diag group names to `llvm::StringTable` (#123302)
Previously, they used a hand-rolled Pascal-string encoding different
from all the other string tables produced from TableGen. This moves them
to use the newly introduced runtime abstraction, and enhances that
abstraction to support iterating over the string table as used in this
case.
>From what I can tell the Pascal-string encoding isn't critical here to
avoid expensive `strlen` calls, so I think this is a simpler and more
consistent model. But if folks would prefer a Pascal-string style
encoding, I can instead work to switch the `StringTable` abstraction
towards that. It would require some tricky tradeoffs though to make it
reasonably general: either using 4 bytes instead of 1 byte to encode the
size, or having a fallback to `strlen` for long strings.
Commit: 22561cfb443267905d4190f0e2a738e6b412457f
https://github.com/llvm/llvm-project/commit/22561cfb443267905d4190f0e2a738e6b412457f
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/StopInfo.h
M lldb/include/lldb/Target/Thread.h
M lldb/include/lldb/Target/ThreadList.h
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/include/lldb/Target/ThreadPlanBase.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
R lldb/packages/Python/lldbsuite/test/lldbgdbproxy.py
R lldb/packages/Python/lldbsuite/test/lldbreverse.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadList.cpp
M lldb/source/Target/ThreadPlanBase.cpp
R lldb/test/API/functionalities/reverse-execution/Makefile
R lldb/test/API/functionalities/reverse-execution/TestReverseContinueBreakpoints.py
R lldb/test/API/functionalities/reverse-execution/TestReverseContinueNotSupported.py
R lldb/test/API/functionalities/reverse-execution/TestReverseContinueWatchpoints.py
R lldb/test/API/functionalities/reverse-execution/main.c
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
Log Message:
-----------
Revert "[lldb] Implement basic support for reverse-continue" (#123906)
Reverts llvm/llvm-project#112079 due to failures on the arm bot.
Commit: 957213f60b258a5f6cab04e50c78c0a0c1c304c2
https://github.com/llvm/llvm-project/commit/957213f60b258a5f6cab04e50c78c0a0c1c304c2
Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaOpenCL/invalid-block.cl
Log Message:
-----------
[OpenCL] Diagnose block references in selection operator (#114824)
In addition to the invocation case that is already diagnosed, also
diagnose when a block reference appears on either side of a ternary
selection operator.
Until now, clang would accept the added test case only to crash during
code generation.
Commit: 3088c316994f078833cba11086b6c5cb29df2aae
https://github.com/llvm/llvm-project/commit/3088c316994f078833cba11086b6c5cb29df2aae
Author: Elizaveta Noskova <159026035+enoskova-sc at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/lib/CodeGen/ShrinkWrap.cpp
Log Message:
-----------
[llvm] Add NCD search on Array of basic blocks (NFC) (#119355)
Shrink-Wrap points split Part 2.
RFC:
https://discourse.llvm.org/t/shrink-wrap-save-restore-points-splitting/83581
Part 1: https://github.com/llvm/llvm-project/pull/117862
Part 3: https://github.com/llvm/llvm-project/pull/119357
Part 4: https://github.com/llvm/llvm-project/pull/119358
Part 5: https://github.com/llvm/llvm-project/pull/119359
Commit: 047e8e47c1f9d872aec835b915935802e195c555
https://github.com/llvm/llvm-project/commit/047e8e47c1f9d872aec835b915935802e195c555
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIR.cmake
M mlir/lib/CAPI/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/SparseTensor/CMakeLists.txt
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
M mlir/test/lib/Conversion/FuncToLLVM/CMakeLists.txt
M mlir/test/lib/Conversion/MathToVCIX/CMakeLists.txt
M mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
M mlir/test/lib/Conversion/VectorToSPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Affine/CMakeLists.txt
M mlir/test/lib/Dialect/Arith/CMakeLists.txt
M mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
M mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
M mlir/test/lib/Dialect/ControlFlow/CMakeLists.txt
M mlir/test/lib/Dialect/DLTI/CMakeLists.txt
M mlir/test/lib/Dialect/Func/CMakeLists.txt
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/LLVM/CMakeLists.txt
M mlir/test/lib/Dialect/Linalg/CMakeLists.txt
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/MemRef/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/NVGPU/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
M mlir/test/lib/Dialect/SPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Shape/CMakeLists.txt
M mlir/test/lib/Dialect/Tensor/CMakeLists.txt
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lib/IR/CMakeLists.txt
M mlir/test/lib/Interfaces/LoopLikeInterface/CMakeLists.txt
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/test/lib/Reducer/CMakeLists.txt
M mlir/test/lib/Rewrite/CMakeLists.txt
M mlir/test/lib/Tools/PDLL/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/test/python/lib/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/unittests/ExecutionEngine/CMakeLists.txt
Log Message:
-----------
Reapply "[mlir] Link libraries that aren't included in libMLIR to libMLIR" (#123910)
Use `mlir_target_link_libraries()` to link dependencies of libraries
that are not included in libMLIR, to ensure that they link to the dylib
when they are used in Flang. Otherwise, they implicitly pull in all
their static dependencies, effectively causing Flang binaries to
simultaneously link to the dylib and to static libraries, which is never
a good idea.
I have only covered the libraries that are used by Flang. If you wish, I
can extend this approach to all non-libMLIR libraries in MLIR, making
MLIR itself also link to the dylib consistently.
[v3 with more `-DBUILD_SHARED_LIBS=ON` fixes]
Commit: 7bb949ec612ff19bb4bfbc6a591b928d6d4ee475
https://github.com/llvm/llvm-project/commit/7bb949ec612ff19bb4bfbc6a591b928d6d4ee475
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/IndirectionUtilsTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/ConstantsTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[IR][unittests] Replace of PointerType::getUnqual(Type) with opaque version (NFC) (#123901)
Follow up to https://github.com/llvm/llvm-project/issues/123569
Commit: 76672e3349bbc7bc58b0ae93d5cc994f3e16971a
https://github.com/llvm/llvm-project/commit/76672e3349bbc7bc58b0ae93d5cc994f3e16971a
Author: Karthika Devi C <quic_kartc at quicinc.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M polly/include/polly/CodeGen/IRBuilder.h
M polly/lib/CodeGen/IRBuilder.cpp
M polly/lib/CodeGen/LoopGenerators.cpp
A polly/test/CodeGen/Metadata/basic_vec_annotate.ll
Log Message:
-----------
[Polly] Add vectorize metadata to loops identified as vectorizable by polly (#113994)
This patch introduces the initial implementation for annotating loops
created by Polly. Polly generates RunTimeChecks (RTCs), which result in
loop versioning. Specifically, the loop created by Polly is executed
when the RTCs pass, otherwise, the original loop is executed.
This patch adds the "llvm.loop.vectorize.enable" metadata, setting it to
true for loops created by Polly. Disabling vectorization for the original
fallback loop is already merged in #119188.
This behavior is controlled by the 'polly-annotate-metadata-vectorize'
flag, and the annotations are applied only when this flag is enabled.
This flag is set to false by default.
NOTE: This commit is initial patch in effort to make polly interact with
Loop Vectorizer via metadata.
---------
Co-authored-by: Michael Kruse <github at meinersbur.de>
Commit: 4df6d3df24ae9cff07c70c96a1663cbba6e1dca5
https://github.com/llvm/llvm-project/commit/4df6d3df24ae9cff07c70c96a1663cbba6e1dca5
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
M llvm/test/CodeGen/AArch64/implicit-def-subreg-to-reg-regression.ll
M llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
A llvm/test/CodeGen/AArch64/reduced-coalescer-issue.ll
A llvm/test/CodeGen/AArch64/register-coalesce-implicit-def-subreg-to-reg.mir
M llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/combine-fneg.ll
M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
M llvm/test/CodeGen/PowerPC/frem.ll
M llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
M llvm/test/CodeGen/PowerPC/ldexp.ll
M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
A llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness.ll
M llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
A llvm/test/CodeGen/X86/coalescing-subreg-to-reg-requires-subrange-update.mir
A llvm/test/CodeGen/X86/pr76416.ll
M llvm/test/CodeGen/X86/subreg-fail.mir
A llvm/test/CodeGen/X86/subreg-to-reg-coalescing.mir
M llvm/test/CodeGen/X86/vector-compress.ll
Log Message:
-----------
Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)
This PR aims to reland work done by @arsenm which was previously
reverted due to some tangentially related scheduler issues as discussed
on #76416.
This PR cherry-picks the original commit (0e46b49de433), and adds
another patch on top with the following changes:
* The code in `updateRegDefsUses` now updates subranges when
subreg-liveness-tracking is enabled.
* When adding an implicit-def operand for the super-register,
the code in `reMaterializeTrivialDef` which tries to remove
undefined subranges should now take into account that the lanes
from the super-reg are no longer undefined.
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Commit: 6e1ea7e5a7b6e581bf9a030b98a7f63ee2833278
https://github.com/llvm/llvm-project/commit/6e1ea7e5a7b6e581bf9a030b98a7f63ee2833278
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/test/CodeGen/AArch64/outlining-with-streaming-mode-changes.ll
M llvm/test/CodeGen/AArch64/sme-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/sme-darwin-sve-vg.ll
M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
M llvm/test/CodeGen/AArch64/sme-lazy-save-call.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sme-streaming-body-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-body.ll
M llvm/test/CodeGen/AArch64/sme-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-mode-changing-call-disable-stackslot-scavenging.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
A llvm/test/CodeGen/AArch64/stack-hazard-defaults.ll
M llvm/test/CodeGen/AArch64/streaming-compatible-memory-ops.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
Log Message:
-----------
[AArch64] Set the default streaming hazard size to 1024 for +sme,+sve (#123753)
The default for all other feature combinations remains at zero (i.e. no
streaming hazards). This value may be adjusted in the future (e.g. based
on the processor family), for now, it is set conservatively.
Commit: d064d3fc2cf8841963151f428988475aab09ff56
https://github.com/llvm/llvm-project/commit/d064d3fc2cf8841963151f428988475aab09ff56
Author: Sylvestre Ledru <sylvestre at debian.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/Xtensa.td
R llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
M llvm/lib/Target/Xtensa/XtensaUtils.cpp
M llvm/lib/Target/Xtensa/XtensaUtils.h
R llvm/test/MC/Disassembler/Xtensa/windowed.txt
R llvm/test/MC/Disassembler/Xtensa/windowed_code_density.txt
R llvm/test/MC/Xtensa/windowed.s
R llvm/test/MC/Xtensa/windowed_code_density.s
R llvm/test/MC/Xtensa/windowed_invalid.s
Log Message:
-----------
Revert "[Xtensa] Implement Windowed Register Option." (#123913)
Reverts llvm/llvm-project#121118
for causing #123817
Commit: 937cbce14c9aa956342a9c818c26a8a557802843
https://github.com/llvm/llvm-project/commit/937cbce14c9aa956342a9c818c26a8a557802843
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/OpenMP/associate.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/critical.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/hlfir-wsloop.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/location.f90
M flang/test/Lower/OpenMP/order-clause.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
M flang/test/Lower/OpenMP/same_var_first_lastprivate.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-chunks.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-monotonic.f90
M flang/test/Lower/OpenMP/wsloop-nonmonotonic.f90
M flang/test/Lower/OpenMP/wsloop-ordered.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-2-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multi.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/OpenMP/wsloop-schedule.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/OpenMP/wsloop.f90
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
R mlir/test/Target/LLVMIR/openmp-wsloop-private-late-alloca-workaround.mlir
Log Message:
-----------
Revert "[flang][OpenMP] Enable delayed privatization by default `omp.wsloop` (#122471)" (#123324)
This seems to have caused some regressions in Fujitsu's test-suite:
https://linaro.atlassian.net/browse/LLVM-1521
This reverts commit 6f82408bb53f57a859953d8f1114f1634a5d3ee9.
Commit: 70f8040f099368b2e10f9b12d7f7fdee35c24cee
https://github.com/llvm/llvm-project/commit/70f8040f099368b2e10f9b12d7f7fdee35c24cee
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
Log Message:
-----------
[LoongArch] Simplify some Args.getLastArg() calls with AddTargetFeature(). NFC
Commit: 9178708c3bf926fe0d7767e26344f3f98b1e92ec
https://github.com/llvm/llvm-project/commit/9178708c3bf926fe0d7767e26344f3f98b1e92ec
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
A lld/test/ELF/aarch64-tlsdesc-pauth.s
Log Message:
-----------
[PAC][lld][AArch64][ELF] Support signed TLSDESC (#113817)
Depends on #120010
Support `R_AARCH64_AUTH_TLSDESC_ADR_PAGE21`, `R_AARCH64_AUTH_TLSDESC_LD64_LO12`
and `R_AARCH64_AUTH_TLSDESC_LD64_LO12` static relocations and
`R_AARCH64_AUTH_TLSDESC` dynamic relocation. IE/LE optimization is not
currently supported for AUTH TLSDESC.
Commit: 2ee36d40f0e717dc005fde19aa62f1acaaa04528
https://github.com/llvm/llvm-project/commit/2ee36d40f0e717dc005fde19aa62f1acaaa04528
Author: Yi Kong <yikong at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] Fix sendmmsg and recvmmsg rtsan interceptor for MUSL (#123907)
MUSL have different signatures for sendmmsg and recvmmsg.
This fixes build breakage from #123484.
Commit: 23fd8f6f263d14d43fd4b2a599652beaadc9920e
https://github.com/llvm/llvm-project/commit/23fd8f6f263d14d43fd4b2a599652beaadc9920e
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
Log Message:
-----------
[lldb][DWARFASTParserClang][NFCI] Simplify ParseChildParameters (#123790)
This patch refactors `ParseChildParameters` in a way which makes it (in
my opinion) more readable, removing some redundant local variables in
the process and reduces the scope of some variables.
**Motivation**
Since `DW_AT_object_pointer`s are now attached to declarations, we can
test for their existence to check whether a C++ method is static or not
(whereas currently we're deducing this from `ParseChildParameters` based
on some heuristics we know are true for most compilers). So my plan is
to move the code for determining `type_quals` and `is_static` out of
`ParseChildParameters`. The refactoring in this PR will make this
follow-up patch hopefully easier to review.
**Testing**
* This should be NFC. The main change is that we now no longer iterate
over `GetAttributes()` but instead retrieve the name, type and
is_artificial attributes of the parameters individually.
Commit: 5f40570714b355a0ce10ef3e137dc0dc540611d6
https://github.com/llvm/llvm-project/commit/5f40570714b355a0ce10ef3e137dc0dc540611d6
Author: bernhardu <bernhardu at mailbox.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Support some more 5 byte instructions. (#123844)
This patch adds several instructions seen when trying to run a
executable built with ASan with llvm-mingw.
(x86 and x86_64, using the git tip in llvm-project).
Also includes instructions collected by
Roman Pišl and Eric Pouech in the Wine bug reports below.
```
Related: https://github.com/llvm/llvm-project/issues/96270
Co-authored-by: Roman Pišl <rpisl at seznam.cz>
https://bugs.winehq.org/show_bug.cgi?id=50993
https://bugs.winehq.org/attachment.cgi?id=70233
Co-authored-by: Eric Pouech <eric.pouech at gmail.com>
https://bugs.winehq.org/show_bug.cgi?id=52386
https://bugs.winehq.org/attachment.cgi?id=71626
```
Commit: a343b8e595d56bde91800aeaa7826cbed4e0a18d
https://github.com/llvm/llvm-project/commit/a343b8e595d56bde91800aeaa7826cbed4e0a18d
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
A llvm/lib/Target/AMDGPU/SILowerWWMCopies.h
A llvm/test/CodeGen/AMDGPU/si-lower-wwm-copies.mir
Log Message:
-----------
[AMDGPU][NewPM] Port SILowerWWMCopies to NPM (#123695)
Commit: d2e510360fc9b17a3ad536582f076795c4c37634
https://github.com/llvm/llvm-project/commit/d2e510360fc9b17a3ad536582f076795c4c37634
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaLookup.cpp
A clang/test/Modules/visibility-for-implicit-global-module.cppm
Log Message:
-----------
[C++20] [Modules] Correct the visibility of decls in implicit global module of other units in the same TU
See the test for the case. It is similar with
https://github.com/llvm/llvm-project/commit/baa5b769f2f76baa0ce1ebfe28236dee2c761f0d
Commit: 0d24130008c61296f6ef80da172f7c6d47337357
https://github.com/llvm/llvm-project/commit/0d24130008c61296f6ef80da172f7c6d47337357
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[llvm][Docs] Add lldb user expressions related release notes (#123772)
Commit: 56592a81084e9b504dbff9a50c1a604cad7f2416
https://github.com/llvm/llvm-project/commit/56592a81084e9b504dbff9a50c1a604cad7f2416
Author: bernhardu <bernhardu at mailbox.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Support some more 4 byte instructions. (#123709)
This patch adds several instructions seen when trying to run a
executable built with ASan with llvm-mingw.
(x86 and x86_64, using the git tip in llvm-project).
Also includes instructions collected by
Roman Pišl and Eric Pouech in the Wine bug reports below.
```
Related: https://github.com/llvm/llvm-project/issues/96270
Co-authored-by: Roman Pišl <rpisl at seznam.cz>
https://bugs.winehq.org/show_bug.cgi?id=50993
https://bugs.winehq.org/attachment.cgi?id=70233
Co-authored-by: Eric Pouech <eric.pouech at gmail.com>
https://bugs.winehq.org/show_bug.cgi?id=52386
https://bugs.winehq.org/attachment.cgi?id=71626
```
Commit: 2b0e2255d6067872e844ff07d67342a6c97d8049
https://github.com/llvm/llvm-project/commit/2b0e2255d6067872e844ff07d67342a6c97d8049
Author: Petr Polezhaev <petr.polezhaev at ratigorsk-12.ru>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.h
M clang-tools-extra/clangd/ProjectModules.h
M clang-tools-extra/clangd/ScanningProjectModules.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] Support .clangd command line modifications for C++ modules (#122606)
Tunnels `Manger` object into the `ScanningAllProjectModules` so it can
be used to perform necessary command-line modifications (which also adds
`--resources` path previously added there explicitly). This allows using
the experimental C++ modules support with gcc.
This was discussed in the issue with @ChuanqiXu9 and @kadircet
Closes #112635
Commit: dedf014901cecd7ba3bbc1aadb17098a5a95b8a7
https://github.com/llvm/llvm-project/commit/dedf014901cecd7ba3bbc1aadb17098a5a95b8a7
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
A llvm/test/CodeGen/LoongArch/lasx/scalar-to-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
A llvm/test/CodeGen/LoongArch/lsx/scalar-to-vector.ll
M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
Log Message:
-----------
[LoongArch] lower SCALAR_TO_VECTOR to INSERT_VECTOR_ELT (#122863)
```llvm
define <16 x i8> @scalar_to_16xi8(i8 %val) {
%ret = insertelement <16 x i8> undef, i8 %val, i32 0
ret <16 x i8> %ret
}
```
before
```asm
addi.d $sp, $sp, -16
st.b $a0, $sp, 0
vld $vr0, $sp, 0
addi.d $sp, $sp, 16
ret
```
after
```asm
vinsgr2vr.b $vr0, $a0, 0
ret
```
---------
Co-authored-by: Lu Weining <luweining at loongson.cn>
Commit: ef37c3dd038da7b7b208b9464f2176ad3988f6f5
https://github.com/llvm/llvm-project/commit/ef37c3dd038da7b7b208b9464f2176ad3988f6f5
Author: Alexey Merzlyakov <60094858+AlexeyMerzlyakov at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[llvm][Docs] Release note for LLDB optionally disabled regsets for RV64 (#123363)
This PR adds the release note point for LLDB 20, discussed in
https://github.com/llvm/llvm-project/pull/104547#issuecomment-2587479877
for the same ticket
---------
Co-authored-by: David Spickett <david.spickett at linaro.org>
Commit: 9e0b2b68c2246332fc6035ee70d48a651c2dd6ca
https://github.com/llvm/llvm-project/commit/9e0b2b68c2246332fc6035ee70d48a651c2dd6ca
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libclc/clc/include/clc/clcmacro.h
M libclc/generic/lib/math/acos.cl
M libclc/generic/lib/math/acosh.cl
M libclc/generic/lib/math/acospi.cl
M libclc/generic/lib/math/asinh.cl
M libclc/generic/lib/math/atan.cl
M libclc/generic/lib/math/atan2.cl
M libclc/generic/lib/math/atan2pi.cl
M libclc/generic/lib/math/atanh.cl
M libclc/generic/lib/math/atanpi.cl
M libclc/generic/lib/math/cbrt.cl
M libclc/generic/lib/math/cos.cl
M libclc/generic/lib/math/cosh.cl
M libclc/generic/lib/math/cospi.cl
M libclc/generic/lib/math/exp.cl
M libclc/generic/lib/math/expm1.cl
M libclc/generic/lib/math/lgamma.cl
M libclc/generic/lib/math/log1p.cl
M libclc/generic/lib/math/logb.cl
M libclc/generic/lib/math/sin.cl
M libclc/generic/lib/math/sinh.cl
M libclc/generic/lib/math/sinpi.cl
M libclc/generic/lib/math/tanh.cl
Log Message:
-----------
[libclc] Don't rely on fp16 pragma guards in headers (#122751)
Having the fp16 pragmas enabled in the header file is risky. The macros
defined by that header don't (and can't) include the pragmas that make
fp16 types themselves legal, and another header may disable the fp16
pragma before the macro's use.
The safest thing to do is the use of pragmas surrounding each use of the
macro in the implementation files. This pattern is also far more common
across the codebase.
Commit: 28c819cf8c9fb67712225d7f57bdf923f2da5de2
https://github.com/llvm/llvm-project/commit/28c819cf8c9fb67712225d7f57bdf923f2da5de2
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/test/AST/ByteCode/cxx2a.cpp
Log Message:
-----------
[Clang] Fix tests broken by 0a9c08c
Commit: 4a2ebd6661cf1c929c280e863e4299164800413e
https://github.com/llvm/llvm-project/commit/4a2ebd6661cf1c929c280e863e4299164800413e
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
Log Message:
-----------
[LV][NFC] Refactor structures used to maintain uncountable exit info (#123219)
I've removed the HasUncountableEarlyExit variable, since we can
already determine whether or not a loop has an early exit by seeing
if we found an uncountable exit.
I have also deleted the old UncountableExitingBlocks and
UncountableExitBlocks lists and replaced them with a single
uncountable edge. This means we don't need to worry about keeping the
list entries in sync and makes it clear which exiting block
corresponds to which exit block.
Commit: 0165d043a9d62197468e0d4f7578cd7a5e4084f8
https://github.com/llvm/llvm-project/commit/0165d043a9d62197468e0d4f7578cd7a5e4084f8
Author: Xeonacid <h.dwwwwww at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/HIPUtility.cpp
Log Message:
-----------
[HIP] [NFC] Rename to `ClangArgs`
#112041 replaced `llvm-mc` with `clang`.
The args are now feeding to clang.
Commit: 6123a81b478fe9611b49169b274dfa167ab41931
https://github.com/llvm/llvm-project/commit/6123a81b478fe9611b49169b274dfa167ab41931
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] Fix process_vm_readv/process_vm_writev signatures. (#123914)
missing pid_t first argument. Fix #123839
Commit: 974f678d31969cf83a5b2828cc63120734ac82f3
https://github.com/llvm/llvm-project/commit/974f678d31969cf83a5b2828cc63120734ac82f3
Author: Xeonacid <h.dwwwwww at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/HIPUtility.cpp
Log Message:
-----------
[HIP] [NFC] Rename to ClangArgs (really)
Fixes 0165d04
Commit: 6b1db79887df19bc8e8c946108966aa6021c8b87
https://github.com/llvm/llvm-project/commit/6b1db79887df19bc8e8c946108966aa6021c8b87
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
M llvm/test/CodeGen/AArch64/implicit-def-subreg-to-reg-regression.ll
M llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
R llvm/test/CodeGen/AArch64/reduced-coalescer-issue.ll
R llvm/test/CodeGen/AArch64/register-coalesce-implicit-def-subreg-to-reg.mir
M llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/combine-fneg.ll
M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
M llvm/test/CodeGen/PowerPC/frem.ll
M llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
M llvm/test/CodeGen/PowerPC/ldexp.ll
M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
R llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness.ll
M llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
R llvm/test/CodeGen/X86/coalescing-subreg-to-reg-requires-subrange-update.mir
R llvm/test/CodeGen/X86/pr76416.ll
M llvm/test/CodeGen/X86/subreg-fail.mir
R llvm/test/CodeGen/X86/subreg-to-reg-coalescing.mir
M llvm/test/CodeGen/X86/vector-compress.ll
Log Message:
-----------
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)"
There's a regression with one of the bootstrap builds for x86.
I'll revert this while I investigate.
This reverts commit 4df6d3df24ae9cff07c70c96a1663cbba6e1dca5.
Commit: c745ece25460824ab85055e6015026642c565800
https://github.com/llvm/llvm-project/commit/c745ece25460824ab85055e6015026642c565800
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] page regions api interception update. (#123601)
madvise/mprotect/msync/mincore calls with care for signature difference
for the latter.
Commit: 099fd018d1b04013ef46c0e26ed008585ab8bcbb
https://github.com/llvm/llvm-project/commit/099fd018d1b04013ef46c0e26ed008585ab8bcbb
Author: Tejas Vipin <108227905+meltq at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
Log Message:
-----------
[mlir][Vector] Remove Vector{Load|Store}ToMemrefLoadLowering (#121454)
0-d vectors are supported now and so these patterns are no longer
required. This covers a part of this issue
https://github.com/llvm/llvm-project/issues/112913 . Additionally this
removes %arg2 in mlir/test/Conversion/GPUCommon/transfer_write.mlir and
renames %arg3 to %arg2 as %arg2 was originally not required.
Commit: 1a1dbac5bc4eab4239b365c1b296e2729031a62e
https://github.com/llvm/llvm-project/commit/1a1dbac5bc4eab4239b365c1b296e2729031a62e
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps4-sdk-root.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/ps5-sdk-root.c
Log Message:
-----------
[PS4/PS5][Driver] Observe <sysroot>/target/lib for libraries (#123350)
On PS5, if a custom --sysroot is supplied, `<sysroot>/target/lib` should
be added to the library search paths (this already occurs if the default
`--sysroot` is not overridden). Until now, this has been hardcoded as a
downstream patch in lld. Add it to the driver so that the private patch
can be removed.
On PS4 the library search paths remain unchanged. The proprietary linker
will continue to handle this aspect.
On either platform, warn if `<sysroot>/target/lib` is absent.
Previously, such warnings were emitted only when the default --sysroot
was not overridden.
SIE tracker: TOOLCHAIN-16704
Commit: 58be6fd1b4f6f0697148edda63e30ec0f74d412a
https://github.com/llvm/llvm-project/commit/58be6fd1b4f6f0697148edda63e30ec0f74d412a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/fixup-bw-inst.ll
Log Message:
-----------
[X86] fixup-bw-inst.ll - regenerate test checks to simplify diff for #123787
Commit: c4ef805b0bda16f734276086b0984583c2e21db6
https://github.com/llvm/llvm-project/commit/c4ef805b0bda16f734276086b0984583c2e21db6
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/Expr.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/atomic-test-and-set.c
M clang/test/Sema/atomic-ops.c
Log Message:
-----------
[Clang] Re-write codegen for atomic_test_and_set and atomic_clear (#121943)
Re-write the sema and codegen for the atomic_test_and_set and
atomic_clear builtin functions to go via AtomicExpr, like the other
atomic builtins do. This simplifies the code, because AtomicExpr already
handles things like generating code for to dynamically select the memory
ordering, which was duplicated for these builtins. This also fixes a few
crash bugs, one when passing an integer to the pointer argument, and one
when using an array.
This also adds diagnostics for the memory orderings which are not valid
for atomic_clear according to
https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-Builtins.html, which
were missing before.
Fixes https://github.com/llvm/llvm-project/issues/111293.
This is a re-land of #120449, modified to allow any non-const pointer
type for the first argument.
Commit: ffde2687be1fcb92c0c686aee441b83e71531457
https://github.com/llvm/llvm-project/commit/ffde2687be1fcb92c0c686aee441b83e71531457
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/builtins/arm/adddf3vfp.S
M compiler-rt/lib/builtins/arm/aeabi_dcmp.S
M compiler-rt/lib/builtins/arm/divdf3vfp.S
M compiler-rt/lib/builtins/arm/eqdf2vfp.S
M compiler-rt/lib/builtins/arm/extendsfdf2vfp.S
M compiler-rt/lib/builtins/arm/fixdfsivfp.S
M compiler-rt/lib/builtins/arm/fixunsdfsivfp.S
M compiler-rt/lib/builtins/arm/floatsidfvfp.S
M compiler-rt/lib/builtins/arm/floatunssidfvfp.S
M compiler-rt/lib/builtins/arm/gedf2vfp.S
M compiler-rt/lib/builtins/arm/gtdf2vfp.S
M compiler-rt/lib/builtins/arm/ledf2vfp.S
M compiler-rt/lib/builtins/arm/ltdf2vfp.S
M compiler-rt/lib/builtins/arm/muldf3vfp.S
M compiler-rt/lib/builtins/arm/nedf2vfp.S
M compiler-rt/lib/builtins/arm/subdf3vfp.S
M compiler-rt/lib/builtins/arm/truncdfsf2vfp.S
M compiler-rt/lib/builtins/arm/unorddf2vfp.S
M compiler-rt/lib/builtins/assembly.h
Log Message:
-----------
[compiler-rt] Make Arm builtins aware of endianness in VMOVs (#123204)
This patch makes Arm builtins aware of endianness in VMOVs.
Before this patch, the functions' definitions assumed little endian,
which made any program compiled for big endian incorrect.
Commit: b7423e94be572bac58b75d7b5e8dc502e9db7fcf
https://github.com/llvm/llvm-project/commit/b7423e94be572bac58b75d7b5e8dc502e9db7fcf
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Log Message:
-----------
[AMDGPU] Remove .i32 suffix from comments documenting intrinsics (#123919)
These intrinsics are overloaded. The documentation should not single out
the i32 overload.
Commit: d03fab1be38508f2a732330242a14744e4907ff9
https://github.com/llvm/llvm-project/commit/d03fab1be38508f2a732330242a14744e4907ff9
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
A llvm/test/tools/llvm-mca/RISCV/SiFive7/jump.s
Log Message:
-----------
[RISCV] Add precommit test for #123882
Add MCA test for jump instructions.
Commit: 9d676e2cb6a62b7dd4ee7d530e847dea8c185280
https://github.com/llvm/llvm-project/commit/9d676e2cb6a62b7dd4ee7d530e847dea8c185280
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/test/tools/llvm-mca/RISCV/SiFive7/jump.s
Log Message:
-----------
[MCA] Use MCInstrAnalysis to analyse call/return instructions (#123882)
The flag set in `MCInstrDesc` is not accurate and we should use
the result of `MCInstrAnalysis`.
Commit: 97c3a990f05606cb807faf53bc41302fb62c7980
https://github.com/llvm/llvm-project/commit/97c3a990f05606cb807faf53bc41302fb62c7980
Author: Sergey Kozub <skozub at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/Cuda.h
M clang/lib/Basic/Cuda.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
Log Message:
-----------
Remove incorrect CUDA defines (#123898)
Remove CUDA_127 and CUDA_129 defines incorrectly added in
https://github.com/llvm/llvm-project/pull/123398
Commit: c6c647588f911770170d2f7975b325f3d70cf89b
https://github.com/llvm/llvm-project/commit/c6c647588f911770170d2f7975b325f3d70cf89b
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
Log Message:
-----------
[SLP][NFC] Update test for PR #118055 (#122696)
This patch updates the motivating test for the above PR so that it does
not conflict with urem PR #122236
Commit: fbd86d05fe51d45f19df8d63aee41d979c268f8f
https://github.com/llvm/llvm-project/commit/fbd86d05fe51d45f19df8d63aee41d979c268f8f
Author: Clement Courbet <courbet at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
M clang-tools-extra/clang-tidy/utils/LexerUtils.cpp
M clang-tools-extra/test/clang-reorder-fields/Comments.cpp
M clang/include/clang/Lex/Lexer.h
M clang/lib/Lex/Lexer.cpp
M clang/unittests/Lex/LexerTest.cpp
Log Message:
-----------
[clang-reorder-fields] Reorder leading comments (#123740)
Similarly to https://github.com/llvm/llvm-project/pull/122918, leading
comments are currently not being moved.
```
struct Foo {
// This one is the cool field.
int a;
int b;
};
```
becomes:
```
struct Foo {
// This one is the cool field.
int b;
int a;
};
```
but should be:
```
struct Foo {
int b;
// This one is the cool field.
int a;
};
```
Commit: 5136c6d9d207b72135c92567e58e5cdbb86efc09
https://github.com/llvm/llvm-project/commit/5136c6d9d207b72135c92567e58e5cdbb86efc09
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/docs/Docker.rst
M llvm/utils/docker/build_docker_image.sh
R llvm/utils/docker/debian10/Dockerfile
A llvm/utils/docker/debian12/Dockerfile
M llvm/utils/docker/example/Dockerfile
M llvm/utils/docker/nvidia-cuda/Dockerfile
M llvm/utils/docker/scripts/checkout.sh
Log Message:
-----------
[Tools][Docker] Update Dockerfiles and Docker guide (#123841)
Fixes #123669
- Update Dockerfiles to work with the LLVM trunk
- Adapt Documentation accordingly
- Fix duplicate `-c` flag
Commit: bd56950b9cd5b6b07e1ccb9b02c5d8a7125a23b6
https://github.com/llvm/llvm-project/commit/bd56950b9cd5b6b07e1ccb9b02c5d8a7125a23b6
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
Log Message:
-----------
[clang] Refine the temporay object member access filtering for GSL pointer (#122088)
We currently have ad-hoc filtering logic for temporary object member
access in `VisitGSLPointerArg`. This logic filters out more cases than
it should, leading to false negatives. Furthermore, this location lacks
sufficient context to implement a more accurate solution.
This patch refines the filtering logic by moving it to the central
filtering location, `analyzePathForGSLPointer`, consolidating the logic
and avoiding scattered filtering across multiple places. As a result,
the special handling for conditional operators (#120233) is no longer
necessary.
This change also resolves #120543.
Commit: 729f958c4f7548c2d5be5f024b7254cd3ea25c64
https://github.com/llvm/llvm-project/commit/729f958c4f7548c2d5be5f024b7254cd3ea25c64
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
R mlir/test/Dialect/Tosa/broadcast.mlir
M mlir/test/Dialect/Tosa/constant_folding.mlir
M mlir/test/Dialect/Tosa/inlining.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[TOSA] Add SameOperandsAndResultRank to TOSA Ops (#104501)
[note: this is blocked by:
https://github.com/tensorflow/tensorflow/pull/73891 otherwise tensorflow
may have lit test failures]
This patch adds SameOperandsAndResultRank trait to TOSA operators with
ResultsBroadcastableShape trait. SameOperandsAndResultRank trait
requiring that all operands and results have matching ranks unless the
operand/result is unranked.
This also renders the TosaMakeBroadcastable pass unnecessary - but this
pass is left in for now just in case it is still used in some flows. The
lit test, broadcast.mlir, is removed.
This also adds verify of the SameOperandsAndResultRank trait in the
TosaInferShapes pass to validate inferred shapes.
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 7986e0cad10f3bf9efbbe31110ece68af5cb8751
https://github.com/llvm/llvm-project/commit/7986e0cad10f3bf9efbbe31110ece68af5cb8751
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[TOSA] bug fix infer shape for slice (#113497)
This fixes the infer output shape of TOSA slice op for start/size values
that are out-of-bound or -1
added tests to check:
- size = -1
- size is out of bound
- start is out of bound
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: ff0f1dd341cb2fdc1281a14413b3aa93bf9a20c7
https://github.com/llvm/llvm-project/commit/ff0f1dd341cb2fdc1281a14413b3aa93bf9a20c7
Author: Peter Hawkins <phawkins at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/python/mlir/dialects/_ods_common.py
Log Message:
-----------
[mlir:python] Small optimization to get_op_result_or_results. (#123866)
* We can call .results without figuring out whether we have an Operation
or an OpView, and that's likely the common case anyway.
* If we have one or more results, we can return them directly, with no
need for a call to get_op_result_or_value. We're guaranteed that
.results returns a PyOpResultList, so we have either an OpResult or
sequence of OpResults, just as the API expects.
This saves a few 100ms during IR construction in an LLM JAX benchmark.
Commit: 43177b524ee06dfc09cbc357ff277d4f53f5dc15
https://github.com/llvm/llvm-project/commit/43177b524ee06dfc09cbc357ff277d4f53f5dc15
Author: lialan <me at alanli.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
Log Message:
-----------
[GISel] Add more FP opcodes to CSE (#123624)
This fixes #122724
Commit: f4125e0226e03295f73c4b2dd9cfa540d872d162
https://github.com/llvm/llvm-project/commit/f4125e0226e03295f73c4b2dd9cfa540d872d162
Author: Peter Hawkins <phawkins at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
Log Message:
-----------
[mlir python] Change PyOpView constructor to construct operations. (#123777)
Previously ODS-generated Python operations had code like this:
```
super().__init__(self.build_generic(attributes=attributes, operands=operands, successors=_ods_successors, regions=regions, loc=loc, ip=ip))
```
we change it to:
```
super().__init__(self.OPERATION_NAME, self._ODS_REGIONS, self._ODS_OPERAND_SEGMENTS, self._ODS_RESULT_SEGMENTS, attributes=attributes, operands=operands, successors=_ods_successors, regions=regions, loc=loc, ip=ip)
```
This:
a) avoids an extra call dispatch (to `build_generic`), and
b) passes the class attributes directly to the constructor. Benchmarks
show that it is faster to pass these as arguments rather than having the
C++ code look up attributes on the class.
This PR improves the timing of the following benchmark on my workstation
from 5.3s to 4.5s:
```
def main(_):
with ir.Context(), ir.Location.unknown():
typ = ir.IntegerType.get_signless(32)
m = ir.Module.create()
with ir.InsertionPoint(m.body):
start = time.time()
for i in range(1000000):
arith.ConstantOp(typ, i)
end = time.time()
print(f"time: {end - start}")
```
Since this change adds an additional overload to the constructor and
does not alter any existing behaviors, it should be backwards
compatible.
Commit: d7fb4a275c98f4035d1083b5eb3edd2ffb2da00e
https://github.com/llvm/llvm-project/commit/d7fb4a275c98f4035d1083b5eb3edd2ffb2da00e
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/MC/MCELFStreamer.h
A llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/lib/MC/MCELFStreamer.cpp
A llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
A llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[LLVM][Clang][AArch64] Implement AArch64 build attributes (#118771)
- Added support for AArch64-specific build attributes.
- Print AArch64 build attributes to assembly.
- Parse AArch64 build attributes from assembly.
- Emit AArch64 build attributes to ELF.
Specification:
https://github.com/ARM-software/abi-aa/pull/230
Commit: e30b703060bb6741fb5e5e05e6b37802bc29b4ce
https://github.com/llvm/llvm-project/commit/e30b703060bb6741fb5e5e05e6b37802bc29b4ce
Author: Peter Hawkins <phawkins at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
Log Message:
-----------
[mlir:python] Construct PyOperation objects in-place on the Python heap. (#123813)
Currently we make two memory allocations for each PyOperation: a Python
object, and the PyOperation class itself. With some care we can allocate
the PyOperation inline inside the Python object, saving us a malloc()
call per object and perhaps improving cache locality.
Commit: d80eb928c78ab3f3a3320014b2b7d513642b1a7e
https://github.com/llvm/llvm-project/commit/d80eb928c78ab3f3a3320014b2b7d513642b1a7e
Author: Yeaseen <yeaseen.arafat96 at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/Transforms/ADCE/2017-08-21-DomTree-deletions.ll
M llvm/test/Transforms/ADCE/preserve-memoryssa-if-only-remove-debug.ll
M llvm/test/Transforms/AddDiscriminators/inlined.ll
M llvm/test/Transforms/AddDiscriminators/invoke.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/combine_ignore_debug.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_unreachable_bb.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_vector_instrs.ll
M llvm/test/Transforms/AlignmentFromAssumptions/simple.ll
M llvm/test/Transforms/AlignmentFromAssumptions/simple32.ll
M llvm/test/Transforms/ArgumentPromotion/crash.ll
M llvm/test/Transforms/ArgumentPromotion/min-legal-vector-width.ll
M llvm/test/Transforms/ArgumentPromotion/pr32917.ll
Log Message:
-----------
[llvm] Remove `undef` from `llvm/test/Transforms` tests (#123889)
This PR replaces some instances of `undef` with `function argument
value` or `poison` or `concrete values` in several tests under
`llvm/test/Transforms/` directory. These changes align with modern LLVM
standards for better-defined behavior and test determinism. If this
small PR is okay and gets merged, I will work on the rest.
This is inspired by [this
project](https://discourse.llvm.org/t/gsoc-2024-remove-undefined-behavior-from-tests/77236/29),
work done on this by @leewei05
Commit: ccd77953d0f1e367d268df89e7cc1c663c475ba7
https://github.com/llvm/llvm-project/commit/ccd77953d0f1e367d268df89e7cc1c663c475ba7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/alternate-vectorization-split-node.ll
Log Message:
-----------
[SLP][NFC]Add a test with potential alternate node, marked for minbitwidth size
Commit: 4f40b07533eabceeaf56fb89d27b020c6f7aae7e
https://github.com/llvm/llvm-project/commit/4f40b07533eabceeaf56fb89d27b020c6f7aae7e
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/Headers/avx10_2_512satcvtintrin.h
M clang/lib/Headers/avx10_2satcvtintrin.h
M clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
M clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
M llvm/test/MC/X86/avx10.2satcvt-32-att.s
M llvm/test/MC/X86/avx10.2satcvt-32-intel.s
M llvm/test/MC/X86/avx10.2satcvt-64-att.s
M llvm/test/MC/X86/avx10.2satcvt-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2-SATCVT][NFC] Remove NE from intrinsic and instruction name (#123275)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: 1df50e6245cbc04f3b28de3c40127ad61d46b43b
https://github.com/llvm/llvm-project/commit/1df50e6245cbc04f3b28de3c40127ad61d46b43b
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Don't link with --build-id when -static (#123930)
Users of the PlayStation SDK aren't given the means to create or run
static executables. Uses of `-static` are limited a few specialized
cases within SIE. A `--build-id` isn't wanted in those cases.
SIE tracker: TOOLCHAIN-16704
Commit: a2063ba7ffdbbb4faf5da5f32739ab761c2e4289
https://github.com/llvm/llvm-project/commit/a2063ba7ffdbbb4faf5da5f32739ab761c2e4289
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
Log Message:
-----------
[clangd][NFC] Delete a pessimizing move
Commit: a7a8694c5a23c04322f22bf8ce5685cb4b1dddc3
https://github.com/llvm/llvm-project/commit/a7a8694c5a23c04322f22bf8ce5685cb4b1dddc3
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
Log Message:
-----------
Remove references to mips within Android (#123856)
Commit: 70a16b90ff391ff82ef54d4ae6ffcb5eb50162a0
https://github.com/llvm/llvm-project/commit/70a16b90ff391ff82ef54d4ae6ffcb5eb50162a0
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/Driver/linker-wrapper-image.c
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
Log Message:
-----------
[HIP] Support managed variables using the new driver (#123437)
Summary:
Previously, managed variables didn't work in rdc mode using the new
driver because we just didn't register them. This was previously ignored
because we didn't have enough space in the current struct format. This
patch amends that by just emitting a struct pair for the two variables
and using the single pointer.
In the future, a more extensible entry format would be nice, but that
can be done later.
Commit: 4170d6123c51e088fde0ce8c11008b442077fa00
https://github.com/llvm/llvm-project/commit/4170d6123c51e088fde0ce8c11008b442077fa00
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
Log Message:
-----------
[gn] port 6aeffcdb9130
Commit: d0a89e71791736d67d5a5d77fce184f106dc3d3e
https://github.com/llvm/llvm-project/commit/d0a89e71791736d67d5a5d77fce184f106dc3d3e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[gn] fix mistake in d7fb4a275c98f
Commit: c938436f7120872d2e2f72272b7adf2913d91783
https://github.com/llvm/llvm-project/commit/c938436f7120872d2e2f72272b7adf2913d91783
Author: Danial Klimkin <dklimkin at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
M llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
Log Message:
-----------
Revert "[GISel] Add more FP opcodes to CSE (#123624)" (#123954)
This reverts commit 43177b524ee06dfc09cbc357ff277d4f53f5dc15.
Commit: aa580c2ec5eb4217c945a47a561181be7e7b1032
https://github.com/llvm/llvm-project/commit/aa580c2ec5eb4217c945a47a561181be7e7b1032
Author: qt-tatiana <tatiana.borisova at qt.io>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-integer-sign-comparison.rst
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-integer-sign-comparison-qt.cpp
Log Message:
-----------
[clang-tidy] Add `EnableQtSupport` option to modernize-use-integer-sign-comprison (#122127)
- add an option `EnableQtSupport`, that makes C++17 `q20::cmp_*`
alternative available for Qt-based applications.
Commit: 93d35ad5f53a69606eac0dabb8ceef066ce4d407
https://github.com/llvm/llvm-project/commit/93d35ad5f53a69606eac0dabb8ceef066ce4d407
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
R llvm/test/CodeGen/AMDGPU/power-sched-no-cycle.mir
Log Message:
-----------
AMDGPU: Delete FillMFMAShadowMutation (#123861)
No test changes with this removed and it appears to
be obsolete.
Commit: 6b486f458fe40919577d9249fa754daa913795d1
https://github.com/llvm/llvm-project/commit/6b486f458fe40919577d9249fa754daa913795d1
Author: flopop01 <florin.popa at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Preprocessor/arm-target-features.c
Log Message:
-----------
[Clang][Arch] Disable mve.fp when explicit -mfpu option (#123028)
Commit: b0d35cf22e15be5c62835d689f3c7e301d9f22cd
https://github.com/llvm/llvm-project/commit/b0d35cf22e15be5c62835d689f3c7e301d9f22cd
Author: Joshua Cranmer <joshua.cranmer at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SSAUpdater.h
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
Log Message:
-----------
[SSAUpdater] Avoid scanning basic blocks to find instruction order. (#123803)
This fixes a compile-time regression caused by #116645, where an entry
basic block with a very large number of allocas and other instructions
caused SROA to take ~100× its expected runtime, as every alloca (with ~2
uses) now calls this method to find the order of those few instructions,
rescanning the very large basic block every single time.
Since this code was originally written, Instructions now have ordering
numbers available to determine relative order without unnecessarily
scanning the basic block.
Commit: 58c6d440f8c24ef1532d12e50302e290e1907a87
https://github.com/llvm/llvm-project/commit/58c6d440f8c24ef1532d12e50302e290e1907a87
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/cmake/config-ix.cmake
M llvm/include/llvm/Config/config.h.cmake
M llvm/lib/Support/Unix/DynamicLibrary.inc
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Unix/Signals.inc
M llvm/lib/Support/Unix/Unix.h
M llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/config.h
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
[CMake] Remove HAVE_DLFCN_H and HAVE_DLADDR (#123879)
It is sufficient to just use `HAVE_DLOPEN`.
Commit: 5a9b74d20d5f3b7f92c01d68d28778108dfb1308
https://github.com/llvm/llvm-project/commit/5a9b74d20d5f3b7f92c01d68d28778108dfb1308
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp:309:7: error:
variable 'errs' set but not used [-Werror,-Wunused-but-set-variable]
Commit: 75ce2dc475b12c12419904cd67b9d12b79a66242
https://github.com/llvm/llvm-project/commit/75ce2dc475b12c12419904cd67b9d12b79a66242
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
M llvm/lib/Target/AArch64/AArch64Processors.td
Log Message:
-----------
[llvm][AArch64] apple-m4 does not have FEAT_{SPEv1p2,SEL2,MPAM} (#123827)
This commit addresses some uncertainty raised in 84fa1755a5b7845ddaeaa513a3786013c76c9c88 as to which features Apple M4 has.
Commit: fa6f88af102cb79a0371725b487e929cb0bcfcb2
https://github.com/llvm/llvm-project/commit/fa6f88af102cb79a0371725b487e929cb0bcfcb2
Author: Petr Kurapov <petr.a.kurapov at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
Log Message:
-----------
[MLIR][XeGPU] Allow some nd ops to have argument shapes mismatch for … (#120566)
…the distributed IR case.
This patch allows `nd_load` and `nd_store` to preserve the tensor
descriptor shape during distribution to SIMT. The validation now expects
the distributed instruction to retain the `sg_map` attribute and uses it
to verify the consistency.
Commit: 13d09dfad6d1f6a15721688822ce33b74b44a8d8
https://github.com/llvm/llvm-project/commit/13d09dfad6d1f6a15721688822ce33b74b44a8d8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[X86] Simplify ArrayRef construction. NFC (#123899)
I think the std::begin/end were to work around an old gcc bug. Hopefully
we don't need them anymore.
Commit: 9e6494c0fb29dfb5d4d2b7bf3ed7af261efee034
https://github.com/llvm/llvm-project/commit/9e6494c0fb29dfb5d4d2b7bf3ed7af261efee034
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
Log Message:
-----------
[CodeGen] Rename RegisterMaskPair to VRegMaskOrUnit. NFC (#123799)
This holds a physical register unit or virtual register and mask.
While I was here I've used emplace_back and removed an unneeded use of a
template.
Commit: f63e8ed16ef1fd2deb80cd88b5ca9d5b631b1c36
https://github.com/llvm/llvm-project/commit/f63e8ed16ef1fd2deb80cd88b5ca9d5b631b1c36
Author: Ilya Biryukov <ibiryukov at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/AST/Attr.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTRecordReader.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/Modules/preferred_name.cppm
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
Revert "[Modules] Delay deserialization of preferred_name attribute at r… (#122726)"
This reverts commit c3ba6f378ef80d750e2278560c6f95a300114412.
We are seeing performance regressions of up to 40% on some compilations
with this patch, we will investigate and reland after fixing performance
issues.
Commit: 16298e4cf23d351fcd789fd027d8a30d9329fa81
https://github.com/llvm/llvm-project/commit/16298e4cf23d351fcd789fd027d8a30d9329fa81
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/var-permute-256.ll
Log Message:
-----------
[X86] var-permute-256.ll - regenerate VPTERNLOG comments
Commit: 603529b29eb5441fe7d32f8d154a0ed876038ef2
https://github.com/llvm/llvm-project/commit/603529b29eb5441fe7d32f8d154a0ed876038ef2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
Log Message:
-----------
[X86] add/sub signed sat vec tests - regenerate VPTERNLOG comments
Commit: e6c7d6a56a850228ccb7b1659e383dd5a55e7bdb
https://github.com/llvm/llvm-project/commit/e6c7d6a56a850228ccb7b1659e383dd5a55e7bdb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
Log Message:
-----------
[X86] avx512-broadcast-unfold.ll - regenerate VPTERNLOG comments
Commit: bb754f2c98ddeeadf75f21e6fbc6bd03898f008c
https://github.com/llvm/llvm-project/commit/bb754f2c98ddeeadf75f21e6fbc6bd03898f008c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512-intrinsics.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
Log Message:
-----------
[X86] avx512 intrinsics tests - regenerate VPTERNLOG comments
Commit: a25f2cb3e6953691fade076c8e0ccebf1016d3d9
https://github.com/llvm/llvm-project/commit/a25f2cb3e6953691fade076c8e0ccebf1016d3d9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
Log Message:
-----------
[X86] vector rotate tests - regenerate VPTERNLOG comments
Commit: 44f316811016e677ca3e6c6237619e71bae28986
https://github.com/llvm/llvm-project/commit/44f316811016e677ca3e6c6237619e71bae28986
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
M llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll
M llvm/test/CodeGen/X86/vector-reduce-and-scalar.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
Log Message:
-----------
[X86] vector reduction tests - regenerate VPTERNLOG comments
Commit: 2476417232cdf2e1fce1a1df466b0995cdf559c5
https://github.com/llvm/llvm-project/commit/2476417232cdf2e1fce1a1df466b0995cdf559c5
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/Transforms/Instrumentation/LowerAllowCheckPass.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
Reapply "[sanitizer][NFCI] Add Options parameter to LowerAllowCheckPass" (#122833) (#122994)
This reverts commit 1515caf7a59dc20cb932b724b2ef5c1d1a593427
(https://github.com/llvm/llvm-project/pull/122833) i.e., relands
7d8b4eb0ead277f41ff69525ed807f9f6e227f37
(https://github.com/llvm/llvm-project/pull/122765), with LowerAllowCheckPass::Options moved inside the callback to fix a stack use-after-scope error.
---------
Co-authored-by: Vitaly Buka <vitalybuka at gmail.com>
Commit: f3c3a9b8829760b730b6651e460f9035065dd4c5
https://github.com/llvm/llvm-project/commit/f3c3a9b8829760b730b6651e460f9035065dd4c5
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libc/CMakeLists.txt
Log Message:
-----------
[libc][cmake] error if user disables sanitizers but wants scudo (#123834)
I found this out the hard way...though we don't suggest in our docs setting or
unsetting COMPILER_RT_BUILD_SANITIZERS, I had this explicitly disabled in a
cmake script I was using to setup an llvm-libc based sysroot. While the libc
compiled, hello world failed to link due to missing references to malloc at
link time. Though I had set the cmake variables to opt into using scudo,
apparently explicitly disabling sanitizers will still prevent scudo from being
built... Check for this at configure time and stop the build then.
Commit: ddb8607fe8b0b74a6d89c79d4fcc158673ac765a
https://github.com/llvm/llvm-project/commit/ddb8607fe8b0b74a6d89c79d4fcc158673ac765a
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
Log Message:
-----------
[libc][docs] disable pthreads docs (#123824)
Having a target named pthreads is breaking when multiple runtimes are enabled.
Disable this target for now so that the builds go back to green (and sites get
updated).
Link: https://github.com/llvm/llvm-zorg/issues/359#issuecomment-2600285688
Link: #122006
Link: #122497
Link: #123821
Commit: 8e79ade49d68c49aeb8ba008b59f559b86d22765
https://github.com/llvm/llvm-project/commit/8e79ade49d68c49aeb8ba008b59f559b86d22765
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libc/src/__support/macros/null_check.h
M libc/test/src/math/smoke/nan_test.cpp
M libc/test/src/math/smoke/nanf128_test.cpp
M libc/test/src/math/smoke/nanf16_test.cpp
M libc/test/src/math/smoke/nanf_test.cpp
M libc/test/src/math/smoke/nanl_test.cpp
Log Message:
-----------
[libc][LIBC_ADD_NULL_CHECKS] replace volatile deref with __builtin_trap (#123401)
Also, update the unit tests that were checking for SIGSEGV to not check for a
specific signal.
To further improve this check, it may be worth:
- renaming the configuration option/macro/docs to be clearer about intent.
- swap __builtin_trap for __builtin_unreachable, removing the preprocessor
variants of LIBC_CRASH_ON_NULLPTR, then unconditionally using
`-fsanitize=unreachable -fsanitize-trap=unreachable` in cmake flags when
LIBC_ADD_NULL_CHECKS is enabled.
- building with `-fno-delete-null-pointer-checks` when LIBC_ADD_NULL_CHECKS (or
when some larger yet to be added hardening config) is enabled.
Link: #111546
Commit: f78359cf43cb990f66412059383cdd95ab6e6ec4
https://github.com/llvm/llvm-project/commit/f78359cf43cb990f66412059383cdd95ab6e6ec4
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td
A mlir/include/mlir/Dialect/SPIRV/IR/SPIRVPrimitiveOps.td
M mlir/test/Dialect/SPIRV/IR/availability.mlir
A mlir/test/Dialect/SPIRV/IR/primitive-ops.mlir
A mlir/test/Target/SPIRV/primitive-ops.mlir
Log Message:
-----------
[mlir][spirv] Add definition for OpEmitVertex and OpEndPrimitive (#123759)
This is hopefully the first patch in the series of patches adding some
missing SPIR-V ops to MLIR over the next weeks/months, starting with
something simple: `OpEmitVertex` and `OpEndPrimitive`. Since the ops
have no input and outputs, and the only condition is "This instruction
must only be used when only one stream is present.", which I don't think
can be validate at the instruction level in isolation, I set
`hasVerifier` to 0. I hope I didn't miss anything, but I'm more than
happy to address any comments.
Commit: 511dc261ab94da7db6e67b05cdcef9dcff44798a
https://github.com/llvm/llvm-project/commit/511dc261ab94da7db6e67b05cdcef9dcff44798a
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
Log Message:
-----------
[lldb][DWARFASTParserClang][NFCI] Factor out CV-qualifier/is_static parsing from ParseChildParameters (#123951)
This patch continues simplifying `ParseChildParameters` by moving out
the logic that parses the first parameter of a function DIE into a
helper function. Since with GCC (and lately Clang) function declarations
have `DW_AT_object_pointer`s, we should be able to check for the
attribute's existence to determine if a function is static (and also
deduce CV-qualifiers from it). This will be useful for cases where the
object parameter is explicit (which is possible since C++23).
This should be NFC. I added a FIXME to places where we assume an
implicit object parameter (which will be addressed in a follow-up
patch).
We used to guard parsing of the CV-qualifiers of the "this" parameter
with a `encoding_mask & Type::eEncodingIsPointerUID`, which is
incorrect, because `eEncodingIsPointerUID` cannot be used as a bitmask
directly (see https://github.com/llvm/llvm-project/issues/120856). This
patch corrects this, but it should still be NFC because any parameter in
C++ called "this" *is* an implicit object parameter.
Commit: b1943f40e74dcfe4ebd6213e1a8a01403bd5ffa9
https://github.com/llvm/llvm-project/commit/b1943f40e74dcfe4ebd6213e1a8a01403bd5ffa9
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
Log Message:
-----------
[BranchFolding] Remove getBranchDebugLoc() (#114613)
Commit: a56ba1fab07b2c9b1d0287bdf56cdad4d54a5f33
https://github.com/llvm/llvm-project/commit/a56ba1fab07b2c9b1d0287bdf56cdad4d54a5f33
Author: goldsteinn <35538541+goldsteinn at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/ScalarEvolution/cycled_phis.ll
M llvm/test/Analysis/ScalarEvolution/unknown_phis.ll
M llvm/test/Transforms/InstCombine/known-phi-recurse.ll
M llvm/test/Transforms/SimplifyCFG/switch-branch-fold-indirectbr-102351.ll
Log Message:
-----------
[ValueTracking] Handle recursive select/PHI in ComputeKnownBits (#114689)
Finish porting #114008 to `KnownBits` (Follow up to #113707).
Commit: afcbcae668f1d8061974247f2828190173aef742
https://github.com/llvm/llvm-project/commit/afcbcae668f1d8061974247f2828190173aef742
Author: Anchu Rajendran S <asudhaku at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] inscan reduction modifier and scan op mlir support (#114737)
Scan directive allows to specify scan reductions within an worksharing
loop, worksharing loop simd or simd directive which should have an
`InScan` modifier associated with it. This change adds the mlir support
for the same.
Related PR: [Parsing and Semantic Support for
scan](https://github.com/llvm/llvm-project/pull/102792)
Commit: 9f83c4ed1c8d09bf4c246ec6dd758bde1756f60c
https://github.com/llvm/llvm-project/commit/9f83c4ed1c8d09bf4c246ec6dd758bde1756f60c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][cuda] Allocate descriptor in managed memory on rebox block argument (#123971)
Another case where the descriptor must be allocated with the CUF runtime
and not a simple alloca instruction.
Commit: 7bf188fa991338e981e8dff120a4ed341ad7f4bd
https://github.com/llvm/llvm-project/commit/7bf188fa991338e981e8dff120a4ed341ad7f4bd
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGExprCXX.cpp
Log Message:
-----------
[NFC] Minor fix to tryEmitAbstract type in EmitCXXNewAllocSize (#123433)
In EmitCXXNewAllocSize, when handling a constant array size, we were
calling tryEmitAbstract with the type of the object being allocated rather
than the expected type of the array size. This worked out because the
allocated type was always a pointer and tryEmitAbstract only ends up
using the size of the type to extend or truncate the constant, and in this
case the destination type should be size_t, which is usually the same
width as the pointer. This change fixes the type, but it makes no
functional difference with the current constant emitter implementation.
Commit: b40739a6e90cfb000b49de819251c1581fd5ee50
https://github.com/llvm/llvm-project/commit/b40739a6e90cfb000b49de819251c1581fd5ee50
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/MC/MCELFStreamer.h
R llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/lib/MC/MCELFStreamer.cpp
R llvm/lib/Support/AArch64BuildAttributes.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-all.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-bti.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-attrs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-err-headers.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-gcs.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-none.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-numerical-tags.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-out-of-order.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-pac.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections-err.s
R llvm/test/MC/AArch64/aarch64-build-attributes-asm-private-subsections.s
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
Revert "[LLVM][Clang][AArch64] Implement AArch64 build attributes (#118771)"
This reverts commit d7fb4a275c98f4035d1083b5eb3edd2ffb2da00e.
Buildbots failing:
https://lab.llvm.org/buildbot/#/builders/169/builds/7671
https://lab.llvm.org/buildbot/#/builders/65/builds/11046
Commit: 195a1fc5b05d7a42b2e3fa383edb9a7e8b34a9c5
https://github.com/llvm/llvm-project/commit/195a1fc5b05d7a42b2e3fa383edb9a7e8b34a9c5
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CXX/temp/temp.res/temp.dep/temp.dep.type/p4.cpp
Log Message:
-----------
Reapply "[Clang][Sema] Use the correct lookup context when building overloaded 'operator->' in the current instantiation (#104458)" (#109422)
Reapplies #104458, fixing a bug that occurs when a class member access expression calls an `operator->` operator function that returns a non-dependent class type.
Commit: 137d706739653304294adef84ed758e3e498d975
https://github.com/llvm/llvm-project/commit/137d706739653304294adef84ed758e3e498d975
Author: Julian Nagele <j.nagele at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
Log Message:
-----------
[SCEV] Do not attempt to collect loop guards for loops without predecessor. (#123662)
Attempting to collect loop guards for loops without a predecessor can
lead to non-terminating recursion trying to construct a SCEV.
Fixes https://github.com/llvm/llvm-project/issues/122913.
Commit: 146ee98caa9ab1f717216b08cfe72bd1ab2e0b8b
https://github.com/llvm/llvm-project/commit/146ee98caa9ab1f717216b08cfe72bd1ab2e0b8b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
Log Message:
-----------
[RISCV] Remove duplicate WriteRes<WriteJalr for MIPSP8700. (#123865)
We had two WriteRes for WriteJalr with difference latencies. Drop the
duplicate and change the latency of Jal to 1 based on review feedback
Commit: ec15b242505a46ea7d195a6520fb869a80a2cd10
https://github.com/llvm/llvm-project/commit/ec15b242505a46ea7d195a6520fb869a80a2cd10
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CMakeLists.txt
M llvm/test/Other/crash-stack-trace.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
Log Message:
-----------
[llvm][Support] Only enable backtrace test when it's enabled (#123852)
rdar://138554797
Commit: 589593254eede2f624f29390dc1018725e536505
https://github.com/llvm/llvm-project/commit/589593254eede2f624f29390dc1018725e536505
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOpt] Reorganize visit order and worklist management (#123973)
This implements a suggestion by Craig in PR #123878. We can move the
worklist management out of the per-instruction work and do it once at
the end of scanning all the instructions. This should reduce repeat
visitation of the same instruction when no changes can be made.
Note that this does not remove the inherent O(N^2) in the algorithm.
We're still potentially visiiting every user of every def.
I also included a guard for unreachable blocks since that had been
mentioned as a possible cause. It seems we've rulled that out, but
guarding for this case is still a good idea.
Commit: 340706f311e088f51002593b8cc7291500ca024e
https://github.com/llvm/llvm-project/commit/340706f311e088f51002593b8cc7291500ca024e
Author: Stefan Pintilie <stefanp at ca.ibm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
Log Message:
-----------
[PowerPC] Fix saving of Link Register when using ROP Protect (#123101)
An optimization was added that tries to move the uses of the mflr
instruction away from the instruction itself. However, this doesn't work
when we are using the hashst instruction because that instruction needs
to be run before the stack frame is obtained.
This patch disables moving instructions away from the mflr in the case
where ROP protection is being used.
---------
Co-authored-by: Lei Huang <lei at ca.ibm.com>
Commit: 1687aa2a996f4059f275c83d5db635d43165d36c
https://github.com/llvm/llvm-project/commit/1687aa2a996f4059f275c83d5db635d43165d36c
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
A llvm/test/CodeGen/RISCV/rvv/vlopt-same-vl.ll
Log Message:
-----------
[RISCV][VLOPT] Don't reduce the VL is the same as CommonVL (#123878)
This fixes the slowdown in #123862.
Commit: 5ede7b6a6bc22aee86e592835ccc4eaa9459e5cd
https://github.com/llvm/llvm-project/commit/5ede7b6a6bc22aee86e592835ccc4eaa9459e5cd
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CXX/temp/temp.res/temp.dep/temp.dep.type/p4.cpp
Log Message:
-----------
Revert "Reapply "[Clang][Sema] Use the correct lookup context when building overloaded 'operator->' in the current instantiation (#104458)"" (#123982)
Reverts llvm/llvm-project#109422
Commit: 7ad8a3da4771ce8abbd146611124104d42a4e63e
https://github.com/llvm/llvm-project/commit/7ad8a3da4771ce8abbd146611124104d42a4e63e
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[MemProf] Simplify edge iterations (NFC) (#123469)
Remove edge iterator parameters from the various helpers that move edges
onto other nodes, and their associated iterator update code, and instead
iterate over copies of the edge lists in the caller loops. This also
avoids the need to increment these iterators at every early loop
continue.
This simplifies the code, makes it less error prone when updating, and
in particular, facilitates adding handling of recursive contexts.
There were no measurable compile time and memory overhead effects for a
large target.
Commit: 3057d0f14af5e073be3b7c7942dfff2a975ac4cb
https://github.com/llvm/llvm-project/commit/3057d0f14af5e073be3b7c7942dfff2a975ac4cb
Author: AdityaK <hiraditya at msn.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
Log Message:
-----------
Android defaults to pic (#123955)
Commit: 7e622b61320543b3706711609f1f32fd9ea3788d
https://github.com/llvm/llvm-project/commit/7e622b61320543b3706711609f1f32fd9ea3788d
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeConv2D.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-conv2d.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[TOSA] Change PadOp padding to tosa.shape (#123133)
This patch changes PadOp's padding input to type !tosa.shape<2 * rank>,
(where rank is the rank of the PadOp's input), instead of a <rank x 2>
tensor.
This patch is also a part of TOSA v1.0 effort:
https://discourse.llvm.org/t/rfc-tosa-dialect-increment-to-v1-0/83708
This patch updates the PadOp to match all against the TOSA v1.0 form.
Original Authors include:
@Tai78641
@wonjeon
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: 719f0d92538c917306004e541f38c79717d0c07d
https://github.com/llvm/llvm-project/commit/719f0d92538c917306004e541f38c79717d0c07d
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
Log Message:
-----------
[HLSL] Fix global resource initialization (#123394)
Create separate resource initialization function for each resource and
add them to CodeGenModule's `CXXGlobalInits` list.
Fixes #120636 and addresses this [comment
](https://github.com/llvm/llvm-project/pull/119755/files#r1894093603).
Commit: 1cf0af3d321e3aca57e348b9c0675d153c7b6968
https://github.com/llvm/llvm-project/commit/1cf0af3d321e3aca57e348b9c0675d153c7b6968
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmpx_class_f16 (#123251)
True16 format for v_cmpx_class_f16. Update VOPCX_CLASS t16 and fake16
pseudo.
Commit: 18e9d3dbe5386dd3b88df7e3352f81498cfa6182
https://github.com/llvm/llvm-project/commit/18e9d3dbe5386dd3b88df7e3352f81498cfa6182
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmpx_xx_u/i16 (#123424)
A bulk commit of true16 support for v_cmp_xx_i/u16 instructions
including:
v_cmpx_lt_i16
v_cmpx_eq_i16
v_cmpx_le_i16
v_cmpx_gt_i16
v_cmpx_ne_i16
v_cmpx_ge_i16
v_cmpx_lt_u16
v_cmpx_eq_u16
v_cmpx_le_u16
v_cmpx_gt_u16
v_cmpx_ne_u16
v_cmpx_ge_u16
Commit: 213e03ca1174177370715a8776a6423ee29b10ca
https://github.com/llvm/llvm-project/commit/213e03ca1174177370715a8776a6423ee29b10ca
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Decl.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
Log Message:
-----------
[Clang] Fix handling of immediate escalation for inherited constructors (#112860)
Fixes #112677
Commit: c6e7b4a61ab8718d9ac9d1d32f7d2d0cd0b19a7f
https://github.com/llvm/llvm-project/commit/c6e7b4a61ab8718d9ac9d1d32f7d2d0cd0b19a7f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.cpp
Log Message:
-----------
[flang][cuda][NFC] Add kernel name in translation error (#123987)
Commit: 2656928d0ca78e38c91315020876755e46ccecbf
https://github.com/llvm/llvm-project/commit/2656928d0ca78e38c91315020876755e46ccecbf
Author: Deric Cheung <cheung.deric at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
A clang/test/CodeGenHLSL/builtins/reflect.hlsl
A clang/test/CodeGenSPIRV/Builtins/reflect.c
A clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
A clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
A llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
Log Message:
-----------
Reland "[HLSL] Implement the `reflect` HLSL function" (#123853)
This PR relands
[#122992](https://github.com/llvm/llvm-project/pull/122992).
Some machines were failing to run the `reflect-error.ll` test due to the
RUN lines
```llvm
; RUN: not %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o /dev/null 2>&1 -filetype=obj %}
; RUN: not %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o /dev/null 2>&1 -filetype=obj %}
```
which failed when `spirv-tools` was not present on the machine due to
running the command `not` without any arguments.
These RUN lines have been removed since they don't actually test
anything new compared to the other two RUN lines due to the expected
error during instruction selection.
```llvm
; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s
; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s
```
Commit: 8fb42300a02c887740825cd1b60fc4fcd8d2f933
https://github.com/llvm/llvm-project/commit/8fb42300a02c887740825cd1b60fc4fcd8d2f933
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/RecursiveASTVisitor.h
A clang/include/clang/AST/StmtSYCL.h
M clang/include/clang/AST/StmtVisitor.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Sema/SemaSYCL.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-entry-point.cpp
M clang/test/SemaSYCL/sycl-kernel-entry-point-attr-appertainment.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[SYCL] AST support for SYCL kernel entry point functions. (#122379)
A SYCL kernel entry point function is a non-member function or a static
member function declared with the `sycl_kernel_entry_point` attribute.
Such functions define a pattern for an offload kernel entry point
function to be generated to enable execution of a SYCL kernel on a
device. A SYCL library implementation orchestrates the invocation of
these functions with corresponding SYCL kernel arguments in response to
calls to SYCL kernel invocation functions specified by the SYCL 2020
specification.
The offload kernel entry point function (sometimes referred to as the
SYCL kernel caller function) is generated from the SYCL kernel entry
point function by a transformation of the function parameters followed
by a transformation of the function body to replace references to the
original parameters with references to the transformed ones. Exactly how
parameters are transformed will be explained in a future change that
implements non-trivial transformations. For now, it suffices to state
that a given parameter of the SYCL kernel entry point function may be
transformed to multiple parameters of the offload kernel entry point as
needed to satisfy offload kernel argument passing requirements.
Parameters that are decomposed in this way are reconstituted as local
variables in the body of the generated offload kernel entry point
function.
For example, given the following SYCL kernel entry point function
definition:
```
template<typename KernelNameType, typename KernelType>
[[clang::sycl_kernel_entry_point(KernelNameType)]]
void sycl_kernel_entry_point(KernelType kernel) {
kernel();
}
```
and the following call:
```
struct Kernel {
int dm1;
int dm2;
void operator()() const;
};
Kernel k;
sycl_kernel_entry_point<class kernel_name>(k);
```
the corresponding offload kernel entry point function that is generated
might look as follows (assuming `Kernel` is a type that requires
decomposition):
```
void offload_kernel_entry_point_for_kernel_name(int dm1, int dm2) {
Kernel kernel{dm1, dm2};
kernel();
}
```
Other details of the generated offload kernel entry point function, such
as its name and calling convention, are implementation details that need
not be reflected in the AST and may differ across target devices. For
that reason, only the transformation described above is represented in
the AST; other details will be filled in during code generation.
These transformations are represented using new AST nodes introduced
with this change. `OutlinedFunctionDecl` holds a sequence of
`ImplicitParamDecl` nodes and a sequence of statement nodes that
correspond to the transformed parameters and function body.
`SYCLKernelCallStmt` wraps the original function body and associates it
with an `OutlinedFunctionDecl` instance. For the example above, the AST
generated for the `sycl_kernel_entry_point<kernel_name>` specialization
would look as follows:
```
FunctionDecl 'sycl_kernel_entry_point<kernel_name>(Kernel)'
TemplateArgument type 'kernel_name'
TemplateArgument type 'Kernel'
ParmVarDecl kernel 'Kernel'
SYCLKernelCallStmt
CompoundStmt
<original statements>
OutlinedFunctionDecl
ImplicitParamDecl 'dm1' 'int'
ImplicitParamDecl 'dm2' 'int'
CompoundStmt
VarDecl 'kernel' 'Kernel'
<initialization of 'kernel' with 'dm1' and 'dm2'>
<transformed statements with redirected references of 'kernel'>
```
Any ODR-use of the SYCL kernel entry point function will (with future
changes) suffice for the offload kernel entry point to be emitted. An
actual call to the SYCL kernel entry point function will result in a
call to the function. However, evaluation of a `SYCLKernelCallStmt`
statement is a no-op, so such calls will have no effect other than to
trigger emission of the offload kernel entry point.
Additionally, as a related change inspired by code review feedback,
these changes disallow use of the `sycl_kernel_entry_point` attribute
with functions defined with a _function-try-block_. The SYCL 2020
specification prohibits the use of C++ exceptions in device functions.
Even if exceptions were not prohibited, it is unclear what the semantics
would be for an exception that escapes the SYCL kernel entry point
function; the boundary between host and device code could be an implicit
noexcept boundary that results in program termination if violated, or
the exception could perhaps be propagated to host code via the SYCL
library. Pending support for C++ exceptions in device code and clear
semantics for handling them at the host-device boundary, this change
makes use of the `sycl_kernel_entry_point` attribute with a function
defined with a _function-try-block_ an error.
Commit: 517334bdb83deaae3be6fbc4fa5f1d721b01c0f0
https://github.com/llvm/llvm-project/commit/517334bdb83deaae3be6fbc4fa5f1d721b01c0f0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[TableGen] Add maps from Write/ReadType to the parent WriteRes/ReadAdvance. NFC (#123876)
Use this to improve performance of SubtargetEmitter::findWriteResources
and SubtargetEmitter::findReadAdvance. Now we can do a map lookup
instead of a linear search through all WriteRes/ReadAdvance records.
This reduces the build time of RISCVGenSubtargetInfo.inc on my
machine from 43 seconds to 10 seconds.
Commit: ac94fade6075fec89eb29c7dedf01ef59601e61d
https://github.com/llvm/llvm-project/commit/ac94fade6075fec89eb29c7dedf01ef59601e61d
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/unittests/Target/SPIRV/SPIRVAPITest.cpp
Log Message:
-----------
[SPIR-V] Rename internal command line flags for optimization level and mtriple used when passing options into the translate API call (#123975)
Rename internal command line flags for optimization level and mtriple
used when passing options into the translate API call.
Commit: 68c6b2e18809342e3747d50eb0dc84246393941b
https://github.com/llvm/llvm-project/commit/68c6b2e18809342e3747d50eb0dc84246393941b
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
Log Message:
-----------
[ASTMatchers][NFC] use `Matcher<QualType>` instead of `DynTypedMatcher` in `TypeLocTypeMatcher` (#123450)
There are no template in `TypeLocTypeMatcher`. So we do not need to use
`DynTypedMatcher` which can improve performance
Commit: a2c683b665e99831c5d6343a9afeeae2877b393a
https://github.com/llvm/llvm-project/commit/a2c683b665e99831c5d6343a9afeeae2877b393a
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/test/COFF/arm64x-export.test
Log Message:
-----------
[LLD][COFF] Use EC symbol table for exports defined in module definition files (#123849)
Commit: 4e9d5a3a307b362529583969e59070bc17909f23
https://github.com/llvm/llvm-project/commit/4e9d5a3a307b362529583969e59070bc17909f23
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Options.td
M lld/test/COFF/arm64x-export.test
Log Message:
-----------
[LLD][COFF] Add support for the -defArm64Native argument (#123850)
MSVC ignores the `/defArm64Native` argument on non-ARM64X targets.
It is also ignored if the `/def` option is not specified.
Commit: a77250fd782530f42a90f8562bcef0eb26abb010
https://github.com/llvm/llvm-project/commit/a77250fd782530f42a90f8562bcef0eb26abb010
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/CAPI/ir.c
M mlir/test/python/ir/location.py
Log Message:
-----------
[mlir] Add C and Python interface for file range (#123276)
Plumbs through creating file ranges to C and Python.
Commit: 223bd0ca81f871beb31d40b4f02753493c30b5b2
https://github.com/llvm/llvm-project/commit/223bd0ca81f871beb31d40b4f02753493c30b5b2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/copy_cvref.h
Log Message:
-----------
[libc++] Avoid unnecessary instantiations for __copy_cvref_t (#123718)
This changes the implementation of `__copy_cvref_t` to only template the
implementation class on the `_From` parameter, avoiding instantiations
for every combination of `_From` and `_To`.
Commit: 27ccc99c4f4300115aa0d619e8e4693f18b2af9d
https://github.com/llvm/llvm-project/commit/27ccc99c4f4300115aa0d619e8e4693f18b2af9d
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOpt] Minor worklist invariant cleanup [NFC] (#123989)
In retrospect, this probably should have been rolled into #123973. It
seemed more involved when I first decided to split. :)
Commit: e0ae8890460d6c6a90dd27fe6762128b2161000b
https://github.com/llvm/llvm-project/commit/e0ae8890460d6c6a90dd27fe6762128b2161000b
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/docs/SandboxIR.md
Log Message:
-----------
[SandboxIR][Doc] Add Quick start notes (#123992)
Commit: 630177ccdde44b0dd8faa13b34002d15c4b0af8d
https://github.com/llvm/llvm-project/commit/630177ccdde44b0dd8faa13b34002d15c4b0af8d
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] Fix madvise/posix_madvise for macOs. (#124020)
only bsd and linux intercept these syscalls.
Fix #123601
Commit: 939f2900d03c6ab0a89ba619ff25c8542bd11a5a
https://github.com/llvm/llvm-project/commit/939f2900d03c6ab0a89ba619ff25c8542bd11a5a
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] getsockopt/setsockopt interception. (#124004)
Commit: fd087135efe1b62b506c3caef3fef83242a8e504
https://github.com/llvm/llvm-project/commit/fd087135efe1b62b506c3caef3fef83242a8e504
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
Log Message:
-----------
[SandboxVec][Legality] Diamond reuse multi input (#123426)
This patch implements the diamond pattern where we are vectorizing
toward the top of the diamond from both edges, but the second edge may
use elements from a different vector or just scalar values. This
requires some additional packing code (see lit test).
Commit: 64360899c76cb2e687ef1fcea617ef455e8a2621
https://github.com/llvm/llvm-project/commit/64360899c76cb2e687ef1fcea617ef455e8a2621
Author: Yeoul Na <yeoul_na at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/docs/BoundsSafety.rst
A clang/docs/BoundsSafetyAdoptionGuide.rst
M clang/docs/index.rst
Log Message:
-----------
[BoundsSafety][Doc] Add BoundsSafetyAdoptionGuide.rst (#120674)
This adds an instruction to adopt `-fbounds-safety` using the preview
implementation available in the fork of llvm-project.
Commit: a939a9fd53d98f33b94f9121646d5906a2b9f598
https://github.com/llvm/llvm-project/commit/a939a9fd53d98f33b94f9121646d5906a2b9f598
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
A lldb/test/API/tools/lldb-dap/progress/Makefile
A lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
A lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
A lldb/test/API/tools/lldb-dap/progress/main.cpp
M lldb/tools/lldb-dap/ProgressEvent.cpp
M lldb/tools/lldb-dap/ProgressEvent.h
Log Message:
-----------
[LLDB-DAP] Send Progress update message over DAP (#123837)
When testing my SBProgress DAP PR (#123826), I noticed Progress update
messages aren't sent over DAP. This patch adds the lldb progress event's
message to the body when sent over DAP.
Before
Now
Tested with my [progress tester
command](https://gist.github.com/Jlalond/48d85e75a91f7a137e3142e6a13d0947),
testing 10 events 5 seconds apart 1-10
Commit: 6e498bc2cd765f4c421d32d610bdc0effec62b42
https://github.com/llvm/llvm-project/commit/6e498bc2cd765f4c421d32d610bdc0effec62b42
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
A flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/CUDA/pointer.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Handle simple device pointer allocation (#123996)
Commit: 98de5dfe6a8cbb70f21de545acec4710a77294ed
https://github.com/llvm/llvm-project/commit/98de5dfe6a8cbb70f21de545acec4710a77294ed
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/Attributes.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/IR/Attributes.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/OperationSupport.cpp
Log Message:
-----------
[mlir] Add NamedAttribute ctor taking StringRef. NFC. (#123974)
This is a small QoL improvement so that we don't have to go through
helpers when building `NamedAttribute`s.
Commit: 2dc1c95595e409c74a8a3d743afb7898e1af3255
https://github.com/llvm/llvm-project/commit/2dc1c95595e409c74a8a3d743afb7898e1af3255
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][VecUtils] Implement VecUtils::getLowest() (#124024)
VecUtils::getLowest(Valse) returns the lowest instruction in the BB among Vals.
If the instructions are not in the same BB, or if none of them is an
instruction it returns nullptr.
Commit: 96dbd0006c3c4c9de5f1fe4f3bbac3c74acac436
https://github.com/llvm/llvm-project/commit/96dbd0006c3c4c9de5f1fe4f3bbac3c74acac436
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
Log Message:
-----------
[RISCV] Re-generate test checks so we pick up implicit on whole register moves. NFC
Commit: 9fbf5cfebcd770fbe0e453f36ee7c74809339f18
https://github.com/llvm/llvm-project/commit/9fbf5cfebcd770fbe0e453f36ee7c74809339f18
Author: Ben Langmuir <blangmuir at apple.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/CodeGen/BackendUtil.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
A clang/test/Modules/gmodules-codegenopts.c
Log Message:
-----------
[clang][modules] Partially revert 48d0eb518 to fix -gmodules output (#124003)
With the changes in 48d0eb518, the CodeGenOptions used to emit .pcm
files with -fmodule-format=obj (-gmodules) were the ones from the
original invocation, rather than the ones specifically crafted for
outputting the pcm. This was causing the pcm to be written with only the
debug info and without the __clangast section in some cases (e.g. -O2).
This unforunately was not covered by existing tests, because compiling
and loading a module within a single compilation load the ast content
from the in-memory module cache rather than reading it from the pcm file
that was written. This broke bootstrapping a build of clang with modules
enabled on Darwin.
rdar://143418834
Commit: 8f45452c5309d0ae59dd383de6dae1aa4eabbb9c
https://github.com/llvm/llvm-project/commit/8f45452c5309d0ae59dd383de6dae1aa4eabbb9c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Restrict jobs based on owner instead of repo (#123797)
Not really any functional change, just a clean up that could make it
easier to share snippets with other repos.
Commit: 8110af75b1500be2313e523a2d2da6bb7806b700
https://github.com/llvm/llvm-project/commit/8110af75b1500be2313e523a2d2da6bb7806b700
Author: vporpo <vporpodas at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/pack.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Fix codegen when packing constants. (#124033)
Before this patch packing a bundle of constants would crash because
`getInsertPointAfterInstrs()` expected instructions. This patch fixes
this.
Commit: d5457e4c1619e5dbeefd49841e284cbc24d35cb4
https://github.com/llvm/llvm-project/commit/d5457e4c1619e5dbeefd49841e284cbc24d35cb4
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/test/Index/crash-recovery-modules.m
Log Message:
-----------
[NFC][Index] Disable LSAN on crash recovery tests (#124035)
Avoiding leaks in such cases is very hard.
There are similar suppression in other Index tests.
Commit: eaaac050588ec67afcdbb347df5597458a9b10d1
https://github.com/llvm/llvm-project/commit/eaaac050588ec67afcdbb347df5597458a9b10d1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaSYCL.cpp
Log Message:
-----------
[Sema] Fix a warning
This patch fixes:
clang/lib/Sema/SemaSYCL.cpp:428:25: error: unused variable 'SKI'
[-Werror,-Wunused-variable]
Commit: a9d2834508e276d0a3cc09ac549132b56796e87f
https://github.com/llvm/llvm-project/commit/a9d2834508e276d0a3cc09ac549132b56796e87f
Author: Hua Tian <akiratian at tencent.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
A llvm/test/CodeGen/Hexagon/swp-ws-live-intervals-issue123165.mir
Log Message:
-----------
[llvm][CodeGen] Fix the issue caused by live interval checking in window scheduler (#123184)
At some corner cases, the cloned MI still retains an old slot index,
which leads to the compiler crashing. This patch update the slot index
map before delete the recycled MI.
https://github.com/llvm/llvm-project/issues/123165
Commit: 847acbbc529133b2300721a809751891200f37f5
https://github.com/llvm/llvm-project/commit/847acbbc529133b2300721a809751891200f37f5
Author: epitavy <32581827+epitavy at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/examples/ExceptionDemo/CMakeLists.txt
M llvm/examples/ExceptionDemo/ExceptionDemo.cpp
Log Message:
-----------
[ExceptionDemo] Transition example from MCJIT to ORC and fix errors (#92504)
ExceptionDemo has been broken for some time. This patch fixes the
compilation errors and moves the example from MCJIT to ORC.
Commit: 23d2a1862a8b60cf5a04ffabdf5c1ea776120d04
https://github.com/llvm/llvm-project/commit/23d2a1862a8b60cf5a04ffabdf5c1ea776120d04
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove unnecessary check for null TargetInstrInfo (#123929)
This can never happen.
Commit: d3aea77f50a2215a9fa50c1bfa5f4b9717d8e928
https://github.com/llvm/llvm-project/commit/d3aea77f50a2215a9fa50c1bfa5f4b9717d8e928
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Move transformMaskAfterShuffle into BaseShuffleAnalysis and use it as much as possible. (#123896)
Commit: 1042ddc31b594511657ff70a82d71e2d037e2e35
https://github.com/llvm/llvm-project/commit/1042ddc31b594511657ff70a82d71e2d037e2e35
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[gn] port ec15b242505
Commit: 6f69adeed6728e49c16d47bdde658285f49c8ed7
https://github.com/llvm/llvm-project/commit/6f69adeed6728e49c16d47bdde658285f49c8ed7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove null TargetRegisterInfo check (#123933)
This cannot happen. Also simplify the LaneBitmask check from !none
to any.
Commit: 2646e2d487027e61c4e3cba5ceecfd95cedce0fe
https://github.com/llvm/llvm-project/commit/2646e2d487027e61c4e3cba5ceecfd95cedce0fe
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Stop allocating tiny helper classes (NFC) (#123936)
This was allocating tiny helper classes for every instruction
visited. We can just dispatch over the cases in the visitor
function instead.
Commit: ba70368f1380f8d22494fc8c100d2ab894a3cf94
https://github.com/llvm/llvm-project/commit/ba70368f1380f8d22494fc8c100d2ab894a3cf94
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
A clang/test/Driver/loongarch-relax-features.c
Log Message:
-----------
[Clang][Driver] Support linker relaxation options for LoongArch (#123587)
This commit completed four tasks:
- Add `-mrelax/-mno-relax` options support for LoongArch in clang
driver.
- Print error for `-gsplit-dwarf` with LoongArch linker relaxation
(`-mrelax`).
- Pass `-X` to linker to discard a plethora of `.L` symbols due to
linker relaxation.
- Forward `--no-relax` option to linker.
Commit: 15c2d4baf17292b4966d335846b30c50063f0265
https://github.com/llvm/llvm-project/commit/15c2d4baf17292b4966d335846b30c50063f0265
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove check for subreg index on a def operand (#123943)
This is looking at operand 0 of a REG_SEQUENCE, which can never
have a subregister index.
Commit: 9cefa3e6fccf30959433b96a8a275417b1429f4e
https://github.com/llvm/llvm-project/commit/9cefa3e6fccf30959433b96a8a275417b1429f4e
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan] Generalize handleIntrinsicByApplyingToShadow by adding bitcasting (#123474)
`handleIntrinsicByApplyingToShadow` (introduced in
https://github.com/llvm/llvm-project/pull/114490) requires that the
intrinsic supports integer-ish operands; this is not the case for all
intrinsics. This patch generalizes the function to bitcast the shadow
arguments to be the same type as the original intrinsic, thus
guaranteeing that the intrinsic exists. Additionally, it casts the
computed shadow to be an appropriate shadow type.
This function assumes that the intrinsic will handle arbitrary
bit-patterns (for example, if the intrinsic accepts floats for var1, we
assume that it works normally even if inputs are NaNs etc.).
Commit: ba3e6f0f0f2bebeb2b82e976ea1b5df007784862
https://github.com/llvm/llvm-project/commit/ba3e6f0f0f2bebeb2b82e976ea1b5df007784862
Author: Luke Lau <luke at igalia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOPT] Remove dead passthru check in getOperandLog2EEW. NFC (#123911)
We already bail if the user is tied in checkUsers, which is true for all
passthrus. Remove the check in getOperandLog2EEW so that it only worries
about computing the OperandInfo, and leaves the passthru correctness to
checkUsers.
Commit: 0fe8e70c6609ff86cd40fbb45a85a8ed04c153c2
https://github.com/llvm/llvm-project/commit/0fe8e70c6609ff86cd40fbb45a85a8ed04c153c2
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaSPIRV.cpp
R clang/test/CodeGenHLSL/builtins/reflect.hlsl
R clang/test/CodeGenSPIRV/Builtins/reflect.c
R clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
R clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
R llvm/test/CodeGen/SPIRV/opencl/reflect-error.ll
Log Message:
-----------
Revert "Reland "[HLSL] Implement the `reflect` HLSL function"" (#124046)
Reverts llvm/llvm-project#123853
The introduction of `reflect-error.ll` surfaced a bug with the use of
`report_fatal_error` in `SPIRVInstructionSelector` that was propagated
into the pr. This has caused a build-bot breakage, and the work to solve
the underlying issue is tracked here:
https://github.com/llvm/llvm-project/issues/124045. We can re-apply this
commit when the underlying issue is resolved.
Commit: 3ef90f843fee74ff811ef88246734475f50e2073
https://github.com/llvm/llvm-project/commit/3ef90f843fee74ff811ef88246734475f50e2073
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Target/Cpp/switch.mlir
Log Message:
-----------
[emitc] Fix the translation switchop with argument of expressionop (#123701)
Now a `emitc.switch` with argument of `emitc.expression` wouldn't emit
its argument to cpp. This patch fix it.
Commit: b46fcb9fa32f24660b1b8858d5c4cbdb76ef9d8b
https://github.com/llvm/llvm-project/commit/b46fcb9fa32f24660b1b8858d5c4cbdb76ef9d8b
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Implement CWG 2628 "Implicit deduction guides should propagate constraints" (#111143)
Closes https://github.com/llvm/llvm-project/issues/98592
Commit: 652ff20140d79544db4dfa21314fc62c3c9182e5
https://github.com/llvm/llvm-project/commit/652ff20140d79544db4dfa21314fc62c3c9182e5
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/module/cudadevice.f90
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Semantics/cuf-device-procedures01.cuf
Log Message:
-----------
[flang][cuda] Adding atomicadd as a cudadevice intrinsic and converting it LLVM dialect (#123840)
With these changes, CUF atomic operations are handled as cudadevice
intrinsics and are converted straight to the LLVM dialect with the
`llvm.atomicrw` operation.
I am only submitting changes for `atomicadd` to gather feedback. If we
are to proceed with these changes I will add support for all other
applicable atomic operations following this pattern.
Commit: 892a804d93d44ddfd7cd351852fe6aef32d4dcd0
https://github.com/llvm/llvm-project/commit/892a804d93d44ddfd7cd351852fe6aef32d4dcd0
Author: Akshay Deodhar <adeodhar at nvidia.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
Log Message:
-----------
[NVPTX] Stop using 16-bit CAS instructions from PTX (#120220)
Increases minimum CAS size from 16 bit to 32 bit, for better SASS
codegen.
When atomics are emulated using atom.cas.b16, the SASS generated
includes 2 (nested) emulation loops. When emulated using an atom.cas.b32
loop, the SASS too has a single emulation loop. Using 32 bit CAS thus
results in better codegen.
Commit: 1c5d971e425ff080dffd4d9a9a7734ead042d323
https://github.com/llvm/llvm-project/commit/1c5d971e425ff080dffd4d9a9a7734ead042d323
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[Signals] Exclude dladdr for AIX after #123879
Widely supported but missing on AIX
https://www.austingroupbugs.net/view.php?id=993
Commit: 75750722737e9128500b81363ba66c62fea1e4fe
https://github.com/llvm/llvm-project/commit/75750722737e9128500b81363ba66c62fea1e4fe
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets.s
Log Message:
-----------
[llvm-exegesis] Disable exhaustive tests on Windows
When looking at the slowest lit tests, I'm seeing these four tests take
two to eight minutes. Test coverage on Linux should be sufficient for
the functionality on top of it not really being useful on Windows at
all.
This was observed when hacking on the new premerge in a windows VM.
Commit: 19834b4623fd1e7ae5185ed76031b407c3fa7a47
https://github.com/llvm/llvm-project/commit/19834b4623fd1e7ae5185ed76031b407c3fa7a47
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mscq.c
M clang/test/Preprocessor/init-loongarch.c
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
A llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg-128.ll
Log Message:
-----------
[LoongArch] Support sc.q instruction for 128bit cmpxchg operation (#116771)
Two options for clang
-mno-scq: Disable sc.q instruction.
-mscq: Enable sc.q instruction.
The default is -mno-scq.
Commit: 0bcf34e422683b900ed504c5e4605038b257f1ee
https://github.com/llvm/llvm-project/commit/0bcf34e422683b900ed504c5e4605038b257f1ee
Author: MagentaTreehouse <99200384+MagentaTreehouse at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/include/clang/AST/UnresolvedSet.h
Log Message:
-----------
[Clang] [NFC] Mark `UnresolvedSetImpl`'s move operations as defaulted (#97930)
Commit: d80b814c010580b0fd02c1b1a9521a0b640a358a
https://github.com/llvm/llvm-project/commit/d80b814c010580b0fd02c1b1a9521a0b640a358a
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[LoongArch] Summary llvm20 release notes
Commit: 3c7a878d919c6483c9e78a3ed4578d4ee2f54408
https://github.com/llvm/llvm-project/commit/3c7a878d919c6483c9e78a3ed4578d4ee2f54408
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[LoongArch] Summary clang20 release notes
Commit: aa273fd83eccb55215f4cb18285f8462a1013f5c
https://github.com/llvm/llvm-project/commit/aa273fd83eccb55215f4cb18285f8462a1013f5c
Author: Weining Lu <luweining at loongson.cn>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M lld/docs/ReleaseNotes.rst
Log Message:
-----------
[LoongArch] Update lld20 release notes
Commit: 163935a48df69bde944fae2b4581541dab30c730
https://github.com/llvm/llvm-project/commit/163935a48df69bde944fae2b4581541dab30c730
Author: quic_hchandel <165007698+hchandel at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcilo-aliases-valid.s
A llvm/test/MC/RISCV/xqcilo-invalid.s
A llvm/test/MC/RISCV/xqcilo-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcilo (Large Offset Load Store) extension (#123881)
This extension adds eight 48 bit load store instructions.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
---------
Co-authored-by: Harsh Chandel <hchandel at qti.qualcomm.com>
Commit: de209fa11b5455155228bcdba012b6074388b917
https://github.com/llvm/llvm-project/commit/de209fa11b5455155228bcdba012b6074388b917
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineJumpTableInfo.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
A llvm/lib/CodeGen/StaticDataSplitter.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
A llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
[CodeGen] Introduce Static Data Splitter pass (#122183)
https://discourse.llvm.org/t/rfc-profile-guided-static-data-partitioning/83744
proposes to partition static data sections.
This patch introduces a codegen pass. This patch produces jump table
hotness in the in-memory states (machine jump table info and entries).
Target-lowering and asm-printer consume the states and produce `.hot`
section suffix. The follow up PR
https://github.com/llvm/llvm-project/pull/122215 implements such
changes.
---------
Co-authored-by: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Commit: d15f3e828d3d3335aa9b92b9013a590b71e56b92
https://github.com/llvm/llvm-project/commit/d15f3e828d3d3335aa9b92b9013a590b71e56b92
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/deep-loop-nest.ll
Log Message:
-----------
[LoopInterchange] Constrain LI within supported loop nest depth (#118656)
This patch is an extension to #115128.
After profiling LLVM test-suite, I see a lot of loop nest of depth more
than `MaxLoopNestDepth` which is 10. Early exit for them would save
compile-time as it would avoid computing DependenceInfo and CacheCost.
Please see 'bound-max-depth' branch on compile-time-tracker.
Commit: 646f034e4e228f9d5d6a0142210e5e28f2ea7872
https://github.com/llvm/llvm-project/commit/646f034e4e228f9d5d6a0142210e5e28f2ea7872
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port de209fa11b54
Commit: daa18205c6f0a3b5dd62ba2e65948e1a9182a60f
https://github.com/llvm/llvm-project/commit/daa18205c6f0a3b5dd62ba2e65948e1a9182a60f
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/OpenMP/copyin.f90
Log Message:
-----------
[Flang][OpenMP] Fix copyin allocatable lowering to MLIR (#122097)
Fixes https://github.com/llvm/llvm-project/issues/113191
Issue: [flang][OpenMP] Runtime segfault when an allocatable variable is
used with copyin
Rootcause: The value of the threadprivate variable is not being copied
from the primary thread to the other threads within a parallel region.
As a result it tries to access a null pointer inside a parallel region
which causes segfault.
Fix: When allocatables used with copyin clause need to ensure that, on
entry to any parallel region each thread’s copy of a variable will
acquire the allocation status of the primary thread, before copying the
value of a threadprivate variable of the primary thread to the
threadprivate variable of each other member of the team.
Commit: ea49d474fd355a9fdc3d549c4f927b970181f4c9
https://github.com/llvm/llvm-project/commit/ea49d474fd355a9fdc3d549c4f927b970181f4c9
Author: mingmingl <mingmingl at google.com>
Date: 2025-01-22 (Wed, 22 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/jump-table-partition.ll
Log Message:
-----------
Specify triple for llc test
Commit: 46a7cbafc3a6aee3a75ebd171d3c5ef5fed5a0d6
https://github.com/llvm/llvm-project/commit/46a7cbafc3a6aee3a75ebd171d3c5ef5fed5a0d6
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-23 (Thu, 23 Jan 2025)
Changed paths:
M .github/workflows/release-binaries.yml
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.h
M clang-tools-extra/clang-tidy/utils/LexerUtils.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
M clang-tools-extra/clangd/GlobalCompilationDatabase.h
M clang-tools-extra/clangd/ProjectModules.h
M clang-tools-extra/clangd/ScanningProjectModules.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-integer-sign-comparison.rst
M clang-tools-extra/test/clang-reorder-fields/Comments.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-integer-sign-comparison-qt.cpp
M clang/docs/BoundsSafety.rst
A clang/docs/BoundsSafetyAdoptionGuide.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/index.rst
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/Attr.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/RecursiveASTVisitor.h
A clang/include/clang/AST/StmtSYCL.h
M clang/include/clang/AST/StmtVisitor.h
M clang/include/clang/AST/UnresolvedSet.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Analysis/Analyses/ExprMutationAnalyzer.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/Cuda.h
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/CodeGen/BackendUtil.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/Lexer.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaSYCL.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTRecordReader.h
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Headers/avx10_2_512satcvtintrin.h
M clang/lib/Headers/avx10_2satcvtintrin.h
M clang/lib/Lex/Lexer.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
A clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-entry-point.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
M clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
A clang/test/CodeGen/atomic-test-and-set.c
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
M clang/test/Driver/linker-wrapper-image.c
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mscq.c
A clang/test/Driver/loongarch-relax-features.c
M clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/ps4-sdk-root.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/ps5-sdk-root.c
M clang/test/Index/crash-recovery-modules.m
A clang/test/Modules/gmodules-codegenopts.c
M clang/test/Modules/preferred_name.cppm
A clang/test/Modules/visibility-for-implicit-global-module.cppm
M clang/test/Preprocessor/arm-target-features.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/atomic-ops.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
A clang/test/SemaCXX/constant-expression-p2280r4.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
M clang/test/SemaOpenCL/invalid-block.cl
M clang/test/SemaSYCL/sycl-kernel-entry-point-attr-appertainment.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/tools/diagtool/DiagnosticNames.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
M clang/unittests/Lex/LexerTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M compiler-rt/lib/builtins/arm/adddf3vfp.S
M compiler-rt/lib/builtins/arm/aeabi_dcmp.S
M compiler-rt/lib/builtins/arm/divdf3vfp.S
M compiler-rt/lib/builtins/arm/eqdf2vfp.S
M compiler-rt/lib/builtins/arm/extendsfdf2vfp.S
M compiler-rt/lib/builtins/arm/fixdfsivfp.S
M compiler-rt/lib/builtins/arm/fixunsdfsivfp.S
M compiler-rt/lib/builtins/arm/floatsidfvfp.S
M compiler-rt/lib/builtins/arm/floatunssidfvfp.S
M compiler-rt/lib/builtins/arm/gedf2vfp.S
M compiler-rt/lib/builtins/arm/gtdf2vfp.S
M compiler-rt/lib/builtins/arm/ledf2vfp.S
M compiler-rt/lib/builtins/arm/ltdf2vfp.S
M compiler-rt/lib/builtins/arm/muldf3vfp.S
M compiler-rt/lib/builtins/arm/nedf2vfp.S
M compiler-rt/lib/builtins/arm/subdf3vfp.S
M compiler-rt/lib/builtins/arm/truncdfsf2vfp.S
M compiler-rt/lib/builtins/arm/unorddf2vfp.S
M compiler-rt/lib/builtins/assembly.h
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
A flang/include/flang/Runtime/CUDA/pointer.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/module/cudadevice.f90
M flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/CUDA/pointer.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/OpenMP/associate.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/critical.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/hlfir-wsloop.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/location.f90
M flang/test/Lower/OpenMP/order-clause.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-wsloop-reduction.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
M flang/test/Lower/OpenMP/same_var_first_lastprivate.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-chunks.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-monotonic.f90
M flang/test/Lower/OpenMP/wsloop-nonmonotonic.f90
M flang/test/Lower/OpenMP/wsloop-ordered.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-2-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multi.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/OpenMP/wsloop-schedule.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/OpenMP/wsloop.f90
M flang/test/Semantics/cuf-device-procedures01.cuf
M libc/CMakeLists.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
M libc/src/__support/macros/null_check.h
M libc/test/src/math/smoke/nan_test.cpp
M libc/test/src/math/smoke/nanf128_test.cpp
M libc/test/src/math/smoke/nanf16_test.cpp
M libc/test/src/math/smoke/nanf_test.cpp
M libc/test/src/math/smoke/nanl_test.cpp
M libclc/clc/include/clc/clcmacro.h
M libclc/generic/lib/math/acos.cl
M libclc/generic/lib/math/acosh.cl
M libclc/generic/lib/math/acospi.cl
M libclc/generic/lib/math/asinh.cl
M libclc/generic/lib/math/atan.cl
M libclc/generic/lib/math/atan2.cl
M libclc/generic/lib/math/atan2pi.cl
M libclc/generic/lib/math/atanh.cl
M libclc/generic/lib/math/atanpi.cl
M libclc/generic/lib/math/cbrt.cl
M libclc/generic/lib/math/cos.cl
M libclc/generic/lib/math/cosh.cl
M libclc/generic/lib/math/cospi.cl
M libclc/generic/lib/math/exp.cl
M libclc/generic/lib/math/expm1.cl
M libclc/generic/lib/math/lgamma.cl
M libclc/generic/lib/math/log1p.cl
M libclc/generic/lib/math/logb.cl
M libclc/generic/lib/math/sin.cl
M libclc/generic/lib/math/sinh.cl
M libclc/generic/lib/math/sinpi.cl
M libclc/generic/lib/math/tanh.cl
M libcxx/include/__type_traits/copy_cvref.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/Options.td
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/MachO/SyntheticSections.cpp
M lld/docs/ReleaseNotes.rst
M lld/test/COFF/arm64x-export.test
A lld/test/ELF/aarch64-tlsdesc-pauth.s
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Target/Process.cpp
A lldb/test/API/tools/lldb-dap/progress/Makefile
A lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
A lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
A lldb/test/API/tools/lldb-dap/progress/main.cpp
M lldb/tools/lldb-dap/ProgressEvent.cpp
M lldb/tools/lldb-dap/ProgressEvent.h
M llvm/cmake/config-ix.cmake
M llvm/docs/Docker.rst
M llvm/docs/LangRef.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SandboxIR.md
M llvm/examples/ExceptionDemo/CMakeLists.txt
M llvm/examples/ExceptionDemo/ExceptionDemo.cpp
M llvm/include/llvm/ADT/StringTable.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineJumpTableInfo.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/Config/config.h.cmake
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/SandboxIR/Type.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/include/llvm/Transforms/Instrumentation/LowerAllowCheckPass.h
M llvm/include/llvm/Transforms/Utils/SSAUpdater.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
A llvm/lib/CodeGen/StaticDataSplitter.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/SandboxIR/Type.cpp
M llvm/lib/Support/Unix/DynamicLibrary.inc
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Unix/Signals.inc
M llvm/lib/Support/Unix/Unix.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
A llvm/lib/Target/AMDGPU/SILowerWWMCopies.h
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARC/ARCInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.h
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.h
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.h
M llvm/lib/Target/BPF/BPFInstrInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.h
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.h
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.h
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.h
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.h
M llvm/lib/Target/Mips/MipsInstrInfo.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.h
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.h
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/Xtensa.td
R llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
M llvm/lib/Target/Xtensa/XtensaUtils.cpp
M llvm/lib/Target/Xtensa/XtensaUtils.h
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-with-multiple-predecessors.ll
M llvm/test/Analysis/ScalarEvolution/cycled_phis.ll
M llvm/test/Analysis/ScalarEvolution/unknown_phis.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/outlining-with-streaming-mode-changes.ll
M llvm/test/CodeGen/AArch64/sme-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/sme-darwin-sve-vg.ll
M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
M llvm/test/CodeGen/AArch64/sme-lazy-save-call.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sme-streaming-body-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-body.ll
M llvm/test/CodeGen/AArch64/sme-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-mode-changing-call-disable-stackslot-scavenging.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
A llvm/test/CodeGen/AArch64/stack-hazard-defaults.ll
M llvm/test/CodeGen/AArch64/streaming-compatible-memory-ops.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
R llvm/test/CodeGen/AMDGPU/power-sched-no-cycle.mir
A llvm/test/CodeGen/AMDGPU/si-lower-wwm-copies.mir
A llvm/test/CodeGen/Hexagon/swp-ws-live-intervals-issue123165.mir
A llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg-128.ll
A llvm/test/CodeGen/LoongArch/lasx/scalar-to-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
A llvm/test/CodeGen/LoongArch/lsx/scalar-to-vector.ll
M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vlopt-same-vl.ll
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
M llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
M llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512-intrinsics.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/fixup-bw-inst.ll
A llvm/test/CodeGen/X86/jump-table-partition.ll
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
A llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
A llvm/test/CodeGen/X86/stack-clash-huge.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
M llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll
M llvm/test/CodeGen/X86/vector-reduce-and-scalar.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
M llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
R llvm/test/MC/Disassembler/Xtensa/windowed.txt
R llvm/test/MC/Disassembler/Xtensa/windowed_code_density.txt
A llvm/test/MC/RISCV/xqcilo-aliases-valid.s
A llvm/test/MC/RISCV/xqcilo-invalid.s
A llvm/test/MC/RISCV/xqcilo-valid.s
M llvm/test/MC/X86/avx10.2satcvt-32-att.s
M llvm/test/MC/X86/avx10.2satcvt-32-intel.s
M llvm/test/MC/X86/avx10.2satcvt-64-att.s
M llvm/test/MC/X86/avx10.2satcvt-64-intel.s
R llvm/test/MC/Xtensa/windowed.s
R llvm/test/MC/Xtensa/windowed_code_density.s
R llvm/test/MC/Xtensa/windowed_invalid.s
M llvm/test/Other/crash-stack-trace.ll
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/Transforms/ADCE/2017-08-21-DomTree-deletions.ll
M llvm/test/Transforms/ADCE/preserve-memoryssa-if-only-remove-debug.ll
M llvm/test/Transforms/AddDiscriminators/inlined.ll
M llvm/test/Transforms/AddDiscriminators/invoke.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/combine_ignore_debug.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_unreachable_bb.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_vector_instrs.ll
M llvm/test/Transforms/AlignmentFromAssumptions/simple.ll
M llvm/test/Transforms/AlignmentFromAssumptions/simple32.ll
M llvm/test/Transforms/ArgumentPromotion/crash.ll
M llvm/test/Transforms/ArgumentPromotion/min-legal-vector-width.ll
M llvm/test/Transforms/ArgumentPromotion/pr32917.ll
M llvm/test/Transforms/InstCombine/known-phi-recurse.ll
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/deep-loop-nest.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/alternate-vectorization-split-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
A llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/test/Transforms/SimplifyCFG/switch-branch-fold-indirectbr-102351.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets-exhaustively.s
M llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets.s
A llvm/test/tools/llvm-mca/RISCV/SiFive7/jump.s
M llvm/unittests/ExecutionEngine/Orc/IndirectionUtilsTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/ConstantsTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
M llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
M llvm/unittests/Target/SPIRV/SPIRVAPITest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/docker/build_docker_image.sh
R llvm/utils/docker/debian10/Dockerfile
A llvm/utils/docker/debian12/Dockerfile
M llvm/utils/docker/example/Dockerfile
M llvm/utils/docker/nvidia-cuda/Dockerfile
M llvm/utils/docker/scripts/checkout.sh
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
M mlir/cmake/modules/AddMLIR.cmake
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td
A mlir/include/mlir/Dialect/SPIRV/IR/SPIRVPrimitiveOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/IR/Attributes.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/ExecutionEngine/CMakeLists.txt
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeConv2D.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/SparseTensor/CMakeLists.txt
M mlir/lib/IR/Attributes.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/OperationSupport.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/python/mlir/dialects/_ods_common.py
M mlir/test/CAPI/ir.c
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SPIRV/IR/availability.mlir
A mlir/test/Dialect/SPIRV/IR/primitive-ops.mlir
R mlir/test/Dialect/Tosa/broadcast.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant_folding.mlir
M mlir/test/Dialect/Tosa/inlining.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-conv2d.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Target/Cpp/switch.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
R mlir/test/Target/LLVMIR/openmp-wsloop-private-late-alloca-workaround.mlir
A mlir/test/Target/SPIRV/primitive-ops.mlir
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
M mlir/test/lib/Conversion/FuncToLLVM/CMakeLists.txt
M mlir/test/lib/Conversion/MathToVCIX/CMakeLists.txt
M mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
M mlir/test/lib/Conversion/VectorToSPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Affine/CMakeLists.txt
M mlir/test/lib/Dialect/Arith/CMakeLists.txt
M mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
M mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
M mlir/test/lib/Dialect/ControlFlow/CMakeLists.txt
M mlir/test/lib/Dialect/DLTI/CMakeLists.txt
M mlir/test/lib/Dialect/Func/CMakeLists.txt
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/LLVM/CMakeLists.txt
M mlir/test/lib/Dialect/Linalg/CMakeLists.txt
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/MemRef/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/NVGPU/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
M mlir/test/lib/Dialect/SPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Shape/CMakeLists.txt
M mlir/test/lib/Dialect/Tensor/CMakeLists.txt
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lib/IR/CMakeLists.txt
M mlir/test/lib/Interfaces/LoopLikeInterface/CMakeLists.txt
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/test/lib/Reducer/CMakeLists.txt
M mlir/test/lib/Rewrite/CMakeLists.txt
M mlir/test/lib/Tools/PDLL/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/test/mlir-tblgen/op-python-bindings.td
M mlir/test/python/ir/location.py
M mlir/test/python/lib/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
M mlir/unittests/ExecutionEngine/CMakeLists.txt
M polly/include/polly/CodeGen/IRBuilder.h
M polly/lib/CodeGen/IRBuilder.cpp
M polly/lib/CodeGen/LoopGenerators.cpp
A polly/test/CodeGen/Metadata/basic_vec_annotate.ll
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/config.h
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
Merge branch 'main' into users/HighCommander4/clangd-issue-1249
Compare: https://github.com/llvm/llvm-project/compare/bc4b90d8b659...46a7cbafc3a6
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list