[all-commits] [llvm/llvm-project] e8811a: [AMDGPU] Fix unreachable reg bit width (#122107)

[Shoreshen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e8811ad3cc2a840dcacde2f7ddea599d82f3b4e3
      https://github.com/llvm/llvm-project/commit/e8811ad3cc2a840dcacde2f7ddea599d82f3b4e3
  Author: Shoreshen <372660931 at qq.com>
  Date:   2025-01-22 (Wed, 22 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    A llvm/test/CodeGen/AMDGPU/sreg-xnull-regclass-bitwidth.mir

  Log Message:
  -----------
  [AMDGPU] Fix unreachable reg bit width (#122107)

Add register class bit width for SReg_256_XNULL and SReg_128_XNULL



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