[all-commits] [llvm/llvm-project] e376f9: [RISCV] Mark RVV stores and segmented loads as mas...

[Min-Yih Hsu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e376f9cb77717146290504da58740c97d9dc7eae
      https://github.com/llvm/llvm-project/commit/e376f9cb77717146290504da58740c97d9dc7eae
  Author: Min-Yih Hsu <min.hsu at sifive.com>
  Date:   2025-01-21 (Tue, 21 Jan 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vse.ll
    M llvm/test/CodeGen/RISCV/rvv/vsse.ll
    M llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll

  Log Message:
  -----------
  [RISCV] Mark RVV stores and segmented loads as masked pseudo (#123106)

So that we can turn masked operations with all-ones masks into their
unmasked counterpart. Note: loads other than segmented ones had been
marked as masked.



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