[all-commits] [llvm/llvm-project] 0dcb16: [Xtensa] Implement Windowed Register Option. (#121...

[Andrei Safronov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0dcb16ef5ea9202f09d727c50dfee070db303b88
      https://github.com/llvm/llvm-project/commit/0dcb16ef5ea9202f09d727c50dfee070db303b88
  Author: Andrei Safronov <andrei.safronov at espressif.com>
  Date:   2025-01-21 (Tue, 21 Jan 2025)

  Changed paths:
    M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
    M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
    M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
    M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
    M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
    M llvm/lib/Target/Xtensa/Xtensa.td
    A llvm/lib/Target/Xtensa/XtensaFeatures.td
    M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
    M llvm/lib/Target/Xtensa/XtensaOperands.td
    M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
    M llvm/lib/Target/Xtensa/XtensaSubtarget.h
    M llvm/lib/Target/Xtensa/XtensaUtils.cpp
    M llvm/lib/Target/Xtensa/XtensaUtils.h
    A llvm/test/MC/Disassembler/Xtensa/windowed.txt
    A llvm/test/MC/Disassembler/Xtensa/windowed_code_density.txt
    A llvm/test/MC/Xtensa/windowed.s
    A llvm/test/MC/Xtensa/windowed_code_density.s
    A llvm/test/MC/Xtensa/windowed_invalid.s

  Log Message:
  -----------
  [Xtensa] Implement Windowed Register Option. (#121118)



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