[all-commits] [llvm/llvm-project] 5deb4e: [SLP]Initial non-power-of-2 (but still whole regis...

[Alexey Bataev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5deb4ef9ab1144542d748f71235b029bed06dd26
      https://github.com/llvm/llvm-project/commit/5deb4ef9ab1144542d748f71235b029bed06dd26
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2025-01-21 (Tue, 21 Jan 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
    M llvm/test/Transforms/SLPVectorizer/X86/gather-loads-non-power-of-2.ll
    M llvm/test/Transforms/SLPVectorizer/X86/long-full-reg-stores.ll
    M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-extracted-and-externally-used.ll
    M llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll

  Log Message:
  -----------
  [SLP]Initial non-power-of-2 (but still whole register) for remaining nodes

Added non-power-of-2 (but still whole registers) vectorization support
for nodes other than stores and reductions.

Reviewers: preames, RKSimon, hiraditya

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/113356



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