[all-commits] [llvm/llvm-project] ba44d7: [MLIR][test] Fixup for checking for ml_dtypes (#12...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Tue Jan 21 07:03:55 PST 2025
Branch: refs/heads/users/alexey-bataev/spr/slpreduce-number-of-alternate-instruction-where-possible
Home: https://github.com/llvm/llvm-project
Commit: ba44d7ba1fb3e27f51d65ea1af280e00382e09e0
https://github.com/llvm/llvm-project/commit/ba44d7ba1fb3e27f51d65ea1af280e00382e09e0
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M mlir/test/python/execution_engine.py
Log Message:
-----------
[MLIR][test] Fixup for checking for ml_dtypes (#123240)
In order to optionally run some checks that depend on the `ml_dtypes`
python module we have to remove the `CHECK` lines for those tests or
they will be required and missed in the test output.
I've changed to use asserts as recommended in [1].
[1]:
https://github.com/llvm/llvm-project/pull/123061#issuecomment-2596116023
Commit: 7c729418d721147bf1f2b257afd30f84721888ad
https://github.com/llvm/llvm-project/commit/7c729418d721147bf1f2b257afd30f84721888ad
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll
M llvm/test/DebugInfo/X86/dwarf-public-names.ll
M llvm/test/tools/llvm-dwarfdump/X86/statistics.ll
Log Message:
-----------
[llvm][DebugInfo] Attach object-pointer to DISubprogram declarations (#122742)
Currently Clang only attaches `DW_AT_object_pointer` to
`DW_TAG_subprogram` definitions. LLDB constructs C++ method types from
their `DW_TAG_subprogram` declaration, which is also the point at which
it needs to determine whether a method is static or not. LLDB's
heuristic for this could be very simple if we emitted
`DW_AT_object_pointer` on declarations. But since we don't, LLDB has to
guess whether an argument is an implicit object parameter based on the
DW_AT_name and DW_AT_type.
To simplify LLDB's job (and to eventually support C++23's explicit
object parameters), this patch adds the `DIFlagObjectPointer` to
`DISubprogram` declarations.
For reference, GCC attaches the object-pointer DIE to both the
definition and declaration: https://godbolt.org/z/3TWjTfWon
Fixes https://github.com/llvm/llvm-project/issues/120973
Commit: c9f72b2873d2b3ea777c3ee512696f2259252bce
https://github.com/llvm/llvm-project/commit/c9f72b2873d2b3ea777c3ee512696f2259252bce
Author: Keyi Zhang <Kuree at users.noreply.github.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/test/Dialect/LLVMIR/func.mlir
Log Message:
-----------
[MLIR][LLVM] Fix #llvm.constant_range parsing (#123009)
When `APInt` parses negative numbers, it may extend the bit width. This
patch ensures the bit width matches with the attribute.
Fixes https://github.com/llvm/llvm-project/issues/122996.
Commit: 71ad9a958ac192599a46d86724a8084c8c4aff1c
https://github.com/llvm/llvm-project/commit/71ad9a958ac192599a46d86724a8084c8c4aff1c
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[fuchsia][cmake] Add runtimes for cortex-m4 for the Fuchsia toolchain (#123258)
Commit: 89305c371552adba2bd10394d2c645c9792840b2
https://github.com/llvm/llvm-project/commit/89305c371552adba2bd10394d2c645c9792840b2
Author: Sean Perry <perry at ca.ibm.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/include/clang/AST/TypeLoc.h
Log Message:
-----------
[z/OS] add tail padding to TypeLoc if needed (#122761)
The code in getLocalDataSize() returns the sum of the size of the
LocalData plus the size of the extra data. The start of the extra data
is padded so it starts on a multiple of it's alignment. We also need to
be adding tail padding so the final size is a multiple of the alignment
of the LocalData. On most systems the alignment of the extra data is the
same or greater than the alignment of the LocalData so you don't need
the tail padding. However, on z/OS, the alignment of the extra data is
less than the alignment of the LocalData and thus you do need the tail
padding to make the final size a multiple of the LocalData alignment.
The extra data is the WrittenBuiltinSpecs struct. This struct is just a
struct of bitfields. On most systems the alignment of the struct is
determined by the type of the bitfields (eg. unsigned int -> align of
4). On z/OS, all bitfields are 1 byte aligned. Thus on z/OS
WrittenBuiltinSpecs is only size 2 with alignment of 1 (verses 4 & 4).
Commit: 9f627cf540e9f0da1be17581af8d162a78820e6f
https://github.com/llvm/llvm-project/commit/9f627cf540e9f0da1be17581af8d162a78820e6f
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/sys/time.yaml
Log Message:
-----------
[libc][docs] Add sys/time page to the status of implementations docs (#123000)
These changes ensure that the sys/time header is documented properly
with respect to the issue ( #122006 ) .
Commit: 3f07af93dc013621176f5931ebc8dd07d299b277
https://github.com/llvm/llvm-project/commit/3f07af93dc013621176f5931ebc8dd07d299b277
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/EvaluationResult.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#123283)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect Source to be nonnull.
Commit: f5736aee112177b8b4620ab55bb65152a652dd34
https://github.com/llvm/llvm-project/commit/f5736aee112177b8b4620ab55bb65152a652dd34
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateInstantiate.cpp
Log Message:
-----------
[Sema] Migrate away from PointerUnion::dyn_cast (NFC) (#123284)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect Stored to be nonnull.
Commit: d5ef2c054d26d0ad2ea8022060d5140f4b663801
https://github.com/llvm/llvm-project/commit/d5ef2c054d26d0ad2ea8022060d5140f4b663801
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/lib/AST/VTableBuilder.cpp
Log Message:
-----------
[AST] Avoid repeated hash lookups (NFC) (#123285)
Commit: d5aa6dfe8caeaadb7a8b4c89614e6b980a49ff7d
https://github.com/llvm/llvm-project/commit/d5aa6dfe8caeaadb7a8b4c89614e6b980a49ff7d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#123286)
Commit: c5312553cb7a49b53ba2bac40fbc3c1745855844
https://github.com/llvm/llvm-project/commit/c5312553cb7a49b53ba2bac40fbc3c1745855844
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#123287)
Commit: f719771f251d7c30eca448133fe85730f19a6bd1
https://github.com/llvm/llvm-project/commit/f719771f251d7c30eca448133fe85730f19a6bd1
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/const-shift-of-constmasked.ll
M llvm/test/CodeGen/AArch64/extract-bits.ll
M llvm/test/CodeGen/AArch64/fpenv.ll
M llvm/test/CodeGen/AArch64/xbfiz.ll
Log Message:
-----------
Revert "[AArch64] Combine and and lsl into ubfiz" (#123356)
Reverts llvm/llvm-project#118974
Commit: d54d8d7e5a47d576d46dbc9fe60a0c927d05a648
https://github.com/llvm/llvm-project/commit/d54d8d7e5a47d576d46dbc9fe60a0c927d05a648
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/termios.yaml
Log Message:
-----------
[libc][docs] Add termios page to the status of implementations docs (#123004)
These changes ensure that the termios header is documented properly with
respect to the issue ( https://github.com/llvm/llvm-project/issues/122006 ) .
Commit: c83e5e85a382083d13933805b994c45d412c568f
https://github.com/llvm/llvm-project/commit/c83e5e85a382083d13933805b994c45d412c568f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M libcxx/include/__config
M libcxx/test/tools/clang_tidy_checks/libcpp_module.cpp
Log Message:
-----------
[libc++] Enable _LIBCPP_NODEBUG again (#123318)
`_LIBCPP_NODEBUG` has been disabled temporarily, since there were a few
problems when adding a bunch of annotations throughout the code base.
They have been resolved now, so we can enable all the annotations again.
Reverts llvm/llvm-project#122393
Commit: 4b692a95d103f3ad30d6be1ce6d5dda0bd90bc1f
https://github.com/llvm/llvm-project/commit/4b692a95d103f3ad30d6be1ce6d5dda0bd90bc1f
Author: Steven Perron <stevenperron at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageNonUniformIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageNonUniformIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageNonUniformIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferNonUniformIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
Log Message:
-----------
[SPIRV] Expand RWBuffer load and store from HLSL (#122355)
The code pattern that clang will generate for HLSL has changed from the
original plan. This allows the SPIR-V backend to generate code for the
current code generation.
It looks for patterns of the form:
```
%1 = @llvm.spv.resource.handlefrombinding
%2 = @llvm.spv.resource.getpointer(%1, index)
load/store %2
```
These three llvm-ir instruction are treated as a single unit that will
1. Generate or find the global variable identified by the call to
`resource.handlefrombinding`.
2. Generate an OpLoad of the variable to get the handle to the image.
3. Generate an OpImageRead or OpImageWrite using that handle with the
given index.
This will generate the OpLoad in the same BB as the read/write.
Note: Now that `resource.handlefrombinding` is not processed on its own,
many existing tests had to be removed. We do not have intrinsics that
are able to use handles to sampled images, input attachments, etc., so
we cannot generate the load of the handle. These tests are removed for
now, and will be added when those resource types are fully implemented.
Commit: ee1c85225235c4353555a17b73ba16a2f177265b
https://github.com/llvm/llvm-project/commit/ee1c85225235c4353555a17b73ba16a2f177265b
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
A llvm/test/CodeGen/AArch64/instr-ref-ldv.ll
Log Message:
-----------
[DebugInfo][InstrRef] Treat ORRWrr as a copy instr (#123102)
The insturction selector uses the `MachineFunction::copySalvageSSA`
function to insert `DBG_PHIs` or identify a defining instruction for a
copy-like instruction when finalizing Instruction References.
AArch64 has the ORR instruction which is a logical OR with the variants
ORRWrr which refers to a register to register variant, and ORRWrs which
is a register to a shifted register variant.
An ORRWrs where the shift amount is 0, and the zero register ($wzr) is
used is considered a copy, for example:
`$w0 = ORRWrs $wzr, killed $w3, 0`
However an ORRWrr with a zero register is not considered a copy
`$w0 = ORRWrr $wzr, killed $w3`
This causes an issue in the livedebugvalues pass because in aarch64-isel
the instruction is the ORRWrr variant, but is then changed to the ORRWrs
variant before the livedebugvalues pass.
This causes a mismatch between the two passes which leads to a crash in
the livedebugvalues pass.
This patch fixes the issue.
Commit: 3065cf238ca3fddd74cba0bd660afe5fd4e7da03
https://github.com/llvm/llvm-project/commit/3065cf238ca3fddd74cba0bd660afe5fd4e7da03
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Remove //clang:basic_internal_headers target (NFC) (#123230)
This target exists to allow `#include "Header.h"` for headers in
lib/Basic rather than using file-relative inclusion. This is rather
hacky and results in having two targets that claim the same headers.
Instead, we can pass a `-I` flag in the `copts` for //clang:basic, to
adjust the include path to keep those `#include "Header.h"` directives
working. There are other targets in this file already doing a similar
thing for generated files.
Commit: ebfdd38228d4e21597642301fb75f5b02ff3ee06
https://github.com/llvm/llvm-project/commit/ebfdd38228d4e21597642301fb75f5b02ff3ee06
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
M llvm/test/Transforms/SLPVectorizer/X86/hadd.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
M llvm/test/Transforms/SLPVectorizer/X86/value-bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
R llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const-undef.ll
A llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
Log Message:
-----------
[SLP][NFC]Replace undef with constant zero in tests, NFC
Commit: c7ea4c18afa84875ac22b2c98930c793eefd24b2
https://github.com/llvm/llvm-project/commit/c7ea4c18afa84875ac22b2c98930c793eefd24b2
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/cxx98.cpp
Log Message:
-----------
[clang][bytecode] Revisit global variables separately (#123358)
Call `EvaluateAsInitializer()` explicitly here, so we don't abort the
evaluation of the `DeflRefExpr` just because the initializer of that
global variable failed.
Commit: 8815c505be90edf0168e931d77f2b68e393031d3
https://github.com/llvm/llvm-project/commit/8815c505be90edf0168e931d77f2b68e393031d3
Author: JoelWee <32009741+JoelWee at users.noreply.github.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/Diagnostics.h
M mlir/lib/IR/Diagnostics.cpp
Log Message:
-----------
[MLIR] Allow setting call stack limit for SourceMgrDiagnosticHandler (#123373)
Otherwise for deeply nested code, the callstack will always be truncated
Commit: fbea21aa52f96fc12e19fa4b1063209bc4d19f99
https://github.com/llvm/llvm-project/commit/fbea21aa52f96fc12e19fa4b1063209bc4d19f99
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/licm-wwm.mir
Log Message:
-----------
[AMDGPU] Add test for VALU hoisiting from WWM region. NFC. (#123234)
The test demonstraits a suboptimal VALU hoisting from a WWM
region. As a result we have 2 WWM regions instead of one.
Commit: f12e0c9c3a45065543bea89c5545e26690ac3e59
https://github.com/llvm/llvm-project/commit/f12e0c9c3a45065543bea89c5545e26690ac3e59
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
A libc/utils/docgen/sys/stat.yaml
Log Message:
-----------
[libc][docs] Add sys/stat page to the status of implementations docs (#122997)
These changes ensure that the sys/stat header is documented properly
with respect to the issue ( #122006 ) .
Commit: 1c3c65590d1635ab1b50c89dc8379c42a5d535bd
https://github.com/llvm/llvm-project/commit/1c3c65590d1635ab1b50c89dc8379c42a5d535bd
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M lld/MachO/Options.td
Log Message:
-----------
[lld-macho] Document '-icf' flag options (#123372)
Adding the `safe_thunks` option in `Options.td` as it was missing there
- mentioned by @Colibrow in
https://github.com/llvm/llvm-project/pull/106573
Also documenting what the various options mean.
Help now looks like this:
```
..........
--error-limit=<value> Maximum number of errors to print before exiting (default: 20)
--help-hidden Display help for hidden options
--icf=[none,safe,safe_thunks,all]
Set level for identical code folding (default: none). Possible values:
none - Disable ICF
safe - Only folds non-address significant functions (as described by `__addrsig` section)
safe_thunks - Like safe, but replaces address-significant functions with thunks
all - Fold all identical functions
--ignore-auto-link-option=<value>
Ignore a single auto-linked library or framework. Useful to ignore invalid options that ld64 ignores
--irpgo-profile-sort=<profile>
Deprecated. Please use --irpgo-profile and --bp-startup-sort=function
..........
```
Commit: 2dc5682dacab2dbb52a771746fdede0e938fc6e9
https://github.com/llvm/llvm-project/commit/2dc5682dacab2dbb52a771746fdede0e938fc6e9
Author: David Blaikie <dblaikie at gmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/IR/Verifier.cpp
A llvm/test/Verifier/dicompositetype-elements-null.ll
Log Message:
-----------
Verifier: Add check for DICompositeType elements being null
Came up recently with some nodebug case on codeview, that caused a null
entry in elements and crashed LLVM.
Original clang fix to avoid generating IR like this: 504dd577675e8c85cdc8525990a7c8b517a38a89
Commit: bbd871e2baad2e74dbde202823b3439d2a96d3f8
https://github.com/llvm/llvm-project/commit/bbd871e2baad2e74dbde202823b3439d2a96d3f8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M libcxx/include/atomic
M libcxx/include/stdatomic.h
M libcxx/test/libcxx/atomics/atomics.syn/compatible_with_stdatomic.compile.pass.cpp
A libcxx/test/libcxx/atomics/atomics.syn/incompatible_with_stdatomic.verify.cpp
A libcxx/test/libcxx/atomics/stdatomic.h.syn/dont_hijack_header.compile.pass.cpp
A libcxx/test/libcxx/atomics/stdatomic.h.syn/dont_hijack_header.cxx23.compile.pass.cpp
Log Message:
-----------
[libc++] Don't implement <stdatomic.h> before C++23 (#123130)
https://github.com/llvm/llvm-project/pull/95498 implemented a libc++
extension where <stdatomic.h> would forward to <atomic> even before
C++23. Unfortunately, this was found to be a breaking change (with
fairly widespread impact) since that changes whether _Atomic(T) is a C
style atomic or std::atomic<T>. In principle, this can even be an ABI
break.
We generally don't implement extensions in libc++ because they cause so
many problems, and that extension had been accepted because it was
deemed pretty small and only a quality of life improvement. Since it has
widespread impact on valid C++20 (and before) code, this patch removes
the extension before we ship it in any public release.
Commit: 58a70dffcc096b54537aa99a045346ee28ad2592
https://github.com/llvm/llvm-project/commit/58a70dffcc096b54537aa99a045346ee28ad2592
Author: Thurston Dang <thurston at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan] Add debugging for handleUnknownIntrinsic (#123381)
This adds an experimental flag, msan-dump-strict-intrinsics (modeled
after msan-dump-strict-instructions), which prints out any intrinsics
that are heuristically handled. Additionally, MSan will print out
heuristically handled intrinsics when -debug is passed as a flag in
debug builds.
MSan's intrinsic handling can be broken down into:
1) special cases (usually highly accurate)
2) heuristic handling (sometimes erroneous)
3) not handled
This patch's -msan-dump-strict-intrinsics is intended to help debug Case
2. Case 3) (which includes all the heuristics that are not handled by
special cases nor heuristics) can be debugged using the existing
-msan-dump-strict-instructions.
Commit: 6716ce8b641f0e42e2343e1694ee578b027be0c4
https://github.com/llvm/llvm-project/commit/6716ce8b641f0e42e2343e1694ee578b027be0c4
Author: David Blaikie <dblaikie at gmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/IR/Verifier.cpp
R llvm/test/Verifier/dicompositetype-elements-null.ll
Log Message:
-----------
Revert "Verifier: Add check for DICompositeType elements being null"
Asserts on various tests/buildbots, at least one example is
DebugInfo/X86/set.ll
This reverts commit 2dc5682dacab2dbb52a771746fdede0e938fc6e9.
Commit: eddeb36cf1ced0e14e17ac90f60922366e382100
https://github.com/llvm/llvm-project/commit/eddeb36cf1ced0e14e17ac90f60922366e382100
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Sema/SemaSPIRV.cpp
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
A clang/test/CodeGenSPIRV/Builtins/length.c
A clang/test/SemaSPIRV/BuiltIns/length-errors.c
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRV.td
A llvm/lib/Target/SPIRV/SPIRVCombine.td
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
A llvm/lib/Target/SPIRV/SPIRVPreLegalizerCombiner.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
A llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-length-to-distance.mir
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/distance.ll
M llvm/test/CodeGen/SPIRV/opencl/distance.ll
Log Message:
-----------
[SPIRV] add pre legalization instruction combine (#122839)
- Add the boilerplate to support instcombine in SPIRV
- instcombine length(X-Y) to distance(X,Y)
- switch HLSL's distance intrinsic to not special case for SPIRV.
- fixes #122766
- This RFC we were requested to add in the infra for pattern matching:
https://discourse.llvm.org/t/rfc-add-targetbuiltins-for-spirv-to-support-hlsl/83329/13
Commit: fec503d1a3f48e600d0a8e108757dedba909f40c
https://github.com/llvm/llvm-project/commit/fec503d1a3f48e600d0a8e108757dedba909f40c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Add safe createExtractVector and use instead Builder.CreateExtractVector
Commit: 10fdd09c3bda8bfc532cecf4f11babaf356554f3
https://github.com/llvm/llvm-project/commit/10fdd09c3bda8bfc532cecf4f11babaf356554f3
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/test/CodeGenCXX/debug-info-object-pointer.cpp
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
Log Message:
-----------
[clang][DebugInfo] Emit DW_AT_object_pointer on function declarations with explicit `this` (#122928)
In https://github.com/llvm/llvm-project/pull/122897 we started attaching
`DW_AT_object_pointer` to function definitions. This patch does the same
but for function declarations (which we do for implicit object pointers
already).
Fixes https://github.com/llvm/llvm-project/issues/120974
Commit: 128e2e446e90c3b1827cfc7d4d19e3c0976beff3
https://github.com/llvm/llvm-project/commit/128e2e446e90c3b1827cfc7d4d19e3c0976beff3
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
Log Message:
-----------
[SandboxVec][VecUtils][NFC] Move functions to VecUtils.cpp and add a VecUtils::dump()
Commit: 6b048aeaf837e0e16fece94610f0871d17cefe4c
https://github.com/llvm/llvm-project/commit/6b048aeaf837e0e16fece94610f0871d17cefe4c
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M lldb/bindings/headers.swig
A lldb/bindings/interface/SBProgressDocstrings.i
M lldb/bindings/interfaces.swig
M lldb/include/lldb/API/SBDebugger.h
A lldb/include/lldb/API/SBProgress.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/API/CMakeLists.txt
A lldb/source/API/SBProgress.cpp
M lldb/source/Core/Debugger.cpp
A lldb/test/API/python_api/sbprogress/TestSBProgress.py
Log Message:
-----------
[LLDB] Add SBProgress so Python scripts can also report progress (#119052)
Recently I've been working on a lot of internal Python tooling, and in
certain cases I want to report async to the script over DAP. Progress.h
already handles this, so I've exposed Progress via the SB API so Python
scripts can also update progress objects.
I actually have no idea how to test this, so I just wrote a [toy command
to test
it](https://gist.github.com/Jlalond/48d85e75a91f7a137e3142e6a13d0947)
I also copied the first section of the extensive Progress.h class
documentation to the docstrings.
Commit: a807b2feb8bd2bcb4c611599d52d287c443c7e0b
https://github.com/llvm/llvm-project/commit/a807b2feb8bd2bcb4c611599d52d287c443c7e0b
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 128e2e446e90
Commit: 580ba2eed29a18c75727e1cad910b8cfb4cfca59
https://github.com/llvm/llvm-project/commit/580ba2eed29a18c75727e1cad910b8cfb4cfca59
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/API/BUILD.gn
Log Message:
-----------
[gn build] Port 6b048aeaf837
Commit: 71ff486bee1b089c78f5b8175fef16f99fcebe19
https://github.com/llvm/llvm-project/commit/71ff486bee1b089c78f5b8175fef16f99fcebe19
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
A flang/test/HLFIR/simplify-hlfir-intrinsics-dotproduct.fir
Log Message:
-----------
Reland "[flang] Inline hlfir.dot_product. (#123143)" (#123385)
This reverts commit afc43a7b626ae07f56e6534320e0b46d26070750.
+Fixed declaration of hlfir::genExtentsVector().
Some good results for induct2, where dot_product is applied
to a vector of unknow size and a known 3-element vector:
the inlining ends up generating a 3-iteration loop, which
is then fully unrolled. With late FIR simplification
it is not happening even when the simplified intrinsics
implementation is inlined by LLVM (because the loop bounds
are not known).
This change just follows the current approach to expose
the loops for later worksharing application.
Commit: ce6e66ddecbd1ddfa3be9be2ac881931d5ae71a4
https://github.com/llvm/llvm-project/commit/ce6e66ddecbd1ddfa3be9be2ac881931d5ae71a4
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
Log Message:
-----------
[RISCV] Add coverage for an upcoming select lowering change
A select between an add and a sub can be either a vrsub followed by
add (reducing register pressure), or a vmacc. The former will be
implemented in an upcoming review.
Commit: 5a735a28c8bf916a4a6d9068f01d80fdf1affa8a
https://github.com/llvm/llvm-project/commit/5a735a28c8bf916a4a6d9068f01d80fdf1affa8a
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/SemaHLSL/BuiltIns/lerp-errors.hlsl
Log Message:
-----------
[HLSL][Sema] Fixed Diagnostics that assumed only two arguments (#122772)
In the below code B varies over the arg list via a loop. However, the
diagnostics do not vary with the loop.
Fix so that diagnostics can vary with B.
Commit: e237e37c62804b5caa7ca5501d7372d7b01167ad
https://github.com/llvm/llvm-project/commit/e237e37c62804b5caa7ca5501d7372d7b01167ad
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M libc/src/__support/block.h
Log Message:
-----------
[libc] Fix riscv32 Block assertion failure on #117815
Commit: dce5d1fcb956e0218268dc1bf3e128bd2586df77
https://github.com/llvm/llvm-project/commit/dce5d1fcb956e0218268dc1bf3e128bd2586df77
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/test/Transforms/GlobalOpt/resolve-fmv-ifunc.ll
Log Message:
-----------
[FMV][GlobalOpt] Do not statically resolve non-FMV callers. (#123383)
This fixes a runtime regression in the llvm testsuite:
https://lab.llvm.org/buildbot/#/builders/198/builds/1237
On clang-aarch64-sve2-vla:
predres
FAIL
A 'predres' version is unexpectedly trapping on GravitonG4. My
explanation is that when the caller in not a versioned function, the
compiler exclusively relies on the command line option, or target
attribute to deduce whether a feature is available. However, there is no
guarantee that in reality the host supports those implied features.
This is a quickfix. We may rather change the mcpu option in the llvm
testsuite build instead.
Commit: 7b3a3530163f576708530dc6bcd6a0196a5423ae
https://github.com/llvm/llvm-project/commit/7b3a3530163f576708530dc6bcd6a0196a5423ae
Author: mishaobu <46725114+mishaobu at users.noreply.github.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
Log Message:
-----------
[mlir][spirv] Add common SPIRV Extended Ops for Vectors (#122322)
Support for the following SPIR-V Extended Ops:
* 67: Distance
* 68: Cross
* 69: Normalize
* 71: Reflect
(Found here:
https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html)
Commit: e5a28a3b4d09a3ab128439a0f4eb2659e0b1978b
https://github.com/llvm/llvm-project/commit/e5a28a3b4d09a3ab128439a0f4eb2659e0b1978b
Author: mishaobu <46725114+mishaobu at users.noreply.github.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMatrixOps.td
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/test/Dialect/SPIRV/IR/matrix-ops.mlir
M mlir/test/Target/SPIRV/matrix.mlir
Log Message:
-----------
[mlir][spirv] Add MatrixTimesVector Op (#122302)
(From SPIRV reference here :
https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpMatrixTimesVector)
Commit: b1bf95c081297305b2c9810ff04a9dac7216b434
https://github.com/llvm/llvm-project/commit/b1bf95c081297305b2c9810ff04a9dac7216b434
Author: George Chaltas <george.chaltas at intel.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
ReduxWidth check for 0 (#123257)
Added assert to check for underflow of ReduxWidth
modified: llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Source code analysis flagged the operation (ReduxWwidth - 1) as
potential underflow, since ReduxWidth is unsigned.
Realize that this should never happen if everything is working right,
but added an assert to check for it just in case.
Commit: 078dfd825309480b6a9df3ea44f6adf04913b339
https://github.com/llvm/llvm-project/commit/078dfd825309480b6a9df3ea44f6adf04913b339
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
Log Message:
-----------
[RISCV] Fix variable naming in recently pre-committed test
I'd swapped the %add/%sub names, and then copied that repeatedly.
Oops. While updating, remove the nsw as those should be irrelevant
and is another copy-paste mistake on my part.
Commit: 8b0c774f8afa323637a89dc455d9dd054cd5bffa
https://github.com/llvm/llvm-project/commit/8b0c774f8afa323637a89dc455d9dd054cd5bffa
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M lld/MachO/Options.td
Log Message:
-----------
[lld][InstrProf][NFC] Fix typo in help message (#123390)
Commit: 5db28679da38bee65feb55b803a23aceee568f44
https://github.com/llvm/llvm-project/commit/5db28679da38bee65feb55b803a23aceee568f44
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freestore_test.cpp
Log Message:
-----------
[libc] Fix malloc riscv32 test failures from #117815
Commit: a440c3ea89ea25a88ec265fe6130a6eb04840423
https://github.com/llvm/llvm-project/commit/a440c3ea89ea25a88ec265fe6130a6eb04840423
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M libc/test/src/__support/freestore_test.cpp
Log Message:
-----------
[libc] Correct previous malloc fix
Commit: 98067a322596a5fd1d850b2645250a082e8b18f2
https://github.com/llvm/llvm-project/commit/98067a322596a5fd1d850b2645250a082e8b18f2
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M libc/test/src/__support/freestore_test.cpp
Log Message:
-----------
[libc] Outer size, not inner size
Commit: 8f18f36b4906872ee0838ade2c0367c77b6f5bc0
https://github.com/llvm/llvm-project/commit/8f18f36b4906872ee0838ade2c0367c77b6f5bc0
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
Log Message:
-----------
[lldb] Skip unreliable test under ASAN
Commit: 04383d63130a72c1280d80ec3f5a09dfdf607462
https://github.com/llvm/llvm-project/commit/04383d63130a72c1280d80ec3f5a09dfdf607462
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/tools/scan-build/bin/scan-build
Log Message:
-----------
[Static analysis] Encodes a filename before inserting it into a URL. (#120810)
This fixes a bug where report links generated from files such as
StylePrimitiveNumericTypes+Conversions.h in WebKit result in an error.
---------
Co-authored-by: Brianna Fan <bfan2 at apple.com>
Commit: d6315afff078cb4309b5614562b32520f6e3a2eb
https://github.com/llvm/llvm-project/commit/d6315afff078cb4309b5614562b32520f6e3a2eb
Author: vporpo <vporpodas at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrMaps.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/InstrMapsTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][InstrMaps] EraseInstr callback (#123256)
This patch hooks up InstrMaps to the Sandbox IR callbacks such that it
gets updated when instructions get erased.
Commit: ae932becb2c952876edbb3591bfa997bf4629a4d
https://github.com/llvm/llvm-project/commit/ae932becb2c952876edbb3591bfa997bf4629a4d
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang-tools-extra/clangd/CMakeLists.txt
M clang-tools-extra/clangd/FindTarget.cpp
M clang-tools-extra/clangd/FindTarget.h
R clang-tools-extra/clangd/HeuristicResolver.cpp
R clang-tools-extra/clangd/HeuristicResolver.h
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/ParsedAST.h
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/unittests/CMakeLists.txt
R clang-tools-extra/clangd/unittests/HeuristicResolverTests.cpp
A clang/include/clang/Sema/HeuristicResolver.h
M clang/lib/Sema/CMakeLists.txt
A clang/lib/Sema/HeuristicResolver.cpp
M clang/unittests/Sema/CMakeLists.txt
A clang/unittests/Sema/HeuristicResolverTest.cpp
Log Message:
-----------
[clang][Sema] Upstream HeuristicResolver from clangd (#121314)
Fixes https://github.com/llvm/llvm-project/issues/121310
Commit: 358d65463b215a18e731b3a5494d51e1bcbd1356
https://github.com/llvm/llvm-project/commit/358d65463b215a18e731b3a5494d51e1bcbd1356
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/InstrMapsTest.cpp
Log Message:
-----------
[SandboxVectorizer] Fix a warning
This patch fixes:
third-party/unittest/googletest/include/gtest/gtest.h:1379:11:
error: comparison of integers of different signs: 'const unsigned
int' and 'const int' [-Werror,-Wsign-compare]
Commit: 18eec97f092311373163216419a2e4606fe51ba2
https://github.com/llvm/llvm-project/commit/18eec97f092311373163216419a2e4606fe51ba2
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Sema/BUILD.gn
Log Message:
-----------
[gn build] Port ae932becb2c9
Commit: 65cd9e4c2f85bd119eb039df1c90e8c97cbffb0c
https://github.com/llvm/llvm-project/commit/65cd9e4c2f85bd119eb039df1c90e8c97cbffb0c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Make VPValue constructors protected. (NFC)
Tighten access to constructors similar to ef1260acc0. VPValues should
either be constructed by constructors of recipes defining them or should
be live-ins created by VPlan (via getOrAddLiveIn).
Commit: 0c6e03eea04b93984d5fe562f64f1ce31f5cca09
https://github.com/llvm/llvm-project/commit/0c6e03eea04b93984d5fe562f64f1ce31f5cca09
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll
Log Message:
-----------
[RISCV] Fold vp.store(vp.reverse(VAL), ADDR, MASK) -> vp.strided.store(VAL, NEW_ADDR, -1, MASK) (#123123)
Co-authored-by: Brandon Wu <brandon.wu at sifive.com>
Commit: 2523d3b1024bac7aa2efb6740a136bbf2263994e
https://github.com/llvm/llvm-project/commit/2523d3b1024bac7aa2efb6740a136bbf2263994e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/test/Lower/CUDA/cuda-devptr.cuf
Log Message:
-----------
[flang][cuda] Perform scalar assignment of c_devptr inlined (#123407)
Because `c_devptr` has a `c_ptr` field, any assignment were done via the
Assign runtime function. This leads to stack overflow on the device and
taking too much memory. As we know the c_devptr can be directly copied
on assignment, make it a special case.
Commit: 22d4ff155aadf0f098dd5dc48d9038da15108937
https://github.com/llvm/llvm-project/commit/22d4ff155aadf0f098dd5dc48d9038da15108937
Author: vporpo <vporpodas at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/lib/SandboxIR/Instruction.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Fix CmpInst::create() when it gets folded (#123408)
If the operands of a CmpInst are constants then it gets folded into a
constant. Therefore CmpInst::create() should return a Value*, not a
Constant* and should handle the creation of the constant correctly.
Commit: 87e4b68195adc81fae40a4fa27e33458a9586fe5
https://github.com/llvm/llvm-project/commit/87e4b68195adc81fae40a4fa27e33458a9586fe5
Author: vporpo <vporpodas at google.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Implement ShuffleMask (#123404)
This patch implements a helper ShuffleMask data structure that helps
describe shuffles of elements across lanes.
Commit: 9fdc38c81c7d1b61cb0750e5f5b273d6d1877513
https://github.com/llvm/llvm-project/commit/9fdc38c81c7d1b61cb0750e5f5b273d6d1877513
Author: Derek Schuff <dschuff at chromium.org>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M lld/wasm/SyntheticSections.cpp
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/test/Object/Inputs/WASM/multi-table.wasm
Log Message:
-----------
[WebAssembly][Object] Support more elem segment flags (#123427)
Some tools (e.g. Rust tooling) produce element segment descriptors with
neither
elemkind or element type descriptors, but with init exprs instead of
func indices
(this is with the flags value of 4 in
https://webassembly.github.io/spec/core/binary/modules.html#element-section).
LLVM doesn't fully model reference types or the various ways to
initialize element
segments, but we do want to correctly parse and skip over all type
sections, so
this change updates the object parser to handle that case, and refactors
for more
clarity.
The test file is updated to include one additional elem segment with a
flags value
of 4, an initializer value of (32.const 0) and an empty vector.
Also support parsing files that export imported (undefined) functions.
Commit: 5b6a26ccdd98da7c5246d4c23ef7cc596189b52c
https://github.com/llvm/llvm-project/commit/5b6a26ccdd98da7c5246d4c23ef7cc596189b52c
Author: Akshay Deodhar <adeodhar at nvidia.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/include/llvm/IR/PrintPasses.h
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/IR/PrintPasses.cpp
A llvm/test/Other/print-loop-func-scope.ll
Log Message:
-----------
Add option to print entire function instead of just the loops for loo… (#123229)
print-after-all is useful for diffing IR between two passes. When one of
the two is a function pass, and the other is a loop pass, the diff
becomes useless. Add an option which prints the entire function for loop
passes.
Commit: 07d496538f5543a8eed5e207148e28e358b7cca4
https://github.com/llvm/llvm-project/commit/07d496538f5543a8eed5e207148e28e358b7cca4
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
A llvm/test/Transforms/SLPVectorizer/InstructionsState-is-invalid-2.ll
A llvm/test/Transforms/SLPVectorizer/X86/InstructionsState-is-invalid-1.ll
Log Message:
-----------
[SLP] Replace MainOp and AltOp in TreeEntry with InstructionsState. (#122443)
Add TreeEntry::hasState.
Add assert for getTreeEntry.
Remove the OpValue parameter from the canReuseExtract function.
Remove the Opcode parameter from the ComputeMaxBitWidth lambda function.
Commit: 143c33c6dfd68f4e61d8e75c512bfdff02a7c687
https://github.com/llvm/llvm-project/commit/143c33c6dfd68f4e61d8e75c512bfdff02a7c687
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
Log Message:
-----------
[RISCV] Consider only legally typed splats to be legal shuffles (#123415)
Given the comment, I'd expected test coverage. There was none so let's
do the simple thing which benefits the one thing we have tests for.
Commit: a7bca1861bfcd1490319115c1027166e27f4ae27
https://github.com/llvm/llvm-project/commit/a7bca1861bfcd1490319115c1027166e27f4ae27
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Correctly annotate braces in macro definitions (#123279)
Fixes #123179.
Commit: b62e55803c52ca04093a0eea361407e849dc23e1
https://github.com/llvm/llvm-project/commit/b62e55803c52ca04093a0eea361407e849dc23e1
Author: Wanyi <wanyi at meta.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
Log Message:
-----------
[lldb][test] Remove compiler version check and use regex (#123393)
The test checks specific compiler version to determine the output.
However, the compiler version string is always set to 15.0.0 for our
local build. Remove this check and use regex match instead.
## Test Plan
```
./bin/llvm-lit -sva /home/wanyi/llvm-sand/external/llvm-project/lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
...
Skipping the following test categories: ['dsym', 'gmodules', 'debugserver', 'objc']
--
Command Output (stderr):
--
UNSUPPORTED: LLDB (/home/wanyi/llvm-sand/build/Release+Distribution/fbcode-x86_64/toolchain/bin/clang-x86_64) :: test_dsym (TestVectorOfVectorsFromStdModule.TestVectorOfVectors) (test case does not fall in any category of interest for this run)
PASS: LLDB (/home/wanyi/llvm-sand/build/Release+Distribution/fbcode-x86_64/toolchain/bin/clang-x86_64) :: test_dwarf (TestVectorOfVectorsFromStdModule.TestVectorOfVectors)
PASS: LLDB (/home/wanyi/llvm-sand/build/Release+Distribution/fbcode-x86_64/toolchain/bin/clang-x86_64) :: test_dwo (TestVectorOfVectorsFromStdModule.TestVectorOfVectors)
----------------------------------------------------------------------
Ran 3 tests in 4.636s
OK (skipped=1)
--
********************
Testing Time: 4.97s
Total Discovered Tests: 1
Passed: 1 (100.00%)
```
Commit: e2402615a5a76d46a433dfcc1de10b38a1263c9d
https://github.com/llvm/llvm-project/commit/e2402615a5a76d46a433dfcc1de10b38a1263c9d
Author: Ander <github32 at anderg.fastmail.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix option `BreakBinaryOperations` for operator `>>` (#122282)
Fixes #106228.
Commit: 90696d17f2d6fda87d1cb4f75cc35015ba2795c9
https://github.com/llvm/llvm-project/commit/90696d17f2d6fda87d1cb4f75cc35015ba2795c9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Simplify visitDeclRef (#123380)
Try to reduce indentation here.
Commit: 9cd12b5652ec0bcf8670aa7c8ddfddf9212aa94c
https://github.com/llvm/llvm-project/commit/9cd12b5652ec0bcf8670aa7c8ddfddf9212aa94c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
Log Message:
-----------
[TableGen] Inline a helper function that didn't seem necessary. NFC (#123440)
The function called find_if and converted the iterator to an index.
The caller then had to check the index being non-zero to know if the
find succeeded.
Seems better to just do the find and distance in the caller.
Commit: 23746c2f6d12a039a79625a40e6727bb67b87a3c
https://github.com/llvm/llvm-project/commit/23746c2f6d12a039a79625a40e6727bb67b87a3c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
Log Message:
-----------
[TableGen] Use vector constructor instead of calling append or emplace_back on an empty vector. NFC (#123442)
Commit: 6628b5934df8209396b5946e268301416ad7d9f6
https://github.com/llvm/llvm-project/commit/6628b5934df8209396b5946e268301416ad7d9f6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
Log Message:
-----------
[TableGen] Use a range-based for loop. NFC (#123443)
Commit: 909bf38c1fea56aab91b1eb43b8c00c515157a53
https://github.com/llvm/llvm-project/commit/909bf38c1fea56aab91b1eb43b8c00c515157a53
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
Log Message:
-----------
[clang-tidy][NFC] remove unused field in UnusedUsingDeclsCheck (#123451)
Commit: d79e3af8ad126e352338d4fe4e3b2a13c8d587dc
https://github.com/llvm/llvm-project/commit/d79e3af8ad126e352338d4fe4e3b2a13c8d587dc
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
Log Message:
-----------
[TableGen] Fix unused-variable warnings in CodeGenSchedule.cpp (NFC)
/llvm-project/llvm/utils/TableGen/Common/CodeGenSchedule.cpp:1704:32:
error: unused variable 'Seq' [-Werror,-Wunused-variable]
SmallVectorImpl<unsigned> &Seq =
^
/llvm-project/llvm/utils/TableGen/Common/CodeGenSchedule.cpp:1713:32:
error: unused variable 'Seq' [-Werror,-Wunused-variable]
SmallVectorImpl<unsigned> &Seq =
^
2 errors generated.
Commit: c3aa86c9de5dfcc40abad01eabb7f9a301b90a2e
https://github.com/llvm/llvm-project/commit/c3aa86c9de5dfcc40abad01eabb7f9a301b90a2e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-17 (Fri, 17 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
Log Message:
-----------
[TableGen] const-correct a couple CodeGenSchedule methods. NFC
Commit: 10cfd54e6aedc9c97bad84d6f8d32910f591cd26
https://github.com/llvm/llvm-project/commit/10cfd54e6aedc9c97bad84d6f8d32910f591cd26
Author: Kristof Beyls <kristof.beyls at arm.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
Log Message:
-----------
[AArch64] Correct defs and uses on {PAC,AUT}I{A,B}171615 (#123354)
I'm not adding tests for this, as I don't think we usually have tests to
verify correct description of defs and uses in instructions?
This fix will be tested when #122304 lands, as one of the regression
tests in that PR fails without this fix.
Commit: 4aedb970097b7ade93127021206199dbb17a4134
https://github.com/llvm/llvm-project/commit/4aedb970097b7ade93127021206199dbb17a4134
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] getsockname interception. (#123409)
Commit: c3a935e3f967f8f22f5db240d145459ee621c1e0
https://github.com/llvm/llvm-project/commit/c3a935e3f967f8f22f5db240d145459ee621c1e0
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/test/CodeGenCXX/debug-info-object-pointer.cpp
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
Log Message:
-----------
Revert "[clang][DebugInfo] Emit DW_AT_object_pointer on function declarations with explicit `this`" (#123455)
Reverts llvm/llvm-project#122928
Commit: 67c3f2b4303972a6dc8ada54efe1d5d80d119a51
https://github.com/llvm/llvm-project/commit/67c3f2b4303972a6dc8ada54efe1d5d80d119a51
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
M llvm/test/CodeGen/X86/cvt16.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
M llvm/test/CodeGen/X86/fp16-libcalls.ll
M llvm/test/CodeGen/X86/half-constrained.ll
M llvm/test/CodeGen/X86/half-darwin.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/pr91005.ll
M llvm/test/CodeGen/X86/pr95278.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
Log Message:
-----------
[X86] mayFoldIntoStore - peek through oneuse bitcase users to find a store node (#123366)
mayFoldIntoStore currently just checks the direct (oneuse) user of a
SDValue to check its stored, which prevents cases where we bitcast the
value prior to storing (usually the bitcast will be removed later).
This patch peeks up through oneuse BITCAST nodes chain to see if its
eventually stored.
The main use of mayFoldIntoStore is v8i16 EXTRACT_VECTOR_ELT lowering
which will only use PEXTRW/PEXTRB for index0 extractions (vs the faster
MOVD) if the extracted value will be folded into a store on SSE41+
targets.
Fixes #107086
Commit: f4943464d769e2eacd5c54dfaaf0468788abeb84
https://github.com/llvm/llvm-project/commit/f4943464d769e2eacd5c54dfaaf0468788abeb84
Author: Matthias Springer <me at m-sp.org>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/lib/AsmParser/TypeParser.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/MLIRContext.cpp
Log Message:
-----------
[mlir][IR] Remove builder API + caching for low-precision FP types (#123321)
Remove builder API (e.g., `b.getFloat4E2M1FNType()`) and caching in
`MLIRContext` for low-precision FP types. Types are still cached in the
type uniquer.
For details, see:
https://discourse.llvm.org/t/rethink-on-approach-to-low-precision-fp-types/82361/28
Note for LLVM integration: Use `b.getType<Float4E2M1FNType>()` or
`Float4E2M1FNType::get(b.getContext())` instead of
`b.getFloat4E2M1FNType()`.
Commit: 26c9be2b8d2720700ecc88dcd5b30a77d3b67b18
https://github.com/llvm/llvm-project/commit/26c9be2b8d2720700ecc88dcd5b30a77d3b67b18
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr123333.ll
Log Message:
-----------
[X86] Only call combineBitcastToBoolVector after legalization (#123386)
Prevents infinite loop between combineBitcastToBoolVector and hoistLogicOpWithSameOpcodeHands, which only performs the "logicop(bitcast(A),bitcast(B)) -> bitcast(logicop(A,B))" upto type legalization.
combineBitcastToBoolVector doesn't care much as its mainly for AVX512 cleanup that X86DomainReassignment can't handle for us.
Fixes #123333
Commit: 82be3adcff953635a0719ccb38cd8ef5652908a2
https://github.com/llvm/llvm-project/commit/82be3adcff953635a0719ccb38cd8ef5652908a2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Consistently use getVectorIdxConstant for element/subvector extract/insertion nodes. NFC. (#123312)
Avoid the use of getIntPtrConstant for anything other than address pointer related code.
Noticed while trying to use getVectorIdxConstant as a breakpoint.
Commit: d6666168041e5c2b66205d307a371bab03fb72fb
https://github.com/llvm/llvm-project/commit/d6666168041e5c2b66205d307a371bab03fb72fb
Author: David Green <david.green at arm.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/test/CodeGen/AArch64/adds_cmn.ll
M llvm/test/CodeGen/AArch64/csel-subs-swapped.ll
Log Message:
-----------
[AArch64] Fold swapped sub/SUBS conditions (#121412)
This fold already exists in a couple places (DAG and CGP), where an
icmps operands are swapped to allow CSE with a sub. They do not handle
constants though. This patch adds an AArch64 version that can be more
precise.
Commit: c2d15ac4d4432788557e77c15ce572ac655a8fec
https://github.com/llvm/llvm-project/commit/c2d15ac4d4432788557e77c15ce572ac655a8fec
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
Log Message:
-----------
[VPlan] Update final IV exit value via VPlan. (#112147)
Model updating IV users directly in VPlan, replace fixupIVUsers.
Now simple extracts are created for all phis in the exit block during
initial VPlan construction. A later VPlan transform
(optimizeInductionExitUsers) replaces extracts of inductions with
their pre-computed values if possible.
This completes the transition towards modeling all live-outs directly in
VPlan.
There are a few follow-ups:
* emit extracts initially also for resume phis, and optimize them
tougher with IV exit users
* support for VPlans with multiple exits in optimizeInductionExitUsers.
Depends on https://github.com/llvm/llvm-project/pull/110004,
https://github.com/llvm/llvm-project/pull/109975 and
https://github.com/llvm/llvm-project/pull/112145.
Commit: 58326f1d5b5b379590af92dd129b2f3b3e96af46
https://github.com/llvm/llvm-project/commit/58326f1d5b5b379590af92dd129b2f3b3e96af46
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
Log Message:
-----------
Revert "[VPlan] Update final IV exit value via VPlan. (#112147)"
This reverts commit c2d15ac4d4432788557e77c15ce572ac655a8fec.
Causes build failures on PPC stage2 & fuchsia bots
https://lab.llvm.org/buildbot/#/builders/168/builds/7650
https://lab.llvm.org/buildbot/#/builders/11/builds/11248
Commit: 33f9d839eff79707ae8879a497f7ae9fab6b83ac
https://github.com/llvm/llvm-project/commit/33f9d839eff79707ae8879a497f7ae9fab6b83ac
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
Log Message:
-----------
[X86] X86FixupVectorConstants - split ConvertToBroadcastAVX512 helper to handle single bitwidth at a time.
Attempt 32-bit broadcasts first, and then fallback to 64-bit broadcasts on failure.
We lose an explicit assertion for matching operand numbers but X86InstrFoldTables already does something similar.
Pulled out of WIP patch #73509
Commit: 699f19605579f25083152a9ad21e14c2751d5d66
https://github.com/llvm/llvm-project/commit/699f19605579f25083152a9ad21e14c2751d5d66
Author: Hui <hui.xie1990 at gmail.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M libcxx/include/__atomic/atomic_sync.h
R libcxx/test/benchmarks/atomic_wait.bench.cpp
A libcxx/test/benchmarks/atomic_wait_1_waiter_1_notifier.bench.cpp
A libcxx/test/benchmarks/atomic_wait_N_waiter_N_notifier.bench.cpp
A libcxx/test/benchmarks/atomic_wait_helper.h
A libcxx/test/benchmarks/atomic_wait_multi_waiter_1_notifier.bench.cpp
Log Message:
-----------
[libc++] remove yield from atomic::wait (#120012)
This is to address the issue where `yield` can cause the thread to be
assigned to the lowest priority.
I have done lots of experiments: see the comments here:
https://github.com/llvm/llvm-project/pull/84471#issuecomment-2522723549
And for this patch, the benchmark has been performed on a 16 core M4 MAX
CPU MacBook Pro.
dylib compiled with Release mode and the test compiled with
optimization=speed
```
Comparing ../../../build_atomic_yield2/ref_new2.json to ../../../build_atomic_yield2/no_yield_new2.json
Benchmark Time CPU Time Old Time New CPU Old CPU New
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<0>>/262144 +0.0460 +0.0392 14949926 15637503 13633314 14167327
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<0>>/524288 +0.0299 +0.0290 24369327 25099004 24367214 25073900
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<0>>/1048576 +0.0648 +0.0640 48149060 51268517 48144857 51226733
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<50>, NumHighPrioTasks<0>>/4096 +0.0000 -0.8765 204815500 204823427 204514333 25265071
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<50>, NumHighPrioTasks<0>>/8192 +0.0000 -0.8747 409637520 409640821 408997500 51228071
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<50>, NumHighPrioTasks<0>>/16384 +0.0001 -0.8737 819244417 819351256 817022000 103217000
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<100>, NumHighPrioTasks<0>>/4096 +0.0000 -0.9029 409607694 409624937 271866333 26410600
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<100>, NumHighPrioTasks<0>>/8192 +0.0001 -0.9017 819168417 819269339 542784000 53352429
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<100>, NumHighPrioTasks<0>>/16384 +0.0001 -0.9012 1638361750 1638522929 1089486000 107684571
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<4>>/262144 +0.3178 +0.3068 12777744 16838266 12764732 16681233
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<4>>/524288 +0.2231 +0.2225 26889415 32887842 26864138 32840550
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<4>>/1048576 +0.1809 +0.1799 56103004 66251660 56048000 66129583
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<50>, NumHighPrioTasks<4>>/4096 -0.0029 -0.8708 205509986 204906011 204277333 26399538
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<50>, NumHighPrioTasks<4>>/8192 +0.0001 -0.8711 410286709 410314199 408608000 52667692
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<50>, NumHighPrioTasks<4>>/16384 -0.0019 -0.8713 821042916 819476441 816274000 105077000
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<100>, NumHighPrioTasks<4>>/4096 -0.0005 -0.9015 409825792 409638429 273145333 26896400
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<100>, NumHighPrioTasks<4>>/8192 -0.0027 -0.9014 821528125 819285433 545661000 53775308
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<100>, NumHighPrioTasks<4>>/16384 -0.0041 -0.9014 1645204459 1638538077 1091726000 107647000
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<7>>/16 -0.4835 -0.4836 1609 831 1609 831
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<7>>/32 -0.4398 -0.4399 3167 1774 3166 1773
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<7>>/64 -0.4705 -0.4705 6323 3348 6323 3348
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<50>, NumHighPrioTasks<7>>/8 +0.0005 -0.8683 400109 400314 399256 52575
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<50>, NumHighPrioTasks<7>>/16 +0.0005 -0.8683 800055 800483 798797 105165
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<50>, NumHighPrioTasks<7>>/32 +0.0003 -0.8680 1600058 1600585 1597266 210903
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<100>, NumHighPrioTasks<7>>/8 +0.0004 -0.8976 800006 800365 531802 54441
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<100>, NumHighPrioTasks<7>>/16 +0.0005 -0.8982 1599965 1600765 1064885 108429
BM_1_atomic_1_waiter_1_notifier<NotifyEveryNus<100>, NumHighPrioTasks<7>>/32 +0.0005 -0.8993 3199905 3201437 2129243 214343
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<3>, NumHighPrioTasks<0>>/16384 -0.0226 -0.0261 972539 950519 971198 945828
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<3>, NumHighPrioTasks<0>>/32768 -0.0198 -0.0221 1933294 1895054 1930720 1888094
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<3>, NumHighPrioTasks<0>>/65536 -0.0031 -0.0039 3835138 3823094 3827785 3812836
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<7>, NumHighPrioTasks<0>>/4096 +0.4380 +0.4294 571762 822185 570245 815115
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<7>, NumHighPrioTasks<0>>/8192 +0.0735 +0.0680 1223881 1313880 1221350 1304439
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<7>, NumHighPrioTasks<0>>/16384 +0.1222 +0.1205 2442071 2740519 2433105 2726274
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<15>, NumHighPrioTasks<0>>/1024 +0.1527 +1.2188 196081 226031 62647 139001
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<15>, NumHighPrioTasks<0>>/2048 +0.0757 +0.4838 387858 417228 129250 191780
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<15>, NumHighPrioTasks<0>>/4096 -0.0355 -0.2443 812827 784003 378109 285722
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<3>, NumHighPrioTasks<0>>/1024 +0.0002 -0.0873 51202059 51211089 51135714 46670867
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<3>, NumHighPrioTasks<0>>/2048 +0.0001 -0.0864 102424970 102432359 102287571 93452000
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<3>, NumHighPrioTasks<0>>/4096 +0.0000 -0.0865 204828250 204834229 204528667 186845250
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<7>, NumHighPrioTasks<0>>/256 +0.0003 -0.1681 12801752 12805016 12786382 10636485
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<7>, NumHighPrioTasks<0>>/512 +0.0001 -0.1686 25601940 25604893 25565481 21254515
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<7>, NumHighPrioTasks<0>>/1024 +0.0000 -0.1569 51210789 51211539 51150143 43122500
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<15>, NumHighPrioTasks<0>>/64 +0.0064 -0.3503 3210430 3230869 2856780 1856063
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<15>, NumHighPrioTasks<0>>/128 +0.0034 -0.3534 6410529 6432308 5704792 3688942
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<15>, NumHighPrioTasks<0>>/256 +0.0011 -0.3600 12821419 12835646 11455934 7331250
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<3>, NumHighPrioTasks<0>>/256 +0.0003 +0.0034 25600089 25608062 24375034 24457172
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<3>, NumHighPrioTasks<0>>/512 +0.0002 -0.0000 51203798 51211795 48859857 48858500
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<3>, NumHighPrioTasks<0>>/1024 +0.0003 +0.0008 102411321 102437524 97694429 97777286
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<7>, NumHighPrioTasks<0>>/64 +0.0002 -0.0464 6399846 6401009 6070487 5789091
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<7>, NumHighPrioTasks<0>>/128 +0.0002 -0.0457 12799914 12802544 12069966 11518836
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<7>, NumHighPrioTasks<0>>/256 +0.0001 -0.0513 25599724 25602105 24202862 22962032
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<15>, NumHighPrioTasks<0>>/16 -0.0060 +0.2575 1611779 1602148 956236 1202492
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<15>, NumHighPrioTasks<0>>/32 -0.0064 +0.2964 3221485 3200918 1883540 2441728
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<15>, NumHighPrioTasks<0>>/64 -0.0046 +0.3087 6432692 6403368 3701725 4844611
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<3>, NumHighPrioTasks<4>>/256 -0.0536 -0.0592 27458 25988 27402 25780
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<3>, NumHighPrioTasks<4>>/512 -0.0469 -0.0527 54745 52175 54628 51750
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<3>, NumHighPrioTasks<4>>/1024 -0.0297 -0.0340 108312 105095 108047 104378
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<7>, NumHighPrioTasks<4>>/64 -0.2445 -0.2722 15109 11414 14711 10708
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<7>, NumHighPrioTasks<4>>/128 -0.3132 -0.3515 32494 22317 32063 20794
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<7>, NumHighPrioTasks<4>>/256 -0.1397 -0.1834 52801 45424 52170 42602
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<15>, NumHighPrioTasks<4>>/16 +0.1679 +1.0248 28973 33837 13243 26814
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<15>, NumHighPrioTasks<4>>/32 -0.0481 +0.7901 39155 37273 16072 28771
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<15>, NumHighPrioTasks<4>>/64 -0.2075 +0.7568 57547 45606 19582 34402
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<3>, NumHighPrioTasks<4>>/256 -0.0001 -0.0807 12802693 12800886 12775327 11744119
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<3>, NumHighPrioTasks<4>>/512 -0.0021 -0.0867 25655056 25601315 25590407 23371667
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<3>, NumHighPrioTasks<4>>/1024 -0.0007 -0.0832 51238801 51201975 51099071 46845733
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<7>, NumHighPrioTasks<4>>/64 +0.0016 -0.2411 3200714 3205846 3176841 2410756
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<7>, NumHighPrioTasks<4>>/128 +0.0008 -0.2373 6404239 6409102 6359649 4850544
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<7>, NumHighPrioTasks<4>>/256 +0.0000 -0.2286 12805839 12806032 12713018 9806653
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<15>, NumHighPrioTasks<4>>/16 +0.0272 +0.0563 811198 833264 482220 509345
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<15>, NumHighPrioTasks<4>>/32 +0.0097 +0.0454 1617205 1632962 957801 1001264
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<15>, NumHighPrioTasks<4>>/64 +0.0050 +0.0389 3217997 3234130 1927921 2002868
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<3>, NumHighPrioTasks<4>>/256 +0.0000 -0.0009 25599763 25601039 24520071 24497071
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<3>, NumHighPrioTasks<4>>/512 +0.0001 -0.0017 51200354 51203628 49086786 49005500
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<3>, NumHighPrioTasks<4>>/1024 +0.0001 +0.0013 102400369 102409744 97931143 98060857
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<7>, NumHighPrioTasks<4>>/64 -0.0017 +0.0128 6410821 6400104 5529150 5600008
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<7>, NumHighPrioTasks<4>>/128 -0.0011 +0.0215 12817263 12803569 11025889 11263032
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<7>, NumHighPrioTasks<4>>/256 -0.0005 +0.0193 25612704 25600332 22089065 22515677
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<15>, NumHighPrioTasks<4>>/16 -0.0164 +0.7969 1627422 1600798 665736 1196236
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<15>, NumHighPrioTasks<4>>/32 -0.0095 +0.8362 3231500 3200840 1290017 2368789
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<15>, NumHighPrioTasks<4>>/64 -0.0050 +0.7319 6433401 6401180 2747936 4759115
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<3>, NumHighPrioTasks<7>>/16 +0.0155 +0.0092 1177 1195 1171 1181
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<3>, NumHighPrioTasks<7>>/32 -0.0135 -0.0145 2103 2074 2095 2064
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<3>, NumHighPrioTasks<7>>/64 +0.0022 +0.0009 3832 3841 3820 3823
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<7>, NumHighPrioTasks<7>>/8 +13.9131 +9.5298 2074 30931 2041 21495
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<7>, NumHighPrioTasks<7>>/16 +5.9980 +3.9816 3168 22172 3124 15563
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<7>, NumHighPrioTasks<7>>/32 +3.8681 +2.3515 5412 26348 5321 17833
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<15>, NumHighPrioTasks<7>>/4 +0.1312 +0.4845 31938 36127 12666 18803
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<15>, NumHighPrioTasks<7>>/8 -0.0475 +0.0775 39196 37336 18078 19479
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<15>, NumHighPrioTasks<7>>/16 -0.3146 -0.3853 57548 39441 31743 19513
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<3>, NumHighPrioTasks<7>>/8 -0.0012 -0.0916 400610 400149 399248 362679
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<3>, NumHighPrioTasks<7>>/16 -0.0032 -0.0904 802940 800342 798964 726744
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<3>, NumHighPrioTasks<7>>/32 -0.0030 -0.0911 1604860 1600044 1598235 1452647
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<7>, NumHighPrioTasks<7>>/4 +0.0348 -0.3515 202073 209107 199452 129352
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<7>, NumHighPrioTasks<7>>/8 -0.0004 -0.3628 406727 406545 400942 255464
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<7>, NumHighPrioTasks<7>>/16 -0.0176 -0.3705 821725 807256 803722 505959
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<15>, NumHighPrioTasks<7>>/2 +0.0575 +0.0699 138530 146498 79463 85020
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<15>, NumHighPrioTasks<7>>/4 -0.2307 -0.4182 327417 251885 222502 129448
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<50>, NumWaitingThreads<15>, NumHighPrioTasks<7>>/8 -0.4166 -0.5733 765495 446598 535265 228384
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<3>, NumHighPrioTasks<7>>/8 +0.0001 +0.0022 800108 800227 759501 761200
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<3>, NumHighPrioTasks<7>>/16 +0.0002 +0.0052 1599998 1600327 1515336 1523162
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<3>, NumHighPrioTasks<7>>/32 -0.0004 +0.0029 3201730 3200529 3037191 3045996
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<7>, NumHighPrioTasks<7>>/4 -0.0063 +0.3625 402752 400231 231304 315156
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<7>, NumHighPrioTasks<7>>/8 -0.0029 +0.5760 802313 799998 401474 632716
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<7>, NumHighPrioTasks<7>>/16 -0.0014 +0.4607 1602184 1600012 877859 1282310
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<15>, NumHighPrioTasks<7>>/2 -0.0492 +0.3586 212875 202398 100437 136457
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<15>, NumHighPrioTasks<7>>/4 -0.0927 +0.4432 444857 403606 181089 261350
BM_1_atomic_multi_waiter_1_notifier<NotifyEveryNus<100>, NumWaitingThreads<15>, NumHighPrioTasks<7>>/8 -0.0704 +0.8210 861808 801099 318774 580489
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<0>>/4096 -0.0730 -0.0762 333804 309427 333180 307803
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<0>>/8192 -0.0775 -0.0795 701228 646853 700065 644381
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<0>>/16384 +0.0245 +0.0229 1328777 1361291 1326360 1356745
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<3>, NumHighPrioTasks<0>>/1024 -0.0541 -0.0562 201559 190662 201259 189940
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<3>, NumHighPrioTasks<0>>/2048 -0.1959 -0.1986 416092 334584 415412 332927
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<3>, NumHighPrioTasks<0>>/4096 -0.1699 -0.1710 811966 674040 810157 671584
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<5>, NumHighPrioTasks<0>>/1024 +0.1383 +0.1301 379893 432426 377756 426885
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<5>, NumHighPrioTasks<0>>/2048 +0.0396 +0.0339 822384 854937 818110 845866
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<5>, NumHighPrioTasks<0>>/4096 +0.2499 +0.2451 1350161 1687588 1345121 1674845
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<7>, NumHighPrioTasks<0>>/256 +0.0042 +0.0101 213598 214487 199282 201303
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<7>, NumHighPrioTasks<0>>/512 -0.1034 -0.1065 428033 383755 409546 365945
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<7>, NumHighPrioTasks<0>>/1024 -0.0972 -0.1064 833189 752165 810146 723952
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<2>, NumHighPrioTasks<0>>/1024 +0.0001 -0.1103 51201684 51204581 51124714 45485867
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<2>, NumHighPrioTasks<0>>/2048 -0.0000 -0.1202 102409167 102405120 102243857 89953750
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<2>, NumHighPrioTasks<0>>/4096 +0.0000 -0.1166 204807125 204813833 204453333 180618500
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<3>, NumHighPrioTasks<0>>/256 +0.0002 -0.1623 12803624 12806161 12778727 10704806
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<3>, NumHighPrioTasks<0>>/512 -0.0002 -0.1414 25607327 25603223 25551852 21939152
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<3>, NumHighPrioTasks<0>>/1024 -0.0002 -0.1653 51212196 51202776 51126643 42673625
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<5>, NumHighPrioTasks<0>>/256 -0.0002 -0.0709 12805016 12802157 12784636 11878785
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<5>, NumHighPrioTasks<0>>/512 -0.0002 -0.1182 25611565 25606346 25560815 22540033
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<5>, NumHighPrioTasks<0>>/1024 -0.0002 -0.0813 51220762 51208122 51121071 46963571
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<7>, NumHighPrioTasks<0>>/64 +0.0012 -0.2125 3219858 3223858 3194027 2515373
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<7>, NumHighPrioTasks<0>>/128 -0.0370 -0.2643 6668396 6421601 6563402 4828970
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<7>, NumHighPrioTasks<0>>/256 -0.0288 -0.2220 13220067 12839487 13073964 10172062
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<2>, NumHighPrioTasks<0>>/256 -0.0000 -0.0105 25602159 25600917 24178138 23923759
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<2>, NumHighPrioTasks<0>>/512 +0.0000 -0.0175 51201819 51203125 48569867 47718143
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<2>, NumHighPrioTasks<0>>/1024 +0.0001 -0.0118 102404155 102414482 96908714 95760857
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<3>, NumHighPrioTasks<0>>/256 +0.0000 -0.0574 25599943 25600621 25326679 23871733
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<3>, NumHighPrioTasks<0>>/512 +0.0001 -0.0813 51200525 51206978 50459500 46355867
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<3>, NumHighPrioTasks<0>>/1024 +0.0001 -0.0774 102400405 102409875 101483571 93631000
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<5>, NumHighPrioTasks<0>>/128 -0.0002 +0.0456 12802792 12800864 11731131 12265881
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<5>, NumHighPrioTasks<0>>/256 -0.0000 +0.0649 25601667 25601070 22686065 24157862
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<5>, NumHighPrioTasks<0>>/512 -0.0005 +0.0513 51224453 51200650 45549867 47885533
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<7>, NumHighPrioTasks<0>>/64 -0.0014 +0.2205 6408711 6400039 4698868 5734934
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<7>, NumHighPrioTasks<0>>/128 +0.0155 +0.2459 12810413 13009276 9163080 11416117
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<7>, NumHighPrioTasks<0>>/256 +0.0081 +0.2304 25603646 25811111 18779784 23106867
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<4>>/128 -0.1103 -0.1108 24307 21625 24256 21568
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<4>>/256 +0.0637 +0.0574 45588 48491 45498 48112
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<4>>/512 -0.0519 -0.0539 90764 86054 90527 85648
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<3>, NumHighPrioTasks<4>>/128 +0.1161 +0.1083 28810 32155 28722 31832
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<3>, NumHighPrioTasks<4>>/256 +0.1152 +0.1094 64670 72123 64461 71512
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<3>, NumHighPrioTasks<4>>/512 -0.0804 -0.0993 125916 115796 125476 113010
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<5>, NumHighPrioTasks<4>>/64 +0.2682 -0.2446 53787 68210 51896 39203
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<5>, NumHighPrioTasks<4>>/128 +0.5732 -0.4832 103915 163474 100825 52105
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<5>, NumHighPrioTasks<4>>/256 +0.1283 -0.4606 211518 238645 203852 109957
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<7>, NumHighPrioTasks<4>>/16 -0.1526 +0.1523 59673 50567 23275 26819
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<7>, NumHighPrioTasks<4>>/32 -0.0492 +0.7075 82796 78719 24187 41298
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<7>, NumHighPrioTasks<4>>/64 -0.0712 +0.0764 150268 139570 55304 59527
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<2>, NumHighPrioTasks<4>>/128 -0.0004 -0.0828 6402859 6400308 6380145 5851557
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<2>, NumHighPrioTasks<4>>/256 -0.0002 -0.0370 12802978 12801020 12769107 12296293
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<2>, NumHighPrioTasks<4>>/512 -0.0028 -0.0799 25674170 25601862 25612667 23566586
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<3>, NumHighPrioTasks<4>>/128 -0.0004 -0.0672 6402990 6400344 6382100 5953248
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<3>, NumHighPrioTasks<4>>/256 -0.0004 -0.0841 12806197 12801334 12765891 11691661
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<3>, NumHighPrioTasks<4>>/512 -0.0006 -0.0574 25615708 25601085 25533250 24067828
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<5>, NumHighPrioTasks<4>>/32 -0.0163 -0.2801 1645647 1618805 1614735 1162471
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<5>, NumHighPrioTasks<4>>/64 -0.0211 -0.2501 3285234 3216045 3217295 2412509
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<5>, NumHighPrioTasks<4>>/128 -0.0502 -0.2956 6755976 6416549 6653264 4686407
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<7>, NumHighPrioTasks<4>>/8 -0.0815 -0.2227 534476 490942 337482 262341
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<7>, NumHighPrioTasks<4>>/16 +0.0973 -0.0629 1071127 1175390 664897 623053
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<50>, NumberOfAtomics<7>, NumHighPrioTasks<4>>/32 -0.2263 -0.3717 2297477 1777444 1488023 934861
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<2>, NumHighPrioTasks<4>>/64 -0.0000 +0.0183 6400348 6400261 6145171 6257342
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<2>, NumHighPrioTasks<4>>/128 +0.0000 +0.0194 12800545 12800759 12279474 12517804
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<2>, NumHighPrioTasks<4>>/256 +0.0001 +0.0111 25601568 25602976 24636179 24909821
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<3>, NumHighPrioTasks<4>>/64 -0.0000 +0.0545 6400600 6400444 5795288 6111077
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<3>, NumHighPrioTasks<4>>/128 +0.0001 +0.0474 12800507 12801355 11566729 12114860
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<3>, NumHighPrioTasks<4>>/256 +0.0000 +0.0423 25601503 25601760 23281967 24267276
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<5>, NumHighPrioTasks<4>>/32 +0.0005 +0.2842 3201968 3203421 2175379 2793615
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<5>, NumHighPrioTasks<4>>/64 -0.0003 +0.3807 6402555 6400496 4052465 5595309
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<5>, NumHighPrioTasks<4>>/128 -0.0003 +0.3827 12804155 12800925 8114370 11219400
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<7>, NumHighPrioTasks<4>>/8 +0.0262 +0.1272 821954 843475 503297 567320
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<7>, NumHighPrioTasks<4>>/16 +0.0298 +0.3134 1634476 1683172 901978 1184619
BM_N_atomics_N_waiter_N_notifier<NotifyEveryNus<100>, NumberOfAtomics<7>, NumHighPrioTasks<4>>/32 +0.0147 +0.2925 3244262 3291994 1721000 2224350
OVERALL_GEOMEAN +0.0185 -0.1876 0 0 0 0
```
---------
Co-authored-by: Hui Xie <huixie at Huis-MacBook-Pro.local>
Co-authored-by: Hui Xie <huixie at Mac.broadband>
Commit: fcedf98d7c2f5131e8f0be2c3809900323b130f0
https://github.com/llvm/llvm-project/commit/fcedf98d7c2f5131e8f0be2c3809900323b130f0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/combine-ptest.ll
Log Message:
-----------
[X86] Add test coverage for #123456
Commit: 55f7491ddec7e65f6dfc50dcb8f6529719d7a057
https://github.com/llvm/llvm-project/commit/55f7491ddec7e65f6dfc50dcb8f6529719d7a057
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
Log Message:
-----------
[SLP][NFC]Add a test with incomplete insertion mask, NFC
Commit: 2a4c4b554b23f2a7180502c1a635d8aae4dca027
https://github.com/llvm/llvm-project/commit/2a4c4b554b23f2a7180502c1a635d8aae4dca027
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.h
Log Message:
-----------
[TableGen] Use const getter to implement non-const getter instead of the other way around. NFC (#123452)
It's better to cast away constness on the reference being returned than
to cast away constness on the this pointer.
Commit: 9f7c85f46aaa97fae381ac756a64788e0de9138d
https://github.com/llvm/llvm-project/commit/9f7c85f46aaa97fae381ac756a64788e0de9138d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/test/CodeGen/LoongArch/smul-with-overflow.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/X86/smul-with-overflow.ll
M llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
Log Message:
-----------
[LegalizeIntegerTypes] Use forceExpandWideMUL in ExpandIntRes_XMULO. (#123432)
This generates basically the same code with the operands commuted, but
gets there with less legalization steps.
Commit: bc386a82686d5f40f9f7325cc41aadc43f09cc79
https://github.com/llvm/llvm-project/commit/bc386a82686d5f40f9f7325cc41aadc43f09cc79
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[TableGen] Replace some uses of make_range with methods that already return a range. NFC (#123453)
Commit: 0a33532500a90668f5cfe485134e9c9c388d3614
https://github.com/llvm/llvm-project/commit/0a33532500a90668f5cfe485134e9c9c388d3614
Author: goldsteinn <35538541+goldsteinn at users.noreply.github.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[PatternMatch] Add `m_c_XorLike` matcher; NFC (#122642)
`m_c_XorLike` matches either:
`(xor L, R)`, `(xor R, L)`, or `(sub nuw R, L)` iff `R.isMask()`.
This is in preperation for dropping the fold from:
`(sub C_Mask, X)` -> `(xor X, C_Mask)`
Commit: 02a56c4d01c1621846d7342982d62468e45cede0
https://github.com/llvm/llvm-project/commit/02a56c4d01c1621846d7342982d62468e45cede0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M clang/include/clang/AST/DeclTemplate.h
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#123444)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect ValueOrInherited to be nonnull. Note that isSet
checks to see if ValueOrInherited is nonnull.
Commit: 80e0cbafba56d428571f4e05e5dfe305b85b809a
https://github.com/llvm/llvm-project/commit/80e0cbafba56d428571f4e05e5dfe305b85b809a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Program.cpp
Log Message:
-----------
[ByteCode] Migrate away from PointerUnion::dyn_cast (NFC) (#123445)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect D to be nonnull.
Commit: fa9fb2ae94b58828ece7e78140ab8e1047adf0bb
https://github.com/llvm/llvm-project/commit/fa9fb2ae94b58828ece7e78140ab8e1047adf0bb
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#123447)
Commit: 3f1be86a1acd5286bac16cae833481ee3f80dcbb
https://github.com/llvm/llvm-project/commit/3f1be86a1acd5286bac16cae833481ee3f80dcbb
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Object/GOFFObjectFile.cpp
Log Message:
-----------
[Object] Avoid repeated hash lookups (NFC) (#123448)
Commit: a5fb2bbb2ad8488482843e2298fbe6f6a1d45bbd
https://github.com/llvm/llvm-project/commit/a5fb2bbb2ad8488482843e2298fbe6f6a1d45bbd
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/test/CodeGenCXX/debug-info-object-pointer.cpp
M llvm/bindings/ocaml/debuginfo/debuginfo_ocaml.c
M llvm/bindings/ocaml/debuginfo/llvm_debuginfo.ml
M llvm/bindings/ocaml/debuginfo/llvm_debuginfo.mli
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
Log Message:
-----------
Reapply "[clang][DebugInfo] Emit DW_AT_object_pointer on function declarations with explicit `this`" (#123455)
This reverts commit c3a935e3f967f8f22f5db240d145459ee621c1e0.
The only change to the reverted commit is that this also updates
the OCaml bindings according to the C debug-info API changes.
The build failure originally introduced was:
```
FAILED: bindings/ocaml/debuginfo/debuginfo_ocaml.o /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bindings/ocaml/debuginfo/debuginfo_ocaml.o
cd /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bindings/ocaml/debuginfo && /usr/bin/ocamlfind ocamlc -c /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bindings/ocaml/debuginfo/debuginfo_ocaml.c -ccopt "-I/b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/bindings/ocaml/debuginfo/../llvm -D_GNU_SOURCE -D_DEBUG -D_GLIBCXX_ASSERTIONS -DEXPENSIVE_CHECKS -D_GLIBCXX_DEBUG -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/b/1/llvm-clang-x86_64-expensive-checks-debian/build/include -I/b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/include -DNDEBUG "
/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bindings/ocaml/debuginfo/debuginfo_ocaml.c: In function ‘llvm_dibuild_create_object_pointer_type’:
/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bindings/ocaml/debuginfo/debuginfo_ocaml.c:620:30: error: too few arguments to function ‘LLVMDIBuilderCreateObjectPointerType’
620 | LLVMMetadataRef Metadata = LLVMDIBuilderCreateObjectPointerType(
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bindings/ocaml/debuginfo/debuginfo_ocaml.c:23:
/b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/include/llvm-c/DebugInfo.h:880:17: note: declared here
880 | LLVMMetadataRef LLVMDIBuilderCreateObjectPointerType(LLVMDIBuilderRef Builder,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
Commit: 12f78e740c5419f7d1fbcf8f2106e7a40cd1d6f7
https://github.com/llvm/llvm-project/commit/12f78e740c5419f7d1fbcf8f2106e7a40cd1d6f7
Author: Sirraide <aeternalmail at gmail.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M clang/test/ARCMT/autoreleases.m
M clang/test/ARCMT/autoreleases.m.result
M clang/test/ARCMT/retains.m
M clang/test/ARCMT/retains.m.result
M clang/test/AST/ast-dump-cxx2b-deducing-this.cpp
M clang/test/AST/ast-dump-special-member-functions.cpp
M clang/test/Analysis/Inputs/expected-plists/plist-output.m.plist
M clang/test/Analysis/const-method-call.cpp
M clang/test/Analysis/inline-unique-reports.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/nil-receiver-undefined-larger-than-voidptr-ret.m
M clang/test/Analysis/novoidtypecrash.c
M clang/test/Analysis/plist-output.m
M clang/test/Analysis/plist-stats-output.c
M clang/test/Analysis/scopes-cfg-output.cpp
M clang/test/Analysis/structured_bindings.cpp
M clang/test/CXX/drs/cwg605.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/p5.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/p7.cpp
M clang/test/CodeGen/2003-06-26-CFECrash.c
M clang/test/CodeGen/2003-08-18-SigSetJmp.c
M clang/test/CodeGen/2003-08-23-LocalUnionTest.c
M clang/test/CodeGen/2003-10-29-AsmRename.c
M clang/test/CodeGen/2003-11-20-ComplexDivision.c
M clang/test/CodeGen/2004-06-18-VariableLengthArrayOfStructures.c
M clang/test/CodeGen/2004-11-27-StaticFunctionRedeclare.c
M clang/test/CodeGen/2005-01-02-VAArgError-ICE.c
M clang/test/CodeGen/2005-06-15-ExpandGotoInternalProblem.c
M clang/test/CodeGen/2007-01-06-KNR-Proto.c
M clang/test/CodeGen/2008-05-06-CFECrash.c
M clang/test/CodeGen/2008-07-30-redef-of-bitcasted-decl.c
M clang/test/CodeGen/2008-10-13-FrontendCrash.c
M clang/test/CodeGen/2009-01-21-InvalidIterator.c
M clang/test/CodeGen/2009-05-04-EnumInreg.c
M clang/test/CodeGen/2009-07-15-pad-wchar_t-array.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-05.c
M clang/test/CodeGen/X86/avx512fp16-abi.c
M clang/test/CodeGen/X86/x86_64-atomic-128.c
M clang/test/CodeGen/align-local.c
M clang/test/CodeGen/arm-cmse-nonsecure.c
M clang/test/CodeGen/arm-cmse-secure.c
M clang/test/CodeGen/attr-noinline.cpp
M clang/test/CodeGen/attr-noreturn.c
M clang/test/CodeGen/block-copy.c
M clang/test/CodeGen/builtin-memfns.c
M clang/test/CodeGen/catch-undef-behavior.c
M clang/test/CodeGen/cfi-unrelated-cast.cpp
M clang/test/CodeGen/const-label-addr.c
M clang/test/CodeGen/debug-info-crash.c
M clang/test/CodeGen/debug-info.c
M clang/test/CodeGen/empty-union-init.c
M clang/test/CodeGen/exceptions-seh.c
M clang/test/CodeGen/exprs.c
M clang/test/CodeGen/ext-int-cc.c
M clang/test/CodeGen/implicit-arg.c
M clang/test/CodeGen/msan-param-retval.c
M clang/test/CodeGen/msan-param-retval.cpp
M clang/test/CodeGen/object-size.c
M clang/test/CodeGen/sparcv8-abi.c
M clang/test/CodeGen/sret.c
M clang/test/CodeGen/static-order.c
M clang/test/CodeGen/staticinit.c
M clang/test/CodeGen/struct.c
M clang/test/CodeGen/ubsan-debuglog-return.c
M clang/test/CodeGen/union.c
M clang/test/CodeGen/ve-abi.c
M clang/test/CodeGenCXX/2007-01-06-PtrMethodInit.cpp
M clang/test/CodeGenCXX/2007-09-10-RecursiveTypeResolution.cpp
M clang/test/CodeGenCXX/2007-10-01-StructResize.cpp
M clang/test/CodeGenCXX/2009-08-11-VectorRetTy.cpp
M clang/test/CodeGenCXX/2010-07-23-DeclLoc.cpp
M clang/test/CodeGenCXX/address-space-cast-coerce.cpp
M clang/test/CodeGenCXX/array-value-initialize.cpp
M clang/test/CodeGenCXX/attr.cpp
M clang/test/CodeGenCXX/c-linkage.cpp
M clang/test/CodeGenCXX/catch-undef-behavior.cpp
M clang/test/CodeGenCXX/conditional-gnu-ext.cpp
M clang/test/CodeGenCXX/cxx1y-variable-template-linkage.cpp
M clang/test/CodeGenCXX/debug-info-cxx0x.cpp
M clang/test/CodeGenCXX/debug-info-scoped-class.cpp
M clang/test/CodeGenCXX/debug-lambda-this.cpp
M clang/test/CodeGenCXX/expr.cpp
M clang/test/CodeGenCXX/lambda-expressions-nested-linkage.cpp
M clang/test/CodeGenCXX/mangle-exprs.cpp
M clang/test/CodeGenCXX/mangle-variadic-templates.cpp
M clang/test/CodeGenCXX/mangle.cpp
M clang/test/CodeGenCXX/matrix-type-operators.cpp
M clang/test/CodeGenCXX/matrix-type.cpp
M clang/test/CodeGenCXX/microsoft-abi-static-initializers.cpp
M clang/test/CodeGenCXX/new-alias.cpp
M clang/test/CodeGenCXX/nrvo.cpp
M clang/test/CodeGenCXX/reference-field.cpp
M clang/test/CodeGenCXX/return.cpp
M clang/test/CodeGenCXX/template-instantiation.cpp
M clang/test/CodeGenCXX/trap-fnattr.cpp
M clang/test/CodeGenCXX/ubsan-check-debuglocs.cpp
M clang/test/CodeGenObjC/2007-10-18-ProDescriptor.m
M clang/test/CodeGenObjC/2008-11-25-Blocks.m
M clang/test/CodeGenObjC/debug-info-crash.m
M clang/test/CodeGenObjC/encode-test.m
M clang/test/CodeGenObjC/message-arrays.m
M clang/test/CodeGenObjC/metadata-symbols-32.m
M clang/test/CodeGenObjC/metadata-symbols-64.m
M clang/test/CodeGenObjC/objc2-weak-compare.m
M clang/test/CodeGenObjC/objc2-write-barrier-2.m
M clang/test/CodeGenObjC/protocols-lazy.m
M clang/test/CodeGenObjC/strong-in-c-struct.m
M clang/test/CodeGenObjCXX/debug-info-line.mm
M clang/test/CodeGenObjCXX/instantiate-return.mm
M clang/test/CodeGenObjCXX/pr14474-gline-tables-only.mm
M clang/test/CodeGenObjCXX/property-dot-reference.mm
M clang/test/CodeGenObjCXX/return.mm
M clang/test/CoverageMapping/switch.cpp
M clang/test/Driver/cc-log-diagnostics.c
M clang/test/FixIt/fixit-availability-maccatalyst.m
M clang/test/FixIt/fixit-c++11.cpp
M clang/test/Frontend/absolute-paths.c
M clang/test/Frontend/ast-codegen.c
M clang/test/Frontend/ast-main.cpp
M clang/test/Misc/serialized-diags-stable.c
M clang/test/Modules/pr61067.cppm
M clang/test/Modules/redecl-merge.m
M clang/test/PCH/irgen-rdar13114142.mm
M clang/test/PCH/late-parsed-instantiations.cpp
M clang/test/PCH/pr4489.c
M clang/test/PCH/va_arg.c
M clang/test/PCH/va_arg.h
M clang/test/Parser/promote_types_in_proto.c
M clang/test/Rewriter/rewrite-extern-c.mm
M clang/test/Sema/freemain.c
M clang/test/Sema/return-type-mismatch.c
M clang/test/SemaCXX/attr-noreturn.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/constexpr-return-non-void-cxx2b.cpp
A clang/test/SemaCXX/err-missing-noreturn-1.cpp
A clang/test/SemaCXX/err-missing-noreturn-2.cpp
M clang/test/SemaCXX/return-noreturn.cpp
M clang/test/SemaCXX/warn-missing-noreturn.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-add-assign.cpp
M clang/test/SemaObjC/return-noreturn.m
M clang/test/SemaObjC/try-catch.m
M clang/test/SemaTemplate/late-parsing-eager-instantiation.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M clang/unittests/Tooling/ASTSelectionTest.cpp
M clang/unittests/Tooling/LexicallyOrderedRecursiveASTVisitorTest.cpp
M clang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Log Message:
-----------
[Clang] [NFC] Fix unintended `-Wreturn-type` warnings everywhere in the test suite (#123464)
In preparation of making `-Wreturn-type` default to an error (as there
is virtually no situation where you’d *want* to fall off the end of a
function that is supposed to return a value), this patch fixes tests
that have relied on this being only a warning, of which there seem
to be 3 kinds:
1. Tests which for no apparent reason have a function that triggers the
warning.
I suspect that a lot of these were on accident (or from before the
warning was introduced), since a lot of people will open issues w/ their
problematic code in the `main` function (which is the one case where you
don’t need to return from a non-void function, after all...), which
someone will then copy, possibly into a namespace, possibly renaming it,
the end result of that being that you end up w/ something that
definitely is not `main` anymore, but which still is declared as
returning `int`, and which still has no return statement (another reason
why I think this might apply to a lot of these is because usually the
actual return type of such problematic functions is quite literally
`int`).
A lot of these are really old tests that don’t use `-verify`, which is
why no-one noticed or had to care about the extra warning that was
already being emitted by them until now.
2. Tests which test either `-Wreturn-type`, `[[noreturn]]`, or what
codegen and sanitisers do whenever you do fall off the end of a
function.
3. Tests where I struggle to figure out what is even being tested
(usually because they’re Objective-C tests, and I don’t know
Objective-C), whether falling off the end of a function matters in the
first place, and tests where actually spelling out an expression to
return would be rather cumbersome (e.g. matrix types currently don’t
support list initialisation, so I can’t write e.g. `return {}`).
For tests that fall into categories 2 and 3, I just added
`-Wno-error=return-type` to the `RUN` lines and called it a day. This
was especially necessary for the former since `-Wreturn-type` is an
analysis-based warning, meaning that it is currently impossible to test
for more than one occurrence of it in the same compilation if it
defaults to an error since the analysis pass is skipped for subsequent
functions as soon as an error is emitted.
I’ve also added `-Werror=return-type` to a few tests that I had already
updated as this patch was previously already making the warning an error
by default, but we’ve decided to split that into two patches instead.
Commit: 8e85b77f6a73477ab094acf0dccce61590a29222
https://github.com/llvm/llvm-project/commit/8e85b77f6a73477ab094acf0dccce61590a29222
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Analysis/InlineCost.cpp
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#123446)
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 92a6eff62badaf20095848e1777840bc3ffc2022
https://github.com/llvm/llvm-project/commit/92a6eff62badaf20095848e1777840bc3ffc2022
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
Log Message:
-----------
[SLP][NFC]Fix the test to use poison and update to show the error
Commit: 2b1e037adb274c515b6ebe7808cc7da6a5b9c3b3
https://github.com/llvm/llvm-project/commit/2b1e037adb274c515b6ebe7808cc7da6a5b9c3b3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
Log Message:
-----------
[SLP]Fix createInsertVector mask emission
Commit: 4233a15c9f8e6f77a00a5770a35b70ab8a2705c6
https://github.com/llvm/llvm-project/commit/4233a15c9f8e6f77a00a5770a35b70ab8a2705c6
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Transforms/FunctionAttrs/initializes.ll
Log Message:
-----------
[FunctionAttrs] Handle zero writes in initializes inference.
ConstantRange's constructor asserts that the range not empty, except if
lower/upper are min or max values.
Check if the length is strictly positive instead of just non-negative so
std::nullopt is returned when the size is 0. If that's the case, the
access doesn't initialize anything.
This should fix a crash when building on macOS with ASan & UBsan after
https://github.com/llvm/llvm-project/pull/97373 /
https://github.com/llvm/llvm-project/pull/117104 landed:
https://green.lab.llvm.org/job/llvm.org/job/clang-stage2-cmake-RgSan/664/console
Commit: bb59eb8ed534da2bd03117cfde594321add4d60c
https://github.com/llvm/llvm-project/commit/bb59eb8ed534da2bd03117cfde594321add4d60c
Author: Jacob Young <jacobly.alt at gmail.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/add.ll
A llvm/test/Transforms/InstCombine/icmp-srem.ll
Log Message:
-----------
[InstCombine] fold unsigned predicates on srem result (#122520)
This allows optimization of more signed floor implementations when the
divisor is a known power of two to an arithmetic shift.
Proof for the implemented optimizations:
https://alive2.llvm.org/ce/z/j6C-Nz
Proof for the test cases:
https://alive2.llvm.org/ce/z/M_PBjw
---------
Co-authored-by: Jacob Young <jacobly0 at users.noreply.github.com>
Commit: eae5ca9b45bf1232f30d92ce50c19c1ea82c0f0b
https://github.com/llvm/llvm-project/commit/eae5ca9b45bf1232f30d92ce50c19c1ea82c0f0b
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
M mlir/test/Dialect/Vector/ops.mlir
Log Message:
-----------
[mlir][Vector] Support poison in `vector.shuffle` mask (#122188)
This PR extends the existing poison support in
https://mlir.llvm.org/docs/Dialects/UBOps/ by representing poison mask
values in `vector.shuffle`. Similar to LLVM (see
https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/IR/Instructions.h#L1884)
this requires defining an integer value (`-1`) to represent poison in
the `vector.shuffle` mask.
Commit: 106c483a102e1328f11e2b1d9398f4ad2826b59f
https://github.com/llvm/llvm-project/commit/106c483a102e1328f11e2b1d9398f4ad2826b59f
Author: Sirraide <aeternalmail at gmail.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Improve brace wrapping and add an option to control indentation of `export { ... }` (#110381)
`export { ... }` blocks can get a bit long, so I thought it would make
sense to have an option that makes it so their contents are not indented
(basically the same argument as for namespaces).
This is based on the `NamespaceIndentation` option, except that there is
no option to control the behaviour of `export` blocks when nested because
nesting them doesn’t really make sense.
Additionally, brace wrapping of short `export { ... }` blocks is now controlled by the
`AllowShortBlocksOnASingleLine` option. There is no separate option just for `export`
blocks because you can just write e.g. `export int x;` instead of `export { int x; }`.
This closes #121723.
Commit: 30e517c0c70be42686ec10c2960813302f2a9654
https://github.com/llvm/llvm-project/commit/30e517c0c70be42686ec10c2960813302f2a9654
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/offset_range.pass.cpp
Log Message:
-----------
[libcxx][test] Fix a test for the range of file offsets on ARMv7 Linux targets. (#123449)
Mark the `offset_range` test as UNSUPPORTED for the
`armv7-unknown-linux-gnueabihf` target (32-bit).
Ref PR #122798
Commit: 6789442eb2e1ed92b2157e96e9e9eafed5c53f17
https://github.com/llvm/llvm-project/commit/6789442eb2e1ed92b2157e96e9e9eafed5c53f17
Author: ssijaric-nv <ssijaric at nvidia.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
A llvm/test/CodeGen/AArch64/aarch64-large-stack-spbump.mir
Log Message:
-----------
[AArch64] Fix a corner case with large stack allocation (#122038)
In the unlikely case where the stack size is greater than 4GB, we may run into
the situation where the local stack size and the callee saved registers stack
size get combined incorrectly when restoring the callee saved registers. This
happens because the stack size in shouldCombineCSRLocalStackBumpInEpilogue
is represented as an 'unsigned', but is passed in as an 'int64_t'. We end up with
something like
$fp, $lr = frame-destroy LDPXi $sp, 536870912
This change just makes 'shouldCombineCSRLocalStackBumpInEpilogue' match
'shouldCombineCSRLocalStackBump' where 'StackBumpBytes' is an 'uint64_t'
Commit: 24ab0125ba86ea49bb046eb434c1b3861b2d3dd2
https://github.com/llvm/llvm-project/commit/24ab0125ba86ea49bb046eb434c1b3861b2d3dd2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/Register.h
Log Message:
-----------
[CodeGen] Rewrite assert in Register::asMCReg() using member functions. NFC
Commit: 0e4a10dff8eac9ac38d7dbed0c0d32d4a68a5a69
https://github.com/llvm/llvm-project/commit/0e4a10dff8eac9ac38d7dbed0c0d32d4a68a5a69
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/include/llvm/MC/MCRegister.h
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[MC] Add MCRegister::isPhysical. NFC
Commit: f811482a744454c442456dd4275929b1eb1871b6
https://github.com/llvm/llvm-project/commit/f811482a744454c442456dd4275929b1eb1871b6
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
[AMDGPU] SIWholeQuadMode: Ensure earliest WQM entry point for PS (#123266)
Ensure shaders running WQM (PS) enter at the earliest point irrespective
of WQM marking.
Commit: f8b27949a8c4fa8d8e15f9858e2ed38d7267f7dd
https://github.com/llvm/llvm-project/commit/f8b27949a8c4fa8d8e15f9858e2ed38d7267f7dd
Author: Aviad Cohen <aviadcohen7 at gmail.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M mlir/lib/Dialect/SCF/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/test/Dialect/SCF/value-bounds-op-interface-impl.mlir
Log Message:
-----------
[mlir][scf]: Add value bound between scf for loop yield and result (#123200)
We can prove that:
%result == %init_arg + trip_count * (%yielded_value - %iter_arg). Where
trip_count is (ub - lb) / step.
Commit: 0a44d3a57f03e8263f1509eb397201c9e07b21aa
https://github.com/llvm/llvm-project/commit/0a44d3a57f03e8263f1509eb397201c9e07b21aa
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/VirtRegMap.h
M llvm/lib/CodeGen/VirtRegMap.cpp
Log Message:
-----------
[CodeGen] Use MCRegister instead of MCPhysReg in VirtRegMap. NFC
The callers of these methods already use MCRegister.
Commit: 81357627deba3411d4dfd2c819639195cdf80770
https://github.com/llvm/llvm-project/commit/81357627deba3411d4dfd2c819639195cdf80770
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
Volunteer for loop interchange transform (#120824)
After our talk on LoopVectorization, we are looking at various loop
transformations. I would like to volunteer myself for LoopInterchange
transform.
Commit: 4a486e773e0ef1add4515ee47b038c274ced2e76
https://github.com/llvm/llvm-project/commit/4a486e773e0ef1add4515ee47b038c274ced2e76
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-18 (Sat, 18 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/X86/X86ArgumentStackSlotRebase.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
Log Message:
-----------
[CodeGen] Use Register/MCRegister::isPhysical. NFC
Commit: 7a7d12bba9557aca1e1c5251ac5815bb911bd5ca
https://github.com/llvm/llvm-project/commit/7a7d12bba9557aca1e1c5251ac5815bb911bd5ca
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[Github] Bump max ccache size for premerge
This patch bumps the max ccache size for premerge jobs to 2GB. Doing a manual
invocation against changes in LLVM produces about 1GB of cache. The default
is 500MB, which we feel might be contributing to the very poor cache
utilization.
Commit: 0cb2fe5183c9b25bb96140c27d12b1ad4a80aa92
https://github.com/llvm/llvm-project/commit/0cb2fe5183c9b25bb96140c27d12b1ad4a80aa92
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang] Deprecate __is_referenceable (#123185)
`__is_referenceable` is almost unused in the wild, and the few cases I
was able to find had checks around them. Since The places in the
standard library where `__is_referenceable` is used have bespoke
builtins, it doesn't make a ton of sense to keep this builtin around.
See #123078
Commit: b5df0e71082fc9b11a9ecf85599a453d21f1025a
https://github.com/llvm/llvm-project/commit/b5df0e71082fc9b11a9ecf85599a453d21f1025a
Author: klensy <klensy at users.noreply.github.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Log Message:
-----------
[SelectionDAG] late init DeferredNodes (#123461)
No need to init `SmallVector` (even stack allocated) if we can exit
literally on next line.
Co-authored-by: klensy <nightouser at gmail.com>
Commit: 6adeda8f5505592d68676cce336c07a9dc651b26
https://github.com/llvm/llvm-project/commit/6adeda8f5505592d68676cce336c07a9dc651b26
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-ptest.ll
Log Message:
-----------
[X86] combinePTESTCC - fold PTESTC(PCMPEQ(X,0),-1) == PTESTZ(X,X) (#123466)
Simplifies the hidden "all_of(X == 0)" pattern
Fixes #123456
Commit: 0d39fe6f5bb3edf0bddec09a8c6417377390aeac
https://github.com/llvm/llvm-project/commit/0d39fe6f5bb3edf0bddec09a8c6417377390aeac
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Handle VPDerivedIV and more VPInsts in isUniformAfterVector.
In preparation for re-landing
https://github.com/llvm/llvm-project/pull/112147, also consider
VPDerivedIVRecipe and VPInstructions with binary opcodes and PtrAdd with
all uniform operands as uniform themselves.
Effectively NFC, but will be exercised once #112147 re-lands.
Commit: ddfd89ae442618e86d30a260a854f89512b58167
https://github.com/llvm/llvm-project/commit/ddfd89ae442618e86d30a260a854f89512b58167
Author: A. Jiang <de34 at live.cn>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M libcxx/docs/Status/Cxx20Papers.csv
Log Message:
-----------
[libc++][Docs] Mark P1353R0 as complete (#123020)
Library feature-test macros added by P1353R0 are already implemented.
- `__cpp_lib_destroying_delete` was added by
ae02e8944807c7b611ca3645a983c62d464f27a4
(https://reviews.llvm.org/D55840) in LLVM 9.
- `__cpp_lib_three_way_comparison` was added by #91515 in LLVM 19.
Commit: 0ab1f5772cbe6855d55bade566d885b7504c32ee
https://github.com/llvm/llvm-project/commit/0ab1f5772cbe6855d55bade566d885b7504c32ee
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/cxx17.cpp
Log Message:
-----------
[clang][bytecode] Register decomposition holding vars (#123515)
Commit: 293dbea8b0169525d93a4ee4b7d6c53aa9d4bee0
https://github.com/llvm/llvm-project/commit/293dbea8b0169525d93a4ee4b7d6c53aa9d4bee0
Author: DeNiCoN <denicon1234 at gmail.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/Contributing.rst
M clang/docs/ClangTransformerTutorial.rst
M llvm/docs/DeveloperPolicy.rst
M llvm/docs/GitHub.rst
M llvm/docs/MyFirstTypoFix.rst
Log Message:
-----------
Fix some typos (#123506)
Fixes some typos in the documentation
Commit: 471cec3b247645405ae430457f7a016ab57170a8
https://github.com/llvm/llvm-project/commit/471cec3b247645405ae430457f7a016ab57170a8
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
Log Message:
-----------
[Github] Bump Windows Actions Runner to v2.321.0 (#123508)
The current container is on an old version that can no longer recieve
messages from Github, which causes the runner to just be recreated every
couple seconds rather than performing any useful work.
Commit: f7ebb138c298fdf4a972083f3d794fab1e1d83ef
https://github.com/llvm/llvm-project/commit/f7ebb138c298fdf4a972083f3d794fab1e1d83ef
Author: David Green <david.green at arm.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
A llvm/test/CodeGen/AArch64/fsh.ll
Log Message:
-----------
[AArch64] Add more funnel shift test coverage. NFC
Commit: f13850a92c13d41ee377b8ebb2c226895fddbb57
https://github.com/llvm/llvm-project/commit/f13850a92c13d41ee377b8ebb2c226895fddbb57
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M clang/lib/AST/Decl.cpp
Log Message:
-----------
[AST] Migrate away from PointerUnion::dyn_cast (NFC) (#123499)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
because we expect Init to be nonnull. Note that hasInit returns true
only if Init is nonnull among other conditions.
Commit: 3d15bfb40c14233a479439eb98f0318d1795b02a
https://github.com/llvm/llvm-project/commit/3d15bfb40c14233a479439eb98f0318d1795b02a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#123500)
Commit: 6a5a795c2b3623786129a2551627fcd5b44f9f9a
https://github.com/llvm/llvm-project/commit/6a5a795c2b3623786129a2551627fcd5b44f9f9a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/MaterializationUtils.cpp
Log Message:
-----------
[Coroutines] Avoid repeated hash looksup (NFC) (#123501)
Commit: 24892b868199ce67bcab60d91a58e13beba6a258
https://github.com/llvm/llvm-project/commit/24892b868199ce67bcab60d91a58e13beba6a258
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M llvm/lib/MC/ELFObjectWriter.cpp
Log Message:
-----------
[MC] Avoid repeated hash lookups (NFC) (#123502)
Commit: 2a4c484739b313431b41e5094cfcd021284bbece
https://github.com/llvm/llvm-project/commit/2a4c484739b313431b41e5094cfcd021284bbece
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M llvm/lib/Support/VirtualFileSystem.cpp
Log Message:
-----------
[Support] Avoid repeated hash lookups (NFC) (#123503)
Commit: 8d90473c3e8f25d7bf1f27275c2354161e47cb0c
https://github.com/llvm/llvm-project/commit/8d90473c3e8f25d7bf1f27275c2354161e47cb0c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-outside-iv-users.ll
Log Message:
-----------
[LV] Add tests with outisde IV users where vector region can e removed.
Tests for crash caused by initial version of
https://github.com/llvm/llvm-project/pull/112147.
Commit: 2c87133c6212d4bd02b5e64adbb51f4e66bc2351
https://github.com/llvm/llvm-project/commit/2c87133c6212d4bd02b5e64adbb51f4e66bc2351
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
Log Message:
-----------
Reapply "[VPlan] Update final IV exit value via VPlan. (#112147)"
This reverts the revert commit 58326f1d5b5b379590af92dd129b2f3b3e96af46.
The build failure in sanitizer stage2 builds has been fixed with
0d39fe6f5bb3edf0bddec09a8c6417377390aeac.
Original commit message:
Model updating IV users directly in VPlan, replace fixupIVUsers.
Now simple extracts are created for all phis in the exit block during
initial VPlan construction. A later VPlan transform
(optimizeInductionExitUsers) replaces extracts of inductions with
their pre-computed values if possible.
This completes the transition towards modeling all live-outs directly in
VPlan.
There are a few follow-ups:
* emit extracts initially also for resume phis, and optimize them
tougher with IV exit users
* support for VPlans with multiple exits in optimizeInductionExitUsers.
Depends on https://github.com/llvm/llvm-project/pull/110004,
https://github.com/llvm/llvm-project/pull/109975 and
https://github.com/llvm/llvm-project/pull/112145.
Commit: 04034f0549d4313c556c857f1e60e70ce87d8076
https://github.com/llvm/llvm-project/commit/04034f0549d4313c556c857f1e60e70ce87d8076
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
[flang] [unittests] Link to libMLIR in optimizer tests (#123476)
Handle the one unittest executable that I've missed in #120966.
Commit: 69d3ba3db922fca8cfc47b5f115b6bea6a737aab
https://github.com/llvm/llvm-project/commit/69d3ba3db922fca8cfc47b5f115b6bea6a737aab
Author: Théo Degioanni <theo.degioanni.llvm.deluge062 at simplelogin.fr>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/IRDL/IR/IRDLOps.td
M mlir/lib/Dialect/IRDL/IR/IRDL.cpp
M mlir/test/CAPI/irdl.c
M mlir/test/Dialect/IRDL/cmath.irdl.mlir
M mlir/test/Dialect/IRDL/cpred.irdl.mlir
M mlir/test/Dialect/IRDL/cyclic-types.irdl.mlir
M mlir/test/Dialect/IRDL/invalid.irdl.mlir
M mlir/test/Dialect/IRDL/regions-ops.irdl.mlir
M mlir/test/Dialect/IRDL/test-type.irdl.mlir
M mlir/test/Dialect/IRDL/testd.irdl.mlir
M mlir/test/Dialect/IRDL/variadics-error.irdl.mlir
M mlir/test/Dialect/IRDL/variadics.irdl.mlir
M mlir/test/Dialect/Transform/irdl.mlir
M mlir/test/tblgen-to-irdl/CMathDialect.td
M mlir/test/tblgen-to-irdl/TestDialect.td
M mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir][irdl] Introduce names in IRDL value lists (#123525)
In order to meaningfully generate getters and setters from IRDL, it
makes sense to embed the names of operands, results, etc. in the IR
definition. This PR introduces this feature. Names are constrained
similarly to TableGen names.
Commit: b7eee2c3fe953df5f5aa1f543759d9a1e54d5ef7
https://github.com/llvm/llvm-project/commit/b7eee2c3fe953df5f5aa1f543759d9a1e54d5ef7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/include/llvm/CodeGen/LivePhysRegs.h
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/CallingConvLower.cpp
M llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
M llvm/lib/CodeGen/ExecutionDomainFix.cpp
M llvm/lib/CodeGen/InterferenceCache.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RDFLiveness.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegUsageInfoCollector.cpp
M llvm/lib/CodeGen/RegisterClassInfo.cpp
Log Message:
-----------
[CodeGen] Remove some implict conversions of MCRegister to unsigned by using(). NFC
Many of these are indexing BitVectors or something where we can't
using MCRegister and need the register number.
Commit: c46df8538034d706d4e5927314950f2a1b79e771
https://github.com/llvm/llvm-project/commit/c46df8538034d706d4e5927314950f2a1b79e771
Author: Michal Paszkowski <michal at michalpaszkowski.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M .github/workflows/spirv-tests.yml
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[SPIR-V] Add SPIRV to LLVM_ALL_TARGETS (#119653)
This commit promotes the SPIR-V backend from experimental to official
status. As a result, SPIR-V will be built by default, simplifying
integration and increasing accessibility for downstream projects.
Discussion and RFC on Discourse:
https://discourse.llvm.org/t/rfc-promoting-spir-v-to-an-official-target/83614
Commit: de586937648d360d8c4741cd34f633ea92316874
https://github.com/llvm/llvm-project/commit/de586937648d360d8c4741cd34f633ea92316874
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Log Message:
-----------
[ORC][MachO] Add a TODO comment.
Commit: 630139460ea7fe8c4b6e6ea2973830117a8048ee
https://github.com/llvm/llvm-project/commit/630139460ea7fe8c4b6e6ea2973830117a8048ee
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.cpp
Log Message:
-----------
[ORC] Use BinaryFormat to convert Triple to MachO cputype / cpusubtype values.
Commit: 5af79053023b58e1f7bf173d6cc91a654554a267
https://github.com/llvm/llvm-project/commit/5af79053023b58e1f7bf173d6cc91a654554a267
Author: Michal Paszkowski <michal at michalpaszkowski.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M .github/workflows/spirv-tests.yml
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Revert "[SPIR-V] Add SPIRV to LLVM_ALL_TARGETS" (#123532)
Reverts llvm/llvm-project#119653
Commit: dd42651295d0e1566b34104b007ad19865c57fcc
https://github.com/llvm/llvm-project/commit/dd42651295d0e1566b34104b007ad19865c57fcc
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Debugging/CMakeLists.txt
Log Message:
-----------
[ORC] Add BinaryFormat dependence to the LLVMOrcDebugging library.
This is needed as of 630139460ea7 for MachO::getCPUType and
MachO::getCPUSubType.
Commit: 814b34f31e163e76b816194004689985f5b9fd7b
https://github.com/llvm/llvm-project/commit/814b34f31e163e76b816194004689985f5b9fd7b
Author: Patryk Wychowaniec <pwychowaniec at pm.me>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/test/CodeGen/AVR/branch-relaxation-long-backward.ll
M llvm/test/CodeGen/AVR/branch-relaxation-long-forward.ll
Log Message:
-----------
[AVR] Force relocations for non-encodable jumps (#121498)
This commit changes the branch emission logic so that instead of
throwing the "branch target out of range" error, we emit a relocation
instead.
Commit: 0288d065eecb1208971dc4cdcc71731e34c6fca0
https://github.com/llvm/llvm-project/commit/0288d065eecb1208971dc4cdcc71731e34c6fca0
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/LoongArch/LoongArchMergeBaseOffset.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
A llvm/test/CodeGen/LoongArch/linker-relaxation.ll
A llvm/test/CodeGen/LoongArch/mir-relax-flags.ll
M llvm/test/CodeGen/LoongArch/mir-target-flags.ll
Log Message:
-----------
[LoongArch] Avoid scheduling relaxable code sequence and attach relax relocs (#121330)
If linker relaxation enabled, relaxable code sequence expanded from
pseudos should avoid being separated by instruction scheduling. This
commit tags scheduling boundary for them to avoid being scheduled.
(Except for `tls_le/tls_ie` and `call36/tail36`. Because `tls_le/tls_ie`
can be scheduled and have no influence to relax, `call36/tail36` are
expanded later in `LoongArchExpandPseudo` pass.)
A new mask target-flag is added to attach relax relocs to the relaxable
code sequence. (No need to add it for `tls_le` and `call36/tail36`
because we can simply add relax relocs for them according to their
relocs. But for other code sequence, such as `PCALA_{HI20/LO12}`, we
must use the mask flag, mainly because relax should not be added when
code model is large.)
Because of the new mask target-flag, get "direct" flags is necessary
when using their target-flags. In addition, code sequence after being
optimized by `MergeBaseOffset` pass may not relaxable any more, so the
relax "bitmask" flag should be removed.
Commit: b08b56381cb4c24f37afba793dc872b6d721d9f7
https://github.com/llvm/llvm-project/commit/b08b56381cb4c24f37afba793dc872b6d721d9f7
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M llvm/lib/TargetParser/TargetParser.cpp
Log Message:
-----------
[NFC][AMDGPU] Clean-up feature parsing for AMDGCNSPIRV. (#123519)
When we did the initial AMDGCNSPIRV commits we left the initialisation
of the feature map in a relatively disorderly state. This change
corrects that oversight:
- We make sure that AMDGCNSPIRV actually advertises the union of all
AMDGCN features, as some were not included;
- We keep feature initialisation in sorted order to make it easy to pick
an insertion point when features are added in the future.
Commit: ad599c25d91c668391bfae71d813164c4b412d76
https://github.com/llvm/llvm-project/commit/ad599c25d91c668391bfae71d813164c4b412d76
Author: Alexey Moksyakov <yavtuk at yandex.ru>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][AArch64] Add isPush & isPop (#120713)
This functionality is needed for inliner pass and also for correct dyno
stats.
Needed for [PR](https://github.com/llvm/llvm-project/pull/120187)
Commit: 7bf8190a36e73456d1b79ee6621c0fe10a67baba
https://github.com/llvm/llvm-project/commit/7bf8190a36e73456d1b79ee6621c0fe10a67baba
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/LinkGraphLinkingLayer.cpp
Log Message:
-----------
Fix typo in comment
Commit: 6d12b954a7df11e32acf110950d88bac282079b8
https://github.com/llvm/llvm-project/commit/6d12b954a7df11e32acf110950d88bac282079b8
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/EHFrameRegistrationPlugin.h
M llvm/include/llvm/ExecutionEngine/Orc/LinkGraphLinkingLayer.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/EHFrameRegistrationPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/LinkGraphLinkingLayer.cpp
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[ORC] Move EHFrameRegistrationPlugin into its own header + source file. NFC.
Commit: a0345550974b21be862848cf9933868723b9c765
https://github.com/llvm/llvm-project/commit/a0345550974b21be862848cf9933868723b9c765
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 6d12b954a7df
Commit: 4294fe173e9696a4c090857fa0766cd44c1964dc
https://github.com/llvm/llvm-project/commit/4294fe173e9696a4c090857fa0766cd44c1964dc
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-19 (Sun, 19 Jan 2025)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/test/Driver/freebsd.c
Log Message:
-----------
[Driver][FreeBSD] Remove FreeBSD/loongarch32 support (#122515)
FreeBSD going forward will not have 32-bit arch support.
Also missed a spot with removing riscv32 support.
Commit: cd9ca423b7400000b4e0199450283439fcc1bbd9
https://github.com/llvm/llvm-project/commit/cd9ca423b7400000b4e0199450283439fcc1bbd9
Author: Hyunsung Lee <hlee at octo.ai>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/lib/Transforms/InlinerPass.cpp
Log Message:
-----------
Remove unnecessary return in InlinerPass.cpp (#123507)
`void InlinerPass::runOnOperation()` doesn't need to have `return;` at
the end of the procedure.
Commit: 295d1c361e7b6a0f4dc1294f23fbb4f4f490d091
https://github.com/llvm/llvm-project/commit/295d1c361e7b6a0f4dc1294f23fbb4f4f490d091
Author: Guy David <49722543+guy-david at users.noreply.github.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Processors.td
Log Message:
-----------
[AArch64] apple-m4 & apple-a15 have ADRP+ADD fusion (#123504)
Commit: 84c89d0aa4beff4a4d6c36eda125278c48e41128
https://github.com/llvm/llvm-project/commit/84c89d0aa4beff4a4d6c36eda125278c48e41128
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-fixed-order-recurrence.ll
Log Message:
-----------
[LV][EVL] Address post-commit comments for 9720be9. (NFC) (#123311)
Commit: 3b67383c6cb777e4f37dd1a5af0872843c9ab35a
https://github.com/llvm/llvm-project/commit/3b67383c6cb777e4f37dd1a5af0872843c9ab35a
Author: Hervé Poussineau <hpoussin at reactos.org>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/MC/WinCOFFObjectWriter.cpp
M llvm/test/MC/Mips/coff-relocs.ll
Log Message:
-----------
[MC][Mips] Generate required IMAGE_REL_MIPS_PAIR relocation (#120876)
Add the required IMAGE_REL_MIPS_PAIR relocation after
IMAGE_REL_MIPS_REFHI/IMAGE_REL_MIPS_SECRELHI
Microsoft PE/COFF specification says that the IMAGE_REL_MIPS_REFHI
relocation contains "the high 16 bits of the target's 32-bit virtual
address. [...] This relocation must be immediately followed by a PAIR
relocation whose SymbolTableIndex contains a 16-bit displacement which
is added to the upper 16 bits taken from the location being relocated."
Microsoft PE/COFF specification says that the IMAGE_REL_MIPS_SECRELHI
relocation contains "the high 16 bits of the 32-bit offset of the target
from the beginning of its section. A PAIR relocation must immediately
follow this on. The SymbolTableIndex of the PAIR relocation contains a
16-bit displacement, which is added to the upper 16 bits taken from the
location being relocated."
Behavior has been checked against Microsoft C compiler for MIPS.
Commit: be68f35bf55baf6150180170ec17371f0be90689
https://github.com/llvm/llvm-project/commit/be68f35bf55baf6150180170ec17371f0be90689
Author: Hervé Poussineau <hpoussin at reactos.org>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFObjectWriter.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/test/MC/Mips/coff-relocs.ll
Log Message:
-----------
[MC][CodeGen][Mips] Add CodeView mapping (#120877)
Also add support for new relocation types required by debug information.
Constants have been taken from CodeView Symbolic Debug Information
Specification.
Commit: 71d6287f5b1e65466de5fe5c093852fa7903cdbe
https://github.com/llvm/llvm-project/commit/71d6287f5b1e65466de5fe5c093852fa7903cdbe
Author: Hervé Poussineau <hpoussin at reactos.org>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/Mips.cpp
M clang/test/CodeGen/pragma-comment.c
Log Message:
-----------
[Clang][MIPS] Create correct linker arguments for Windows toolchains (#121041)
Commit: 046b064df0ac9d4530e79f11077a768383b1ca16
https://github.com/llvm/llvm-project/commit/046b064df0ac9d4530e79f11077a768383b1ca16
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
[clang][bytecode][NFC] Use FixedPoint opaque int API (#123522)
Now that we have it, use it.
Commit: 5c6db8c9e0c488585e642e0c17582ba3aaab7518
https://github.com/llvm/llvm-project/commit/5c6db8c9e0c488585e642e0c17582ba3aaab7518
Author: Matthias Gehre <matthias.gehre at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[MLIR] TosaToLinalg: Prefer to emit identity maps (#123295)
When deciding whether to emit a map like
`#map = affine_map<(d0, d1, d2, d3) -> (0, d1, d2, d3)>` or `#map =
affine_map<(d0, d1, d2, d3) -> (d0, d1, d2, d3)>` for an operand of a
`linalg.generic` when lowering element-wise TOSA ops, prefer the latter
unless broadcasting of the operand is really needed.
This helps later transformations which often require the affine map to
be a projected permuatation.
Commit: 02909a4046fbfffbe4332f796ea2089854c12bab
https://github.com/llvm/llvm-project/commit/02909a4046fbfffbe4332f796ea2089854c12bab
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt] rtsan pipe2 interception for Linux. (#123517)
completing fpurge interception for mac too.
Commit: 6972788bf3d330b7a6136e2ddd840782882b8dd0
https://github.com/llvm/llvm-project/commit/6972788bf3d330b7a6136e2ddd840782882b8dd0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Fix discarding DerivedToBase casts (#123523)
Commit: 84220eccb6ce5413f9782590b3877bd689c9b43c
https://github.com/llvm/llvm-project/commit/84220eccb6ce5413f9782590b3877bd689c9b43c
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
A llvm/test/CodeGen/LoongArch/preld.ll
Log Message:
-----------
[LoongArch] Add generation support for `preld` instruction (#118436)
Instruction `preld` is used to prefetch one cache-line of data from
memory in advance into the cache.
This commit allows it to be generated automatically.
Commit: 18d5d84d761d9f6c12dcfd3d23a965203cd5f886
https://github.com/llvm/llvm-project/commit/18d5d84d761d9f6c12dcfd3d23a965203cd5f886
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] intercept getpeername/recvmmsg/sendmmsg (#123484)
Commit: ca4886bf96f0b6dcc151c03bd8c7df414f3f659b
https://github.com/llvm/llvm-project/commit/ca4886bf96f0b6dcc151c03bd8c7df414f3f659b
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h
M llvm/test/Transforms/LoopDataPrefetch/LoongArch/basic.ll
Log Message:
-----------
[LoongArch] Impl TTI hooks for LoongArch to support LoopDataPrefetch pass (#118437)
Inspired by https://reviews.llvm.org/D146600, this commit adds
some TTI hooks for LoongArch to make LoopDataPrefetch pass
really work. Including:
- `getCacheLineSize()`: 64 for loongarch64.
- `getPrefetchDistance()`: After testing SPEC CPU 2017, improvements
taken by prefetching are more obvious when set PrefetchDistance to
200(results shown blow), although different benchmarks fit for different
best choice.
- `enableWritePrefetching()`: store prefetch is supported by LoongArch,
so set WritePrefetching to true in default.
- `getMinPrefetchStride()` and `getMaxPrefetchIterationsAhead()` still
use default values: 1 and UINT_MAX, so not override them.
After this commit, the test added by https://reviews.llvm.org/D146600
can generate llvm.prefetch intrinsic IR correctly.
Results of spec2017rate benchmarks (testing date: ref, copies: 1):
- For all C/C++ benchmarks, compared to O3+novec/lsx/lasx, prefetch can
bring about -1.58%/0.31%/0.07% performance improvement for int
benchmarks and 3.26%/3.73%/3.78% improvement for floating point
benchmarks. (Only O3+novec+prefetch decreases when testing intrate.)
- But prefetch results in performance reduction almost for every Fortran
benchmark compiled by flang. While considering all C/C++/Fortran
benchmarks, prefetch performance will decrease about 1% ~ 5%.
FIXME: Keep `loongarch-enable-loop-data-prefetch` option default to
false for now due to the bad effect for Fortran.
Commit: a6bb8a707c4fb7c0953cfd8ae6c5aeb4f3a1feb8
https://github.com/llvm/llvm-project/commit/a6bb8a707c4fb7c0953cfd8ae6c5aeb4f3a1feb8
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/include/mlir/Target/SPIRV/Serialization.h
Log Message:
-----------
[MLIR] Add missing include (NFC)
Needed for libstdc++ 15 compatibility.
Commit: 7a77f14c0abfbecbfb800ea8d974e66d81ee516a
https://github.com/llvm/llvm-project/commit/7a77f14c0abfbecbfb800ea8d974e66d81ee516a
Author: Matthias Springer <me at m-sp.org>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/include/mlir/IR/Types.h
M mlir/lib/CAPI/IR/BuiltinTypes.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/IR/Types.cpp
Log Message:
-----------
[mlir][IR] Remove `isF...()` type API for low-precision FP types (#123326)
Remove `type.isFloat4E2M1FN()` etc. Use `isa<Float4E2M1FNType>(type)`
instead.
For details, see:
https://discourse.llvm.org/t/rethink-on-approach-to-low-precision-fp-types/82361/28
Commit: c0055ec434cbb132d7776f8b4c39e99b69fa97ea
https://github.com/llvm/llvm-project/commit/c0055ec434cbb132d7776f8b4c39e99b69fa97ea
Author: Tomer Solomon <tomsol2009 at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
A mlir/include/mlir/Conversion/MathToEmitC/MathToEmitC.h
A mlir/include/mlir/Conversion/MathToEmitC/MathToEmitCPass.h
M mlir/include/mlir/Conversion/Passes.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/CMakeLists.txt
A mlir/lib/Conversion/MathToEmitC/CMakeLists.txt
A mlir/lib/Conversion/MathToEmitC/MathToEmitC.cpp
A mlir/lib/Conversion/MathToEmitC/MathToEmitCPass.cpp
A mlir/test/Conversion/MathToEmitC/math-to-emitc-failed.mlir
A mlir/test/Conversion/MathToEmitC/math-to-emitc.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][EmitC] Add MathToEmitC pass for math function lowering to EmitC (#113799)
This commit introduces a new MathToEmitC conversion pass that lowers
selected math operations from the Math dialect to the emitc.call_opaque
operation in the EmitC dialect.
**Supported Math Operations:**
The following operations are converted:
- math.floor -> emitc.call_opaque<"floor">
- math.round -> emitc.call_opaque<"round">
- math.exp -> emitc.call_opaque<"exp">
- math.cos -> emitc.call_opaque<"cos">
- math.sin -> emitc.call_opaque<"sin">
- math.acos -> emitc.call_opaque<"acos">
- math.asin -> emitc.call_opaque<"asin">
- math.atan2 -> emitc.call_opaque<"atan2">
- math.ceil -> emitc.call_opaque<"ceil">
- math.absf -> emitc.call_opaque<"fabs">
- math.powf -> emitc.call_opaque<"pow">
**Target Language Standards:**
The pass supports targeting different language standards:
- C99: Generates calls with suffixes (e.g., floorf, fabsf) for
single-precision floats.
- CPP11: Prepends std:: to functions (e.g., std::floor, std::fabs).
**Design Decisions:**
The pass uses emitc.call_opaque instead of emitc.call to better emulate
C-style function overloading.
emitc.call_opaque does not require a unique type signature, making it
more suitable for operations like <math.h> functions that may be
overloaded for different types.
This design choice ensures compatibility with C/C++ conventions.
Commit: d0c9e70bcc40948821e83eb0ec32e6e15fb0dd4b
https://github.com/llvm/llvm-project/commit/d0c9e70bcc40948821e83eb0ec32e6e15fb0dd4b
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
A mlir/test/Dialect/LLVMIR/inlining-debuginfo.mlir
Log Message:
-----------
[MLIR][LLVM] Improve inlining debug information (#123520)
This commit improves the debug information for `alloca` and `memcpy`
operations generated by the LLVM dialect inlining interface.
When inlining by value parameters, the inliner creates `alloca` and
`memcpy` operations. This revision sets the location of these created
operations to the respective argument locations instead of the function
location. This change enables users to better identify the source code
location of the copied variables.
Commit: 333562e7ec0393ba0110100ac7bea9bcf7150d03
https://github.com/llvm/llvm-project/commit/333562e7ec0393ba0110100ac7bea9bcf7150d03
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
Log Message:
-----------
[LoongArch] Avoid compilation warning. NFC (#123553)
Avoid `warning: enumerated mismatch in conditional expression:
'llvm::LoongArchISD::NodeType' vs 'llvm::ISD::NodeType'` while compiling
`LoongArchISelLowering.cpp`.
Commit: 754ed95b6672b9a678a994cc652862a91cdc4406
https://github.com/llvm/llvm-project/commit/754ed95b6672b9a678a994cc652862a91cdc4406
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARC/ARCISelLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.h
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.h
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.h
M llvm/lib/Target/Mips/MipsCCState.cpp
M llvm/lib/Target/Mips/MipsCCState.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEISelLowering.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.h
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.h
M llvm/test/CodeGen/Mips/mips64-f128.ll
Log Message:
-----------
[Mips] Fix compiler crash when returning fp128 after calling a functi… (#117525)
…on returning { i8, i128 }
Fixes https://github.com/llvm/llvm-project/issues/96432.
Commit: 0b1ae8963eb4accf8e85b73b834c84c1a73346ba
https://github.com/llvm/llvm-project/commit/0b1ae8963eb4accf8e85b73b834c84c1a73346ba
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
Log Message:
-----------
[AutoUpgrade] Avoid unnecessary pointer bitcasts (NFCI)
Not needed with opaque pointers.
Commit: 6f0a627dd3c21209ea45f355ecedd15d739418a1
https://github.com/llvm/llvm-project/commit/6f0a627dd3c21209ea45f355ecedd15d739418a1
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaCXX/fold_lambda_with_variadics.cpp
Log Message:
-----------
[Clang] Correctly propagate type aliases' unexpanded flags up to lambda (#122875)
We should have been checking desugar() for the type of the right-hand
side of a typedef declaration, instead of using getCanonicalType(),
which points to the end of the type alias chain.
Fixes https://github.com/llvm/llvm-project/issues/122417
Commit: d049db83627d164e4353f59a5f0b4f87dd74b138
https://github.com/llvm/llvm-project/commit/d049db83627d164e4353f59a5f0b4f87dd74b138
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaCast.cpp
M clang/test/SemaCXX/reinterpret-cast.cpp
Log Message:
-----------
[clang] Fix false warning on reinterpret_casting unknown template type (#109430)
After 1595988ee6f9732e7ea79928af8a470ad5ef7dbe
diag::warn_undefined_reinterpret_cast started raising on
non-instantiated template functions without sufficient knowledge whether
the reinterpret_cast is indeed UB.
Commit: 1297c1125f9c284e0cc0f2bf50d4b7ba519f7309
https://github.com/llvm/llvm-project/commit/1297c1125f9c284e0cc0f2bf50d4b7ba519f7309
Author: Christian Sigg <csigg at google.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/BlockSupport.h
M mlir/include/mlir/IR/Region.h
M mlir/include/mlir/IR/TypeRange.h
M mlir/include/mlir/IR/ValueRange.h
Log Message:
-----------
[mlir] Add `[[lifetimebound]]` to Range classes. (#123091)
This prevents creating range class instances from temporaries.
Commit: 4b3c17850bd2ca9971084c9945b51b214c1d89a9
https://github.com/llvm/llvm-project/commit/4b3c17850bd2ca9971084c9945b51b214c1d89a9
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M offload/cmake/caches/AMDGPUBot.cmake
Log Message:
-----------
[Offload] Enable shared-libs; compiler-rt as default RTLIB (#123568)
This is the next step to move the CMake cache file builder closer to the
build configuration we care about downstream.
Commit: 1be64c27f1773e7cc87f9a7efdf5bab36c6beaf5
https://github.com/llvm/llvm-project/commit/1be64c27f1773e7cc87f9a7efdf5bab36c6beaf5
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/lifetimes.cpp
Log Message:
-----------
[clang][bytecode] Fix diagnostic mismatch with current interpreter (#123571)
Don't report dead pointers if we've checking for a potential constant
expression.
Commit: 5139c90dfcacfba3d6ddc16ccb377a086abac7aa
https://github.com/llvm/llvm-project/commit/5139c90dfcacfba3d6ddc16ccb377a086abac7aa
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
Log Message:
-----------
[LLParser] Avoid PointerType::get() with type argument (NFC)
Use the methods accepting LLVMContext instead.
Commit: 5a7a3242639a17b049d70ee00798957ea21eb182
https://github.com/llvm/llvm-project/commit/5a7a3242639a17b049d70ee00798957ea21eb182
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[clang][NFC] Migrate bit-fields of OverloadCandidate to LLVM_PREFERRED_TYPE
Commit: a16adafd4799665718f54596054bbc816d151f92
https://github.com/llvm/llvm-project/commit/a16adafd4799665718f54596054bbc816d151f92
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Symbols.cpp
M lld/COFF/Writer.cpp
M lld/test/COFF/arm64x-entry.test
Log Message:
-----------
[LLD][COFF] Add support for alternate entry point in CHPE metadata on ARM64X (#123346)
Includes handling for ARM64X relocations relative to a symbol.
Commit: 0f8297ae0b27489048700a1314fff12fe554c999
https://github.com/llvm/llvm-project/commit/0f8297ae0b27489048700a1314fff12fe554c999
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix dependencies for 69d3ba3db922fca8cfc47b5f115b6bea6a737aab
Commit: 96c4f978d0fd1339262a350e118375ee4bf5fc57
https://github.com/llvm/llvm-project/commit/96c4f978d0fd1339262a350e118375ee4bf5fc57
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
A llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.h
M llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-copies-extra-insts-after-copy.mir
Log Message:
-----------
[AMDGPU][NewPM] Port SIOptimizeExecMasking to NPM (#123572)
Commit: fe7cb156064ff59dba7c0496db3b4da39fb1a663
https://github.com/llvm/llvm-project/commit/fe7cb156064ff59dba7c0496db3b4da39fb1a663
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[SPIR-V] Improve portability of the code (#123584)
Adding SPIRV to LLVM_ALL_TARGETS
(https://github.com/llvm/llvm-project/pull/119653) revealed a series of
minor compilation problems and sanitizer complaints. This PR is to
address the problem.
Commit: 8b7bfb417a220822ddd8231e58dcd785d8d96aed
https://github.com/llvm/llvm-project/commit/8b7bfb417a220822ddd8231e58dcd785d8d96aed
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M libclc/clc/include/clc/common/clc_degrees.h
M libclc/clc/include/clc/common/clc_radians.h
Log Message:
-----------
[libclc] Rename include guards. NFC.
Commit: 3ace18d5c08d0bb2c74c77562ee488c9e5049737
https://github.com/llvm/llvm-project/commit/3ace18d5c08d0bb2c74c77562ee488c9e5049737
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/CodeGen.cpp
Log Message:
-----------
[CodeGen] MachineFunctionSplitter: Add missing initializer (#123564)
This registers the pass with PassRegistry so we can use -start-before
and other options for machine-function-splitter.
Commit: 4d21096c207847463a0253e0876c95c92e74adc3
https://github.com/llvm/llvm-project/commit/4d21096c207847463a0253e0876c95c92e74adc3
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M flang/test/Lower/module_use.f90
Log Message:
-----------
[Flang] Modify module test to run in a sub-directory (#123364)
This is to avoid race conditions with other tests.
Commit: 2d6d476ffbfc207aae2bf9f12be14483b31d100a
https://github.com/llvm/llvm-project/commit/2d6d476ffbfc207aae2bf9f12be14483b31d100a
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/cmake/modules/AddLLVM.cmake
M polly/CMakeLists.txt
M polly/cmake/polly_macros.cmake
Log Message:
-----------
[Polly][CMake] Fix exports (#122123)
If Polly is built with LLVM_POLLY_LINK_INTO_TOOLS=ON (the default for
monorepo builds), then Polly will become a dependency of the
LLVMExtensions component, which is part of LLVMExports. As such, all the
Polly libraries also have to be part of LLVMExports.
However, if Polly is built with LLVM_POLLY_LINK_INTO_TOOLS=OFF, we also
end up adding Polly libraries to LLVMExports. This is undesirable, as it
adds a hard dependency from llvm on polly.
Fix this by only exporting polly libraries from LLVMExports if
LLVM_POLLY_LINK_INTO_TOOLS is enabled.
Commit: bd96295e090b62687c2e55f54a918425d035568a
https://github.com/llvm/llvm-project/commit/bd96295e090b62687c2e55f54a918425d035568a
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
M clang/test/CodeGen/ms-intrinsics-other.c
M clang/test/CodeGen/ms-intrinsics.c
Log Message:
-----------
[Clang] Use more liberal pointer attribute wildcard in ms-intrinsics tests (NFC)
Allow arbitrary attributes, including those with arguments.
Commit: a4d9a8de0820f3ccc2eb35870cac199e8dacd9e6
https://github.com/llvm/llvm-project/commit/a4d9a8de0820f3ccc2eb35870cac199e8dacd9e6
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/test/CodeGen/mips-vector-return.c
M clang/test/CodeGen/mips64-nontrivial-return.cpp
Log Message:
-----------
[Clang] Don't match irrelevant attributes in mips return tests (NFC)
The only thing these tests care about from an ABI perspective is sret,
don't also test all the optimization attributes.
Commit: 27a2d3d0887ef8a61bc953e76a22bb8a628a1ea0
https://github.com/llvm/llvm-project/commit/27a2d3d0887ef8a61bc953e76a22bb8a628a1ea0
Author: David Green <david.green at arm.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[AArch64] Build v2i64 Mul cost out of getArithmeticInstrCost and getVectorInstrCost. NFCI
This should not effect the result, unless the getArithmeticInstrCost and
getVectorInstrCost routines learn to produce different costs (with CostKind =
CodeSize for example). The -1 lanes prevent 0 lanes from (incorrectly) being
marked as free.
Commit: a79ae862ab2999cad89879743335423b985ae3fd
https://github.com/llvm/llvm-project/commit/a79ae862ab2999cad89879743335423b985ae3fd
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/test/CodeGen/attr-counted-by-pr110385.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
Log Message:
-----------
[Clang] Regenerate test checks (NFC)
To reduce diffs in an upcoming change.
Commit: af91372b75613d5654e68d393477e8621cb93da7
https://github.com/llvm/llvm-project/commit/af91372b75613d5654e68d393477e8621cb93da7
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
A flang/test/Integration/debug-cyclic-derived-type-3.f90
Log Message:
-----------
[flang][debug] Improve handling of cyclic derived types. (#122770)
When `RecordType` is converted to corresponding `DIType`, we cache the
information to avoid doing the conversion again.
Our conversion of `RecordType` looks like this:
`ConvertRecordType(RecordType Ty)`
1. If type `Ty` is already in the cache, then return the corresponding
item.
2. Create a place holder `DICompositeTypeAttr` (called `ty_self` below)
for `Ty`
3. Put `Ty->ty_self` in the cache
4. Convert members of `Ty`. This may cause `ConvertRecordType` to be
called again with other types.
5. Create final `DICompositeTypeAttr`
6. Replace the `ty_self` in the cache with one created in step 5 end
The purpose of creating `ty_self` is to handle cases where a member may
have reference to parent type.
Now consider the code below:
```
type t1
type(t2), pointer :: p1
end type
type t2
type(t1), pointer :: p2
end type
```
While processing t1, we could have a structure like below. `t1 -> t2 ->
t1_self`
The `t2` created during handling of `t1` cant be cached on its own as it
contains a place holder reference. It will fail an assert in MLIR if it
is processed standalone. To avoid this problem, we have a check in the
step 6 above to not cache such types. But this check was not tight
enough. It just checked if a type should not have a place holder
reference to another type. It missed the following case where the place
holder reference can be in a type further down the line.
```
type t1
type(t2), pointer :: p1
end type
type t2
type(t3), pointer :: p2
end type
type t3
type(t1), pointer :: p3
end type
```
So while processing `t1`, we have to stop caching of not only `t3` but
also of `t2`. This PR improves the check and moves the logic inside
`convertRecordType`.
Please note that this limitation of why a type cant have a placeholder
reference is because of how such references are resolved in the mlir.
Please see the discussion at the end of this
[PR](https://github.com/llvm/llvm-project/pull/106571).
I have to change `getDerivedType` so that it will also get the derived
type for things like `type(t2), pointer :: p1` which are wrapped in
`BoxType`. Happy to move it to a new function or a local helper in case
this change is problematic.
Fixes #122024.
Commit: 0ec153b9fde70da3b46292d0627b3896e0bdceab
https://github.com/llvm/llvm-project/commit/0ec153b9fde70da3b46292d0627b3896e0bdceab
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
Log Message:
-----------
[flang][debug] Remove an unused function to fix build. (#123602)
Commit: d70f54f248853f4d5f9e71a51dfda53a47f0b7d3
https://github.com/llvm/llvm-project/commit/d70f54f248853f4d5f9e71a51dfda53a47f0b7d3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/c23.c
M clang/test/AST/ByteCode/literals.cpp
Log Message:
-----------
[clang][bytecode] Fix reporting failed local constexpr initializers (#123588)
We need to emit the 'initializer of X is not a constant expression' note
for local constexpr variables as well.
Commit: 5ce271ef74dd3325993c827f496e460ced41af11
https://github.com/llvm/llvm-project/commit/5ce271ef74dd3325993c827f496e460ced41af11
Author: Matthias Gehre <matthias.gehre at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
Log Message:
-----------
[MLIR] TosaToLinalgNamed: Lower unsigned tosa.max_pool2d (#123290)
This PR allows to lower **unsigned** `tosa.max_pool2d` to linalg.
```
// CHECK-LABEL: @max_pool_ui8
func.func @max_pool_ui8(%arg0: tensor<1x6x34x62xui8>) -> tensor<1x4x32x62xui8> {
// CHECK: builtin.unrealized_conversion_cast {{.*}} : tensor<1x6x34x62xui8> to tensor<1x6x34x62xi8>
// CHECK: arith.constant 0
// CHECK: linalg.pooling_nhwc_max_unsigned {{.*}} : (tensor<1x4x32x62xi8>) -> tensor<1x4x32x62xi8>
// CHECK: builtin.unrealized_conversion_cast {{.*}} : tensor<1x4x32x62xi8> to tensor<1x4x32x62xui8>
%0 = tosa.max_pool2d %arg0 {pad = array<i64: 0, 0, 0, 0>, kernel = array<i64: 3, 3>, stride = array<i64: 1, 1>} : (tensor<1x6x34x62xui8>) -> tensor<1x4x32x62xui8>
return %0 : tensor<1x4x32x62xui8>
}
```
It does this by
- converting the MaxPool2dConverter from OpRewriterPattern to
OpConversion Pattern
- adjusting the padding value to the the minimum unsigned value when the
max_pool is unsigned
- lowering to `linalg.pooling_nhwc_max_unsigned` (which uses
`arith.maxui`) when the max_pool is unsigned
Commit: d9f165ddea3223217a959c3cea3d2c613b132935
https://github.com/llvm/llvm-project/commit/d9f165ddea3223217a959c3cea3d2c613b132935
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
M llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
Log Message:
-----------
[SDAG] Add an ISD node to help lower vector.extract.last.active (#118810)
Based on feedback from the clastb codegen PR, I'm refactoring basic codegen for the vector.extract.last.active intrinsic to lower to an ISD node in SelectionDAGBuilder then expand in LegalizeVectorOps, instead of doing everything in the builder.
The new ISD node (vector_find_last_active) only covers finding the index of the last active element of the mask, and extracting the element + handling passthru is left to existing ISD nodes.
Commit: 1c5b12257d19681d72a52e39eb2247dc6ab6af3b
https://github.com/llvm/llvm-project/commit/1c5b12257d19681d72a52e39eb2247dc6ab6af3b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/test/DebugInfo/NVPTX/debug-info.ll
Log Message:
-----------
[NVPTX][DEBUGINFO][NFC]Reduce test file to ease maintenance
Commit: 456ec1c2f4e487de235c953e8f2832b97372e7b0
https://github.com/llvm/llvm-project/commit/456ec1c2f4e487de235c953e8f2832b97372e7b0
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/gh54176-scalar-deps.ll
M llvm/test/Transforms/LoopInterchange/inner-only-reductions.ll
M llvm/test/Transforms/LoopInterchange/innermost-latch-uses-values-in-middle-header.ll
M llvm/test/Transforms/LoopInterchange/interchange-flow-dep-outer.ll
M llvm/test/Transforms/LoopInterchange/lcssa.ll
M llvm/test/Transforms/LoopInterchange/outer-header-jump-to-inner-latch.ll
M llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
M llvm/test/Transforms/LoopInterchange/pr43797-lcssa-for-multiple-outer-loop-blocks.ll
M llvm/test/Transforms/LoopInterchange/profitability.ll
M llvm/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll
M llvm/test/Transforms/LoopInterchange/unique-dep-matrix.ll
M llvm/test/Transforms/LoopInterchange/vector-gep-operand.ll
Log Message:
-----------
[LoopInterchange] Remove 'S' Scalar Dependencies (#119345)
We are not handling 'S' scalar dependencies correctly and have at least
the following miscompiles related to that:
[LoopInterchange] incorrect handling of scalar dependencies and dependence vectors starting with ">" #54176
[LoopInterchange] Interchange breaks program correctness #46867
[LoopInterchange] Loops should not interchanged due to dependencies #47259
[LoopInterchange] Loops should not interchanged due to control flow #47401
This patch does no longer insert the "S" dependency/direction into the
dependency matrix, so a dependency is never "S". We seem to have
forgotten what the exact meaning is of this dependency type, and don't
see why it should be treated differently.
We prefer correctness over incorrect and more aggressive results. I.e.,
this prevents the miscompiles at the expense of handling less cases,
i.e. making interchange more pessimistic. However, some of the cases
that are now rejected for dependence analysis reasons, were rejected
before too but for other reasons (e.g. profitability). So at least for
the llvm regression tests, the number of regression are very reasonable.
This should be a stopgap. We would like to get interchange enabled by
default and thus prefer correctness over unsafe transforms, and later
see if we can get solve the regressions.
Commit: 57466db7a459ce285f053ecac3c309f49f2cce6a
https://github.com/llvm/llvm-project/commit/57466db7a459ce285f053ecac3c309f49f2cce6a
Author: bernhardu <bernhardu at mailbox.org>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Support some more 3 byte instructions. (#120474)
This patch adds several instructions seen when trying to run a
executable built with ASan with llvm-mingw.
(x86 and x86_64, using the git tip in llvm-project).
Also includes instructions collected by
Roman Pišl and Eric Pouech in the Wine bug reports below.
```
Related: https://github.com/llvm/llvm-project/issues/96270
Co-authored-by: Roman Pišl <rpisl at seznam.cz>
https://bugs.winehq.org/show_bug.cgi?id=50993
https://bugs.winehq.org/attachment.cgi?id=70233
Co-authored-by: Eric Pouech <eric.pouech at gmail.com>
https://bugs.winehq.org/show_bug.cgi?id=52386
https://bugs.winehq.org/attachment.cgi?id=71626
```
Commit: 977d744b21d06415ac872258bf86e026d8eb487f
https://github.com/llvm/llvm-project/commit/977d744b21d06415ac872258bf86e026d8eb487f
Author: Kirill Chibisov <contact at kchibisov.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/test/Conversion/ArithToEmitC/arith-to-emitc.mlir
M mlir/test/Conversion/SCFToEmitC/for.mlir
M mlir/test/Conversion/SCFToEmitC/if.mlir
M mlir/test/Conversion/SCFToEmitC/switch.mlir
M mlir/test/Dialect/EmitC/transforms.mlir
Log Message:
-----------
[mlir][emitc] Set default dialect to emitc in ops with block (#123036)
This is a follow up to 68a3908148c (func: Set default dialect to
'emitc'), but for other instructions with blocks to make it look
consistent.
Commit: 9b853f63bef20fd1f19ec933667b1f619afc0f1d
https://github.com/llvm/llvm-project/commit/9b853f63bef20fd1f19ec933667b1f619afc0f1d
Author: Dominic Chen <1108560+ddcc at users.noreply.github.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Fix vector sanitization annotations on destruction (#121031)
In https://reviews.llvm.org/D136765 / https://reviews.llvm.org/D144155,
the asan annotations for `std::vector` were modified to unpoison freed
backing memory on destruction, instead of leaving it poisoned. However,
calling `__clear()` instead of `clear()` skips informing the asan runtime
of this decrease in the accessible container size, which breaks the
invariant that the value of `old_mid` should match the value of `new_mid`
from the previous call to `__sanitizer_annotate_contiguous_container`, which
can trip the sanity checks for the partial poison between [d1, d2) and the
container redzone between [d2, c), if enabled. To fix this, ensure that
`clear()` is called instead, as is already done by `__vdeallocate()`.
Also remove `__clear()`, since it is no longer called.
Commit: a733c1fa90f3d26dbf399f7676e11fad0e3f5eeb
https://github.com/llvm/llvm-project/commit/a733c1fa90f3d26dbf399f7676e11fad0e3f5eeb
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
Log Message:
-----------
[AArch64][NFC] Move getPartialReductionCost into cpp file (#123370)
The function getPartialReductionCost is already quite large and
is likely to grow in size as we add support for more cases in
future. Therefore, I think it's best to move this into the cpp
file.
Commit: b5c9cba3f33512014a18622a0e3479851faf4ce9
https://github.com/llvm/llvm-project/commit/b5c9cba3f33512014a18622a0e3479851faf4ce9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/FixedPoint.h
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
[clang][bytecode] Don't memcpy() FixedPoint values (#123599)
llvm::FixedPoint is not trivially copyable.
Commit: 58af82b4623c1871a78a53ef86f64d4891dcc2da
https://github.com/llvm/llvm-project/commit/58af82b4623c1871a78a53ef86f64d4891dcc2da
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M offload/DeviceRTL/CMakeLists.txt
M offload/DeviceRTL/include/DeviceTypes.h
M offload/DeviceRTL/include/Synchronization.h
Log Message:
-----------
[OpenMP] Remove 'omp assumes' scopes now that we have no inline ASM (#123611)
Summary:
We used this globally scoped `ext_no_call_asm` as a sort of hack around
the compiler that allowed the attributor to optimize out inline assembly
calls to PTX instructions. Quite some time ago I got rid of every inline
assembly call and replaced it with a builitin, so this can just be
deleted.
Furthermore, I use the `[[omp::assume]]` attribute directly for the
aligned barrier usage. This prints an unknown assumption warning (even
though it isn't) so I'm just silencing that for now until I fix it
later.
---------
Co-authored-by: Michael Kruse <github at meinersbur.de>
Commit: 9cf24652e783147b5063925ce025b9f8a6e8fe25
https://github.com/llvm/llvm-project/commit/9cf24652e783147b5063925ce025b9f8a6e8fe25
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
Log Message:
-----------
[AMDGPU] Fix spurious NoAlias results (#122309)
After a30e50fc, AMDGPUAAResult is being called in more situations where
BasicAA isn't sure. This exposed some regressions where NoAlias is being
incorrectly returned for two identical pointers.
The fix is to check the underlying objects for equality before returning
NoAlias.
Commit: b92cc780606ea7fa1afdff49a2c84934841ece6f
https://github.com/llvm/llvm-project/commit/b92cc780606ea7fa1afdff49a2c84934841ece6f
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
A llvm/test/tools/llvm-objdump/XCOFF/private-headers-option.test
M llvm/tools/llvm-objdump/XCOFFDump.cpp
Log Message:
-----------
[llvm-objdump] Print out xcoff load section of xcoff object file with option private-headers (#121226)
[llvm-objdump] Print out xcoff load section of xcoff object file with
option private-headers
Commit: 3b001db4f9668cfa29572e5f1911ec7cef8b0ac2
https://github.com/llvm/llvm-project/commit/3b001db4f9668cfa29572e5f1911ec7cef8b0ac2
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/test/Dialect/Vector/vector-transfer-permutation-lowering.mlir
Log Message:
-----------
[mlir][vector] Update tests for xfer permutation lowering (1/N) (#123076)
1. Remove `%c0 = arith.constant 0 : index` from testt functions. This
extra Op is not needed (the index can be passed as an argument), so
this is just noise.
2. Replaced `%cst_0` with `%pad` to communicate what the underlying SSA
value is intended for.
3. Unified some comments.
Commit: 723a3e746ab7f130d448343e6a7b61e146954b60
https://github.com/llvm/llvm-project/commit/723a3e746ab7f130d448343e6a7b61e146954b60
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/IR/Assumptions.cpp
M offload/DeviceRTL/CMakeLists.txt
M offload/DeviceRTL/include/Synchronization.h
M offload/test/jit/empty_kernel.inc
Log Message:
-----------
[OpenMP] Fix mispelled attribute and warning
Summary:
This is spelled `ompx_aligned_barrier` when used directly, but wasn't
included in the list of known assumptions. Fix that so now th test
works.
Commit: fcec8756e25333b6f49472f00e043f2389736c0b
https://github.com/llvm/llvm-project/commit/fcec8756e25333b6f49472f00e043f2389736c0b
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
Log Message:
-----------
[LoopVectorize][NFC] Simplify ScaledReductionExitInstrs map (#123368)
For the following variable
DenseMap<const Instruction *, std::pair<PartialReductionChain,
unsigned>>
ScaledReductionExitInstrs;
we never actually need the PartialReductionChain when using the map.
I've cleaned this up so that this now becomes
DenseMap<const Instruction *, unsigned> ScaledReductionMap;
Commit: cc5eba1737146a727a61b5dbe16d8c2ac453981e
https://github.com/llvm/llvm-project/commit/cc5eba1737146a727a61b5dbe16d8c2ac453981e
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
Log Message:
-----------
[AMDGPU] Reject misaligned SGPR constraints for inline asm (#123590)
The indices of SGPR register pairs need to be 2-aligned and SGPR
quadruplets need to be 4-aligned. With this patch, we report an error
when inline asm register constraints specify a misaligned register
index, instead of silently dropping the specified index.
Fixes #123208
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: aa3c31a86f39552d11f0d5bae8b50541d73aa442
https://github.com/llvm/llvm-project/commit/aa3c31a86f39552d11f0d5bae8b50541d73aa442
Author: Renat Idrisov <4032256+parsifal-47 at users.noreply.github.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[MLIR] Prevent invalid IR from being passed outside of RemoveDeadValues (#121079)
This is a follow-up for https://github.com/llvm/llvm-project/pull/119110
and a fix for https://github.com/llvm/llvm-project/issues/118450
RemoveDeadValues used to delete Values and analyzing the IR at the same
time, because of that, `isMemoryEffectFree` got invalid IR with
half-deleted linalg.generic operation. This PR separates analysis and
cleanup to prevent such situation.
Thank you!
---------
Co-authored-by: Renat Idrisov <parsifal-47 at users.noreply.github.com>
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Commit: 8552c490462eb4180733d1f80d7b381e1518e29f
https://github.com/llvm/llvm-project/commit/8552c490462eb4180733d1f80d7b381e1518e29f
Author: David Green <david.green at arm.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/test/Transforms/LoopVectorize/AArch64/prefer-fixed-if-equal-to-scalable.ll
Log Message:
-----------
[AArch64] Enable UseFixedOverScalableIfEqualCost for more Cortex-x cpus. (#122807)
For similar reasons for fixed-width being prefered to scalable for
Neoverse V2, this patch enables the UseFixedOverScalableIfEqualCost
feature when using -mcpu=cortex-x2, x3, x4 and x925 that are similar to
Neoverse V2.
Commit: 9c7e02d579db7ba81a414cd2212ce2b48b927941
https://github.com/llvm/llvm-project/commit/9c7e02d579db7ba81a414cd2212ce2b48b927941
Author: Ruhung <143302514+Ruhung at users.noreply.github.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
A llvm/test/Transforms/InstCombine/add-shl-mul-umax.ll
Log Message:
-----------
[InstCombine] Fold umax(nuw_mul(x, C0), x + 1) into (x == 0 ? 1 : nuw_mul(x, C0)) (#123468)
This PR introduces the following transformations:
- If C0 is not 0:
umax(nuw_shl(x, C0), x + 1) -> x == 0 ? 1 : nuw_shl(x, C0)
- If C0 is not 0 or 1:
umax(nuw_mul(x, C0), x + 1) -> x == 0 ? 1 : nuw_mul(x, C0)
Fixes #122388.
Alive2 proof: https://alive2.llvm.org/ce/z/rkp_8U
Commit: 416f1c465db62d829283f6902ef35e027e127aa7
https://github.com/llvm/llvm-project/commit/416f1c465db62d829283f6902ef35e027e127aa7
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/IR/GlobalValue.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
M llvm/lib/FuzzMutate/RandomIRBuilder.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/SandboxIR/Type.cpp
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/LowerGlobalDtors.cpp
M llvm/lib/Transforms/Utils/ModuleUtils.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOpcodes.cpp
M llvm/tools/llvm-stress/llvm-stress.cpp
Log Message:
-----------
[IR] Replace of PointerType::get(Type) with opaque version (NFC) (#123617)
In accordance with https://github.com/llvm/llvm-project/issues/123569
In order to keep the patch at reasonable size, this PR only covers for
the llvm subproject, unittests excluded.
Commit: 9da7c3ba17681a875d743a6709f3f56324ee6042
https://github.com/llvm/llvm-project/commit/9da7c3ba17681a875d743a6709f3f56324ee6042
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
A flang/test/Lower/OpenMP/Todo/allocate-clause-align.f90
A flang/test/Lower/OpenMP/Todo/allocate-clause-allocator.f90
Log Message:
-----------
[Flang][OpenMP][NFC] Add tests for align and allocator in allocate clauses (#121356)
No functional change.
(Also, tried to filter out all ALLOCATOR modifiers, but that makes some
other tests fail).
Commit: 8368018f2097e330a6b6ec0a9372487df020c511
https://github.com/llvm/llvm-project/commit/8368018f2097e330a6b6ec0a9372487df020c511
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
A clang/test/Driver/Inputs/multilib/multilib-custom-flags.yaml
M clang/test/Driver/print-multi-selection-flags.c
Log Message:
-----------
Fix test of `-print-multi-flags-experimental` in case of multilib custom flags (#123577)
The test was failing in the case where a `multilib.yaml` file was
present in the installation. This is because the presence of a multilib
YAML file leads to the diagnosing of validity of the multilib custom
flags.
This patch fixes the test by creating a new YAML file with multilib
custom flags to be used by the test.
Commit: c8eb865747ea0006470a0ab130056293fcb536cb
https://github.com/llvm/llvm-project/commit/c8eb865747ea0006470a0ab130056293fcb536cb
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M libclc/clc/include/clc/clcmacro.h
A libclc/clc/include/clc/math/clc_mad.h
A libclc/clc/include/clc/math/ternary_decl.inc
M libclc/clc/lib/clspv/SOURCES
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_mad.cl
A libclc/clc/lib/generic/math/clc_mad.inc
M libclc/clc/lib/spirv/SOURCES
M libclc/clc/lib/spirv64/SOURCES
R libclc/generic/include/clc/math/ternary_decl.inc
M libclc/generic/lib/common/mix.cl
M libclc/generic/lib/common/mix.inc
M libclc/generic/lib/math/clc_exp10.cl
M libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/clc_pow.cl
M libclc/generic/lib/math/clc_pown.cl
M libclc/generic/lib/math/clc_powr.cl
M libclc/generic/lib/math/clc_rootn.cl
M libclc/generic/lib/math/mad.cl
R libclc/generic/lib/math/mad.inc
M libclc/generic/lib/math/sincos_helpers.cl
M libclc/generic/lib/math/sincospiF_piby4.h
Log Message:
-----------
[libclc] Move mad to the CLC library (#123607)
All targets build `__clc_mad` -- even SPIR-V targets -- since it
compiles to the optimal `llvm.fmuladd` intrinsic. There is no change to
the bytecode generated for non-SPIR-V targets.
The `mix` builtin, which is implemented as a wrapper around `mad`, is
left as an OpenCL-layer wrapper of `__clc_mad`. I don't know if it's
worth having a specific CLC version of `mix`.
The changes to the other CLC files/functions are moving uses of `mad` to
`__clc_mad`, and reformatting. There is an additional instance of
`trunc` becoming `__clc_trunc`, which was missed before.
Commit: f33e3d422d8adf7591d510aa299c884abfc8ffb0
https://github.com/llvm/llvm-project/commit/f33e3d422d8adf7591d510aa299c884abfc8ffb0
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
Log Message:
-----------
[AMDGPU] Fix DAG types for V_MAD_I64_I32 and V_MAD_U64_U32. NFC. (#123629)
These instructions return a 64-bit result and a 1-bit carry, unlike
smul_lohi and umul_lohi which return a pair of 32-bit results.
This does not appear to make any difference in practice because the DAG
types are not used for anything before these nodes are converted to
MachineInstrs.
Commit: e8674af6f41b2e78ceebabb23e40588c41da5a23
https://github.com/llvm/llvm-project/commit/e8674af6f41b2e78ceebabb23e40588c41da5a23
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/constexpr.c
M clang/test/SemaCXX/builtin-assume-aligned.cpp
Log Message:
-----------
[clang][bytecode] Diagnose IntegralToPointer casts to non-void (#123619)
But keep evaluating. This is what the current interpreter does as well.
Commit: b95ed30ea2307dbcbe6199374c1e9a9b7a802ad0
https://github.com/llvm/llvm-project/commit/b95ed30ea2307dbcbe6199374c1e9a9b7a802ad0
Author: Mats Larsen <mats at jun.codes>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Utils/ModuleUtils.cpp
Log Message:
-----------
[IR] Remove unused variables from #123617
Failed to notice them when landing that patch - apologies!
Commit: 7abf44069aec61eee147ca67a6333fc34583b524
https://github.com/llvm/llvm-project/commit/7abf44069aec61eee147ca67a6333fc34583b524
Author: Stephan Hageboeck <stephan.hageboeck at cern.ch>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
Log Message:
-----------
Add missing include to X86MCTargetDesc.h (#123320)
In gcc-15, explicit includes of `<cstdint>` are required when fixed-size
integers are used. In this file, this include only happened as a side
effect of including SmallVector.h
Although llvm compiles fine, the root-project would benefit from
explicitly including it here, so we can backport the patch.
Maybe interesting for @hahnjo and @vgvassilev
Commit: c248fc1880af60737ef7e18dfe6becb1db93fde3
https://github.com/llvm/llvm-project/commit/c248fc1880af60737ef7e18dfe6becb1db93fde3
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
Log Message:
-----------
[Clang] Document some of the implementation-defined keywords (#84591)
Commit: 0fa05456a8dc468961c33bd8149b157194672c71
https://github.com/llvm/llvm-project/commit/0fa05456a8dc468961c33bd8149b157194672c71
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M libcxx/include/__algorithm/make_projected.h
M libcxx/include/__algorithm/radix_sort.h
M libcxx/include/__functional/bind.h
M libcxx/include/__functional/function.h
M libcxx/include/__functional/hash.h
M libcxx/include/__functional/mem_fn.h
M libcxx/include/__functional/reference_wrapper.h
M libcxx/include/__hash_table
M libcxx/include/__tree
M libcxx/include/__type_traits/invoke.h
M libcxx/include/__type_traits/result_of.h
M libcxx/include/future
M libcxx/include/unordered_map
M libcxx/include/unordered_set
M libcxx/test/libcxx/containers/associative/non_const_comparator.verify.cpp
M libcxx/test/libcxx/containers/unord/non_const_comparator.verify.cpp
M libcxx/test/libcxx/utilities/function.objects/func.require/bullet_1_2_3.pass.cpp
Log Message:
-----------
[libc++] Define an internal API for std::invoke and friends (#116637)
Currently we're using quite different internal names for the
`std::invoke` family of type traits. This adds a layer around the
current implementation to make it easier to understand when it is used
and makes it easier to define multiple implementations of it.
Commit: 3606876b67bbd42d6ee0e04548611834467af806
https://github.com/llvm/llvm-project/commit/3606876b67bbd42d6ee0e04548611834467af806
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/NVPTX/addrspacecast-cse.ll
Log Message:
-----------
[SDAG] Fix CSE for ADDRSPACECAST nodes (#122912)
Correct CSE in SelectionDAG can make DAG combining more effective and
reduces the size of the DAG and thus should improve compile time.
Commit: 19bd2d610286300707b51135d3cff8bfb74322f0
https://github.com/llvm/llvm-project/commit/19bd2d610286300707b51135d3cff8bfb74322f0
Author: Kshitij Paranjape <kshitijvparanjape at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
A llvm/test/Transforms/InstSimplify/pr122582.ll
Log Message:
-----------
[ConstantFolding] Add ilogb in isMathLibCallNoop (#122582)
ilogb libcall was not being constant folded correctly. This patch adds
ilogb case in isMathLibCallNoop with correct error condition.
Fixes #101873
Commit: 8ff195cda1ff5384888e17e8bfdc34990299d3f5
https://github.com/llvm/llvm-project/commit/8ff195cda1ff5384888e17e8bfdc34990299d3f5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
SIISelLowering.cpp - remove unused variable missed in #123617
Commit: 7084110518f904192c2935327b884b17de00bee0
https://github.com/llvm/llvm-project/commit/7084110518f904192c2935327b884b17de00bee0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
X86ISelLowering.cpp - remove unused variable missed in #123617
Commit: 5810f157cd048fd7e2fc20f4f782462164279eba
https://github.com/llvm/llvm-project/commit/5810f157cd048fd7e2fc20f4f782462164279eba
Author: Michal Paszkowski <michal at michalpaszkowski.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
Log Message:
-----------
[SPIR-V] Fix SPIRVEmitIntrinsics undefined behavior (#123625)
Before this change InstrSet in SPIRVEmitIntrinsics was uninitialized
before running runOnFunction. This change adds a new function
getPreferredInstructionSet in SPIRVSubtarget.
Commit: af6616676fb7f9dd4898290ea684ee0c90f1701d
https://github.com/llvm/llvm-project/commit/af6616676fb7f9dd4898290ea684ee0c90f1701d
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIR.cmake
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/SparseTensor/CMakeLists.txt
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
M mlir/test/lib/Conversion/FuncToLLVM/CMakeLists.txt
M mlir/test/lib/Conversion/MathToVCIX/CMakeLists.txt
M mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
M mlir/test/lib/Conversion/VectorToSPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Affine/CMakeLists.txt
M mlir/test/lib/Dialect/Arith/CMakeLists.txt
M mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
M mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
M mlir/test/lib/Dialect/ControlFlow/CMakeLists.txt
M mlir/test/lib/Dialect/DLTI/CMakeLists.txt
M mlir/test/lib/Dialect/Func/CMakeLists.txt
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/LLVM/CMakeLists.txt
M mlir/test/lib/Dialect/Linalg/CMakeLists.txt
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/MemRef/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/NVGPU/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
M mlir/test/lib/Dialect/SPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Shape/CMakeLists.txt
M mlir/test/lib/Dialect/Tensor/CMakeLists.txt
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lib/IR/CMakeLists.txt
M mlir/test/lib/Interfaces/LoopLikeInterface/CMakeLists.txt
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/test/lib/Reducer/CMakeLists.txt
M mlir/test/lib/Rewrite/CMakeLists.txt
M mlir/test/lib/Tools/PDLL/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/test/python/lib/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
Log Message:
-----------
[mlir] Link libraries that aren't included in libMLIR to libMLIR (#123477)
Use `mlir_target_link_libraries()` to link dependencies of libraries
that are not included in libMLIR, to ensure that they link to the dylib
when they are used in Flang. Otherwise, they implicitly pull in all
their static dependencies, effectively causing Flang binaries to
simultaneously link to the dylib and to static libraries, which is never
a good idea.
I have only covered the libraries that are used by Flang. If you wish, I
can extend this approach to all non-libMLIR libraries in MLIR, making
MLIR itself also link to the dylib consistently.
Commit: 9cbd705e32bbb869c897696f4a6659f2ce00b64a
https://github.com/llvm/llvm-project/commit/9cbd705e32bbb869c897696f4a6659f2ce00b64a
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
Log Message:
-----------
[NFC] llvm-cgdata use StringRef in exitWithError to reduce construction (#120771)
Replace `static void exitWithError(Twine Message, std::string Whence =
"", std::string Hint = "")` std::string with StringRef to remove
constructing Strings on every call or passing by value
Fixes: #100065
Commit: 3805355ef69a33fc6b32e4a4de0ad3ef22584c65
https://github.com/llvm/llvm-project/commit/3805355ef69a33fc6b32e4a4de0ad3ef22584c65
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
A llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.nxv2i32.fail.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-calls.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
Log Message:
-----------
[AMDGPU] Handle natively unsupported types in addrspace(7) lowering (#110572)
The current lowering for ptr addrspace(7) assumed that the instruction
selector can handle arbtrary LLVM types, which is not the case. Code
generation can't deal with
- Values that aren't 8, 16, 32, 64, 96, or 128 bits long
- Aggregates (this commit only handles arrays of scalars, more may come)
- Vectors of more than one byte
- 3-word values that aren't a vector of 3 32-bit values (for axample, a
<6 x half>)
This commit adds a buffer contents type legalizer that adds the needed
bitcasts, zero-extensions, and splits into subcompnents needed to
convert a load or store operation into one that can be successfully
lowered through code generation.
In the long run, some of the involved bitcasts (though potentially not
the buffer operation splitting) ought to be handled by the instruction
legalizer, but SelectionDAG makes this difficult.
It also takes advantage of the new `nuw` flag on `getelementptr` when
lowering GEPs to offset additions.
We don't currently plumb through `nsw` on GEPs since that should likely
be a separate change and would require declaring what we mean by "the
address" in the context of the GEP guarantees.
Commit: 0fbec1e1eedf7f6a758d3aba3dfc8d77a824d80e
https://github.com/llvm/llvm-project/commit/0fbec1e1eedf7f6a758d3aba3dfc8d77a824d80e
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
Log Message:
-----------
[SandboxVec][BottomUpVec][NFC] Add comments
Commit: cac3f5ecb972194322aeeb8e84e7c7dd60dedef8
https://github.com/llvm/llvm-project/commit/cac3f5ecb972194322aeeb8e84e7c7dd60dedef8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[memprof] Add simplify_type (NFC) (#123556)
IndexCall is a simple wrapper around:
PointerUnion<CallsiteInfo *, AllocInfo *>
Now, because we don't have CastInfo for IndexCall, we would have to
use getBase like so:
dyn_cast_if_present<CallsiteInfo *>(Call.getBase())
This patch adds simplify_type<IndexCall>, which in turn enables
CastInfo for IndexCall, so we can drop getBase like so::
dyn_cast_if_present<CallsiteInfo *>(Call)
Commit: bc1e699d9fb52548c1bc2420f10929473a4c3908
https://github.com/llvm/llvm-project/commit/bc1e699d9fb52548c1bc2420f10929473a4c3908
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#123557)
Commit: f355a447634d6498fc5765771a9579564510654f
https://github.com/llvm/llvm-project/commit/f355a447634d6498fc5765771a9579564510654f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
Log Message:
-----------
[HipStdPar] Avoid repeated hash lookups (NFC) (#123558)
Commit: 64749fb01538fba2b56d9850497d5f3a626cabc2
https://github.com/llvm/llvm-project/commit/64749fb01538fba2b56d9850497d5f3a626cabc2
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
R llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.nxv2i32.fail.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-calls.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
Log Message:
-----------
Revert "[AMDGPU] Handle natively unsupported types in addrspace(7) lowering" (#123657)
Reverts llvm/llvm-project#110572
Seem to have broken a buildbot, not sure why
https://lab.llvm.org/buildbot/#/builders/108/builds/8346
Commit: 7fa1936947194ec7425d5d21ce43d69d5b09dd2d
https://github.com/llvm/llvm-project/commit/7fa1936947194ec7425d5d21ce43d69d5b09dd2d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Log Message:
-----------
[InstCombine] Avoid repeated hash lookups (NFC) (#123559)
Commit: efae9f3c2192e72cf753f2e29fd930e14e4fdd90
https://github.com/llvm/llvm-project/commit/efae9f3c2192e72cf753f2e29fd930e14e4fdd90
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
Log Message:
-----------
[MIRParser] Avoid repeated map lookups (NFC) (#123561)
Commit: 818d6e56654a37d365928513f39113fe6a1f6cb9
https://github.com/llvm/llvm-project/commit/818d6e56654a37d365928513f39113fe6a1f6cb9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#123562)
Commit: 64edde6648cc772c299dc4b39bb2ae7e4e294127
https://github.com/llvm/llvm-project/commit/64edde6648cc772c299dc4b39bb2ae7e4e294127
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[clang] Improve the documentation for the init_priority attribute (#123098)
The documentation wasn't very clear about whether ordering is controlled
within or across TUs, and same for dylibs. Clarify that, and also add
mentions for the state of support on Mach-O platforms.
Commit: 8424bf207efd89eacf2fe893b67be98d535e1db6
https://github.com/llvm/llvm-project/commit/8424bf207efd89eacf2fe893b67be98d535e1db6
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSystemZ.def
M clang/lib/Basic/Targets/SystemZ.cpp
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/vecintrin.h
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaSystemZ.cpp
A clang/test/CodeGen/SystemZ/builtins-systemz-bitop.c
A clang/test/CodeGen/SystemZ/builtins-systemz-vector5-error.c
A clang/test/CodeGen/SystemZ/builtins-systemz-vector5.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector-error.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector2-error.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector3-error.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector3.c
A clang/test/CodeGen/SystemZ/builtins-systemz-zvector5-error.c
A clang/test/CodeGen/SystemZ/builtins-systemz-zvector5.c
M clang/test/CodeGen/SystemZ/systemz-abi-vector.c
M clang/test/CodeGen/SystemZ/systemz-abi.c
M clang/test/CodeGen/SystemZ/zvector.c
M clang/test/Driver/systemz-march.c
M clang/test/Misc/target-invalid-cpu-note/systemz.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Sema/zvector.c
M llvm/include/llvm/IR/IntrinsicsSystemZ.td
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.h
M llvm/lib/Target/SystemZ/SystemZFeatures.td
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/SystemZ/SystemZOperands.td
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/SystemZ/SystemZProcessors.td
M llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/test/Analysis/CostModel/SystemZ/divrem-reg.ll
M llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll
M llvm/test/Analysis/CostModel/SystemZ/int-arith.ll
M llvm/test/CodeGen/SystemZ/args-12.ll
M llvm/test/CodeGen/SystemZ/args-13.ll
A llvm/test/CodeGen/SystemZ/bitop-intrinsics.ll
A llvm/test/CodeGen/SystemZ/int-abs-03.ll
M llvm/test/CodeGen/SystemZ/int-add-19.ll
A llvm/test/CodeGen/SystemZ/int-cmp-64.ll
A llvm/test/CodeGen/SystemZ/int-conv-15.ll
A llvm/test/CodeGen/SystemZ/int-div-08.ll
A llvm/test/CodeGen/SystemZ/int-max-02.ll
A llvm/test/CodeGen/SystemZ/int-min-02.ll
A llvm/test/CodeGen/SystemZ/int-mul-14.ll
A llvm/test/CodeGen/SystemZ/int-mul-15.ll
A llvm/test/CodeGen/SystemZ/int-mul-16.ll
A llvm/test/CodeGen/SystemZ/int-neg-04.ll
M llvm/test/CodeGen/SystemZ/int-sub-12.ll
A llvm/test/CodeGen/SystemZ/llxa-01.ll
A llvm/test/CodeGen/SystemZ/llxa-02.ll
A llvm/test/CodeGen/SystemZ/llxa-03.ll
A llvm/test/CodeGen/SystemZ/llxa-04.ll
A llvm/test/CodeGen/SystemZ/llxa-05.ll
A llvm/test/CodeGen/SystemZ/lxa-01.ll
A llvm/test/CodeGen/SystemZ/lxa-02.ll
A llvm/test/CodeGen/SystemZ/lxa-03.ll
A llvm/test/CodeGen/SystemZ/lxa-04.ll
A llvm/test/CodeGen/SystemZ/lxa-05.ll
A llvm/test/CodeGen/SystemZ/scalar-ctlz-03.ll
A llvm/test/CodeGen/SystemZ/scalar-ctlz-04.ll
A llvm/test/CodeGen/SystemZ/scalar-cttz-03.ll
A llvm/test/CodeGen/SystemZ/scalar-cttz-04.ll
A llvm/test/CodeGen/SystemZ/vec-cmp-09.ll
A llvm/test/CodeGen/SystemZ/vec-div-03.ll
A llvm/test/CodeGen/SystemZ/vec-eval.ll
A llvm/test/CodeGen/SystemZ/vec-intrinsics-05.ll
A llvm/test/CodeGen/SystemZ/vec-mul-06.ll
A llvm/test/MC/Disassembler/SystemZ/insns-arch15.txt
A llvm/test/MC/SystemZ/insn-bad-arch15.s
M llvm/test/MC/SystemZ/insn-bad-z16.s
A llvm/test/MC/SystemZ/insn-good-arch15.s
M llvm/unittests/TargetParser/Host.cpp
Log Message:
-----------
[SystemZ] Add support for new cpu architecture - arch15
This patch adds support for the next-generation arch15
CPU architecture to the SystemZ backend.
This includes:
- Basic support for the new processor and its features.
- Detection of arch15 as host processor.
- Assembler/disassembler support for new instructions.
- Exploitation of new instructions for code generation.
- New vector (signed|unsigned|bool) __int128 data types.
- New LLVM intrinsics for certain new instructions.
- Support for low-level builtins mapped to new LLVM intrinsics.
- New high-level intrinsics in vecintrin.h.
- Indicate support by defining __VEC__ == 10305.
Note: No currently available Z system supports the arch15
architecture. Once new systems become available, the
official system name will be added as supported -march name.
Commit: 8b879d106bc578151392fa12e5ddf800edb515cc
https://github.com/llvm/llvm-project/commit/8b879d106bc578151392fa12e5ddf800edb515cc
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/cmake/modules/AddMLIR.cmake
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/SparseTensor/CMakeLists.txt
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Conversion/ConvertToSPIRV/CMakeLists.txt
M mlir/test/lib/Conversion/FuncToLLVM/CMakeLists.txt
M mlir/test/lib/Conversion/MathToVCIX/CMakeLists.txt
M mlir/test/lib/Conversion/OneToNTypeConversion/CMakeLists.txt
M mlir/test/lib/Conversion/VectorToSPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Affine/CMakeLists.txt
M mlir/test/lib/Dialect/Arith/CMakeLists.txt
M mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
M mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
M mlir/test/lib/Dialect/ControlFlow/CMakeLists.txt
M mlir/test/lib/Dialect/DLTI/CMakeLists.txt
M mlir/test/lib/Dialect/Func/CMakeLists.txt
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/LLVM/CMakeLists.txt
M mlir/test/lib/Dialect/Linalg/CMakeLists.txt
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/MemRef/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/NVGPU/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/CMakeLists.txt
M mlir/test/lib/Dialect/SPIRV/CMakeLists.txt
M mlir/test/lib/Dialect/Shape/CMakeLists.txt
M mlir/test/lib/Dialect/Tensor/CMakeLists.txt
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lib/IR/CMakeLists.txt
M mlir/test/lib/Interfaces/LoopLikeInterface/CMakeLists.txt
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/test/lib/Reducer/CMakeLists.txt
M mlir/test/lib/Rewrite/CMakeLists.txt
M mlir/test/lib/Tools/PDLL/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/test/python/lib/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
Log Message:
-----------
Revert "[mlir] Link libraries that aren't included in libMLIR to libMLIR (#123477)"
This reverts commit af6616676fb7f9dd4898290ea684ee0c90f1701d. It broke
builds with `-DBUILD_SHARED_LIBS=ON`.
Commit: 623ba9bb3bbde3bd055f336ffc67d3f5c725903a
https://github.com/llvm/llvm-project/commit/623ba9bb3bbde3bd055f336ffc67d3f5c725903a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M libcxx/include/__type_traits/invoke.h
Log Message:
-----------
[libc++] Add missing _LIBCPP_NODEBUG on internal alias
Commit: 9c464e60d2c74094e3782d363e482c98762036ee
https://github.com/llvm/llvm-project/commit/9c464e60d2c74094e3782d363e482c98762036ee
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/doconcurrent01.f90
A flang/test/Semantics/OpenMP/forall.f90
Log Message:
-----------
[flang][OpenMP] Don't try to privatize FORALL/DO CONCURRENT indices (#123341)
FORALL/DO CONCURRENT indices have predetermined private DSA (OpenMP 5.2
5.1.1).
As FORALL/DO CONCURRENT indices are defined in the construct itself, and
OpenMP
directives may not appear in it, they are already private and don't need
to be modified.
Fixes https://github.com/llvm/llvm-project/issues/100919
Fixes https://github.com/llvm/llvm-project/issues/120023
Fixes https://github.com/llvm/llvm-project/issues/123537
Commit: 4df28af7134518981d40cb3242b2a90af867fdae
https://github.com/llvm/llvm-project/commit/4df28af7134518981d40cb3242b2a90af867fdae
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Log Message:
-----------
[mlir] Add lowering of absi and fpowi to libdevice (#123644)
More concise version of #123422.
---------
Co-authored-by: William S. Moses <gh at wsmoses.com>
Commit: 2c9cc7806ed5f07230ab509ce46e8160ff0a2e53
https://github.com/llvm/llvm-project/commit/2c9cc7806ed5f07230ab509ce46e8160ff0a2e53
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Update cmake and library layering maintainers (#120542)
Currently @chandlerc is listed as the maintainer for "CMake and library
layering", but he has not been active in that area in while.
Consequently, this patch updates the maintainers for CMake and
library layering to folks who are working more actively in these
areas.
See https://llvm.org/docs/DeveloperPolicy.html#maintainers for
context on the maintainers terminology.
Commit: 1434313bd8c425b2aadc301ddaf42a91552e609e
https://github.com/llvm/llvm-project/commit/1434313bd8c425b2aadc301ddaf42a91552e609e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LiveRegMatrix.h
M llvm/lib/CodeGen/LiveRegMatrix.cpp
Log Message:
-----------
[LiveRegMatrix] Use MCRegUnit instead of MCRegister for register unit. NFC
MCRegister should be used for registers, not register units.
Commit: 3d08fa25824cafc748086d06e0b51b7f0f334b8e
https://github.com/llvm/llvm-project/commit/3d08fa25824cafc748086d06e0b51b7f0f334b8e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M libcxx/include/future
Log Message:
-----------
[libc++] Another _LIBCPP_NODEBUG fix
Commit: e68d18c34e3e7afef01d5a906403d633ab21c6de
https://github.com/llvm/llvm-project/commit/e68d18c34e3e7afef01d5a906403d633ab21c6de
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Add Zlib at build time to CI container (#123489)
This patch adds zlib at build time to the CI container. This is needed
to make an lldb test pass that defaults to using the system lld if it is
not explicitly enabled in LLVM_ENABLE_PROJECTS.
Fixes #123479 (by fixing the proximal cause).
Commit: d35d7f4b13c079f962be2c866339b0ab3ad8c452
https://github.com/llvm/llvm-project/commit/d35d7f4b13c079f962be2c866339b0ab3ad8c452
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M .github/workflows/build-ci-container.yml
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Add Agent Container Image (#123486)
This patch adds an agent container image on top of the normal CI
container image. They are the exact same except that the agent container
image also contains Github Runner binaries. I've split it into a
separate container as only one user of these images (the new premerge)
needs this binary installed, and it bloats the container image size
significantly (900MB->1.3GB or so).
Commit: 2f1bc68580e3fecc6dd57dd5aabdd77f5d6559b0
https://github.com/llvm/llvm-project/commit/2f1bc68580e3fecc6dd57dd5aabdd77f5d6559b0
Author: Henry Jiang <h243jian at uwaterloo.ca>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M flang/test/HLFIR/unroll-loops.fir
M flang/test/Integration/unroll-loops.f90
Log Message:
-----------
[flang][PPC] XFAIL unroll-loops on PPC (#123661)
xfail the following 2 test cases that are failing on PowerPC buildbots
`ppc64-flang-aix` and `ppc64le-flang-rhel-clang` due toPR #122906.
Defect opened: #123668.
FAIL: Flang::unroll-loops.fir
FAIL: Flang::unroll-loops.f90
Commit: 28ae363ec03e565eaa70393027da70f389e6ca43
https://github.com/llvm/llvm-project/commit/28ae363ec03e565eaa70393027da70f389e6ca43
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cmp_xx_i/u16 (#122968)
A bulk commit of true16 support for v_cmp_xx_i/u16 instructions
including:
v_cmp_lt_i16
v_cmp_eq_i16
v_cmp_le_i16
v_cmp_gt_i16
v_cmp_ne_i16
v_cmp_ge_i16
v_cmp_lt_u16
v_cmp_eq_u16
v_cmp_le_u16
v_cmp_gt_u16
v_cmp_ne_u16
v_cmp_ge_u16
Commit: e5992b686bb06dd53a4ff1e9586fa350d3ff43b5
https://github.com/llvm/llvm-project/commit/e5992b686bb06dd53a4ff1e9586fa350d3ff43b5
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/warn-infinity-nan-disabled-lnx.cpp
M clang/test/Sema/warn-infinity-nan-disabled-win.cpp
Log Message:
-----------
[Clang] Fix warning for non std functions with name `infinity` (#123417)
Fix reporting diagnostic for non std functions that has the name
`infinity`
Fixes: #123231
Commit: fb974e89095af01a15cf959ba0694c0beb404b9f
https://github.com/llvm/llvm-project/commit/fb974e89095af01a15cf959ba0694c0beb404b9f
Author: kkent030315 <hrn832 at gmail.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/DriverUtils.cpp
M lld/COFF/Writer.cpp
A lld/test/COFF/Inputs/stub63mz
A lld/test/COFF/Inputs/stub64mz
A lld/test/COFF/Inputs/stub64zz
A lld/test/COFF/Inputs/stub68mz
A lld/test/COFF/stub.test
Log Message:
-----------
[LLD][COFF] Add support for custom DOS stub (#122561)
This change implements support for the /stub flag to align with MS
link.exe. This option is useful when a program needs to optimize the DOS
program that executes when the PE runs on DOS, avoiding the traditional
hardcoded DOS program in LLD.
Commit: 2cfddda1f5c6afdc626eb07304c25ecec4376b0b
https://github.com/llvm/llvm-project/commit/2cfddda1f5c6afdc626eb07304c25ecec4376b0b
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M lld/COFF/DLL.cpp
M lld/COFF/DLL.h
M lld/COFF/Writer.cpp
Log Message:
-----------
[LLD][COFF] Simplify creation of .edata chunks (NFC) (#123651)
Since commit dadc6f2488684, only the constructor of the `EdataContents`
class is used. Replace it with a function and skip the call when using a
custom `.edata` section.
Commit: bd5e12e6a08d60015102a2a2a763353399499ccc
https://github.com/llvm/llvm-project/commit/bd5e12e6a08d60015102a2a2a763353399499ccc
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Don't retrieve Def unnecessarily in isUniformAfterVector (NFC).
dyn_cast for recipes take VPValues, avoid calling getDefiningRecipe
unnecessarily.
Commit: 697c1883f15b81cc526ed2d72cf00f9eaea2502f
https://github.com/llvm/llvm-project/commit/697c1883f15b81cc526ed2d72cf00f9eaea2502f
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
A llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.nxv2i32.fail.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-calls.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
Log Message:
-----------
Reapply "[AMDGPU] Handle natively unsupported types in addrspace(7) lowering" (#123660)
(#123657)
This reverts commit 64749fb01538fba2b56d9850497d5f3a626cabc2.
Adds a constructor to VecSlice to address the failure
Commit: 5e4c34a9b67d9ce15d14f83bcea96ccb69de1eae
https://github.com/llvm/llvm-project/commit/5e4c34a9b67d9ce15d14f83bcea96ccb69de1eae
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/multi-node-reuse-in-bv.ll
Log Message:
-----------
[SLP][NFC]Add a test with incorrect length and cost for repeated matching node
Commit: 7d01a8f2b9ac28ffe73bef4b513d383d3edf34b5
https://github.com/llvm/llvm-project/commit/7d01a8f2b9ac28ffe73bef4b513d383d3edf34b5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/multi-node-reuse-in-bv.ll
Log Message:
-----------
[SLP]Fix vector factor for repeated node for bv
When adding a node vector, when it is used already in the shuffle for
buildvector, need to calculate vector factor from all vector, not only
this single vector, to avoid incorrect result. Also, need to increase
stability of the reused entries detection to avoid mismatch in cost
estimation/codegen.
Fixes #123639
Commit: f427fef09265fe3e0d1a8b38eb960403377fb772
https://github.com/llvm/llvm-project/commit/f427fef09265fe3e0d1a8b38eb960403377fb772
Author: Michal Paszkowski <michal at michalpaszkowski.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M .github/workflows/spirv-tests.yml
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[SPIR-V] Add SPIRV to LLVM_ALL_TARGETS (reapply) (#123654)
This commit promotes the SPIR-V backend from experimental to official
status. As a result, SPIR-V will be built by default, simplifying
integration and increasing accessibility for downstream projects.
Discussion and RFC on Discourse:
https://discourse.llvm.org/t/rfc-promoting-spir-v-to-an-official-target/83614
The PR reapplies the original patch
https://github.com/llvm/llvm-project/pull/119653, reverted due to
buildbot failures.
Commit: 3f0ac4653be567bb252759735884daee0dd99153
https://github.com/llvm/llvm-project/commit/3f0ac4653be567bb252759735884daee0dd99153
Author: Michal Paszkowski <michal at michalpaszkowski.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M .github/workflows/spirv-tests.yml
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Revert "[SPIR-V] Add SPIRV to LLVM_ALL_TARGETS (reapply)" (#123674)
Reverts llvm/llvm-project#123654 due to buildbot issue
Commit: 06c54bc1a200fd87bbf4b81db70f52159c79f5bf
https://github.com/llvm/llvm-project/commit/06c54bc1a200fd87bbf4b81db70f52159c79f5bf
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M lldb/docs/use/formatting.rst
M lldb/include/lldb/Core/FormatEntity.h
M lldb/source/Core/FormatEntity.cpp
M lldb/unittests/Core/FormatEntityTest.cpp
Log Message:
-----------
[lldb] Implement ${target.file} format variable (#123431)
Implements a format variable to print the basename and full path to the
current target.
Commit: b6287fd9714d2a34b27e7ef4953f6e68f39463a4
https://github.com/llvm/llvm-project/commit/b6287fd9714d2a34b27e7ef4953f6e68f39463a4
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
A llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll
Log Message:
-----------
[DirectX] Set the EnableRawAndStructuredBuffers shader flag (#122667)
When raw or structured buffers are used, we need to set the DXIL flag
saying so.
Fixes #122663.
Commit: a3beb7db36dfc8fee9b42ff8ed5adb37588d6839
https://github.com/llvm/llvm-project/commit/a3beb7db36dfc8fee9b42ff8ed5adb37588d6839
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
Log Message:
-----------
Workflows: Drop Windows release builds and use more powerful runners for others (#117111)
We have community provided Windows builds that are better than what we
can build on GitHub. For the Linux/X86 builds and Mac/Aarch64 builds we
will use depot runners, for Mac/X86 we will use the larger GitHub
runners.
Commit: a0c68119bdf0a57487fb95e2d735f2c84c498972
https://github.com/llvm/llvm-project/commit/a0c68119bdf0a57487fb95e2d735f2c84c498972
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M .github/workflows/build-ci-container.yml
Log Message:
-----------
[Github] Fix container push job
This patch fixes a typo impacting functionality and also adds the relevant
variables to the step outputs list so they can actually get picked up by the
push container step.
Commit: 271b3383d7d86d5945b13117558cfe600aac3528
https://github.com/llvm/llvm-project/commit/271b3383d7d86d5945b13117558cfe600aac3528
Author: Jason Eckhardt <jeckhardt at nvidia.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/test/TableGen/generic-tables-instruction.td
M llvm/test/TableGen/generic-tables.td
M llvm/utils/TableGen/SearchableTableEmitter.cpp
Log Message:
-----------
[TableGen][NFC] Factor early-out range check. (#123645)
Combine the EarlyOut and IsContiguous range check.
Also avoid "comparison is always false" warnings in emitted code when
the lower-bound check is against 0.
Commit: 4e2efc3bd500836d0fa977d6e257ffee2c92e178
https://github.com/llvm/llvm-project/commit/4e2efc3bd500836d0fa977d6e257ffee2c92e178
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/docs/ClangOffloadBundler.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Driver/OffloadBundler.h
M clang/lib/Driver/OffloadBundler.cpp
M clang/test/Driver/clang-offload-bundler-zlib.c
Log Message:
-----------
[OffloadBundler] Compress bundles over 4GB (#122307)
Added initial support for version 3 of the compressed offload bundle
format, which uses 64-bit fields for Total File Size and Uncompressed
Binary Size. This enables support for files larger than 4GB. The support
is currently experimental and can be enabled by setting the environment
variable `COMPRESSED_BUNDLE_FORMAT_VERSION=3`.
Commit: 72c560da4b923b42114490093794e585144879f4
https://github.com/llvm/llvm-project/commit/72c560da4b923b42114490093794e585144879f4
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/docs/ClangOffloadBundler.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Driver/OffloadBundler.h
M clang/lib/Driver/OffloadBundler.cpp
M clang/test/Driver/clang-offload-bundler-zlib.c
Log Message:
-----------
Revert "[OffloadBundler] Compress bundles over 4GB (#122307)"
revert due to failure in buildbot
https://lab.llvm.org/buildbot/#/builders/144/builds/16114
This reverts commit 4e2efc3bd500836d0fa977d6e257ffee2c92e178.
Commit: b45072d9c0bff27a8943b9ecea061f5286b0aab5
https://github.com/llvm/llvm-project/commit/b45072d9c0bff27a8943b9ecea061f5286b0aab5
Author: Michal Paszkowski <michal at michalpaszkowski.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
Log Message:
-----------
[SPIR-V] Fix type compatibility in memory order comparisons (#123676)
Fixed a type mismatch issue in the comparison of std::memory_order with
integers.
This fixes an issue reported by clang-debian-cpp20 buildbot for
https://github.com/llvm/llvm-project/pull/123654
Commit: abbfed9be7e0a247ac0ca248b4b7304d879b026a
https://github.com/llvm/llvm-project/commit/abbfed9be7e0a247ac0ca248b4b7304d879b026a
Author: Feng Zou <feng.zou at intel.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/test/CodeGen/X86/amx-fp8-internal.ll
Log Message:
-----------
[X86][AMX] Fix handling of AMX-FP8 internal intrinsics (#123540)
This is to fix #123410.
Commit: e87b843811e147db8d1edd7fe2dd52bb90be6ebc
https://github.com/llvm/llvm-project/commit/e87b843811e147db8d1edd7fe2dd52bb90be6ebc
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M clang/docs/ClangOffloadBundler.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Driver/OffloadBundler.h
M clang/lib/Driver/OffloadBundler.cpp
M clang/test/Driver/clang-offload-bundler-zlib.c
Log Message:
-----------
Reland [OffloadBundler] Compress bundles over 4GB (#122307)
Reland the patch after fixing the lit test.
Commit: 7786266dc7b4e89feadcb01ff21f9e3cf2022a6b
https://github.com/llvm/llvm-project/commit/7786266dc7b4e89feadcb01ff21f9e3cf2022a6b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v2bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v3bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v4bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v2f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v3f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v4f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v2f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v3f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v4f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v2i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v3i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v4i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v2i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v3i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v4i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v2i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v3i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v2p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v3p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v2p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v3p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v4p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v2bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v3bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v4bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v2f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v3f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v4f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v2f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v3f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v4f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v2i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v3i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v4i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v2i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v3i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v4i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v2i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v3i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v2p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v3p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v3p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v4p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v2bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v3bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v4bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v2f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v3f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v4f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v2f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v3f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v4f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v2i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v3i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v4i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v2i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v3i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v4i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v2i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v2p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll
Log Message:
-----------
AMDGPU: Expand shuffle testing with generated tests (#123574)
Add some generated tests with every shuffle permutation
for relevant vector element types and sizes. Not sure if this
is going overboard with the number of tests. I pruned out the largest
cases (16 and 32-bit cases are impractically large), and there's
redundancy when testing the pointer cases (at least for SelectionDAG).
This uses inline assembly to produce sample values because of how the
ABI is lowered when using a function argument. Since we break all
arguments into 32-bit pieces, a shuffle never ends up forming. We
need separate handling to reconstruct shuffles in contexts involving
physical registers in ABI contexts.
I wrote a small tool to generate these, so I can easily change the
exact test body. Not sure if it's worth posting anywhere.
This is in preparation for making better use of v_pk_mov_b32,
v_mov_b64 and s_mov_b64 in shuffles.
Commit: 9d9c5619a5156a5be6ee5e5fd45924b26a85626e
https://github.com/llvm/llvm-project/commit/9d9c5619a5156a5be6ee5e5fd45924b26a85626e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M llvm/lib/Target/ARM/A15SDOptimizer.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
Log Message:
-----------
[ARM] Use MCRegister instead of unsigned. NFC
Primarily around uses of getSubReg/getSuperReg.
Commit: c2aa11d148679b7d49cdff3819d5c8bdbd807777
https://github.com/llvm/llvm-project/commit/c2aa11d148679b7d49cdff3819d5c8bdbd807777
Author: Thirumalai Shaktivel <74826228+Thirumalai-Shaktivel at users.noreply.github.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/check-omp-structure.cpp
R flang/test/Lower/OpenMP/Todo/task_untied.f90
M flang/test/Lower/OpenMP/task.f90
A flang/test/Semantics/OpenMP/task-untied01.f90
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[Flang] Add LLVM lowering support for UNTIED clause in Task (#121052)
Implementation details:
The UNTIED clause is recognized by setting the flag=0 for the default
case or performing logical OR to flag if other clauses are specified,
and this flag is passed as an argument to the `__kmpc_omp_task_alloc`
runtime call.
Resubmitting the PR with fix for the failure, as it was reverted here:
927a70daf31b1610627f346b0dc140eda72144b9
and previously merged here: https://github.com/llvm/llvm-project/pull/115283
Commit: 585858aeb6247b3892218edb9d353c63f1c33186
https://github.com/llvm/llvm-project/commit/585858aeb6247b3892218edb9d353c63f1c33186
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v3bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v4bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v2f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v3f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v4f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v3i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v4i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v3i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v3p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v3bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v4bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v2f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v3f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v4f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v3i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v4i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v3i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v3p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v3bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v4bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v2f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v3f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v4f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v3i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v4i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll
Log Message:
-----------
AMDGPU: Fix asm constrains in new shuffle tests
These passed prechecks but failed after cc5eba1737146a727a61b5dbe16d8c2ac453981e
Commit: 2d9f40694324a72c2b7a3d6a9cfcc7ce8069afc1
https://github.com/llvm/llvm-project/commit/2d9f40694324a72c2b7a3d6a9cfcc7ce8069afc1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M offload/DeviceRTL/include/Debug.h
M offload/DeviceRTL/include/LibC.h
M offload/DeviceRTL/src/Debug.cpp
M offload/DeviceRTL/src/LibC.cpp
M offload/DeviceRTL/src/Parallelism.cpp
M offload/DeviceRTL/src/State.cpp
Log Message:
-----------
[OpenMP] Adjust 'printf' handling in the OpenMP runtime (#123670)
Summary:
We used to avoid a lot of this stuff because we didn't properly handle
variadics in device code. That's been solved for now, so we can just
make an internal printf handler that forwards to the external `vprintf`
function. This is either provided by NVIDIA's SDK or by the GPU libc
implementation.
The main reason for doing this is because it prevents the stupid AMDGPU
printf pass from mangling our beautiful printfs!
Commit: 3274bf6b4282a0dafd4b5a2efa09824e5ca417d0
https://github.com/llvm/llvm-project/commit/3274bf6b4282a0dafd4b5a2efa09824e5ca417d0
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M offload/DeviceRTL/include/Synchronization.h
M offload/DeviceRTL/src/Synchronization.cpp
Log Message:
-----------
[OpenMP] Make each atomic helper take an atomic scope argument (#122786)
Summary:
Right now we just default to device for each type, and mix an ad-hoc
scope with the one used by the compiler's builtins. Unify this can make
each version take the scope optionally.
For @ronlieb, this will remove the need for `add_system` in the fork as
well as the extra `cas` with system scope, just pass `system`.
Commit: afced70e697e66fb6920b53d489d3fa4498e22dc
https://github.com/llvm/llvm-project/commit/afced70e697e66fb6920b53d489d3fa4498e22dc
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-01-20 (Mon, 20 Jan 2025)
Changed paths:
M flang/test/Lower/OpenMP/Todo/allocate-clause-allocator.f90
Log Message:
-----------
[OpenMP][Flang] Workaround omp_lib error (#123666)
It appears that omp_lib is not correctly (or maybe not at all?) found
from the build directory. This made a few buildbots break after
[PR#121356](https://github.com/llvm/llvm-project/pull/121356) landed.
This is a workaround to unblock the buildbots.
https://lab.llvm.org/staging/#/builders/130/builds/12654
https://lab.llvm.org/buildbot/#/builders/140/builds/15102
https://lab.llvm.org/staging/#/builders/105/builds/13855
Commit: 5d281a480e5caae09962b863960d7d057e908a3c
https://github.com/llvm/llvm-project/commit/5d281a480e5caae09962b863960d7d057e908a3c
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/many-load-stores.ll
Log Message:
-----------
[LoopInterchange] Constrain number of load/stores in a loop (#118973)
In the current state of the code, the transform computes entries for the
dependency matrix until `MaxMemInstrCount` which is 100. After 99th
entry, it terminates and thus overall wastes compile-time.
It would be nice if we can compute total number of entries upfront and
early exit if the number of entries > 100. However, computing the number
of entries is not always possible as it depends on two factors:
1. Number of load-store pairs in a loop.
2. Number of common loop levels for each of the pair.
This patch constrains the whole computation on the number of loads and
stores instructions in the loop.
In another approach, I experimented with computing 1 and constraining
the number of pairs, but that did not lead to any additional benefit in
terms of compile time. However, when other issues are fixed, I can
revisit this approach.
Commit: 5cde6d2fdf1e2ededf10ac0a30187c3359a93828
https://github.com/llvm/llvm-project/commit/5cde6d2fdf1e2ededf10ac0a30187c3359a93828
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
Log Message:
-----------
[ReachingDefAnalysis][NFC] Replace MCRegister with Register (#123626)
This is preparation for extending ReachingDefAnalysis to stack slots. We
should use `Register`, not `MCRegister` for something that can be a
physical register or a stack slot.
Commit: f07e5162d0e67ec980e0ea282cf294f377407b10
https://github.com/llvm/llvm-project/commit/f07e5162d0e67ec980e0ea282cf294f377407b10
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
[Clang] Delegate part of SetupConstraintScope's job to LambdaScopeForCallOperatorInstantiationRAII (#123687)
Now that the RAII object has a dedicate logic for handling nested
lambdas, where the inner lambda could reference any
captures/variables/parameters from the outer lambda, we can shift the
responsibility for managing lambdas away from SetupConstraintScope().
I think this also makes the structure clearer.
Fixes https://github.com/llvm/llvm-project/issues/123441
Commit: 79231a86846b7dff09497fc58ea1e82e892052bd
https://github.com/llvm/llvm-project/commit/79231a86846b7dff09497fc58ea1e82e892052bd
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
A compiler-rt/test/orc/TestCases/Linux/loongarch64/ehframe-default.cpp
A compiler-rt/test/orc/TestCases/Linux/loongarch64/ehframe-libunwind.cpp
A compiler-rt/test/orc/TestCases/Linux/loongarch64/lit.local.cfg.py
A compiler-rt/test/orc/TestCases/Linux/loongarch64/lljit-ehframe.cpp
A compiler-rt/test/orc/TestCases/Linux/loongarch64/lljit-initialize-deinitialize.ll
A compiler-rt/test/orc/TestCases/Linux/loongarch64/priority-static-initializer.S
A compiler-rt/test/orc/TestCases/Linux/loongarch64/trivial-atexit.S
A compiler-rt/test/orc/TestCases/Linux/loongarch64/trivial-cxa-atexit.S
A compiler-rt/test/orc/TestCases/Linux/loongarch64/trivial-static-initializer.S
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
Log Message:
-----------
[ORC-RT][LoongArch] Add initial support for loongarch64 in ELFNixPlatform (#123575)
Enable ELFNixPlatform support for loongarch64. These are few simple
changes, but it allows us to use the orc runtime in ELF/LoongArch64
backend.
This change adds test cases targeting the LoongArch64 Linux platform to
the ORC runtime integration test suite. Since jitlink for loongarch64 is
ready for general use, and ELF-based platforms support defining multiple
static initializer table sections with differing priorities, some
relevant test cases in compiler-rt for ELFNixPlatform support can be
enabled.
Commit: 6aaa8f25b66dc1fef4e465f274ee40b82d632988
https://github.com/llvm/llvm-project/commit/6aaa8f25b66dc1fef4e465f274ee40b82d632988
Author: Matthias Springer <me at m-sp.org>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/IR/BuiltinTypes.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/lib/CAPI/IR/BuiltinTypes.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/LLVMCommon/MemRefBuilder.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/EmulateNarrowType.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
M mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/lib/Dialect/NVGPU/Transforms/CreateAsyncGroups.cpp
M mlir/lib/Dialect/NVGPU/Utils/MMAUtils.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/test/lib/Analysis/TestMemRefStrideCalculation.cpp
Log Message:
-----------
[mlir][IR][NFC] Move free-standing functions to `MemRefType` (#123465)
Turn free-standing `MemRefType`-related helper functions in
`BuiltinTypes.h` into member functions.
Commit: 385f776b639097503eb43b124a3f68570c8c6beb
https://github.com/llvm/llvm-project/commit/385f776b639097503eb43b124a3f68570c8c6beb
Author: Cinhi Young <cyan at cyano.uk>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/test/CodeGen/Mips/msa/shuffle.ll
Log Message:
-----------
[MIPS][MSA] Invert operand order of `ILVOD` when lowering `VECTOR_SHUFFLE` (#123555)
This PR fixes operand order of `ILVOD.df` when lowering
`VECTOR_SHUFFLE`, the result was `<y[1], x[1]>` while it should be
`<x[1], y[1]>`.
* This PR is split from #123040.
Commit: ce32625966a922fe96aababe0ed975ada004901f
https://github.com/llvm/llvm-project/commit/ce32625966a922fe96aababe0ed975ada004901f
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Lower/LoweringOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/ConvertVariable.cpp
A flang/test/Driver/fno-zero-init.f90
A flang/test/Lower/zero_init.f90
A flang/test/Lower/zero_init_default_init.f90
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
Reland "[Flang][Driver] Add a flag to control zero initialization" (#123606)
Reverts llvm/llvm-project#123330
Commit: 7bb363bdd4e87ee0b1ded74ef2616643153ff756
https://github.com/llvm/llvm-project/commit/7bb363bdd4e87ee0b1ded74ef2616643153ff756
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
Log Message:
-----------
[CodeGen] Use MCRegister for ignoreCSRForAllocationOrder. (#123685)
Commit: 26b87aad9e2d34d53df67522dc5aea5f7c54a458
https://github.com/llvm/llvm-project/commit/26b87aad9e2d34d53df67522dc5aea5f7c54a458
Author: Hervé Poussineau <hpoussin at reactos.org>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsSubtarget.h
A llvm/test/CodeGen/Mips/dllimport.ll
A llvm/test/MC/Mips/coff-relocs-dllimport.ll
Log Message:
-----------
[Mips] Handle declspec(dllimport) on mipsel-windows-* triples (#120912)
On Windows, imported symbols must be searched with '__imp_' prefix.
Support imported global variables and imported functions.
Commit: 73beb153c1de9b5fab4086b89ac34c6c49a74fdc
https://github.com/llvm/llvm-project/commit/73beb153c1de9b5fab4086b89ac34c6c49a74fdc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/MC/WasmObjectWriter.cpp
Log Message:
-----------
[MC] Avoid repeated hash lookups (NFC) (#123698)
Commit: 1714facf4f7d7f4ef5a1846aded769fec8e684ac
https://github.com/llvm/llvm-project/commit/1714facf4f7d7f4ef5a1846aded769fec8e684ac
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/utils/TableGen/Basic/VTEmitter.cpp
Log Message:
-----------
[TableGen] Avoid repeated map lookups (NFC) (#123699)
Commit: 671088be4e7883f9907d22bb64248996a33f9bae
https://github.com/llvm/llvm-project/commit/671088be4e7883f9907d22bb64248996a33f9bae
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp
Log Message:
-----------
[Rewrite] Avoid repeated hash lookups (NFC) (#123696)
Commit: a588e20280435a880c730602c3bf0a7f78e599f2
https://github.com/llvm/llvm-project/commit/a588e20280435a880c730602c3bf0a7f78e599f2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
Log Message:
-----------
[SelectionDAG] Avoid repeated hash lookups (NFC) (#123697)
Commit: 0f9e913466982b92776d6ff748df48af28631517
https://github.com/llvm/llvm-project/commit/0f9e913466982b92776d6ff748df48af28631517
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
A mlir/test/Target/LLVMIR/nvvm/tma_bulk_copy.mlir
Log Message:
-----------
[MLIR][NVVM] Add TMA Bulk Copy Ops (#123186)
PR #122344 adds intrinsics for Bulk Async Copy
(non-tensor variants) using TMA. This patch
adds the corresponding NVVM Dialect Ops.
lit tests are added to verify the lowering to all
variants of the intrinsics.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 97d691b4b3f5ba446d6827fc29fbe15e44a7adac
https://github.com/llvm/llvm-project/commit/97d691b4b3f5ba446d6827fc29fbe15e44a7adac
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/unittests/CodeGen/LowLevelTypeTest.cpp
M llvm/unittests/FuzzMutate/OperationsTest.cpp
M llvm/unittests/FuzzMutate/RandomIRBuilderTest.cpp
M llvm/unittests/IR/ConstantsTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/Linker/LinkModulesTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[IR][unittests] Replace of PointerType::get(Type) with opaque version (NFC) (#123621)
In accordance with https://github.com/llvm/llvm-project/issues/123569
Commit: 4740e097031d231cd39680c16a31771d22fe84c9
https://github.com/llvm/llvm-project/commit/4740e097031d231cd39680c16a31771d22fe84c9
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang-tools-extra/clangd/FindTarget.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang/include/clang/Sema/HeuristicResolver.h
M clang/lib/Sema/HeuristicResolver.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
Log Message:
-----------
[clang][Sema] Respect qualification of methods in heuristic results (#123551)
Fixes https://github.com/llvm/llvm-project/issues/123549
Commit: c22364a4324218e29512740466a2b2cb1a406d8b
https://github.com/llvm/llvm-project/commit/c22364a4324218e29512740466a2b2cb1a406d8b
Author: Marius Kamp <msk at posteo.org>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/csel-cmp-cse.ll
Log Message:
-----------
[AArch64] Eliminate Common SUBS by Reassociating Non-Constants (#123344)
Commit 1eed46960c217f9480865702f06fb730c7521e61 added logic to
reassociate a (add (add x y) -c) operand to a CSEL instruction with a
comparison involving x and c (or a similar constant) in order to obtain
a common (SUBS x c) instruction.
This commit extends this logic to non-constants. In this way, we also
reassociate a (sub (add x y) z) operand of a CSEL instruction to
(add (sub x z) y) if the CSEL compares x and z, for example.
Alive proof: https://alive2.llvm.org/ce/z/SEVpR
Commit: 547bfda56b2e3f3a4c6d2357d3566dcd3fa996ad
https://github.com/llvm/llvm-project/commit/547bfda56b2e3f3a4c6d2357d3566dcd3fa996ad
Author: David Green <david.green at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/bf16-convert-intrinsics.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64] Improve bcvtn2 and remove aarch64_neon_bfcvt intrinsics (#120363)
This started out as trying to combine bf16 fpround to BFCVT2
instructions, but ended up removing the aarch64.neon.nfcvt intrinsics in
favour of generating fpround instructions directly. This simplifies the
patterns and can lead to other optimizations. The BFCVT2 instruction is
adjusted to makes sure the types are valid, and a bfcvt2 is now
generated in more place. The old intrinsics are auto-upgraded to fptrunc
instructions too.
Commit: 5658bc4ae75497edc5ec7c934931c8681d33fac8
https://github.com/llvm/llvm-project/commit/5658bc4ae75497edc5ec7c934931c8681d33fac8
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lldb/source/Plugins/Process/Utility/LinuxSignals.cpp
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
M lldb/test/API/linux/aarch64/gcs/main.c
Log Message:
-----------
[lldb][Linux] Add Control Protection Fault signal (#122917)
This will be sent by Arm's Guarded Control Stack extension when an
invalid return is executed.
The signal does have an address we could show, but it's the PC at which
the fault occured. The debugger has plenty of ways to show you that
already, so I've left it out.
```
(lldb) c
Process 460 resuming
Process 460 stopped
* thread #1, name = 'test', stop reason = signal SIGSEGV: control protection fault
frame #0: 0x0000000000400784 test`main at main.c:57:1
54 afunc();
55 printf("return from main\n");
56 return 0;
-> 57 }
(lldb) dis
<...>
-> 0x400784 <+100>: ret
```
The new test case generates the signal by corrupting the link register
then attempting to return. This will work whether we manually enable GCS
or the C library does it for us.
(in the former case you could just return from main and it would fault)
Commit: 2a8c12b29f8dc777a62868512bed1a2dae1ef8b2
https://github.com/llvm/llvm-project/commit/2a8c12b29f8dc777a62868512bed1a2dae1ef8b2
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-array.cpp
Log Message:
-----------
"Reland "[Wunsafe-buffer-usage] Fix false positive when const sized array is indexed by const evaluatable expressions (#119340)"" (#123713)
This reverts commit 7dd34baf5505d689161c3a8678322a394d7a2929.
Fixed the assertion violation reported by
7dd34baf5505d689161c3a8678322a394d7a2929
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: 67b9d3ffc2104e9c718510d83e93b3d26cb0872d
https://github.com/llvm/llvm-project/commit/67b9d3ffc2104e9c718510d83e93b3d26cb0872d
Author: Matthias Gehre <matthias.gehre at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
A mlir/test/Dialect/Linalg/tile-offset.mlir
Log Message:
-----------
[mlir] computeSliceParameters: Fix offset when m(0) != 0 (#122492)
For affine maps where `m(0) != 0`,
like `affine_map<(d0) -> (d0 + 3)` in
```
%generic = linalg.generic
{indexing_maps = [affine_map<(d0) -> (d0 + 3)>,
affine_map<(d0) -> (d0)>],
iterator_types = ["parallel"]} ins(%arg0: tensor<9xf32>) outs(%empty : tensor<6xf32>) {
^bb0(%in : f32, %out: f32):
linalg.yield %in : f32
} -> tensor<6xf32>
```
tiling currently computes the wrong slice offsets. When tiling above
example with a size of 3, it would compute
```
scf.for %i = ...
%slice = tensor.extract_slice %arg0[%i + 3] [6] [1]
linalg.generic
{indexing_maps = [affine_map<(d0) -> (d0 + 3)>,
affine_map<(d0) -> (d0)>],
iterator_types = ["parallel"]} ins(%slice: tensor<6xf32>)
```
and thus apply the `+3` twice (once in the extract slice and a second
time in the linalg.generic).
This PR fixes this to yield an offset of
`tensor.extract_slice %arg0[%i] [6] [1]` instead.
Commit: ebc502056448e950d41f4e2df7bae4e2bc60819e
https://github.com/llvm/llvm-project/commit/ebc502056448e950d41f4e2df7bae4e2bc60819e
Author: David Stuttard <david.stuttard at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
Log Message:
-----------
[AMDGPU] Update entry point name for PAL metadata (#123581)
Old entry-point metadata being updated. Nothing is required
to account for deprecation as nothing uses the old style
Commit: 455b3d6df20c9bb50cdba66fd2f3202bc43eb4ac
https://github.com/llvm/llvm-project/commit/455b3d6df20c9bb50cdba66fd2f3202bc43eb4ac
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/DLL.cpp
M lld/COFF/DLL.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/DriverUtils.cpp
M lld/COFF/MapFile.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/COFF/Writer.cpp
A lld/test/COFF/arm64x-export.test
Log Message:
-----------
[LLD][COFF] Separate EC and native exports for ARM64X (#123652)
Store exports in SymbolTable instead of Configuration.
Commit: b6b18f1eb8f85040629eaeb07a168e3362fdb97b
https://github.com/llvm/llvm-project/commit/b6b18f1eb8f85040629eaeb07a168e3362fdb97b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/test/Transforms/Reassociate/reassoc_bool_vec.ll
Log Message:
-----------
[Reassociate] Don't reassociate vXi1 logical expressions (#123329)
Extends what we already do for i1 types and don't serialize vXi1 logical expressions to improve ILP.
llvm-test-suite numbers
https://github.com/llvm/llvm-project/issues/64840#issuecomment-2053621740
indicate that both reassociations are a net win.
Fixes #64840
Fixes #63946
Commit: 9b6e8df89689c37821e0ec37c63ac3fd40ea5339
https://github.com/llvm/llvm-project/commit/9b6e8df89689c37821e0ec37c63ac3fd40ea5339
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
A llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h
M llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir
Log Message:
-----------
[AMDGPU][NewPM] Port SIFixVGPRCopies to NPM (#123592)
Extends NPM pipeline support till PostRegAlloc passes (greedy is in the
works)
Commit: 616979ebd7dc9ae63522788750ea3dc6a96aa69f
https://github.com/llvm/llvm-project/commit/616979ebd7dc9ae63522788750ea3dc6a96aa69f
Author: Sergey Kozub <skozub at nvidia.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.def
M clang/include/clang/Basic/Cuda.h
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M llvm/lib/Target/NVPTX/NVPTX.td
Log Message:
-----------
[NVPTX] Add support for PTX 8.6 and CUDA 12.6 (12.8) (#123398)
Add CUDA versions 12.7, 12.8, 12.9 which support PTX8.6+ (enables using Blackwell-specific instructions).
Commit: 7acad6893b9b3b43e5e4a8e56404b1b19c07c79f
https://github.com/llvm/llvm-project/commit/7acad6893b9b3b43e5e4a8e56404b1b19c07c79f
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
Log Message:
-----------
[AMDGPU][CodeGen] SILowerWWMCopies: Declare used analyses (#123710)
This prevents legacy PM from mistakenly removing these analyses if
`SILowerWWMCopies` is the last user of them. (it removes dead analyses
after its last use)
Commit: d96ec48068e03d1058b1c31581f7bc8738e12ee0
https://github.com/llvm/llvm-project/commit/d96ec48068e03d1058b1c31581f7bc8738e12ee0
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M libclc/clc/include/clc/relational/clc_select.h
R libclc/clc/include/clc/relational/clc_select.inc
A libclc/clc/include/clc/relational/clc_select_decl.inc
A libclc/clc/include/clc/relational/clc_select_impl.inc
M libclc/clc/lib/clspv/SOURCES
M libclc/clc/lib/generic/relational/clc_select.cl
R libclc/clc/lib/generic/relational/clc_select.inc
M libclc/clc/lib/spirv/SOURCES
M libclc/clc/lib/spirv64/SOURCES
M libclc/generic/include/clc/relational/select.h
R libclc/generic/include/clc/relational/select.inc
M libclc/generic/lib/relational/select.cl
R libclc/generic/lib/relational/select.inc
Log Message:
-----------
[libclc] Route select through __clc_select (#123647)
This was missed during the introduction of select. This also unifies the
various .inc files used for each, as they were essentially identical.
The __clc_select function is now also built for SPIR-V targets.
Commit: eaf3e1b0d1ebae590c9be94eafaa10da9e192a37
https://github.com/llvm/llvm-project/commit/eaf3e1b0d1ebae590c9be94eafaa10da9e192a37
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M libclc/clc/lib/generic/relational/clc_bitselect.cl
M libclc/generic/lib/relational/bitselect.cl
M libclc/generic/lib/relational/bitselect.inc
Log Message:
-----------
[libclc] Route int bitselect through CLC; add half (#123653)
The half variants were missing. The integer bitselect builtins weren't
going through __clc_bitselect due to an oversight when the CLC version
was introduced.
Commit: 84fa1755a5b7845ddaeaa513a3786013c76c9c88
https://github.com/llvm/llvm-project/commit/84fa1755a5b7845ddaeaa513a3786013c76c9c88
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/test/CodeGen/AArch64/targetattr.c
M clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c
M clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/test/MC/AArch64/spe.s
Log Message:
-----------
[AArch64] FEAT_SPEv1p2 is optional in v8.7-A and v9.2-A (#123336)
The FEAT_SPEv1p2 feature (known to LLVM as FeatureSPE_EEF and +spe-eef)
was incorrectly marked as a required feature of Armv8.7-A (and later),
which is incorrect because it is optional, and some CPUs do not
implement it. This moves it to the default features list, so that it is
still enabled by -march=armv8.7-a, but can be configured individually
for each processor.
For Cortex-A520 and Cortex-A520AE, I've checked that these do not have any of
the FEAT_SPE* features, so updated the tests accordingly. All other
Arm-designed v8.7A+ and v9.2A+ CPUs should continue to have it enabled. For
Ampere1B and Fujitsu Monaka, these CPUs do not have the feature, so I've
removed it from their tests. For Apple M4, I haven't found any reference for
whether that CPU should have this feature, so I've added it to the CPU
definition to avoid this being a functional change.
Commit: 50bfa85d7968690aa305ae1b30f0214ced64c4d7
https://github.com/llvm/llvm-project/commit/50bfa85d7968690aa305ae1b30f0214ced64c4d7
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
Log Message:
-----------
[DAGCombiner] Fix scalarizeExtractedBinOp for some SETCC cases (#123071)
PR https://github.com/llvm/llvm-project/pull/118823 added a
DAG combine for extracting elements of a vector returned from
SETCC, however it doesn't correctly deal with the case where
the vector element type is not i1. In this case we have to
take account of the boolean contents, which are represented
differently between vectors and scalars. The code now
explicitly performs an inreg sign extend in order to get the
same result.
Fixes https://github.com/llvm/llvm-project/issues/121372
Commit: 6dc356d6985fc49d1b69c20cc27f6b066742144a
https://github.com/llvm/llvm-project/commit/6dc356d6985fc49d1b69c20cc27f6b066742144a
Author: David Green <david.green at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[Clang] Add numeric for iota.
Hopefuly fixes MSVC build after 547bfda56b2e3f3a4c6d2357d3566dcd3fa996ad.
Commit: 3ff9368e58a9e73015cc2284788394e94e28e3bb
https://github.com/llvm/llvm-project/commit/3ff9368e58a9e73015cc2284788394e94e28e3bb
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/unittests/Target/SPIRV/SPIRVAPITest.cpp
Log Message:
-----------
[SPIR-V] Ensure that Module resource is managed locally wrt. a unit test case and fix a memory leak (#123725)
Adding SPIRV to LLVM_ALL_TARGETS
(https://github.com/llvm/llvm-project/pull/119653) revealed a series of
minor compilation problems and sanitizer complaints. This PR is to move
unit tests resources (a Module ptr) from the class-scope to a local
scope of the class member function to be sure that before the test env
is teared down the ptr is released.
Commit: cda81b1ec96e26cb7e47acc5656fe219383ffbc5
https://github.com/llvm/llvm-project/commit/cda81b1ec96e26cb7e47acc5656fe219383ffbc5
Author: Michal Paszkowski <michal at michalpaszkowski.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M .github/workflows/spirv-tests.yml
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[SPIR-V] Add SPIRV to LLVM_ALL_TARGETS (reapply) (#123733)
This commit promotes the SPIR-V backend from experimental to official
status. As a result, SPIR-V will be built by default, simplifying
integration and increasing accessibility for downstream projects.
Discussion and RFC on Discourse:
https://discourse.llvm.org/t/rfc-promoting-spir-v-to-an-official-target/83614
The PR reapplies the original patch
https://github.com/llvm/llvm-project/pull/119653 and consecutive
https://github.com/llvm/llvm-project/pull/123654, reverted due to
buildbot failures.
Commit: c7de642ece5745b5ade04e910ba4ff54728a1cd1
https://github.com/llvm/llvm-project/commit/c7de642ece5745b5ade04e910ba4ff54728a1cd1
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/zeroing-forms-uscvtf.ll
Log Message:
-----------
[AArch64] Generate zeroing forms of certain SVE2.2 instructions (5/11) (#116831)
SVE2.2 introduces instructions with predicated forms with zeroing of
the inactive lanes. This allows in some cases to save a `movprfx` or
a `mov` instruction when emitting code for `_x` or `_z` variants of
intrinsics.
This patch adds support for emitting the zeroing forms of certain
`SCVTF`, and `UCVTF` instructions.
Commit: 1bb2e5039638311eb0ed5841e47b9619bcd93b1f
https://github.com/llvm/llvm-project/commit/1bb2e5039638311eb0ed5841e47b9619bcd93b1f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-21 (Tue, 21 Jan 2025)
Changed paths:
M .github/workflows/build-ci-container.yml
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/premerge.yaml
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
M .github/workflows/spirv-tests.yml
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/clangd/CMakeLists.txt
M clang-tools-extra/clangd/FindTarget.cpp
M clang-tools-extra/clangd/FindTarget.h
R clang-tools-extra/clangd/HeuristicResolver.cpp
R clang-tools-extra/clangd/HeuristicResolver.h
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/ParsedAST.h
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/unittests/CMakeLists.txt
R clang-tools-extra/clangd/unittests/HeuristicResolverTests.cpp
M clang-tools-extra/docs/clang-tidy/Contributing.rst
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ClangOffloadBundler.rst
M clang/docs/ClangTransformerTutorial.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsNVPTX.def
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/include/clang/Basic/BuiltinsSystemZ.def
M clang/include/clang/Basic/Cuda.h
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Driver/OffloadBundler.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Format/Format.h
A clang/include/clang/Sema/HeuristicResolver.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/FixedPoint.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/SystemZ.cpp
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/Mips.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/vecintrin.h
M clang/lib/Sema/CMakeLists.txt
M clang/lib/Sema/DeclSpec.cpp
A clang/lib/Sema/HeuristicResolver.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaSPIRV.cpp
M clang/lib/Sema/SemaSystemZ.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/ARCMT/autoreleases.m
M clang/test/ARCMT/autoreleases.m.result
M clang/test/ARCMT/retains.m
M clang/test/ARCMT/retains.m.result
M clang/test/AST/ByteCode/c23.c
M clang/test/AST/ByteCode/constexpr.c
M clang/test/AST/ByteCode/cxx17.cpp
M clang/test/AST/ByteCode/cxx98.cpp
M clang/test/AST/ByteCode/lifetimes.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ast-dump-cxx2b-deducing-this.cpp
M clang/test/AST/ast-dump-special-member-functions.cpp
M clang/test/Analysis/Inputs/expected-plists/plist-output.m.plist
M clang/test/Analysis/const-method-call.cpp
M clang/test/Analysis/inline-unique-reports.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/nil-receiver-undefined-larger-than-voidptr-ret.m
M clang/test/Analysis/novoidtypecrash.c
M clang/test/Analysis/plist-output.m
M clang/test/Analysis/plist-stats-output.c
M clang/test/Analysis/scopes-cfg-output.cpp
M clang/test/Analysis/structured_bindings.cpp
M clang/test/CXX/drs/cwg605.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/p5.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/p7.cpp
M clang/test/CodeGen/2003-06-26-CFECrash.c
M clang/test/CodeGen/2003-08-18-SigSetJmp.c
M clang/test/CodeGen/2003-08-23-LocalUnionTest.c
M clang/test/CodeGen/2003-10-29-AsmRename.c
M clang/test/CodeGen/2003-11-20-ComplexDivision.c
M clang/test/CodeGen/2004-06-18-VariableLengthArrayOfStructures.c
M clang/test/CodeGen/2004-11-27-StaticFunctionRedeclare.c
M clang/test/CodeGen/2005-01-02-VAArgError-ICE.c
M clang/test/CodeGen/2005-06-15-ExpandGotoInternalProblem.c
M clang/test/CodeGen/2007-01-06-KNR-Proto.c
M clang/test/CodeGen/2008-05-06-CFECrash.c
M clang/test/CodeGen/2008-07-30-redef-of-bitcasted-decl.c
M clang/test/CodeGen/2008-10-13-FrontendCrash.c
M clang/test/CodeGen/2009-01-21-InvalidIterator.c
M clang/test/CodeGen/2009-05-04-EnumInreg.c
M clang/test/CodeGen/2009-07-15-pad-wchar_t-array.c
M clang/test/CodeGen/AArch64/targetattr.c
A clang/test/CodeGen/SystemZ/builtins-systemz-bitop.c
A clang/test/CodeGen/SystemZ/builtins-systemz-vector5-error.c
A clang/test/CodeGen/SystemZ/builtins-systemz-vector5.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector-error.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector2-error.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector3-error.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector3.c
A clang/test/CodeGen/SystemZ/builtins-systemz-zvector5-error.c
A clang/test/CodeGen/SystemZ/builtins-systemz-zvector5.c
M clang/test/CodeGen/SystemZ/systemz-abi-vector.c
M clang/test/CodeGen/SystemZ/systemz-abi.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-05.c
M clang/test/CodeGen/SystemZ/zvector.c
M clang/test/CodeGen/X86/avx512fp16-abi.c
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
M clang/test/CodeGen/X86/x86_64-atomic-128.c
M clang/test/CodeGen/align-local.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/arm-cmse-nonsecure.c
M clang/test/CodeGen/arm-cmse-secure.c
M clang/test/CodeGen/attr-counted-by-pr110385.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/attr-noinline.cpp
M clang/test/CodeGen/attr-noreturn.c
M clang/test/CodeGen/block-copy.c
M clang/test/CodeGen/builtin-memfns.c
M clang/test/CodeGen/catch-undef-behavior.c
M clang/test/CodeGen/cfi-unrelated-cast.cpp
M clang/test/CodeGen/const-label-addr.c
M clang/test/CodeGen/debug-info-crash.c
M clang/test/CodeGen/debug-info.c
M clang/test/CodeGen/empty-union-init.c
M clang/test/CodeGen/exceptions-seh.c
M clang/test/CodeGen/exprs.c
M clang/test/CodeGen/ext-int-cc.c
M clang/test/CodeGen/implicit-arg.c
M clang/test/CodeGen/mips-vector-return.c
M clang/test/CodeGen/mips64-nontrivial-return.cpp
M clang/test/CodeGen/ms-intrinsics-other.c
M clang/test/CodeGen/ms-intrinsics.c
M clang/test/CodeGen/msan-param-retval.c
M clang/test/CodeGen/msan-param-retval.cpp
M clang/test/CodeGen/object-size.c
M clang/test/CodeGen/pragma-comment.c
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M clang/test/CodeGen/sparcv8-abi.c
M clang/test/CodeGen/sret.c
M clang/test/CodeGen/static-order.c
M clang/test/CodeGen/staticinit.c
M clang/test/CodeGen/struct.c
M clang/test/CodeGen/ubsan-debuglog-return.c
M clang/test/CodeGen/union.c
M clang/test/CodeGen/ve-abi.c
M clang/test/CodeGenCXX/2007-01-06-PtrMethodInit.cpp
M clang/test/CodeGenCXX/2007-09-10-RecursiveTypeResolution.cpp
M clang/test/CodeGenCXX/2007-10-01-StructResize.cpp
M clang/test/CodeGenCXX/2009-08-11-VectorRetTy.cpp
M clang/test/CodeGenCXX/2010-07-23-DeclLoc.cpp
M clang/test/CodeGenCXX/address-space-cast-coerce.cpp
M clang/test/CodeGenCXX/array-value-initialize.cpp
M clang/test/CodeGenCXX/attr.cpp
M clang/test/CodeGenCXX/c-linkage.cpp
M clang/test/CodeGenCXX/catch-undef-behavior.cpp
M clang/test/CodeGenCXX/conditional-gnu-ext.cpp
M clang/test/CodeGenCXX/cxx1y-variable-template-linkage.cpp
M clang/test/CodeGenCXX/debug-info-cxx0x.cpp
M clang/test/CodeGenCXX/debug-info-object-pointer.cpp
M clang/test/CodeGenCXX/debug-info-scoped-class.cpp
M clang/test/CodeGenCXX/debug-lambda-this.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/expr.cpp
M clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
M clang/test/CodeGenCXX/lambda-expressions-nested-linkage.cpp
M clang/test/CodeGenCXX/mangle-exprs.cpp
M clang/test/CodeGenCXX/mangle-variadic-templates.cpp
M clang/test/CodeGenCXX/mangle.cpp
M clang/test/CodeGenCXX/matrix-type-operators.cpp
M clang/test/CodeGenCXX/matrix-type.cpp
M clang/test/CodeGenCXX/microsoft-abi-static-initializers.cpp
M clang/test/CodeGenCXX/new-alias.cpp
M clang/test/CodeGenCXX/nrvo.cpp
M clang/test/CodeGenCXX/reference-field.cpp
M clang/test/CodeGenCXX/return.cpp
M clang/test/CodeGenCXX/template-instantiation.cpp
M clang/test/CodeGenCXX/trap-fnattr.cpp
M clang/test/CodeGenCXX/ubsan-check-debuglocs.cpp
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenObjC/2007-10-18-ProDescriptor.m
M clang/test/CodeGenObjC/2008-11-25-Blocks.m
M clang/test/CodeGenObjC/debug-info-crash.m
M clang/test/CodeGenObjC/encode-test.m
M clang/test/CodeGenObjC/message-arrays.m
M clang/test/CodeGenObjC/metadata-symbols-32.m
M clang/test/CodeGenObjC/metadata-symbols-64.m
M clang/test/CodeGenObjC/objc2-weak-compare.m
M clang/test/CodeGenObjC/objc2-write-barrier-2.m
M clang/test/CodeGenObjC/protocols-lazy.m
M clang/test/CodeGenObjC/strong-in-c-struct.m
M clang/test/CodeGenObjCXX/debug-info-line.mm
M clang/test/CodeGenObjCXX/instantiate-return.mm
M clang/test/CodeGenObjCXX/pr14474-gline-tables-only.mm
M clang/test/CodeGenObjCXX/property-dot-reference.mm
M clang/test/CodeGenObjCXX/return.mm
A clang/test/CodeGenSPIRV/Builtins/length.c
M clang/test/CoverageMapping/switch.cpp
A clang/test/Driver/Inputs/multilib/multilib-custom-flags.yaml
M clang/test/Driver/cc-log-diagnostics.c
M clang/test/Driver/clang-offload-bundler-zlib.c
M clang/test/Driver/freebsd.c
M clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c
M clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M clang/test/Driver/print-multi-selection-flags.c
M clang/test/Driver/systemz-march.c
M clang/test/FixIt/fixit-availability-maccatalyst.m
M clang/test/FixIt/fixit-c++11.cpp
M clang/test/Frontend/absolute-paths.c
M clang/test/Frontend/ast-codegen.c
M clang/test/Frontend/ast-main.cpp
M clang/test/Misc/serialized-diags-stable.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M clang/test/Misc/target-invalid-cpu-note/systemz.c
M clang/test/Modules/pr61067.cppm
M clang/test/Modules/redecl-merge.m
M clang/test/PCH/irgen-rdar13114142.mm
M clang/test/PCH/late-parsed-instantiations.cpp
M clang/test/PCH/pr4489.c
M clang/test/PCH/va_arg.c
M clang/test/PCH/va_arg.h
M clang/test/Parser/promote_types_in_proto.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Rewriter/rewrite-extern-c.mm
M clang/test/Sema/freemain.c
M clang/test/Sema/return-type-mismatch.c
M clang/test/Sema/warn-infinity-nan-disabled-lnx.cpp
M clang/test/Sema/warn-infinity-nan-disabled-win.cpp
M clang/test/Sema/zvector.c
M clang/test/SemaCXX/attr-noreturn.cpp
M clang/test/SemaCXX/builtin-assume-aligned.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/constexpr-return-non-void-cxx2b.cpp
A clang/test/SemaCXX/err-missing-noreturn-1.cpp
A clang/test/SemaCXX/err-missing-noreturn-2.cpp
M clang/test/SemaCXX/fold_lambda_with_variadics.cpp
M clang/test/SemaCXX/reinterpret-cast.cpp
M clang/test/SemaCXX/return-noreturn.cpp
M clang/test/SemaCXX/warn-missing-noreturn.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-array.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-add-assign.cpp
M clang/test/SemaHLSL/BuiltIns/lerp-errors.hlsl
M clang/test/SemaObjC/return-noreturn.m
M clang/test/SemaObjC/try-catch.m
A clang/test/SemaSPIRV/BuiltIns/length-errors.c
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/late-parsing-eager-instantiation.cpp
M clang/tools/scan-build/bin/scan-build
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Sema/CMakeLists.txt
A clang/unittests/Sema/HeuristicResolverTest.cpp
M clang/unittests/Tooling/ASTSelectionTest.cpp
M clang/unittests/Tooling/LexicallyOrderedRecursiveASTVisitorTest.cpp
M clang/unittests/Tooling/Syntax/BuildTreeTest.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
A compiler-rt/test/orc/TestCases/Linux/loongarch64/ehframe-default.cpp
A compiler-rt/test/orc/TestCases/Linux/loongarch64/ehframe-libunwind.cpp
A compiler-rt/test/orc/TestCases/Linux/loongarch64/lit.local.cfg.py
A compiler-rt/test/orc/TestCases/Linux/loongarch64/lljit-ehframe.cpp
A compiler-rt/test/orc/TestCases/Linux/loongarch64/lljit-initialize-deinitialize.ll
A compiler-rt/test/orc/TestCases/Linux/loongarch64/priority-static-initializer.S
A compiler-rt/test/orc/TestCases/Linux/loongarch64/trivial-atexit.S
A compiler-rt/test/orc/TestCases/Linux/loongarch64/trivial-cxa-atexit.S
A compiler-rt/test/orc/TestCases/Linux/loongarch64/trivial-static-initializer.S
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Driver/fno-zero-init.f90
A flang/test/HLFIR/simplify-hlfir-intrinsics-dotproduct.fir
M flang/test/HLFIR/unroll-loops.fir
A flang/test/Integration/debug-cyclic-derived-type-3.f90
M flang/test/Integration/unroll-loops.f90
M flang/test/Lower/CUDA/cuda-devptr.cuf
A flang/test/Lower/OpenMP/Todo/allocate-clause-align.f90
A flang/test/Lower/OpenMP/Todo/allocate-clause-allocator.f90
R flang/test/Lower/OpenMP/Todo/task_untied.f90
M flang/test/Lower/OpenMP/task.f90
M flang/test/Lower/module_use.f90
A flang/test/Lower/zero_init.f90
A flang/test/Lower/zero_init_default_init.f90
M flang/test/Semantics/OpenMP/doconcurrent01.f90
A flang/test/Semantics/OpenMP/forall.f90
A flang/test/Semantics/OpenMP/task-untied01.f90
M flang/tools/bbc/bbc.cpp
M flang/unittests/Optimizer/CMakeLists.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
M libc/src/__support/block.h
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freestore_test.cpp
A libc/utils/docgen/sys/stat.yaml
A libc/utils/docgen/sys/time.yaml
A libc/utils/docgen/termios.yaml
M libclc/clc/include/clc/clcmacro.h
M libclc/clc/include/clc/common/clc_degrees.h
M libclc/clc/include/clc/common/clc_radians.h
A libclc/clc/include/clc/math/clc_mad.h
A libclc/clc/include/clc/math/ternary_decl.inc
M libclc/clc/include/clc/relational/clc_select.h
R libclc/clc/include/clc/relational/clc_select.inc
A libclc/clc/include/clc/relational/clc_select_decl.inc
A libclc/clc/include/clc/relational/clc_select_impl.inc
M libclc/clc/lib/clspv/SOURCES
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_mad.cl
A libclc/clc/lib/generic/math/clc_mad.inc
M libclc/clc/lib/generic/relational/clc_bitselect.cl
M libclc/clc/lib/generic/relational/clc_select.cl
R libclc/clc/lib/generic/relational/clc_select.inc
M libclc/clc/lib/spirv/SOURCES
M libclc/clc/lib/spirv64/SOURCES
R libclc/generic/include/clc/math/ternary_decl.inc
M libclc/generic/include/clc/relational/select.h
R libclc/generic/include/clc/relational/select.inc
M libclc/generic/lib/common/mix.cl
M libclc/generic/lib/common/mix.inc
M libclc/generic/lib/math/clc_exp10.cl
M libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/clc_pow.cl
M libclc/generic/lib/math/clc_pown.cl
M libclc/generic/lib/math/clc_powr.cl
M libclc/generic/lib/math/clc_rootn.cl
M libclc/generic/lib/math/mad.cl
R libclc/generic/lib/math/mad.inc
M libclc/generic/lib/math/sincos_helpers.cl
M libclc/generic/lib/math/sincospiF_piby4.h
M libclc/generic/lib/relational/bitselect.cl
M libclc/generic/lib/relational/bitselect.inc
M libclc/generic/lib/relational/select.cl
R libclc/generic/lib/relational/select.inc
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/include/__algorithm/make_projected.h
M libcxx/include/__algorithm/radix_sort.h
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/__config
M libcxx/include/__functional/bind.h
M libcxx/include/__functional/function.h
M libcxx/include/__functional/hash.h
M libcxx/include/__functional/mem_fn.h
M libcxx/include/__functional/reference_wrapper.h
M libcxx/include/__hash_table
M libcxx/include/__tree
M libcxx/include/__type_traits/invoke.h
M libcxx/include/__type_traits/result_of.h
M libcxx/include/__vector/vector.h
M libcxx/include/atomic
M libcxx/include/future
M libcxx/include/stdatomic.h
M libcxx/include/unordered_map
M libcxx/include/unordered_set
R libcxx/test/benchmarks/atomic_wait.bench.cpp
A libcxx/test/benchmarks/atomic_wait_1_waiter_1_notifier.bench.cpp
A libcxx/test/benchmarks/atomic_wait_N_waiter_N_notifier.bench.cpp
A libcxx/test/benchmarks/atomic_wait_helper.h
A libcxx/test/benchmarks/atomic_wait_multi_waiter_1_notifier.bench.cpp
M libcxx/test/libcxx/atomics/atomics.syn/compatible_with_stdatomic.compile.pass.cpp
A libcxx/test/libcxx/atomics/atomics.syn/incompatible_with_stdatomic.verify.cpp
A libcxx/test/libcxx/atomics/stdatomic.h.syn/dont_hijack_header.compile.pass.cpp
A libcxx/test/libcxx/atomics/stdatomic.h.syn/dont_hijack_header.cxx23.compile.pass.cpp
M libcxx/test/libcxx/containers/associative/non_const_comparator.verify.cpp
M libcxx/test/libcxx/containers/unord/non_const_comparator.verify.cpp
M libcxx/test/libcxx/utilities/function.objects/func.require/bullet_1_2_3.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/offset_range.pass.cpp
M libcxx/test/tools/clang_tidy_checks/libcpp_module.cpp
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/Config.h
M lld/COFF/DLL.cpp
M lld/COFF/DLL.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/DriverUtils.cpp
M lld/COFF/MapFile.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/COFF/Symbols.cpp
M lld/COFF/Writer.cpp
M lld/MachO/Options.td
A lld/test/COFF/Inputs/stub63mz
A lld/test/COFF/Inputs/stub64mz
A lld/test/COFF/Inputs/stub64zz
A lld/test/COFF/Inputs/stub68mz
M lld/test/COFF/arm64x-entry.test
A lld/test/COFF/arm64x-export.test
A lld/test/COFF/stub.test
M lld/wasm/SyntheticSections.cpp
M lldb/bindings/headers.swig
A lldb/bindings/interface/SBProgressDocstrings.i
M lldb/bindings/interfaces.swig
M lldb/docs/use/formatting.rst
M lldb/include/lldb/API/SBDebugger.h
A lldb/include/lldb/API/SBProgress.h
M lldb/include/lldb/Core/FormatEntity.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/API/CMakeLists.txt
A lldb/source/API/SBProgress.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Plugins/Process/Utility/LinuxSignals.cpp
M lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
M lldb/test/API/linux/aarch64/gcs/TestAArch64LinuxGCS.py
M lldb/test/API/linux/aarch64/gcs/main.c
A lldb/test/API/python_api/sbprogress/TestSBProgress.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/unittests/Core/FormatEntityTest.cpp
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/bindings/ocaml/debuginfo/debuginfo_ocaml.c
M llvm/bindings/ocaml/debuginfo/llvm_debuginfo.ml
M llvm/bindings/ocaml/debuginfo/llvm_debuginfo.mli
M llvm/cmake/modules/AddLLVM.cmake
M llvm/docs/DeveloperPolicy.rst
M llvm/docs/GitHub.rst
M llvm/docs/MyFirstTypoFix.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/LivePhysRegs.h
M llvm/include/llvm/CodeGen/LiveRegMatrix.h
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/include/llvm/CodeGen/VirtRegMap.h
M llvm/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def
A llvm/include/llvm/ExecutionEngine/Orc/EHFrameRegistrationPlugin.h
M llvm/include/llvm/ExecutionEngine/Orc/LinkGraphLinkingLayer.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/GlobalValue.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsSystemZ.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/PrintPasses.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCRegister.h
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrMaps.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/CallingConvLower.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/ExecutionDomainFix.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/InterferenceCache.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RDFLiveness.cpp
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegUsageInfoCollector.cpp
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Debugging/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.cpp
A llvm/lib/ExecutionEngine/Orc/EHFrameRegistrationPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/LinkGraphLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/FuzzMutate/RandomIRBuilder.cpp
M llvm/lib/IR/Assumptions.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/PrintPasses.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/MC/WinCOFFObjectWriter.cpp
M llvm/lib/Object/GOFFObjectFile.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/lib/SandboxIR/Instruction.cpp
M llvm/lib/SandboxIR/Type.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
A llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
A llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.h
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARC/ARCISelLowering.h
M llvm/lib/Target/ARM/A15SDOptimizer.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/LoongArch/LoongArchMergeBaseOffset.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.h
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFObjectWriter.cpp
M llvm/lib/Target/Mips/MipsCCState.cpp
M llvm/lib/Target/Mips/MipsCCState.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSubtarget.h
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRV.td
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
A llvm/lib/Target/SPIRV/SPIRVCombine.td
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
A llvm/lib/Target/SPIRV/SPIRVPreLegalizerCombiner.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/SystemZ/SystemZFeatures.td
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/SystemZ/SystemZOperands.td
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/SystemZ/SystemZProcessors.td
M llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEISelLowering.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
M llvm/lib/Target/X86/X86ArgumentStackSlotRebase.cpp
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.h
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.h
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/Coroutines/MaterializationUtils.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/LowerGlobalDtors.cpp
M llvm/lib/Transforms/Utils/ModuleUtils.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Analysis/CostModel/SystemZ/divrem-reg.ll
M llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll
M llvm/test/Analysis/CostModel/SystemZ/int-arith.ll
A llvm/test/CodeGen/AArch64/aarch64-large-stack-spbump.mir
M llvm/test/CodeGen/AArch64/adds_cmn.ll
M llvm/test/CodeGen/AArch64/bf16-convert-intrinsics.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/const-shift-of-constmasked.ll
M llvm/test/CodeGen/AArch64/csel-cmp-cse.ll
M llvm/test/CodeGen/AArch64/csel-subs-swapped.ll
M llvm/test/CodeGen/AArch64/extract-bits.ll
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
M llvm/test/CodeGen/AArch64/fpenv.ll
A llvm/test/CodeGen/AArch64/fsh.ll
A llvm/test/CodeGen/AArch64/instr-ref-ldv.ll
M llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
M llvm/test/CodeGen/AArch64/xbfiz.ll
A llvm/test/CodeGen/AArch64/zeroing-forms-uscvtf.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal.ll
A llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
A llvm/test/CodeGen/AMDGPU/licm-wwm.mir
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.nxv2i32.fail.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-calls.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
M llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-copies-extra-insts-after-copy.mir
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v2bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v3bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v4bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v2f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v3f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v4f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v2f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v3f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v4f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v2i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v3i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v4i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v2i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v3i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v4i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v2i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v3i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v2p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v3p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v2p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v3p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v4p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v2bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v3bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v4bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v2f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v3f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v4f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v2f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v3f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v4f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v2i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v3i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v4i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v2i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v3i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v4i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v2i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v3i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v2p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v3p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v3p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v4p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v2bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v3bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v4bf16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v2f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v3f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v4f16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v2f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v3f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v4f32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v2i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v3i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v4i16.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v2i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v3i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v4i32.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v2i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v2p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll
A llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AVR/branch-relaxation-long-backward.ll
M llvm/test/CodeGen/AVR/branch-relaxation-long-forward.ll
A llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll
A llvm/test/CodeGen/LoongArch/linker-relaxation.ll
A llvm/test/CodeGen/LoongArch/mir-relax-flags.ll
M llvm/test/CodeGen/LoongArch/mir-target-flags.ll
A llvm/test/CodeGen/LoongArch/preld.ll
M llvm/test/CodeGen/LoongArch/smul-with-overflow.ll
A llvm/test/CodeGen/Mips/dllimport.ll
M llvm/test/CodeGen/Mips/mips64-f128.ll
M llvm/test/CodeGen/Mips/msa/shuffle.ll
A llvm/test/CodeGen/NVPTX/addrspacecast-cse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
M llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
A llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll
M llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
A llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-length-to-distance.mir
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/distance.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageNonUniformIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageNonUniformIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageNonUniformIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferNonUniformIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferDynIdx.ll
R llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
M llvm/test/CodeGen/SPIRV/opencl/distance.ll
M llvm/test/CodeGen/SystemZ/args-12.ll
M llvm/test/CodeGen/SystemZ/args-13.ll
A llvm/test/CodeGen/SystemZ/bitop-intrinsics.ll
A llvm/test/CodeGen/SystemZ/int-abs-03.ll
M llvm/test/CodeGen/SystemZ/int-add-19.ll
A llvm/test/CodeGen/SystemZ/int-cmp-64.ll
A llvm/test/CodeGen/SystemZ/int-conv-15.ll
A llvm/test/CodeGen/SystemZ/int-div-08.ll
A llvm/test/CodeGen/SystemZ/int-max-02.ll
A llvm/test/CodeGen/SystemZ/int-min-02.ll
A llvm/test/CodeGen/SystemZ/int-mul-14.ll
A llvm/test/CodeGen/SystemZ/int-mul-15.ll
A llvm/test/CodeGen/SystemZ/int-mul-16.ll
A llvm/test/CodeGen/SystemZ/int-neg-04.ll
M llvm/test/CodeGen/SystemZ/int-sub-12.ll
A llvm/test/CodeGen/SystemZ/llxa-01.ll
A llvm/test/CodeGen/SystemZ/llxa-02.ll
A llvm/test/CodeGen/SystemZ/llxa-03.ll
A llvm/test/CodeGen/SystemZ/llxa-04.ll
A llvm/test/CodeGen/SystemZ/llxa-05.ll
A llvm/test/CodeGen/SystemZ/lxa-01.ll
A llvm/test/CodeGen/SystemZ/lxa-02.ll
A llvm/test/CodeGen/SystemZ/lxa-03.ll
A llvm/test/CodeGen/SystemZ/lxa-04.ll
A llvm/test/CodeGen/SystemZ/lxa-05.ll
A llvm/test/CodeGen/SystemZ/scalar-ctlz-03.ll
A llvm/test/CodeGen/SystemZ/scalar-ctlz-04.ll
A llvm/test/CodeGen/SystemZ/scalar-cttz-03.ll
A llvm/test/CodeGen/SystemZ/scalar-cttz-04.ll
A llvm/test/CodeGen/SystemZ/vec-cmp-09.ll
A llvm/test/CodeGen/SystemZ/vec-div-03.ll
A llvm/test/CodeGen/SystemZ/vec-eval.ll
A llvm/test/CodeGen/SystemZ/vec-intrinsics-05.ll
A llvm/test/CodeGen/SystemZ/vec-mul-06.ll
M llvm/test/CodeGen/X86/amx-fp8-internal.ll
M llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
M llvm/test/CodeGen/X86/combine-ptest.ll
M llvm/test/CodeGen/X86/cvt16.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
M llvm/test/CodeGen/X86/fp16-libcalls.ll
M llvm/test/CodeGen/X86/half-constrained.ll
M llvm/test/CodeGen/X86/half-darwin.ll
M llvm/test/CodeGen/X86/half.ll
A llvm/test/CodeGen/X86/pr123333.ll
M llvm/test/CodeGen/X86/pr91005.ll
M llvm/test/CodeGen/X86/pr95278.ll
M llvm/test/CodeGen/X86/smul-with-overflow.ll
M llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll
M llvm/test/DebugInfo/X86/dwarf-public-names.ll
M llvm/test/MC/AArch64/spe.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt
A llvm/test/MC/Disassembler/SystemZ/insns-arch15.txt
A llvm/test/MC/Mips/coff-relocs-dllimport.ll
M llvm/test/MC/Mips/coff-relocs.ll
A llvm/test/MC/SystemZ/insn-bad-arch15.s
M llvm/test/MC/SystemZ/insn-bad-z16.s
A llvm/test/MC/SystemZ/insn-good-arch15.s
M llvm/test/Object/Inputs/WASM/multi-table.wasm
A llvm/test/Other/print-loop-func-scope.ll
M llvm/test/TableGen/generic-tables-instruction.td
M llvm/test/TableGen/generic-tables.td
M llvm/test/Transforms/FunctionAttrs/initializes.ll
M llvm/test/Transforms/GlobalOpt/resolve-fmv-ifunc.ll
A llvm/test/Transforms/InstCombine/add-shl-mul-umax.ll
M llvm/test/Transforms/InstCombine/add.ll
A llvm/test/Transforms/InstCombine/icmp-srem.ll
A llvm/test/Transforms/InstSimplify/pr122582.ll
M llvm/test/Transforms/LoopDataPrefetch/LoongArch/basic.ll
M llvm/test/Transforms/LoopInterchange/gh54176-scalar-deps.ll
M llvm/test/Transforms/LoopInterchange/inner-only-reductions.ll
M llvm/test/Transforms/LoopInterchange/innermost-latch-uses-values-in-middle-header.ll
M llvm/test/Transforms/LoopInterchange/interchange-flow-dep-outer.ll
M llvm/test/Transforms/LoopInterchange/lcssa.ll
A llvm/test/Transforms/LoopInterchange/many-load-stores.ll
M llvm/test/Transforms/LoopInterchange/outer-header-jump-to-inner-latch.ll
M llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
M llvm/test/Transforms/LoopInterchange/pr43797-lcssa-for-multiple-outer-loop-blocks.ll
M llvm/test/Transforms/LoopInterchange/profitability.ll
M llvm/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll
M llvm/test/Transforms/LoopInterchange/unique-dep-matrix.ll
M llvm/test/Transforms/LoopInterchange/vector-gep-operand.ll
M llvm/test/Transforms/LoopVectorize/AArch64/prefer-fixed-if-equal-to-scalable.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
A llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-outside-iv-users.ll
M llvm/test/Transforms/Reassociate/reassoc_bool_vec.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
A llvm/test/Transforms/SLPVectorizer/InstructionsState-is-invalid-2.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
A llvm/test/Transforms/SLPVectorizer/X86/InstructionsState-is-invalid-1.ll
M llvm/test/Transforms/SLPVectorizer/X86/hadd.ll
A llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
A llvm/test/Transforms/SLPVectorizer/X86/multi-node-reuse-in-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
M llvm/test/Transforms/SLPVectorizer/X86/value-bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
R llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const-undef.ll
A llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/tools/llvm-dwarfdump/X86/statistics.ll
A llvm/test/tools/llvm-objdump/XCOFF/private-headers-option.test
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-objdump/XCOFFDump.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOpcodes.cpp
M llvm/tools/llvm-stress/llvm-stress.cpp
M llvm/unittests/CodeGen/LowLevelTypeTest.cpp
M llvm/unittests/FuzzMutate/OperationsTest.cpp
M llvm/unittests/FuzzMutate/RandomIRBuilderTest.cpp
M llvm/unittests/IR/ConstantsTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/Linker/LinkModulesTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/Target/SPIRV/SPIRVAPITest.cpp
M llvm/unittests/TargetParser/Host.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/InstrMapsTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Basic/VTEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Sema/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/API/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
A mlir/include/mlir/Conversion/MathToEmitC/MathToEmitC.h
A mlir/include/mlir/Conversion/MathToEmitC/MathToEmitCPass.h
M mlir/include/mlir/Conversion/Passes.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/IRDL/IR/IRDLOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMatrixOps.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/IR/BlockSupport.h
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/BuiltinTypes.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/include/mlir/IR/Diagnostics.h
M mlir/include/mlir/IR/Region.h
M mlir/include/mlir/IR/TypeRange.h
M mlir/include/mlir/IR/Types.h
M mlir/include/mlir/IR/ValueRange.h
M mlir/include/mlir/Target/SPIRV/Serialization.h
M mlir/lib/AsmParser/TypeParser.cpp
M mlir/lib/CAPI/IR/BuiltinTypes.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/CMakeLists.txt
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/LLVMCommon/MemRefBuilder.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
A mlir/lib/Conversion/MathToEmitC/CMakeLists.txt
A mlir/lib/Conversion/MathToEmitC/MathToEmitC.cpp
A mlir/lib/Conversion/MathToEmitC/MathToEmitCPass.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/lib/Dialect/IRDL/IR/IRDL.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/EmulateNarrowType.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
M mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/lib/Dialect/NVGPU/Transforms/CreateAsyncGroups.cpp
M mlir/lib/Dialect/NVGPU/Utils/MMAUtils.cpp
M mlir/lib/Dialect/SCF/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/lib/IR/Diagnostics.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/IR/Types.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Transforms/InlinerPass.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/CAPI/irdl.c
M mlir/test/Conversion/ArithToEmitC/arith-to-emitc.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
A mlir/test/Conversion/MathToEmitC/math-to-emitc-failed.mlir
A mlir/test/Conversion/MathToEmitC/math-to-emitc.mlir
M mlir/test/Conversion/SCFToEmitC/for.mlir
M mlir/test/Conversion/SCFToEmitC/if.mlir
M mlir/test/Conversion/SCFToEmitC/switch.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
M mlir/test/Dialect/EmitC/transforms.mlir
M mlir/test/Dialect/IRDL/cmath.irdl.mlir
M mlir/test/Dialect/IRDL/cpred.irdl.mlir
M mlir/test/Dialect/IRDL/cyclic-types.irdl.mlir
M mlir/test/Dialect/IRDL/invalid.irdl.mlir
M mlir/test/Dialect/IRDL/regions-ops.irdl.mlir
M mlir/test/Dialect/IRDL/test-type.irdl.mlir
M mlir/test/Dialect/IRDL/testd.irdl.mlir
M mlir/test/Dialect/IRDL/variadics-error.irdl.mlir
M mlir/test/Dialect/IRDL/variadics.irdl.mlir
M mlir/test/Dialect/LLVMIR/func.mlir
A mlir/test/Dialect/LLVMIR/inlining-debuginfo.mlir
A mlir/test/Dialect/Linalg/tile-offset.mlir
M mlir/test/Dialect/SCF/value-bounds-op-interface-impl.mlir
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Dialect/SPIRV/IR/matrix-ops.mlir
M mlir/test/Dialect/Transform/irdl.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-transfer-permutation-lowering.mlir
A mlir/test/Target/LLVMIR/nvvm/tma_bulk_copy.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
M mlir/test/Target/SPIRV/matrix.mlir
M mlir/test/Transforms/remove-dead-values.mlir
M mlir/test/lib/Analysis/TestMemRefStrideCalculation.cpp
M mlir/test/python/execution_engine.py
M mlir/test/tblgen-to-irdl/CMathDialect.td
M mlir/test/tblgen-to-irdl/TestDialect.td
M mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp
M offload/DeviceRTL/include/Debug.h
M offload/DeviceRTL/include/DeviceTypes.h
M offload/DeviceRTL/include/LibC.h
M offload/DeviceRTL/include/Synchronization.h
M offload/DeviceRTL/src/Debug.cpp
M offload/DeviceRTL/src/LibC.cpp
M offload/DeviceRTL/src/Parallelism.cpp
M offload/DeviceRTL/src/State.cpp
M offload/DeviceRTL/src/Synchronization.cpp
M offload/cmake/caches/AMDGPUBot.cmake
M offload/test/jit/empty_kernel.inc
M polly/CMakeLists.txt
M polly/cmake/polly_macros.cmake
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Rebase
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/ba03acd7f6b0...1bb2e5039638
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