[all-commits] [llvm/llvm-project] 84fa17: [AArch64] FEAT_SPEv1p2 is optional in v8.7-A and v...

[Oliver Stannard via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 84fa1755a5b7845ddaeaa513a3786013c76c9c88
      https://github.com/llvm/llvm-project/commit/84fa1755a5b7845ddaeaa513a3786013c76c9c88
  Author: Oliver Stannard <oliver.stannard at arm.com>
  Date:   2025-01-21 (Tue, 21 Jan 2025)

  Changed paths:
    M clang/test/CodeGen/AArch64/targetattr.c
    M clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
    M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c
    M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c
    M clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
    M llvm/lib/Target/AArch64/AArch64Features.td
    M llvm/lib/Target/AArch64/AArch64Processors.td
    M llvm/test/MC/AArch64/spe.s

  Log Message:
  -----------
  [AArch64] FEAT_SPEv1p2 is optional in v8.7-A and v9.2-A (#123336)

The FEAT_SPEv1p2 feature (known to LLVM as FeatureSPE_EEF and +spe-eef)
was incorrectly marked as a required feature of Armv8.7-A (and later),
which is incorrect because it is optional, and some CPUs do not
implement it. This moves it to the default features list, so that it is
still enabled by -march=armv8.7-a, but can be configured individually
for each processor.

For Cortex-A520 and Cortex-A520AE, I've checked that these do not have any of
the FEAT_SPE* features, so updated the tests accordingly. All other
Arm-designed v8.7A+ and v9.2A+ CPUs should continue to have it enabled. For
Ampere1B and Fujitsu Monaka, these CPUs do not have the feature, so I've
removed it from their tests. For Apple M4, I haven't found any reference for
whether that CPU should have this feature, so I've added it to the CPU
definition to avoid this being a functional change.



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