[all-commits] [llvm/llvm-project] a5bd01: [bazel] Exclude lib/Interpreter/Wasm.h from //clan...

Thu Jan 16 20:13:12 PST 2025

  Branch: refs/heads/users/vitalybuka/spr/yaml2obj-dont-use-uninitialized-type
  Home:   https://github.com/llvm/llvm-project
  Commit: a5bd01e889d0839596c06059e8d312d04095cc21
      https://github.com/llvm/llvm-project/commit/a5bd01e889d0839596c06059e8d312d04095cc21
  Author: Jorge Gorbe Moya <jgorbe at google.com>
  Date:   2025-01-16 (Thu, 16 Jan 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/clang/BUILD.bazel

  Log Message:
  -----------
  [bazel] Exclude lib/Interpreter/Wasm.h from //clang:interpreter

We're currently excluding Wasm.cpp, because it requires emscripten. When
using header modules, Wasm.h gets compiled on its own and it also
requires emscripten, so we need to exclude both.

  Commit: a761e26b2364ea457b79b9a4bea6d792e4913d24
      https://github.com/llvm/llvm-project/commit/a761e26b2364ea457b79b9a4bea6d792e4913d24
  Author: Luke Lau <luke at igalia.com>
  Date:   2025-01-17 (Fri, 17 Jan 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
    M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll

  Log Message:
  -----------
  [RISCV] Allow non-loop invariant steps in RISCVGatherScatterLowering (#122244)

The motivation for this is to allow us to match strided accesses that
are emitted from the loop vectorizer with EVL tail folding (see #122232)

In these loops the step isn't loop invariant and is based off of
@llvm.experimental.get.vector.length.

We can relax this as long as we make sure to construct the updates after
the definition inside the loop, instead of the preheader.

I presume the restriction was previously added so that the step would
dominate the insertion point in the preheader. I can't think of why it
wouldn't be safe to calculate it in the loop otherwise.

  Commit: 44311066303726dab2597b5860f8173b6c54b37a
      https://github.com/llvm/llvm-project/commit/44311066303726dab2597b5860f8173b6c54b37a
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-17 (Fri, 17 Jan 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AMDGPU/trunc-combine.ll

  Log Message:
  -----------
  DAG: Fix vector bin op scalarize defining a partially undef vector (#122459)

This avoids some of the pending regressions after AMDGPU implements
isExtractVecEltCheap.

In a case like shl <value, undef>, splat k, because the second operand
was fully defined, we would fall through and use the splat value for the
first operand, losing the undef high bits. This would result in an additional
instruction to handle the high bits. Add some reduced testcases for different
opcodes for one of the regressions.

  Commit: ca955197047ce044dec1e85fd401b1788550602d
      https://github.com/llvm/llvm-project/commit/ca955197047ce044dec1e85fd401b1788550602d
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-17 (Fri, 17 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/test/CodeGen/AMDGPU/mad-mix.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
    M llvm/test/CodeGen/AMDGPU/trunc-combine.ll

  Log Message:
  -----------
  AMDGPU: Implement isExtractVecEltCheap (#122460)

Once again we have excessive TLI hooks with bad defaults. Permit this
for 32-bit element vectors, which are just use-different-register.
We should permit 16-bit vectors as cheap with legal packed instructions,
but I see some mixed improvements and regressions that need investigation.

  Commit: afc43a7b626ae07f56e6534320e0b46d26070750
      https://github.com/llvm/llvm-project/commit/afc43a7b626ae07f56e6534320e0b46d26070750
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-01-16 (Thu, 16 Jan 2025)

  Changed paths:
    M flang/include/flang/Optimizer/Builder/HLFIRTools.h
    M flang/lib/Optimizer/Builder/HLFIRTools.cpp
    M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
    R flang/test/HLFIR/simplify-hlfir-intrinsics-dotproduct.fir

  Log Message:
  -----------
  Revert "[flang] Inline hlfir.dot_product. (#123143)"

This reverts commit 9a6433f0ff1b8e294ac785ea3b992304574e0d8f.  ninja check-flang on x86 host fails to compile.

  Commit: 7475f0a3454ce2b09c211779a33c41b6d34c8758
      https://github.com/llvm/llvm-project/commit/7475f0a3454ce2b09c211779a33c41b6d34c8758
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-17 (Fri, 17 Jan 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll

  Log Message:
  -----------
  DAG: Avoid forming shufflevector from a single extract_vector_elt (#122672)

This avoids regressions in a future AMDGPU commit. Previously we
would have a build_vector (extract_vector_elt x), undef with free
access to the elements bloated into a shuffle of one element + undef,
which has much worse combine support than the extract.

Alternatively could check aggressivelyPreferBuildVectorSources, but
I'm not sure it's really different than isExtractVecEltCheap.

  Commit: e83e0c300d6f2cc41c9c74ed4fce90272acef16a
      https://github.com/llvm/llvm-project/commit/e83e0c300d6f2cc41c9c74ed4fce90272acef16a
  Author: Luke Lau <luke at igalia.com>
  Date:   2025-01-17 (Fri, 17 Jan 2025)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll

  Log Message:
  -----------
  [LV] Add test case for #119173. NFC

This showcases a miscompile involving a widened reduction-phi.

  Commit: 1fa02b968431ed0830eb57a229fb864659a1f43f
      https://github.com/llvm/llvm-project/commit/1fa02b968431ed0830eb57a229fb864659a1f43f
  Author: Nicholas <45984215+liusy58 at users.noreply.github.com>
  Date:   2025-01-17 (Fri, 17 Jan 2025)

  Changed paths:
    M bolt/include/bolt/Core/BinaryContext.h
    M bolt/include/bolt/Core/MCPlusBuilder.h
    M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp

  Log Message:
  -----------
  [BOLT][AArch64]  Speedup `computeInstructionSize` (#121106)

AArch64 instructions have a fixed size 4 bytes, no need to compute.

  Commit: 906cbbbd3cbb404b61bac762116af606b4d5ae1d
      https://github.com/llvm/llvm-project/commit/906cbbbd3cbb404b61bac762116af606b4d5ae1d
  Author: Roland McGrath <mcgrathr at google.com>
  Date:   2025-01-16 (Thu, 16 Jan 2025)

  Changed paths:
    M libc/utils/hdrgen/function.py
    M libc/utils/hdrgen/tests/expected_output/test_header.h

  Log Message:
  -----------
  [libc] Fix hdrgen output for no-argument functions (#123245)

The hdrgen output is C, not C++.

  Commit: 421fc0474867411c1da0f5ba086dc0c7305b04e2
      https://github.com/llvm/llvm-project/commit/421fc0474867411c1da0f5ba086dc0c7305b04e2
  Author: Roland McGrath <mcgrathr at google.com>
  Date:   2025-01-16 (Thu, 16 Jan 2025)

  Changed paths:
    M libc/test/src/unistd/getopt_test.cpp

  Log Message:
  -----------
  [libc] Fix deprecated operator"" syntax (#123259)

  Commit: a4e87da963a67aed33b672582406d576553b2399
      https://github.com/llvm/llvm-project/commit/a4e87da963a67aed33b672582406d576553b2399
  Author: Roland McGrath <mcgrathr at google.com>
  Date:   2025-01-16 (Thu, 16 Jan 2025)

  Changed paths:
    M libc/include/__llvm-libc-common.h

  Log Message:
  -----------
  [libc] Make headers compatible with C++ < 11 (#123260)

C++11 introduced `noexcept`, but `throw()` can be used in older
versions of the language.

  Commit: dc4d5782c54cdaf7b62490d9923a9fbd90fde3c4
      https://github.com/llvm/llvm-project/commit/dc4d5782c54cdaf7b62490d9923a9fbd90fde3c4
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2025-01-16 (Thu, 16 Jan 2025)

  Changed paths:
    M bolt/include/bolt/Core/BinaryContext.h
    M bolt/include/bolt/Core/MCPlusBuilder.h
    M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
    M flang/include/flang/Optimizer/Builder/HLFIRTools.h
    M flang/lib/Optimizer/Builder/HLFIRTools.cpp
    M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
    R flang/test/HLFIR/simplify-hlfir-intrinsics-dotproduct.fir
    M libc/include/__llvm-libc-common.h
    M libc/test/src/unistd/getopt_test.cpp
    M libc/utils/hdrgen/function.py
    M libc/utils/hdrgen/tests/expected_output/test_header.h
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/ObjectYAML/ELFYAML.cpp
    M llvm/lib/Support/YAMLTraits.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
    M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/mad-mix.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
    M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
    M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
    M utils/bazel/llvm-project-overlay/clang/BUILD.bazel

  Log Message:
  -----------
  foramt

Created using spr 1.3.4

Compare: https://github.com/llvm/llvm-project/compare/a1558db7c994...dc4d5782c54c

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