[all-commits] [llvm/llvm-project] 8ac00c: [X86] lowerShuffleWithUndefHalf - don't split vXi8...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8ac00ca4867835cacaf013f5c442658b9b1bce38
      https://github.com/llvm/llvm-project/commit/8ac00ca4867835cacaf013f5c442658b9b1bce38
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-01-15 (Wed, 15 Jan 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/shuffle-vs-trunc-128.ll
    M llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
    M llvm/test/CodeGen/X86/trunc-vector-width.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
    M llvm/test/CodeGen/X86/x86-interleaved-access.ll

  Log Message:
  -----------
  [X86] lowerShuffleWithUndefHalf - don't split vXi8 unary shuffles if the 128-bit source lanes are already in place (#122919)

Allows us to use PSHUFB to shuffle the lanes, and then perform a sub-lane permutation down to the lower half

Fixes #116815



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