[all-commits] [llvm/llvm-project] be6c75: [X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: be6c752e157638849f1f59f7e2b7ecbe11a022fe
      https://github.com/llvm/llvm-project/commit/be6c752e157638849f1f59f7e2b7ecbe11a022fe
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-01-12 (Sun, 12 Jan 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
    M llvm/test/CodeGen/X86/avx512-build-vector.ll
    M llvm/test/CodeGen/X86/avx512-mask-op.ll
    M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
    M llvm/test/CodeGen/X86/avx512-shuffles/permute.ll
    M llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
    M llvm/test/CodeGen/X86/combine-or.ll
    M llvm/test/CodeGen/X86/combine-sub-usat.ll
    M llvm/test/CodeGen/X86/expand-vp-cast-intrinsics.ll
    M llvm/test/CodeGen/X86/extract-concat.ll
    M llvm/test/CodeGen/X86/insert-into-constant-vector.ll
    M llvm/test/CodeGen/X86/isel-buildvector-avx.ll
    M llvm/test/CodeGen/X86/matrix-multiply.ll
    M llvm/test/CodeGen/X86/nontemporal-4.ll
    M llvm/test/CodeGen/X86/pr29112.ll
    M llvm/test/CodeGen/X86/pr46532.ll
    M llvm/test/CodeGen/X86/pr78109.ll
    M llvm/test/CodeGen/X86/pr97968.ll
    M llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
    M llvm/test/CodeGen/X86/vec_fp_to_int.ll
    M llvm/test/CodeGen/X86/vec_minmax_sint.ll
    M llvm/test/CodeGen/X86/vec_minmax_uint.ll
    M llvm/test/CodeGen/X86/vector-compress.ll
    M llvm/test/CodeGen/X86/vector-half-conversions.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-3.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-4.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-2.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-3.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-4.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-2.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-3.ll
    M llvm/test/CodeGen/X86/vector-lzcnt-128.ll
    M llvm/test/CodeGen/X86/vector-lzcnt-256.ll
    M llvm/test/CodeGen/X86/vector-popcnt-128.ll
    M llvm/test/CodeGen/X86/vector-popcnt-256.ll
    M llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
    M llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
    M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
    M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
    M llvm/test/CodeGen/X86/vector-shuffle-avx512.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
    M llvm/test/CodeGen/X86/vector-tzcnt-128.ll
    M llvm/test/CodeGen/X86/vector-tzcnt-256.ll
    M llvm/test/CodeGen/X86/vselect-avx.ll
    M llvm/test/CodeGen/X86/widen_fadd.ll
    M llvm/test/CodeGen/X86/widen_fdiv.ll
    M llvm/test/CodeGen/X86/widen_fmul.ll
    M llvm/test/CodeGen/X86/widen_fsub.ll
    M llvm/test/CodeGen/X86/x86-interleaved-access.ll

  Log Message:
  -----------
  [X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)

For targets with free domain moves, or AVX512 support, allow the use of VPMOVSX/ZX extension loads to reduce the load sizes.

I've limited this to extension to i32/i64 types as we're mostly interested in shuffle mask loading here, but we could include i16 types as well just as easily.

Inspired by a regression on #122485



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