[all-commits] [llvm/llvm-project] 5ee0a7: [aarch64][win] Add support for import call optimiz...

[Daniel Paoliello via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5ee0a71df919a328c714e25f0935c21e586cc18b
      https://github.com/llvm/llvm-project/commit/5ee0a71df919a328c714e25f0935c21e586cc18b
  Author: Daniel Paoliello <danpao at microsoft.com>
  Date:   2025-01-11 (Sat, 11 Jan 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/MIRYamlMapping.h
    M llvm/include/llvm/CodeGen/MachineFunction.h
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/include/llvm/MC/MCObjectFileInfo.h
    M llvm/include/llvm/MC/MCStreamer.h
    M llvm/include/llvm/MC/MCWinCOFFObjectWriter.h
    M llvm/include/llvm/MC/MCWinCOFFStreamer.h
    M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
    M llvm/lib/CodeGen/MIRPrinter.cpp
    M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
    M llvm/lib/MC/MCAsmStreamer.cpp
    M llvm/lib/MC/MCObjectFileInfo.cpp
    M llvm/lib/MC/MCParser/COFFAsmParser.cpp
    M llvm/lib/MC/MCStreamer.cpp
    M llvm/lib/MC/MCWinCOFFStreamer.cpp
    M llvm/lib/MC/WinCOFFObjectWriter.cpp
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    A llvm/test/CodeGen/AArch64/win-import-call-optimization-nocalls.ll
    A llvm/test/CodeGen/AArch64/win-import-call-optimization.ll
    A llvm/test/CodeGen/MIR/AArch64/called-globals.mir
    M llvm/test/CodeGen/MIR/X86/call-site-info-error1.mir
    M llvm/test/CodeGen/MIR/X86/call-site-info-error2.mir
    A llvm/test/MC/AArch64/win-import-call-optimization.s
    A llvm/test/MC/COFF/bad-parse.s

  Log Message:
  -----------
  [aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)

This change implements import call optimization for AArch64 Windows
(equivalent to the undocumented MSVC `/d2ImportCallOptimization` flag).

Import call optimization adds additional data to the binary which can be
used by the Windows kernel loader to rewrite indirect calls to imported
functions as direct calls. It uses the same [Dynamic Value Relocation
Table mechanism that was leveraged on x64 to implement
`/d2GuardRetpoline`](https://techcommunity.microsoft.com/blog/windowsosplatform/mitigating-spectre-variant-2-with-retpoline-on-windows/295618).

The change to the obj file is to add a new `.impcall` section with the
following layout:
```cpp
  // Per section that contains calls to imported functions:
  //  uint32_t SectionSize: Size in bytes for information in this section.
  //  uint32_t Section Number
  //  Per call to imported function in section:
  //    uint32_t Kind: the kind of imported function.
  //    uint32_t BranchOffset: the offset of the branch instruction in its
  //                            parent section.
  //    uint32_t TargetSymbolId: the symbol id of the called function.
```

NOTE: If the import call optimization feature is enabled, then the
`.impcall` section must be emitted, even if there are no calls to
imported functions.

The implementation is split across a few parts of LLVM:
* During AArch64 instruction selection, the `GlobalValue` for each call
to a global is recorded into the Extra Information for that node.
* During lowering to machine instructions, the called global value for
each call is noted in its containing `MachineFunction`.
* During AArch64 asm printing, if the import call optimization feature
is enabled:
- A (new) `.impcall` directive is emitted for each call to an imported
function.
- The `.impcall` section is emitted with its magic header (but is not
filled in).
* During COFF object writing, the `.impcall` section is filled in based
on each `.impcall` directive that were encountered.

The `.impcall` section can only be filled in when we are writing the
COFF object as it requires the actual section numbers, which are only
assigned at that point (i.e., they don't exist during asm printing).

I had tried to avoid using the Extra Information during instruction
selection and instead implement this either purely during asm printing
or in a `MachineFunctionPass` (as suggested in [on the
forums](https://discourse.llvm.org/t/design-gathering-locations-of-instructions-to-emit-into-a-section/83729/3))
but this was not possible due to how loading and calling an imported
function works on AArch64. Specifically, they are emitted as `ADRP` +
`LDR` (to load the symbol) then a `BR` (to do the call), so at the point
when we have machine instructions, we would have to work backwards
through the instructions to discover what is being called. An initial
prototype did work by inspecting instructions; however, it didn't
correctly handle the case where the same function was called twice in a
row, which caused LLVM to elide the `ADRP` + `LDR` and reuse the
previously loaded address. Worse than that, sometimes for the
double-call case LLVM decided to spill the loaded address to the stack
and then reload it before making the second call. So, instead of trying
to implement logic to discover where the value in a register came from,
I instead recorded the symbol being called at the last place where it
was easy to do: instruction selection.



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