[all-commits] [llvm/llvm-project] df2fcf: AMDGPU: Implement isExtractVecEltCheap

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/amdgpu/implement-isExtractVecEltCheap
  Home:   https://github.com/llvm/llvm-project
  Commit: df2fcf7d00d79b1a7d8a209a66cb32e7712d5918
      https://github.com/llvm/llvm-project/commit/df2fcf7d00d79b1a7d8a209a66cb32e7712d5918
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-10 (Fri, 10 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/test/CodeGen/AMDGPU/mad-mix.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
    M llvm/test/CodeGen/AMDGPU/trunc-combine.ll

  Log Message:
  -----------
  AMDGPU: Implement isExtractVecEltCheap

Once again we have excessive TLI hooks with bad defaults. Permit this
for 32-bit element vectors, which are just use-different-register.
We should permit 16-bit vectors as cheap with legal packed instructions,
but I see some mixed improvements and regressions that need investigation.



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