[all-commits] [llvm/llvm-project] b4e17d: [MachineLICM] Use `RegisterClassInfo::getRegPressu...

[Pengcheng Wang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b4e17d4a314ed87ff6b40b4b05397d4b25b6636a
      https://github.com/llvm/llvm-project/commit/b4e17d4a314ed87ff6b40b4b05397d4b25b6636a
  Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
  Date:   2025-01-09 (Thu, 09 Jan 2025)

  Changed paths:
    M llvm/lib/CodeGen/MachineLICM.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
    M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
    M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
    M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
    M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
    M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
    M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
    M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
    M llvm/test/CodeGen/AMDGPU/sdiv64.ll
    M llvm/test/CodeGen/AMDGPU/srem64.ll
    M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
    M llvm/test/CodeGen/AMDGPU/udiv64.ll
    M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
    M llvm/test/CodeGen/AMDGPU/urem64.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
    M llvm/test/CodeGen/LoongArch/jr-without-ra.ll
    M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
    M llvm/test/CodeGen/Thumb2/mve-blockplacement.ll
    M llvm/test/CodeGen/Thumb2/mve-gather-increment.ll
    M llvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll
    M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll

  Log Message:
  -----------
  [MachineLICM] Use `RegisterClassInfo::getRegPressureSetLimit` (#119826)

`RegisterClassInfo::getRegPressureSetLimit` is a wrapper of
`TargetRegisterInfo::getRegPressureSetLimit` with some logics to
adjust the limit by removing reserved registers.

It seems that we shouldn't use
`TargetRegisterInfo::getRegPressureSetLimit`
directly, just like the comment "This limit must be adjusted
dynamically for reserved registers" said.

Separate from https://github.com/llvm/llvm-project/pull/118787



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