[all-commits] [llvm/llvm-project] 5d0323: [RISCV] Add -mcpu=sifive-p550. (#122164)

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5d03235c73476dfa3d2dd48c76de106fd1aa2ac7
      https://github.com/llvm/llvm-project/commit/5d03235c73476dfa3d2dd48c76de106fd1aa2ac7
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-01-08 (Wed, 08 Jan 2025)

  Changed paths:
    M clang/test/Driver/riscv-cpus.c
    M clang/test/Misc/target-invalid-cpu-note/riscv.c
    M llvm/docs/ReleaseNotes.md
    M llvm/lib/Target/RISCV/RISCVProcessors.td

  Log Message:
  -----------
  [RISCV] Add -mcpu=sifive-p550. (#122164)

This is the CPU in SiFive's HiFive Premier P550 development board.

Scheduler model will come in a later patch.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications