[all-commits] [llvm/llvm-project] b0f11d: [RISCV] Add call preserved regmask to tail calls. ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b0f11dfc7506dd33ad5b43be9faba919b70d1959
      https://github.com/llvm/llvm-project/commit/b0f11dfc7506dd33ad5b43be9faba919b70d1959
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-01-08 (Wed, 08 Jan 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/kcfi-isel-mir.ll
    M llvm/test/CodeGen/RISCV/kcfi-mir.ll

  Log Message:
  -----------
  [RISCV] Add call preserved regmask to tail calls. (#122181)

Every call should have regmask operand to indicate what registers are
preserved or clobbered by the call. VirtRegRewriter uses this to tell
MachineRegisterInfo what registers are clobbered by a function. If the
mask isn't present the registers potentially clobbered by a tail called
function aren't counted. I have checked ARM, AArch64, and X86 and they
all have a regmask operand on their tail calls.

I believe this fixes an issue I'm seeing with IPRA.



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