[all-commits] [llvm/llvm-project] 983a95: [RISCV][VLOpt] Consolidate EMUL=SEW/EEW*LMUL logic...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 983a957768c56d71ca710ff43eab4515e47f7d2c
      https://github.com/llvm/llvm-project/commit/983a957768c56d71ca710ff43eab4515e47f7d2c
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-01-08 (Wed, 08 Jan 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp

  Log Message:
  -----------
  [RISCV][VLOpt] Consolidate EMUL=SEW/EEW*LMUL logic [NFC] (#122021)

All but one of the cases in tree today have EMUL=SEW/EEW*LMUL. Repeating
this each time is verbose and introduces oppurtunity for error. (For
instance, the comment associated with vwmul.vv was out of sync with the
code for same.)

Introduce getOperandLog2EEW and move most complexity to it. Then
introduce getOperandInfo as a wrapper around previous, and special case
the one case which requires it.

---------

Co-authored-by: Luke Lau <luke_lau at icloud.com>



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