[all-commits] [llvm/llvm-project] 346185: [AArch64] Improve codegen of vectorised early exit...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Wed Jan 8 08:51:57 PST 2025
Branch: refs/heads/users/alexey-bataev/spr/riscvcguse-processshufflemasks-for-per-register-shuffles-1
Home: https://github.com/llvm/llvm-project
Commit: 346185c42c59c344fcf0d9fd476c85d287181baf
https://github.com/llvm/llvm-project/commit/346185c42c59c344fcf0d9fd476c85d287181baf
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/CodeGen/AArch64/reduce-or-opt.ll
A llvm/test/Transforms/CodeGenPrepare/AArch64/reduce-or-opt.ll
Log Message:
-----------
[AArch64] Improve codegen of vectorised early exit loops (#119534)
Once PR #112138 lands we are able to start vectorising more loops
that have uncountable early exits. The typical loop structure
looks like this:
vector.body:
...
%pred = icmp eq <2 x ptr> %wide.load, %broadcast.splat
...
%or.reduc = tail call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> %pred)
%iv.cmp = icmp eq i64 %index.next, 4
%exit.cond = or i1 %or.reduc, %iv.cmp
br i1 %exit.cond, label %middle.split, label %vector.body
middle.split:
br i1 %or.reduc, label %found, label %notfound
found:
ret i64 1
notfound:
ret i64 0
The problem with this is that %or.reduc is kept live after the loop,
and since this is a boolean it typically requires making a copy of
the condition code register. For AArch64 this requires an additional
cset instruction, which is quite expensive for a typical find loop
that only contains 6 or 7 instructions.
This patch attempts to improve the codegen by sinking the reduction
out of the loop to the location of it's user. It's a lot cheaper to
keep the predicate alive if the type is legal and has lots of
registers for it. There is a potential downside in that a little
more work is required after the loop, but I believe this is worth
it since we are likely to spend most of our time in the loop.
Commit: f0247081faac6b4c0cbaa1540fc9c10756e5a42e
https://github.com/llvm/llvm-project/commit/f0247081faac6b4c0cbaa1540fc9c10756e5a42e
Author: JoelWee <32009741+JoelWee at users.noreply.github.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M libc/src/stdlib/qsort_pivot.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix after #121482 (#121764)
Commit: 1547382033ca156c13fc16c3b2baed7350b6de8e
https://github.com/llvm/llvm-project/commit/1547382033ca156c13fc16c3b2baed7350b6de8e
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
A llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
Log Message:
-----------
[X86] Support lowering of FMINIMUMNUM/FMAXIMUMNUM (#121464)
Commit: 7cdbde70fad454be6a07464befdfd3995287b0fb
https://github.com/llvm/llvm-project/commit/7cdbde70fad454be6a07464befdfd3995287b0fb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/alternate-shuffle-cost.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-select-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-select-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-select-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-select.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice.ll
M llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
M llvm/test/Transforms/PhaseOrdering/X86/hsub.ll
M llvm/test/Transforms/VectorCombine/X86/extract-fneg-insert.ll
Log Message:
-----------
[CostModel][X86] getShuffleCost - use processShuffleMasks for all shuffle kinds to legal types (#120599) (#121760)
Now that processShuffleMasks can correctly handle 2 src shuffles, we can completely remove the shuffle kind limits and correctly recognize the number of active subvectors per legalized shuffle - improveShuffleKindFromMask will determine the shuffle kind for each split subvector.
Commit: c630e13676009757400d5c2c22ba3e1f842cf925
https://github.com/llvm/llvm-project/commit/c630e13676009757400d5c2c22ba3e1f842cf925
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstCombine/select.ll
Log Message:
-----------
[InstSimplify] Simplify both operands of select before comparing (#121753)
In the simplifySelectWithEquivalence fold, simplify both operands before
comparing them, instead of comparing one simplified operand with a
non-simplified operand. This is slightly more powerful.
Commit: 69ba565734a64bea91062bfd0c5988276b73eb87
https://github.com/llvm/llvm-project/commit/69ba565734a64bea91062bfd0c5988276b73eb87
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/add-shl-sdiv-to-srem.ll
Log Message:
-----------
[InstCombine] Handle commuted pattern for `((X s/ C1) << C2) + X` (#121737)
Closes https://github.com/llvm/llvm-project/issues/121700
Commit: 3f7905733820851bc4f65cb4af693c3101cbf20d
https://github.com/llvm/llvm-project/commit/3f7905733820851bc4f65cb4af693c3101cbf20d
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/SemaCXX/type-traits.cpp
Log Message:
-----------
[Clang] Make passing incomplete types to builtin type-traits a non-sfinae-friendly error (#121333)
LWG3929 suggests that passing incomplete types to __is_base_of and other
builtins supporting [meta.unary] should result in a non-sfinaeable
error.
This is consistent with GCC's behavior and avoid inconsistency when
using a builtin instead of a standard trait in a concept-definition.
Fixes #121278
Commit: 81fae0d5e3d3378959483ccd7709a212731bff3f
https://github.com/llvm/llvm-project/commit/81fae0d5e3d3378959483ccd7709a212731bff3f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGen/scoped-fence-ops.c
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
Log Message:
-----------
[Clang][AMDGPU] Stop defaulting to `one-as` for all atomic scopes (#120095)
Summary:
The documentation at
https://llvm.org/docs/AMDGPUUsage.html#memory-scopes states that these
'one-as' modifiers are more specific versions of the scopes that only
apply to a specific address space. This doesn't make sense for fences
which have no associated address space to use, and it's a more
restrictive version the normal scope. This should not tbe the default
behavior, but it is currently emitted in all cases except for
sequentially consistent.
Commit: b79d3b9519620e34f0e223fdb4a6731db6cda88f
https://github.com/llvm/llvm-project/commit/b79d3b9519620e34f0e223fdb4a6731db6cda88f
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
A clang/test/CXX/drs/cwg273.cpp
M clang/test/CXX/drs/cwg2xx.cpp
Log Message:
-----------
[clang][NFC] Move CWG273 test into its own file
Commit: d68ea317ae056d6b8b66ced620eb3d83a4ac13a4
https://github.com/llvm/llvm-project/commit/d68ea317ae056d6b8b66ced620eb3d83a4ac13a4
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/phi.ll
Log Message:
-----------
[InstCombine] Add additional tests for icmp of phi of zext (NFC)
Commit: 14ba3f9d07ea1664497c5d117120fb243ca221aa
https://github.com/llvm/llvm-project/commit/14ba3f9d07ea1664497c5d117120fb243ca221aa
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/test/CXX/drs/cwg0xx.cpp
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CXX/drs/cwg17xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg20xx.cpp
M clang/test/CXX/drs/cwg21xx.cpp
M clang/test/CXX/drs/cwg22xx.cpp
M clang/test/CXX/drs/cwg23xx.cpp
M clang/test/CXX/drs/cwg273.cpp
M clang/test/CXX/drs/cwg27xx.cpp
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg4xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
M clang/test/CXX/drs/cwg9xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Fill in historical data for C++ DRs with 'yes' availability
Commit: 05bd7d22b6754aeb0c781d4ba002357d5de3ec57
https://github.com/llvm/llvm-project/commit/05bd7d22b6754aeb0c781d4ba002357d5de3ec57
Author: arthurqiu <arthurq at nvidia.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Linker/IRMover.cpp
A llvm/test/Linker/Inputs/libdevice-with-wrong-dl.ll
M llvm/test/Linker/cuda-libdevice.ll
Log Message:
-----------
[MLIR] Fix triple mismatch warning for embedded libdevice (#121447)
IRLinker emits warning when linking two modules of different target
triples. The warning is disabled if the source module is libdevice. When
using libdevice embedded in LLVM library via MLIR_NVVM_EMBED_LIBDEVICE,
IRLinker can no longer tell whether the source module is libdevice via
module identifier.
Since `nvptx64-nvidia-gpulibs` is a magic triple that identifies the
libdevice module already, the libdevice filename check is redundant.
This patch fixes the triple mismatch warning by just removing the
filename check.
Commit: 7cb6e6bced8ca5767c3e609f4826982638fd9543
https://github.com/llvm/llvm-project/commit/7cb6e6bced8ca5767c3e609f4826982638fd9543
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M libc/test/src/stdlib/SortingTest.h
Log Message:
-----------
[libc] Fix sort test failing on NVPTX
Summary:
This test uses too much stack and crashes, make the buffer `static` to
push it to `.bss`. This shouldn't change behavior because the tests are
all run single threaded.
Commit: 1229b78f1676d56d0d386a5c4cde8f98a78d0989
https://github.com/llvm/llvm-project/commit/1229b78f1676d56d0d386a5c4cde8f98a78d0989
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/test/CXX/drs/cwg23xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Clean up CWG2396 test
Commit: d993b11b86dcae75b582939337770eaf1c1a228b
https://github.com/llvm/llvm-project/commit/d993b11b86dcae75b582939337770eaf1c1a228b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
Log Message:
-----------
[VectorCombine] Remove superfluous whitespace from debug log comment. NFC.
Commit: 27751c39d41dc937f6b8a127ca562edbba161584
https://github.com/llvm/llvm-project/commit/27751c39d41dc937f6b8a127ca562edbba161584
Author: JoelWee <32009741+JoelWee at users.noreply.github.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
Log Message:
-----------
Update BUILD.bazel after #121482
Commit: 4ebfd43cf008b941d88a61a2c549e9a5291ee017
https://github.com/llvm/llvm-project/commit/4ebfd43cf008b941d88a61a2c549e9a5291ee017
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/bit-checks.ll
Log Message:
-----------
[InstCombine] Always treat inner and/or as bitwise (#121766)
In https://github.com/llvm/llvm-project/pull/116065, we pass `IsLogical`
into `foldBooleanAndOr` when folding inner and/or ops. But it is always
safe to treat them as bitwise if the outer ops are bitwise.
Alive2: https://alive2.llvm.org/ce/z/hULrgH
Closes https://github.com/llvm/llvm-project/issues/121701.
Commit: df67e37e37a7862e1e67f52e01f0c9a019477930
https://github.com/llvm/llvm-project/commit/df67e37e37a7862e1e67f52e01f0c9a019477930
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
Log Message:
-----------
[clang][NFC] clean up the handling of convergence control tokens (#121738)
Commit: 10fb5d2b4be54c779eda80b65a737b9dae2d959b
https://github.com/llvm/llvm-project/commit/10fb5d2b4be54c779eda80b65a737b9dae2d959b
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/test/CXX/drs/cwg2xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add test for CWG203 "Type of address-of-member expression" (#121687)
This patch adds test for
[CWG203](https://cplusplus.github.io/CWG/issues/203.html). Author was
asking to change the type of pointer-to-member expression to be closer
to how it's written as opposed to where the resulting member belongs to,
but was turned down due to backwards compatibility concerns, so we're
testing the status quo.
There are a total of 6 examples in the filing, so I decided to just
throw all of them into the test. I had to turn example 2 into
`constexpr` test that unfortunately requires C++20. Outcomes in example
5 that Tomasz expected are not in line with implementation behavior and
my reading of the Standard. I think he got confused by the fact that
unlike regular pointers, pointers-to-members can be implicitly
_downcasted_, but not upcasted. I left comments in the example.
Commit: 93220e7e06473a11bf48fee26bcea16cc527e5dc
https://github.com/llvm/llvm-project/commit/93220e7e06473a11bf48fee26bcea16cc527e5dc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
A llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
A llvm/test/CodeGen/AMDGPU/swdev502267-use-after-free-last-chance-recoloring-alloc-succeeds.mir
Log Message:
-----------
RegAllocGreedy: Fix use after free during last chance recoloring (#120697)
Last chance recoloring can delete the current fixed interval
during recursive assignment of interfering live intervals. Check
if the virtual register value was assigned before attempting the
unassignment, as is done in other scenarios. This relies on the fact
that we do not recycle virtual register numbers.
I have only seen this occur in error situations where the allocation
will fail, but I think this can theoretically happen in working
allocations.
This feels very brute force, but I've spent over a week debugging
this and this is what works without any lit regressions. The surprising
piece to me was that unspillable live ranges may be spilled, and
a number of tests rely on optimizations occurring on them. My other
attempts to fixed this mostly revolved around not identifying unspillable
live ranges as snippet copies. I've also discovered we're making some
unproductive live range splits with subranges. If we avoid such splits,
some of the unspillable copies disappear but mandating that be precise
to fix a use after free doesn't sound right.
Commit: ca603d2536f039194141bf3a01e9ee7f60e37406
https://github.com/llvm/llvm-project/commit/ca603d2536f039194141bf3a01e9ee7f60e37406
Author: David Green <david.green at arm.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/test/CodeGen/AArch64/neon-vcmla.c
Log Message:
-----------
[AArch64] Regenerate neon-vcmla.c test. NFC
This removes -O1 from the opt pipeline, using just mem2reg,instsimplify
instead. The target is changed so that the auto update script will apply.
Commit: 21edac25f09faee23015c6a69d95fcbda287efe2
https://github.com/llvm/llvm-project/commit/21edac25f09faee23015c6a69d95fcbda287efe2
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M .github/new-prs-labeler.yml
A clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/clang/Sema/Sema.h
A clang/include/clang/Sema/SemaSPIRV.h
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/CMakeLists.txt
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/lib/Sema/SemaSPIRV.cpp
A clang/test/CodeGenSPIRV/Builtins/distance.c
A clang/test/SemaSPIRV/BuiltIns/distance-errors.c
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/distance.ll
A llvm/test/CodeGen/SPIRV/opencl/distance.ll
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
Log Message:
-----------
[SPIRV] Add Target Builtins using Distance ext as an example (#121598)
- Update pr labeler so new SPIRV files get properly labeled.
- Add distance target builtin to BuiltinsSPIRV.td.
- Update TargetBuiltins.h to account for spirv builtins.
- Update clang basic CMakeLists.txt to build spirv builtin tablegen.
- Hook up sema for SPIRV in Sema.h|cpp, SemaSPIRV.h|cpp, and
SemaChecking.cpp.
- Hookup sprv target builtins to SPIR.h|SPIR.cpp target.
- Update GBuiltin.cpp to emit spirv intrinsics when we get the expected
spirv target builtin.
Consensus was reach in this RFC to add both target builtins and pattern
matching:
https://discourse.llvm.org/t/rfc-add-targetbuiltins-for-spirv-to-support-hlsl/83329.
pattern matching will come in a separate pr this one just sets up the
groundwork to do target builtins for spirv.
partially resolves
[#99107](https://github.com/llvm/llvm-project/issues/99107)
Commit: 98b3191a340b03051281e1dc3655a7ffa9ab2311
https://github.com/llvm/llvm-project/commit/98b3191a340b03051281e1dc3655a7ffa9ab2311
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M libc/docs/CMakeLists.txt
R libc/docs/headers/arpa/inet.rst
R libc/docs/headers/assert.rst
R libc/docs/headers/ctype.rst
R libc/docs/headers/errno.rst
R libc/docs/headers/fenv.rst
R libc/docs/headers/float.rst
R libc/docs/headers/inttypes.rst
R libc/docs/headers/locale.rst
R libc/docs/headers/setjmp.rst
R libc/docs/headers/signal.rst
R libc/docs/headers/stdbit.rst
R libc/docs/headers/stdio.rst
R libc/docs/headers/stdlib.rst
R libc/docs/headers/string.rst
R libc/docs/headers/strings.rst
R libc/docs/headers/sys/mman.rst
R libc/docs/headers/threads.rst
R libc/docs/headers/uchar.rst
R libc/docs/headers/wchar.rst
R libc/docs/headers/wctype.rst
M libc/utils/docgen/arpa/inet.yaml
A libc/utils/docgen/strings.yaml
M libc/utils/docgen/sys/mman.yaml
Log Message:
-----------
[libc][docgen] regen docgen via cmake (#119628)
Now, `ninja docs-libc-html` will re-run docgen.
Previously, we would run docgen offline, and commit the result.
Now we no longer need to do that; docgen is invoked from the
dependencies of the `docs-libc-html` target on demand. This
commit removes the dynamically generated .rst files (keeping
the static ones that haven't been converted to docgen), and
fixes up some mistakes I failed to cleanup recently since I
didn't have such automation in place to catch such bugs.
Commit: d00f65c6acd9f0e1ddae83391f55eb9d232d2f9e
https://github.com/llvm/llvm-project/commit/d00f65c6acd9f0e1ddae83391f55eb9d232d2f9e
Author: Michael Toguchi <michael.d.toguchi at intel.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
A clang/lib/Driver/ToolChains/SYCL.cpp
A clang/lib/Driver/ToolChains/SYCL.h
A clang/test/Driver/sycl-offload-jit.cpp
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
[Driver][SYCL] Add initial SYCL offload compilation support (#117268)
Introduces the SYCL based toolchain and initial toolchain construction
when using the '-fsycl' option. This option will enable SYCL based
offloading, creating a SPIR-V based IR file packaged into the compiled
host object.
This includes early support for creating the host/device object using
the new offloading model. The device object is created using the
spir64-unknown-unknown target triple.
New/Updated Options:
-fsycl Enables SYCL offloading for host and device
-fsycl-device-only
Enables device only compilation for SYCL
-fsycl-host-only
Enables host only compilation for SYCL
RFC Reference:
https://discourse.llvm.org/t/rfc-sycl-driver-enhancements/74092
This is a reland of: https://github.com/llvm/llvm-project/pull/107493
Commit: 5e0be962feb37b224590e91879f9ac4a1fcacb85
https://github.com/llvm/llvm-project/commit/5e0be962feb37b224590e91879f9ac4a1fcacb85
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/test/CodeGen/PowerPC/ppc32-pic-large.ll
Log Message:
-----------
[PowerPC] Support PIC Secure PLT for CALL_RM
https://reviews.llvm.org/D111433 introduced PPCISD::CALL_RM for
-frounding-math. -msecure-plt -frounding-math {-fpic,-fPIC} codegen for
PPC32 became incorrect when a function contains function calls but no
global variable references (GlobalBaseReg).
As reported by @q66 , musl/src/dirent/closedir.c implements such a
function, which is miscompiled.
PPCISD::CALL has custom logic to set up the base register
(https://reviews.llvm.org/D42112). Add an extra case for CALL_RM.
While here, improve the test to
* actually test `case PPCISD::CALL`: we need a non-leaf function that
doesn't access global variables (global variables lead to
GlobalBaseReg, which call `getGlobalBaseReg()` as well).
* test `ExternalSymbolSDNode` with a memset.
Supersedes: #72758
Pull Request: https://github.com/llvm/llvm-project/pull/121281
Commit: 55391f85acc7e7a14ea2ef3c1a4bd8f3df990426
https://github.com/llvm/llvm-project/commit/55391f85acc7e7a14ea2ef3c1a4bd8f3df990426
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/StaticAnalyzer/Core/Z3CrosscheckVisitor.cpp
M clang/test/Analysis/analyzer-config.c
A clang/test/Analysis/z3-crosscheck-max-attempts.cpp
M clang/test/Analysis/z3/D83660.c
R clang/test/Analysis/z3/Inputs/MockZ3_solver_check.c
A clang/test/Analysis/z3/Inputs/MockZ3_solver_check.cpp
M clang/unittests/StaticAnalyzer/Z3CrosscheckOracleTest.cpp
Log Message:
-----------
[analyzer] Retry UNDEF Z3 queries 2 times by default (#120239)
If we have a refutation Z3 query timed out (UNDEF), allow a couple of
retries to improve stability of the query. By default allow 2 retries,
which will give us in maximum of 3 solve attempts per query.
Retries should help mitigating flaky Z3 queries.
See the details in the following RFC:
https://discourse.llvm.org/t/analyzer-rfc-retry-z3-crosscheck-queries-on-timeout/83711
Note that with each attempt, we spend more time per query.
Currently, we have a 15 seconds timeout per query - which are also in
effect for the retry attempts.
---
Why should this help?
In short, retrying queries should bring stability because if a query
runs long
it's more likely that it did so due to some runtime anomaly than it's on
the edge of succeeding. This is because most queries run quick, and the
queries that run long, usually run long by a fair amount.
Consequently, retries should improve the stability of the outcome of the
Z3 query.
In general, the retries shouldn't increase the overall analysis time
because it's really rare we hit the 0.1% of the cases when we would do
retries. But keep in mind that the retry attempts can add up if many
retries are allowed, or the individual query timeout is large.
CPP-5920
Commit: b6960e2a631df38c076cee2845978b0606cea066
https://github.com/llvm/llvm-project/commit/b6960e2a631df38c076cee2845978b0606cea066
Author: rchamala <36907958+rchamala at users.noreply.github.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M lldb/bindings/python/python-swigsafecast.swig
M lldb/include/lldb/API/SBModule.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
Log Message:
-----------
[lldb][ResolveSourceFileCallback] Update SBModule (#120832)
Summary:
RFC
https://discourse.llvm.org/t/rfc-python-callback-for-source-file-resolution/83545
SBModule will be used for resolve source file callback as Python
function arguments. This diff allows these things.
Can be instantiated from SBPlatform.
Can be passed to/from Python.
Test Plan:
N/A. The next set of diffs in the stack have unittests and shell test
validation
Co-authored-by: Rahul Reddy Chamala <rachamal at fb.com>
Commit: cb5d866feea72e0a846b4e7b921aaf6e70e196f1
https://github.com/llvm/llvm-project/commit/cb5d866feea72e0a846b4e7b921aaf6e70e196f1
Author: Amara Emerson <amara at apple.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/aarch64/arm_apple_sme_abi.s
Log Message:
-----------
[AArch64][SME] Add Darwin specific SME ABI routines.
Our platform has some constraints that allow us to make assumptions that
aren't generally applicable to other platforms. We keep an entirely separate
.s file for the routines.
Commit: db88071a8b24ad9302659ee88383eea69a732f11
https://github.com/llvm/llvm-project/commit/db88071a8b24ad9302659ee88383eea69a732f11
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/alternate-shuffle-cost.ll
M llvm/test/Analysis/CostModel/X86/reduction.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice.ll
M llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
M llvm/test/Transforms/PhaseOrdering/X86/hsub.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-cmps.ll
Log Message:
-----------
[CostModel][X86] Attempt to match cheap v4f32 shuffles that map to SHUFPS instruction (#121778)
Avoid always assuming the worst for v4f32 2 input shuffles, and match the SHUFPS pattern where possible - each pair of output elements must come from the same source register.
Commit: d40235ac24175e20988cc879dc515638df0c28c6
https://github.com/llvm/llvm-project/commit/d40235ac24175e20988cc879dc515638df0c28c6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/include/llvm/TableGen/Record.h
Log Message:
-----------
[TableGen] Remove unused functionality from OpInit class. NFC (#121680)
clone, getNumOperands, and getOperand haven't been used for quite some
time. The only remaining useful thing is the common implementation of
getBit.
Commit: fe42e63d7b1bfb356a5209d3ced846695823b623
https://github.com/llvm/llvm-project/commit/fe42e63d7b1bfb356a5209d3ced846695823b623
Author: Ian Wood <ianwood2024 at u.northwestern.edu>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M mlir/include/mlir/Analysis/DataFlowFramework.h
Log Message:
-----------
[mlir][NFC] Refactor `eraseState` to take constant time (#121670)
Refactors `analysisStates` to use two nested maps . This prevents
`eraseState` from having to scan through every analysis state which can
be costly when there are many analysis states and/or `eraseState` is
called frequently.
Signed-off-by: Ian Wood <ianwood2024 at u.northwestern.edu>
Commit: 1401703fe42003745e6937efa13078b462a9d706
https://github.com/llvm/llvm-project/commit/1401703fe42003745e6937efa13078b462a9d706
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
Log Message:
-----------
[RISCV] Add Enum for CSR encodings. (#121674)
This allows us to use them in C++ code without needing to do a table
lookup.
Commit: 6b0807fe2b8af7361f98f0f947a3129a6ab79f7e
https://github.com/llvm/llvm-project/commit/6b0807fe2b8af7361f98f0f947a3129a6ab79f7e
Author: Amara Emerson <amara at apple.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-store-vector-bools.mir
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
Log Message:
-----------
[AArch64][GlobalISel] Add support for lowering trunc stores of vector bools.
This is essentially a port of TargetLowering::scalarizeVectorStore(), which
is used for the case where we have something like a store of <8 x s8> truncating
to <8 x s1> in memory. The naive lowering is a sequence of extracts to compute
a scalar value to store.
AArch64's DAG implementation has some more smarts to improve this further which
we can do later.
Reviewers: topperc, davemgreen
Pull Request: https://github.com/llvm/llvm-project/pull/121169
Commit: 2d53eaff4aee73605170ce9910cde68fa7a300b2
https://github.com/llvm/llvm-project/commit/2d53eaff4aee73605170ce9910cde68fa7a300b2
Author: Amara Emerson <amara at apple.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
Log Message:
-----------
[AArch64][GlobalISel] Fix legalization for <4 x i1> vector stores.
This case is different from the earlier <8 x i1> case handled because it triggers
a legalization failure in lowerStore() that's intended for scalar code.
It also was triggering incorrect bitcast actions in the AArch64 rules that weren't
expecting truncating stores.
With these two fixed, more cases are handled. The code is still bad, including
some missing load promotion in our combiners that result in dead stores hanging
around at the end of codegen. Again, we can fix these in separate changes.
Reviewers: davemgreen, madhur13490, topperc, arsenm
Reviewed By: davemgreen
Pull Request: https://github.com/llvm/llvm-project/pull/121185
Commit: 0d5c07285f79a2135730c919c7e7b8e2bd9118e7
https://github.com/llvm/llvm-project/commit/0d5c07285f79a2135730c919c7e7b8e2bd9118e7
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaStmtAttr.cpp
A clang/test/AST/HLSL/HLSLControlFlowHint.hlsl
A clang/test/CodeGenHLSL/HLSLControlFlowHint.hlsl
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
A llvm/test/CodeGen/DirectX/HLSLControlFlowHint.ll
A llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
A llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint.ll
Log Message:
-----------
[HLSL] Adding Flatten and Branch if attributes (#116331)
- adding Flatten and Branch to if stmt.
- adding dxil control flow hint metadata generation
- modifing spirv OpSelectMerge to account for the specific attributes.
Closes #70112
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Commit: 7a07d8e9dfcf9cbb659883dd539319089563ac5d
https://github.com/llvm/llvm-project/commit/7a07d8e9dfcf9cbb659883dd539319089563ac5d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M flang/test/Driver/parse-error.ll
Log Message:
-----------
[flang][Driver] Fix flang/test/Driver/parse-error.ll
The error returned from the driver is actually "Could not scan", not
"Could not parse". The reason that the test has been passing is that
the FileCheck's regular expression "{{.*}}" was one of many sources
of problems, and was quoted in the output. The "CHECK" line matched
the quoted line instead of the actual error message.
Commit: 112793a90ec84c31ced9bdacad7ce204e2148d2c
https://github.com/llvm/llvm-project/commit/112793a90ec84c31ced9bdacad7ce204e2148d2c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[DAG] expandUINT_TO_FP - use getShiftAmountConstant helper. NFC.
Don't bother with separate getShiftAmountTy/getConstant calls.
Commit: 923675193b24d3123ece0a3504c7cd49fc7410e9
https://github.com/llvm/llvm-project/commit/923675193b24d3123ece0a3504c7cd49fc7410e9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Log Message:
-----------
[DAG] VectorLegalizer::ExpandUINT_TO_FLOAT- pull out repeated getValueType calls. NFC.
Commit: f3bc8c34c98a4b1a5361c3148eaeebd51151513f
https://github.com/llvm/llvm-project/commit/f3bc8c34c98a4b1a5361c3148eaeebd51151513f
Author: Aidan Goldfarb <47676355+AidanGoldfarb at users.noreply.github.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
Add SD matchers and unit test coverage for ISD::VECTOR_SHUFFLE (#119592)
This PR resolves #118845. I aimed to mirror the implementation
`m_Shuffle()` in
[PatternMatch.h](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/IR/PatternMatch.h).
Updated
[SDPatternMatch.h](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/CodeGen/SDPatternMatch.h)
- Added `struct m_Mask` to match masks (`ArrayRef<int>`)
- Added two `m_Shuffle` functions. One to match independently of mask,
and one to match considering mask.
- Added `struct SDShuffle_match` to match `ISD::VECTOR_SHUFFLE`
considering mask
Updated
[SDPatternMatchTest.cpp](https://github.com/llvm/llvm-project/blob/main/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp)
- Added `matchVecShuffle` test, which tests the behavior of both
`m_Shuffle()` functions
- - -
I am not sure if my test coverage is complete. I am not sure how to test
a `false` match, simply test against a different instruction? [Other
tests
](https://github.com/llvm/llvm-project/blob/main/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp#L175),
such as for `VSelect`, test against `Select`. I am not sure if there is
an analogous instruction to compare against for `VECTOR_SHUFFLE`. I
would appreciate some pointers in this area. In general, please
liberally critique this PR!
---------
Co-authored-by: Aidan <aidan.goldfarb at mail.mcgill.ca>
Commit: 3f936251d280d039d0a227247afd6884163e8a9a
https://github.com/llvm/llvm-project/commit/3f936251d280d039d0a227247afd6884163e8a9a
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
A clang/test/CodeGenHLSL/debug/rwbuffer_debug_info.hlsl
Log Message:
-----------
[HLSL] Fix debug info generation for RWBuffer types (#119041)
This PR fix the debug infor generation for RWBuffer types.
- This implements the [same fix as
DXC](https://github.com/microsoft/DirectXShaderCompiler/pull/6296).
- Adds the HLSLAttributedResource debug info generation
Closes #118523
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Commit: 21c785d7bd84df0b9176d48e7c3e74c914aae05a
https://github.com/llvm/llvm-project/commit/21c785d7bd84df0b9176d48e7c3e74c914aae05a
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/include/clang-c/Index.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/AST/ast-print-openacc-set-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
A clang/test/SemaOpenACC/set-construct-ast.cpp
A clang/test/SemaOpenACC/set-construct.cpp
M clang/test/SemaOpenACC/unimplemented-construct.c
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[OpenACC] Implement 'set' construct sema
The 'set' construct is another fairly simple one, it doesn't have an
associated statement and only a handful of allowed clauses. This patch
implements it and all the rules for it, allowing 3 of its for clauses.
The only exception is default_async, which will be implemented in a
future patch, because it isn't just being enabled, it needs a complete
new implementation.
Commit: ff24e9a19e3db330dd6412aac9d1d6c0b416697f
https://github.com/llvm/llvm-project/commit/ff24e9a19e3db330dd6412aac9d1d6c0b416697f
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/AST/ast-print-openacc-set-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
M clang/test/SemaOpenACC/set-construct-ast.cpp
M clang/test/SemaOpenACC/set-construct.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC] Implement 'default_async' sema
A fairly simple one, only valid on the 'set' construct, this clause
takes an int expression. Most of the work was already done as a part of
parsing, so this patch ends up being a lot of infrastructure.
Commit: 7d5376270ae5807a29597a91d7cf59f967ccf39e
https://github.com/llvm/llvm-project/commit/7d5376270ae5807a29597a91d7cf59f967ccf39e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
Log Message:
-----------
[AArch64] Migrate from SearchableTable to GenericTable/Enum. NFC (#121661)
SearchableTable is the legacy version that does not appear to be well
documented. Not sure if the plan was to delete it eventually.
We can eventually use the PrimaryKey feature of GenericTable to remove
one of the SearchIndex declarations. This will sort the generated table
by the primary key and remove the separately generated indexing table to
reduce .rodata size.
This patch is just the mechanical migration. The size savings will be
done in follow ups.
Commit: c388da6ed38ba8892edb90803b76bcfe759fe3cf
https://github.com/llvm/llvm-project/commit/c388da6ed38ba8892edb90803b76bcfe759fe3cf
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[libc][bazel] Simplify libc_build_rules by grouping release copts (#121630)
Extract all compiler options used to build "release" versions of libc
API functions into a separate helper function, instead of burying this
logic inside libc_function() macro.
With this change, we further split two "flavors" of cc_library()
produced for each libc public function:
* `<function>.__internal__` library used in unit tests is *not* built
with release copts and is thus indistinguishable from regular
libc_support_library(). Arguably, it's a good thing, because all sources
in a unit test are built with the same set of compiler flags, instead of
"franken-build" when a subset of sources is always built with -O3. If a
user needs to run the tests in optimized mode, they should really be
using Bazel invocation-level compile flags instead.
* `<function>` library that libc users can use to construct their own
static archive *is* built with the same release copts as before. There
is a pre-existing problem that its libc_support_library() dependencies
are not built with the same copts. We're not addressing it here now.
Commit: f4bab06c97060088922c5f6f2702bd12fb74c459
https://github.com/llvm/llvm-project/commit/f4bab06c97060088922c5f6f2702bd12fb74c459
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
A libc/config/gpu/amdgpu/config.json
A libc/config/gpu/amdgpu/entrypoints.txt
A libc/config/gpu/amdgpu/headers.txt
R libc/config/gpu/config.json
R libc/config/gpu/entrypoints.txt
R libc/config/gpu/headers.txt
A libc/config/gpu/nvptx/config.json
A libc/config/gpu/nvptx/entrypoints.txt
A libc/config/gpu/nvptx/headers.txt
Log Message:
-----------
[libc] Split AMDGPU and NVPTX configs into separate folders (#120153)
Summary:
This is a holdover from when these targets were merged. They're
basically the same but there's no reason they should be treated as
identical. I think we will live with a little duplication.
Commit: dc0e258fe4d9d97cefdfeefc932e1e9e15dc542d
https://github.com/llvm/llvm-project/commit/dc0e258fe4d9d97cefdfeefc932e1e9e15dc542d
Author: Emma Pilkington <emma.pilkington95 at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/test/CodeGen/AMDGPU/waitcnt-meta-instructions.mir
M llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
M llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp
Log Message:
-----------
[AMDGPU] Remove Dwarf encodings for subregisters (#117891)
Previously, registers and subregisters mapped to the same Dwarf
encoding. We don't really have any way to refer to subregisters directly
from Dwarf, the expression emitter should instead use DW_OPs to stencil
out the subregister from the whole register. This was also confusing
tools that need to map back to the llvm reg (e.g. dwarfdump), since
getLLVMRegNum() would arbitrarily return the _LO16 register.
Commit: 6f28b4b5e960e1c4eeebad18b48e667df1e806a8
https://github.com/llvm/llvm-project/commit/6f28b4b5e960e1c4eeebad18b48e667df1e806a8
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/GSYM/FunctionInfo.h
M llvm/include/llvm/DebugInfo/GSYM/GsymReader.h
M llvm/include/llvm/DebugInfo/GSYM/MergedFunctionsInfo.h
M llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
M llvm/lib/DebugInfo/GSYM/MergedFunctionsInfo.cpp
M llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-merged-funcs-dwarf.yaml
M llvm/tools/llvm-gsymutil/Opts.td
M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
Log Message:
-----------
[GSYM] Add support for querying merged functions in llvm-gsymutil (#120991)
Adds the ability to lookup and display all merged functions for an
address in llvm-gsymutil.
Now, when `--merged-functions` is used in combination with
`--address/--addresses-from-stdin`, lookup results will contain
information about merged functions, if available.
To support printing merged function information when using the
`--verbose` option, the `LookupResult` data structure also had to be
extended with pointers to the raw function data and raw merged function
data. This is because merged functions share the same address range, so
it's not easy to look up the raw merged function data for a particular
`LookupResult` that is based on a merged function.
Commit: ce831a231a7509b558121808ab03407916bf1dff
https://github.com/llvm/llvm-project/commit/ce831a231a7509b558121808ab03407916bf1dff
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_fma_f16 (#119477)
Support true16 format for v_fma_f16 in MC.
Since we are replacing v_fma_f16 to v_fma_f16_t16/v_fma_f16_fake16 in
Post-GFX11, have to update the CodeGen pattern for v_fma_f16_fake16 to
get CodeGen test passing. There is no pattern modified/created, but just
replacing the v_fma_f16 with fake16 format.
Commit: 97ea0aba15f7f618d7a0caabf0627793563f3850
https://github.com/llvm/llvm-project/commit/97ea0aba15f7f618d7a0caabf0627793563f3850
Author: Markus Böck <markus.boeck02 at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/TableGen/TGParser.h
M llvm/test/TableGen/template-args.td
A mlir/test/tblgen-lsp-server/templ-arg-check.test
Log Message:
-----------
[TableGen] Do not exit in template argument check (#121636)
The signature of `CheckTemplateArgValues` implements error handling via
the `bool` return type, yet always returned false. The single possible
error case instead used `PrintFatalError,` which exits the program
afterward.
This behavior is undesirable: It prevents any further errors from being
printed and makes TableGen less usable as a library as it crashes the
entire process (e.g. `tblgen-lsp-server`).
This PR therefore fixes the issue by using `Error` instead and returning
true if an error occurred. All callers already perform proper error
handling.
As `llvm-tblgen` exits on error, a test was also added to the LSP to
ensure it exits normally despite the error.
Commit: 40a00af3ea529aba93b87d666f3090b4686ff9d0
https://github.com/llvm/llvm-project/commit/40a00af3ea529aba93b87d666f3090b4686ff9d0
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
Log Message:
-----------
[gn] port 21edac25f09f (BuiltinsSPIRV)
Commit: 4af3332015c8473642a454ae5f521ae709188d4d
https://github.com/llvm/llvm-project/commit/4af3332015c8473642a454ae5f521ae709188d4d
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_cvt_u32_u16 (#120646)
Support true16 format for v_cvt_u32_u16 in MC
Commit: 6e6f89cba0fd70ef1ea8c9abfbdf03d8f69492c4
https://github.com/llvm/llvm-project/commit/6e6f89cba0fd70ef1ea8c9abfbdf03d8f69492c4
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M flang/test/Driver/parse-error.ll
Log Message:
-----------
[flang][test] One more fix in flang/test/Driver/parse-error.ll
The file suffix .f95 remained after 7a07d8e9df, change it to .ll.
Commit: 15f30e70eb18340fc422805707870e298d93161f
https://github.com/llvm/llvm-project/commit/15f30e70eb18340fc422805707870e298d93161f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M libcxx/test/benchmarks/numeric/gcd.bench.cpp
Log Message:
-----------
[libc++] Fix the batch size used in the std::gcd benchmark (#120618)
Since that benchmark is testing n*n inputs, the batch size reported to
GoogleBenchmark should be that amount. Otherwise, GoogleBenchmark
reports the timing for calling std::gcd on the whole sequence, which is
misleading.
Commit: cb1c15639f012838ba1ef202aa9c55551e9019ff
https://github.com/llvm/llvm-project/commit/cb1c15639f012838ba1ef202aa9c55551e9019ff
Author: Jannik Glückert <jannik.glueckert at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M libcxx/src/filesystem/operations.cpp
A libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.copy_file/copy_file_procfs.pass.cpp
Log Message:
-----------
[libc++] Use copy_file_range for fs::copy (#109211)
This optimizes `std::filesystem::copy_file` to use the `copy_file_range`
syscall (Linux and FreeBSD) when available. It allows for reflinks on
filesystems such as btrfs, zfs and xfs, and server-side copy for network
filesystems such as NFS.
Commit: 774c22686330f3ca43e48a1b8076eb30ae03dbd8
https://github.com/llvm/llvm-project/commit/774c22686330f3ca43e48a1b8076eb30ae03dbd8
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M lldb/include/lldb/Core/Progress.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Core/Progress.cpp
M lldb/unittests/Core/ProgressReportTest.cpp
Log Message:
-----------
[LLDB] Add external progress bit category (#120171)
As feedback on #119052, it was recommended I add a new bit to delineate
internal and external progress events. This patch adds this new
category, and sets up Progress.h to support external events via
SBProgress.
Commit: bda7c9ac79fe841d39084f73730d0b3ffa3b101b
https://github.com/llvm/llvm-project/commit/bda7c9ac79fe841d39084f73730d0b3ffa3b101b
Author: Konstantin Varlamov <varconsteq at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M libcxx/docs/Hardening.rst
M libcxx/include/forward_list
A libcxx/test/libcxx/containers/sequences/forwardlist/assert.pass.cpp
Log Message:
-----------
[libc++][hardening] Add checks to `forward_list` element access. (#120858)
In our implementation, failing these checks would result in a null
pointer access rather than an out-of-bounds access.
Commit: fbcf3cb7fe95d9d420b643ce379f7ee2106a6efc
https://github.com/llvm/llvm-project/commit/fbcf3cb7fe95d9d420b643ce379f7ee2106a6efc
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_type.py
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[libclang/python] Add python binding for clang_Cursor_isAnonymousRecordDecl (#120483)
This function allows checking whether a declaration declares an
anonymous union (as opposed to clang_Cursor_isAnonymous, which just
checks if the declaration has a name).
Commit: be21bd9bbf3bc906f9b98ac3de1fc88a4a8ac4b4
https://github.com/llvm/llvm-project/commit/be21bd9bbf3bc906f9b98ac3de1fc88a4a8ac4b4
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Passes/ReorderFunctions.cpp
R bolt/test/AArch64/pad-before-funcs.s
Log Message:
-----------
Revert "[BOLT] Add --pad-funcs-before=func:n (#117924)"
14dcf8214f9c66172d17c1cfaec6aec0030748e0 introduced a subtle bug with
the static `FunctionPadding` map.
If either `opts::FunctionPadSpec` or `opts::FunctionPadBeforeSpec` are set,
the map is going to be populated with the respective spec in the first
invocation of `BinaryEmitter::emitFunction`. The subsequent invocations
will pick up the padding from the map irrespective of whether
`opts::FunctionPadSpec` or `opts::FunctionPadBeforeSpec` is passed as a
parameter.
This breaks an internal test, hence reverting the patch.
Commit: 3f1a391b5eb89e53b5d026c417ae6a508d32c808
https://github.com/llvm/llvm-project/commit/3f1a391b5eb89e53b5d026c417ae6a508d32c808
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-merged-funcs-dwarf.yaml
M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
Log Message:
-----------
[llvm-gsymutil] Fix broken tests (#121837)
Recently https://github.com/llvm/llvm-project/pull/120991 broke a couple
of tests.
Also `macho-merged-funcs-dwarf.yaml` was already flaky due to some
non-determinism issues.
Fixing the previous code to not break tests and modifying
`macho-merged-funcs-dwarf.yaml` to fix the non-determinism (which will
be resolved later).
Commit: f06d4d9ae501115c20829bab7513a977a71bf53c
https://github.com/llvm/llvm-project/commit/f06d4d9ae501115c20829bab7513a977a71bf53c
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port d00f65c6acd9
Commit: ec58ad6149fb8813521973d8ba9690276e282373
https://github.com/llvm/llvm-project/commit/ec58ad6149fb8813521973d8ba9690276e282373
Author: Michael Toguchi <michael.d.toguchi at intel.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/Driver/ToolChains/SYCL.h
M clang/test/Driver/sycl-offload-jit.cpp
Log Message:
-----------
[Driver][SYCL] Address sanitizer and test issue (#121822)
The following commit:
https://github.com/llvm/llvm-project/commit/d00f65c6acd9f0e1ddae83391f55eb9d232d2f9e
Caused sanitizer build issues and also a test issue when using
%clang_cl. Address these problems.
- Use local static array
- Use '--' for clang_cl calls
---------
Co-authored-by: Vitaly Buka <vitalybuka at gmail.com>
Commit: 32d761bbec660c977322afeac1acbafd46008752
https://github.com/llvm/llvm-project/commit/32d761bbec660c977322afeac1acbafd46008752
Author: Simon Wallis <simon.wallis2 at arm.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/test/CodeGen/AArch64/machine-combiner.ll
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
Log Message:
-----------
[AArch64][machine-scheduler][Neoverse-N2] fdiv is blocking (#119206)
For Neoverse-N2, mark FP divide and square root instructions as blocking
their pipeline until complete.
This matches the way that blocking integer divide instructions are
marked.
>From the Software Optimization Guide, section 3.14 Notes:
1. FP divide and square root operations are performed using an iterative
algorithm and block subsequent similar operations to the same pipeline
until complete.
---------
Co-authored-by: Cullen Rhodes <cullen.rhodes at arm.com>
Commit: 4cceea1acc4029c1c2cee85205184387ac361ef7
https://github.com/llvm/llvm-project/commit/4cceea1acc4029c1c2cee85205184387ac361ef7
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
Log Message:
-----------
[libc][bazel] Remove customization from several libc BUILD rules. (#121843)
Get rid of the following arguments to libc_support_library and
libc_function rules:
* `defines` (for raw_mutex.h) - it wasn't used correctly (e.g. didn't
provide actual value for spin count), and we can instead fallback to
defaults set in the header itself (or rely on library-level configure
options).
* `features` - there's no need to disable sanitization for a subset of
memory functions -- it generally should be the vendor / user
responsibility to control it (e.g. don't include instrumented libc
functions in the build, since they would be provided by sanitizer
runtimes instead).
* `local_defines` (for printf_parser) - no longer needed, since
LIBC_COPT_MOCK_ARG_LIST has been removed in
e0be78be427931e94d287002b9c3910f6bc6a22c
This also removes two ad-hoc BUILD rules (strcpy_sanitized and
printf_mock_parser) which are no longer needed and can be replaced by
strcpy and printf_parser, respectively.
Co-authored-by: Alexey Samsonov <samsonov at google.com>
Commit: c8d435f9afac73d31b53cc120678f60ac4922f97
https://github.com/llvm/llvm-project/commit/c8d435f9afac73d31b53cc120678f60ac4922f97
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
Log Message:
-----------
[RISCV] Use ISD::XOR instead of RISCVISD::VMXOR_VL in lowerVectorMaskVecReduction of scalable ISD::VECREDUCE_AND (#121812)
This allows combining the XOR with earlier ISD::ANDs inserted by type
legalization.
Commit: d0c00cf07852ffcd3c3a08126bd85cc119e8de3b
https://github.com/llvm/llvm-project/commit/d0c00cf07852ffcd3c3a08126bd85cc119e8de3b
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
Log Message:
-----------
[LV] Add test case for #121745.
Test for https://github.com/llvm/llvm-project/issues/121745.
Commit: 3874c64418d2a7e36eab9af9253d905b48b36078
https://github.com/llvm/llvm-project/commit/3874c64418d2a7e36eab9af9253d905b48b36078
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M flang/lib/Common/Fortran.cpp
M flang/test/Semantics/cuf10.cuf
Log Message:
-----------
[flang][cuda] Allow constant actual argument for device dummy (#121845)
The reference compiler allows this use case. Note that writing to this
variable would result in CUDA error.
Commit: f9369cc602272796c15de1065a782f812e791df3
https://github.com/llvm/llvm-project/commit/f9369cc602272796c15de1065a782f812e791df3
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
Log Message:
-----------
[VPlan] Make sure last IV increment value is available if needed.
Legalize extract-from-ends using uniform VPReplicateRecipe of wide
inductions to use regular VPReplicateRecipe, so the correct end value
is available.
Fixes https://github.com/llvm/llvm-project/issues/121745.
Commit: 1a435feffcd85c1e7fe30daf1a3995e95860b300
https://github.com/llvm/llvm-project/commit/1a435feffcd85c1e7fe30daf1a3995e95860b300
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
Log Message:
-----------
[HLSL] Fix build warning after #116331 (#121852)
After #116331 is always SpellingNotCalculated,
so I assume doing nothing is expected.
Commit: 8cd94e0b6d18b6b454431ba9481c2489b480baf4
https://github.com/llvm/llvm-project/commit/8cd94e0b6d18b6b454431ba9481c2489b480baf4
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/test/Conversion/AffineToStandard/lower-affine-to-vector.mlir
M mlir/test/Conversion/AffineToStandard/lower-affine.mlir
M mlir/test/Conversion/MemRefToLLVM/expand-then-convert-to-llvm.mlir
M mlir/test/Dialect/LLVM/lower-to-llvm-e2e-with-target-tag.mlir
M mlir/test/Dialect/LLVM/lower-to-llvm-e2e-with-top-level-named-sequence.mlir
Log Message:
-----------
[mlir][Affine] Add nsw to lowering of `AffineMulExpr`. (#121535)
Since index operations have no set bitwidth, it is ill-defined to use
signed/unsigned wrapping behavior. The corollary to which is that it is
always safe to add nsw/nuw to lowering of affine ops.
Also add a folder to fold `div(s|u)i (mul (a, v), v) -> a`
Signed-off-by: MaheshRavishankar <mravisha at amd.com>
Commit: 4312075efa02ad861db0a19a0db8e6003aa06965
https://github.com/llvm/llvm-project/commit/4312075efa02ad861db0a19a0db8e6003aa06965
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/FunctionImportUtils.h
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
M llvm/tools/llvm-link/llvm-link.cpp
Log Message:
-----------
[nfc][thinlto] remove unnecessary return from `renameModuleForThinLTO` (#121851)
Same goes for `FunctionImportGlobalProcessing::run`.
The return value was used, but it was always `false`.
Commit: 01e980e792651391dfc3b399dbe300eddbbd0997
https://github.com/llvm/llvm-project/commit/01e980e792651391dfc3b399dbe300eddbbd0997
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M lldb/source/Plugins/InstrumentationRuntime/ASanLibsanitizers/InstrumentationRuntimeASanLibsanitizers.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
Log Message:
-----------
[lldb] Use `Address` to setup breakpoint (#94794)
Use `Address` (instead of `addr_t`) to setup
breakpoint in `ReportRetriever::SetupBreakpoint`.
This is cleaner and the breakpoint should now
survive re-running of the binary.
rdar://124399066
Commit: 4dc34b0d660a52744164a37466ce245764126296
https://github.com/llvm/llvm-project/commit/4dc34b0d660a52744164a37466ce245764126296
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Add BuiltinsSPIRV (for #121598)
Commit: 97097958fdf525e8c14fcdde94231bae72ea2673
https://github.com/llvm/llvm-project/commit/97097958fdf525e8c14fcdde94231bae72ea2673
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
Log Message:
-----------
[Coverage] MCDC: Move findIndependencePairs deferred into MCDCRecord (#121188)
The result of "Independence pairs" is not mergeable. This change makes
defers re-calculation of "Independence pairs" after merging test
vectors.
No apparent behavior changes.
Commit: 90b04bf84ec3315f803a88882ba846e3086ba5e3
https://github.com/llvm/llvm-project/commit/90b04bf84ec3315f803a88882ba846e3086ba5e3
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsSPIRV.td
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cross.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/length.ll
M llvm/test/CodeGen/SPIRV/opencl/degrees.ll
M llvm/test/CodeGen/SPIRV/opencl/radians.ll
Log Message:
-----------
[NFC] fix up typos (#121842)
Fix Tablegen typo to indicate SPIRV and not HLSL
Fix miscellaneous test case typos.
Commit: 7e2ed35104adbf062119c39c4293eb3bc16bc51b
https://github.com/llvm/llvm-project/commit/7e2ed35104adbf062119c39c4293eb3bc16bc51b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
Log Message:
-----------
AMDGPU: Reduce AddedComplexity on canonicalize pattern (#119796)
Pick the minimum complexity required for tests to pass instead of
a giant debug value of 1000.
Commit: f6365a47a1ad9ab6d432f6e40d14a11419e21282
https://github.com/llvm/llvm-project/commit/f6365a47a1ad9ab6d432f6e40d14a11419e21282
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
A llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll
Log Message:
-----------
AMDGPU: Fix assert on physreg MUBUF rsrc operand (#120815)
The stack case uses a physical register and should not ordinarily
reach here, but strange things happen at -O0. The testcase still
errors because we do not yet attempt to handle arbitrary dynamic
sized allocas yet.
Fixes: SWDEV-503538
Commit: a8f3ebaf11c3745e5123054776eb71755d16f2f9
https://github.com/llvm/llvm-project/commit/a8f3ebaf11c3745e5123054776eb71755d16f2f9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/swdev502267-use-after-free-last-chance-recoloring-alloc-succeeds.mir
Log Message:
-----------
AMDGPU: Mark test as XFAIL in expensive_checks builds
One of the tests added in 93220e7e06473a11bf48fee26bcea16cc527e5dc
fails the machine verifier after allocation, but this is a separate
issue.
Commit: 737d6ca44d383bcf33a0605a7d9014027296269a
https://github.com/llvm/llvm-project/commit/737d6ca44d383bcf33a0605a7d9014027296269a
Author: quic_hchandel <165007698+hchandel at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcicm-invalid.s
A llvm/test/MC/RISCV/xqcicm-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcicm (Conditional Move) extension (#121752)
The Qualcomm uC Xqcicm extension adds 13 conditional move instructions.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
---------
Co-authored-by: Harsh Chandel <hchandel at qti.qualcomm.com>
Commit: 93e63460a2958c253dcbb7681faa532962a306bc
https://github.com/llvm/llvm-project/commit/93e63460a2958c253dcbb7681faa532962a306bc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/swdev502267-use-after-free-last-chance-recoloring-alloc-succeeds.mir
Log Message:
-----------
RegAllocGreedy: Un-disable test in expensive_checks builds
This reverts a8f3ebaf11c3745e5123054776eb71755d16f2f9. You need to
use -verify-regalloc to get a MachineVerifier run with LiveIntervals,
otherwise cases not covered by the basic liveness implementation
in the verifier are passed through (which covers most use of undefined
subrange errors).
Commit: 8c0483bba2d25ae7e4b6cac150dba9447dfed59c
https://github.com/llvm/llvm-project/commit/8c0483bba2d25ae7e4b6cac150dba9447dfed59c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/AMDGPU/remat-physreg-copy-subreg-extract-already-live-at-def-issue120970.mir
Log Message:
-----------
RegisterCoalescer: Fix assert on remat to copy-to-physreg with subregs (#121734)
Do not try to rematerialize a super-register def used by a subregister
extract copy into a copy to a physical register if the other pieces of
the
full physreg are live at the rematerialization point. It would insert
the
super-register def at the rematerialization point, and assert since the
other half of the register was already live.
This is analagous to the undef subregister def handling above,
which handled the virtual register case.
Fixes #120970
Commit: 653a54727eaa18c43447ad686c987db67f1dda74
https://github.com/llvm/llvm-project/commit/653a54727eaa18c43447ad686c987db67f1dda74
Author: Ian Anderson <iana at apple.com>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
A clang/test/Driver/Inputs/MacOSX15.1.sdk/embedded/usr/include/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/embedded/usr/local/include/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/usr/include/c++/v1/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/usr/local/include/.keep
A clang/test/Driver/darwin-embedded-search-paths.c
M clang/test/Preprocessor/macho-embedded-predefines.c
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
[Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (#120507)
Embedded development often needs to use a different C standard library,
replacing the existing one normally passed as -internal-externc-isystem.
This works fine for an apple-macos target, but apple-none-macho doesn't
work because the MachO driver doesn't implement
AddClangSystemIncludeArgs to add the resource directory as
-internal-isystem like most other drivers do. Move most of the search
path logic from Darwin and DarwinClang down into an AppleMachO toolchain
between the MachO and Darwin toolchains.
Also define \_\_MACH__ for apple-none-macho, as Swift expects all MachO
targets to have that defined.
Commit: 8d2e611802d5f3bdd681d308ceb293e5ace8a894
https://github.com/llvm/llvm-project/commit/8d2e611802d5f3bdd681d308ceb293e5ace8a894
Author: choikwa <5455710+choikwa at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
Log Message:
-----------
[AMDGPU] Calculate getDivNumBits' AtLeast using bitwidth (#121758)
Previously in shrinkDivRem64, it used fixed value 32 for AtLeast which
meant that <64bit divisions would be rejected from shrinking since logic
depended only on number of sign bits. I.e. 'idiv i48 %0, %1' would
return 24 for number of sign bits if %0,%1 both had 24 division bits,
and was rejected.
Commit: 5aef8ab6ec3a5bcb224fee764bbc6914a76d7dbb
https://github.com/llvm/llvm-project/commit/5aef8ab6ec3a5bcb224fee764bbc6914a76d7dbb
Author: Fangrui Song <i at maskray.me>
Date: 2025-01-06 (Mon, 06 Jan 2025)
Changed paths:
M lld/COFF/Driver.h
M lld/ELF/SymbolTable.cpp
Log Message:
-----------
[lld,NFC] Fix stale comments related to config->
Commit: 5656cbca52545e608f6fb8b7c9a778c7c9b4b468
https://github.com/llvm/llvm-project/commit/5656cbca52545e608f6fb8b7c9a778c7c9b4b468
Author: William Moses <gh at wsmoses.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/lib/CAPI/Dialect/LLVM.cpp
Log Message:
-----------
[MLIR][CAPI] export LLVMFunctionType param getter and setters (#121888)
Commit: a8072a0b4ebd5cd1fb3958629cd453910691f6d3
https://github.com/llvm/llvm-project/commit/a8072a0b4ebd5cd1fb3958629cd453910691f6d3
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/phi.ll
Log Message:
-----------
[InstCombine] Eliminate icmp+zext pairs over phis more aggressively (#121767)
When folding icmp over phi, add a special case for `icmp eq (zext(bool),
0)`, which is known to fold to `!bool` and thus won't increase the
instruction count. This helps convert more phis to i1, esp. in loops.
This is based on existing logic we have to support this for icmp of
ucmp/scmp.
Commit: 9c1fecf9b9a9f39c2e8ffaed9ba161bf7d4bbe0c
https://github.com/llvm/llvm-project/commit/9c1fecf9b9a9f39c2e8ffaed9ba161bf7d4bbe0c
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Update debuginfo maintainers (#120231)
Update the list of debuginfo maintainers. These are the clang debuginfo
maintainers, plus a few additional people for LLVM-specific parts.
Commit: 7810e6a3a81031fb2511f35ca0f173176b529527
https://github.com/llvm/llvm-project/commit/7810e6a3a81031fb2511f35ca0f173176b529527
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
A llvm/test/CodeGen/ARM/sink-store-pre-load-dependency.mir
Log Message:
-----------
[ARM] Introduce test for PR121565 (NFC)
Commit: 446a426436c0b7e457992981d3a1f2b4fda19992
https://github.com/llvm/llvm-project/commit/446a426436c0b7e457992981d3a1f2b4fda19992
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/test/CodeGen/ARM/sink-store-pre-load-dependency.mir
M llvm/test/tools/llvm-mca/ARM/cortex-a57-memory-instructions.s
Log Message:
-----------
[ARM] Record store with pre/post-indexed addressing as `mayStore`
A miscompilation issue observed during machine sinking has been
addressed with improved handling.
Fixes: https://github.com/llvm/llvm-project/issues/121299.
Commit: 93011fe2a5268aab9bf59e71b9d21a3818d1e199
https://github.com/llvm/llvm-project/commit/93011fe2a5268aab9bf59e71b9d21a3818d1e199
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/lib/AST/ASTContext.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/AArch64/fmv-dependencies.c
A clang/test/CodeGen/AArch64/fmv-features.c
M clang/test/CodeGen/AArch64/fmv-streaming.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-version.c
Log Message:
-----------
[FMV][AArch64][clang] Emit fmv-features metadata in LLVM IR. (#118544)
We need to be able to propagate information about FMV attribute strings
from C/C++ source to LLVM IR. This is necessary so that we can
distinguish which target-features are coming from the cmdline, which are
coming from the target attribute, and which are coming from feature
dependency expansion. We need this for static resolution of calls in
LLVM. Here's a motivating example:
Suppose you have target_version("i8mm+dotprod") and
target_version("fcma"). The first version clearly has higher priority.
Now suppose you specify -march=armv8-a+i8mm on the command line. Then
the versions would have target-features "+i8mm,+dotprod" and
"+i8mm,+fcma" respectively. If you are using those to deduce version
priority, then you would incorrectly deduce that the second version was
higher priority than the first.
Commit: 064da423c3b46907f5011a4537a88fbae9ac03d4
https://github.com/llvm/llvm-project/commit/064da423c3b46907f5011a4537a88fbae9ac03d4
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/lib/Format/MatchFilePath.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
Log Message:
-----------
[clang-format][NFC] Remove unneeded ST_ChildBlock in annotator
Also, remove redundant llvm:: in the annotator and return early for globstar
in matchFilePath().
Commit: 21b531ead174b32cdc610e9003de342034368ee1
https://github.com/llvm/llvm-project/commit/21b531ead174b32cdc610e9003de342034368ee1
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/include/clang/Basic/arm_sme.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
M clang/utils/TableGen/SveEmitter.cpp
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sme-intrinsics-state.ll
Log Message:
-----------
[clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (#120265)
Replacing the extant streaming mode function call with an intrinsic
allows us to make further optimisations around it. For example, if it's
called within a function that has a known streaming mode, we can remove
the dead code, and avoid the redundant conditional branch.
Commit: d82d53b2e3d7fb2f44f91dc1ca9ce8bb5487da57
https://github.com/llvm/llvm-project/commit/d82d53b2e3d7fb2f44f91dc1ca9ce8bb5487da57
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
A flang/test/Lower/OpenMP/firstprivate-alloc-comp.f90
Log Message:
-----------
[flang][openmp] initialize allocatable components of firstprivate copies (#121808)
Descriptors of allocatable components of firstprivate derived type
copies need to be set-up. Otherwise the program later die when
manipulating them inside OpenMP region.
Commit: 231d113c7e172a59ec02d33a248d7b44109245d6
https://github.com/llvm/llvm-project/commit/231d113c7e172a59ec02d33a248d7b44109245d6
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-divrem.ll
Log Message:
-----------
[InstCombine] Handle commuted patterns in `foldSelectWithSRem` (#121896)
Closes https://github.com/llvm/llvm-project/issues/121771.
Commit: 0fa59c636278324aaea55c3bc60489af88646a32
https://github.com/llvm/llvm-project/commit/0fa59c636278324aaea55c3bc60489af88646a32
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/docs/GettingStarted.rst
Log Message:
-----------
[llvm][Docs] Update supported hardware (#121743)
Since someone on Discord asked why macOS arm64 was not listed.
https://llvm.org/docs/GettingStarted.html#hardware
Add a few known platforms:
* Linux AArch64
* FreeBSD AArch64
* macOS arm64 (Clang build only, there might be a GCC port but I've not
used it myself)
* Windows on Arm (ARM64 as Microsoft refers to it)
Commit: 2db7b314da367e1a6bf8cf34df16f9ad5ad62f5e
https://github.com/llvm/llvm-project/commit/2db7b314da367e1a6bf8cf34df16f9ad5ad62f5e
Author: David Green <david.green at arm.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/cast.ll
Log Message:
-----------
[AArch64] Add BF16 fpext and fptrunc costs. (#119524)
This expands the recently added fp16 fpext and fpround costs to bf16.
Some of the costs are taken from the rough number of instructions
needed, some are a little aspirational.
https://godbolt.org/z/bGEEd1vsW
Commit: cf23549edd0ac971600ceea1bb7f1454566b00a3
https://github.com/llvm/llvm-project/commit/cf23549edd0ac971600ceea1bb7f1454566b00a3
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/www/make_cxx_dr_status
Log Message:
-----------
[clang] Improve `make_cxx_dr_status` behavior when error occurs (#121785)
One of our contributors got confused by the behavior of the script when
they incorrectly specified the status of a CWG issue
(https://github.com/llvm/llvm-project/pull/102857/files#r1904264872),
and this is an attempt to reduce the confusion:
- script doesn't write anything to disk unless everything is good;
- error messages are prefixed with (a very familiar) `error:` to make it
more obvious that a fatal error occurred.
Commit: 83c1d003118a2cb8136fe49e2ec43958c93d9d6b
https://github.com/llvm/llvm-project/commit/83c1d003118a2cb8136fe49e2ec43958c93d9d6b
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
R llvm/lib/Target/SPIRV/SPIRVDuplicatesTracker.cpp
M llvm/lib/Target/SPIRV/SPIRVDuplicatesTracker.h
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/AtomicCompareExchange.ll
M llvm/test/CodeGen/SPIRV/event-zero-const.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-simple-hierarchy.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_const.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-addrcast.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_shader_clock/shader_clock.ll
M llvm/test/CodeGen/SPIRV/iaddcarry-builtin.ll
M llvm/test/CodeGen/SPIRV/image-unoptimized.ll
M llvm/test/CodeGen/SPIRV/isubborrow-builtin.ll
M llvm/test/CodeGen/SPIRV/keep-tracked-const.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshl.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshr.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
M llvm/test/CodeGen/SPIRV/logical-access-chain.ll
M llvm/test/CodeGen/SPIRV/pointers/PtrCast-null-in-OpSpecConstantOp.ll
M llvm/test/CodeGen/SPIRV/pointers/struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/transcoding/SampledImage.ll
M llvm/test/CodeGen/SPIRV/transcoding/cl-types.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_arithmetic.ll
M llvm/test/CodeGen/SPIRV/unnamed-global.ll
Log Message:
-----------
[SPIR-V] Overhaul module analysis to improve translation speed and simplify the underlying logics (#120415)
This PR is to address legacy issues with module analysis that currently
uses a complicated and not so efficient approach to trace dependencies
between SPIR-V id's via a duplicate tracker data structures and an
explicitly built dependency graph. Even a quick performance check
without any specialized benchmarks points to this part of the
implementation as a biggest bottleneck.
This PR specifically:
* eliminates a need to build a dependency graph as a data structure,
* updates the test suite (mainly, by fixing incorrect CHECK's referring
to a hardcoded order of definitions, contradicting the spec requirement
to allow certain definitions to go "in any order", see
https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#_logical_layout_of_a_module),
* improves function pointers implementation so that it now passes
EXPENSIVE_CHECKS (thus removing 3 XFAIL's in the test suite).
As a quick sanity check of whether goals of the PR are achieved, we can
measure time of translation for any big LLVM IR. While testing the PR in
the local development environment, improvements of the x5 order have
been observed.
For example, the SYCL test case "group barrier" that is a ~1Mb binary IR
input shows the following values of the naive performance metric that we
can nevertheless apply here to roughly estimate effects of the PR.
before the PR:
```
$ time llc -O0 -mtriple=spirv64v1.6-unknown-unknown _group_barrier_phi.bc -o 1 --filetype=obj
real 3m33.241s
user 3m14.688s
sys 0m18.530s
```
after the PR
```
$ time llc -O0 -mtriple=spirv64v1.6-unknown-unknown _group_barrier_phi.bc -o 1 --filetype=obj
real 0m42.031s
user 0m38.834s
sys 0m3.193s
```
Next work should probably address Duplicate Tracker further, as it needs
analysis now from the perspective of what parts of it are not necessary
now, after changing the approach to implementation of the module
analysis step.
Commit: b0e05a5f04d3225b8ff1319064c88d0249e683d2
https://github.com/llvm/llvm-project/commit/b0e05a5f04d3225b8ff1319064c88d0249e683d2
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Add missing check before accessing pointer
C2 can be null here, so we need to check it or clang may crash.
Commit: 5514865147c3bca1c819d2658ce3bf113aeffa00
https://github.com/llvm/llvm-project/commit/5514865147c3bca1c819d2658ce3bf113aeffa00
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
Log Message:
-----------
[Coalescer] Move code added in #116191 (#121779)
By moving the code a bit later, we can factor out some of the conditions
as those are now already tested.
This will also be useful when adding another fix on top that uses
`NewMI`'s subreg index (to follow as a separate PR).
The change is intended to be NFC.
Commit: 7ce15f3ba76e1780935715cfdd9dd368ebd23163
https://github.com/llvm/llvm-project/commit/7ce15f3ba76e1780935715cfdd9dd368ebd23163
Author: Kristóf Umann <dkszelethus at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[NFC][analyzer][docs] Document MallocChecker's ownership attributes (#121759)
Exactly what it says on the tin! These were written ages ago (2010s),
but are still functional, only the docs are missing.
---------
Co-authored-by: Donát Nagy <donat.nagy at ericsson.com>
Co-authored-by: Balazs Benics <benicsbalazs at gmail.com>
Co-authored-by: isuckatcs <65320245+isuckatcs at users.noreply.github.com>
Commit: 66acb2694655321b37a1ee3ff19207a111756562
https://github.com/llvm/llvm-project/commit/66acb2694655321b37a1ee3ff19207a111756562
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
Log Message:
-----------
[clang][CodeGen][SPIRV] Translate `amdgpu_flat_work_group_size` into `max_work_group_size`. (#116820)
HIPAMD relies on the `amdgpu_flat_work_group_size` attribute to
implement key functionality such as the `__launch_bounds__` `__global__`
function annotation. This attribute is not available / directly
translatable to SPIR-V, hence as it is AMDGCN flavoured SPIR-V suffers
from information loss.
This patch addresses that limitation by converting the unsupported
attribute into the `max_work_group_size` attribute which maps to
[`MaxWorkgroupSizeINTEL`](https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_kernel_attributes.asciidoc),
which is available in / handled by SPIR-V. When reverse translating from
SPIR-V to AMDGCN LLVMIR we invert the map and add the original AMDGPU
attribute.
Commit: a774e7f7b15dbc1a7d4811f155b3a8834b6b7ff8
https://github.com/llvm/llvm-project/commit/a774e7f7b15dbc1a7d4811f155b3a8834b6b7ff8
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/global-var-name-linkage.ll
Log Message:
-----------
[SPIR-V] Fix OpName and LinkageAttributes decoration of global variables (#120492)
This PR changes `getGlobalIdentifier()` into `getName()` value when
creating a name of a global variable, and fixes generation of
LinkageAttributes decoration of global variables by taking into account
Private Linkage in addition to Internal.
Previous implementation led to an issue with back translation of SPIR-V
to LLVM IR, e.g.:
```
@__const.G1 = private unnamed_addr addrspace(1) constant %my_type undef
...
Fails to verify module: 'common' global may not be marked constant!
ptr addrspace(1) @"llvm-link;__const.G1"
```
A reproducer is included as a new test case.
Commit: bc51a2e3940a12617bc3391f8577ef2d6fa349e8
https://github.com/llvm/llvm-project/commit/bc51a2e3940a12617bc3391f8577ef2d6fa349e8
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/include/llvm/Support/Recycler.h
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/RecyclerTest.cpp
Log Message:
-----------
[Support] Recycler: Implement move constructor (#120555)
Discovered missing while running RAGreedy through the NPM which relies on moving analyses to the cache.
Commit: 19c93483adf3e818afb3d3be77d01b8ec12c2215
https://github.com/llvm/llvm-project/commit/19c93483adf3e818afb3d3be77d01b8ec12c2215
Author: kd0608 <42680371+Karthikdhondi at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Parser/OpenMP/compiler-directive-continuation.f90
Log Message:
-----------
[FLANG][OPENMP] Fix handling of continuation lines in mixed OpenMP an… (#120714)
…d Fortran free-form
OpenMP feature was not enabled in the flang-new for the continuation
line, when we used the continuation line marker in combination of
free-form and OpenMP directive, it was throwing an error. PR is the fix
for that issue.
Added a fix for the following issue
https://github.com/llvm/llvm-project/issues/89559
Commit: 4a42658c1be47ea8cb6f26f7cb1d1aed258845fe
https://github.com/llvm/llvm-project/commit/4a42658c1be47ea8cb6f26f7cb1d1aed258845fe
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-cmps.ll
Log Message:
-----------
[VectorCombine][X86] shuffle-of-cmps.ll - tweak shuf_fcmp_oeq_v4i32 shuffle to be not so cheap
An upcoming patch will recognise this as a cheap INSERTPS shuffle - alter the shuffle to ensure the 2 x FCMP is still cheaper on SSE4 targets
Commit: 63d4e0fb66b75dd1c60acaa81ff8f8a4327cffcc
https://github.com/llvm/llvm-project/commit/63d4e0fb66b75dd1c60acaa81ff8f8a4327cffcc
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-add.ll
Log Message:
-----------
[InstCombine] Compute result directly on APInts
If the bitwidth is 2 and we add two 1s, the result may overflow.
This is fine in terms of correctness, but triggers the APInt ctor
assertion. Fix this by performing the calculation directly on APInts.
Fixes the issue reported in:
https://github.com/llvm/llvm-project/pull/114539#issuecomment-2574845003
Commit: 647cadb60af60f9748b0a2f02d7d6421588b099f
https://github.com/llvm/llvm-project/commit/647cadb60af60f9748b0a2f02d7d6421588b099f
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/test/Driver/spirv-openmp-toolchain.c
Log Message:
-----------
explicitly specify the -fopenmp lib in spirv-openmp-toolchain.c test
Don't rely on the default `CLANG_DEFAULT_OPENMP_RUNTIME` env variable
which is `libomp` by default.
This was missed in 119fc720a19e047fee59d7f7446c911b158563e0
Commit: 1fb98b5a7e964efd77a735148e8c8704ca8728db
https://github.com/llvm/llvm-project/commit/1fb98b5a7e964efd77a735148e8c8704ca8728db
Author: Michael Jungmair <michael.jungmair at cs.tum.edu>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
M mlir/include/mlir/Transforms/LocationSnapshot.h
M mlir/include/mlir/Transforms/Passes.td
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/Transforms/LocationSnapshot.cpp
M mlir/test/Transforms/location-snapshot.mlir
Log Message:
-----------
[mlir][Transforms] Make LocationSnapshotPass respect OpPrintingFlags (#119373)
The current implementation of LocationSnapshotPass takes an
OpPrintingFlags argument and stores it as member, but does not use it
for printing.
Properly implement the printing flags, also supporting command line args.
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 4ecd9bd03b8b0e2ceba5c6c8525227be8d8ab215
https://github.com/llvm/llvm-project/commit/4ecd9bd03b8b0e2ceba5c6c8525227be8d8ab215
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M lldb/source/Host/posix/FileSystemPosix.cpp
Log Message:
-----------
[lldb][Posix] Remove unused includes in file system (#121913)
You could remove unistd.h and it will still build, but only because
something else included it. So I've left it in in the spirit of "include
what you use".
Tested on Linux and FreeBSD.
Commit: 5a7dfb46598ebe21318312eca5f407a1575f87e0
https://github.com/llvm/llvm-project/commit/5a7dfb46598ebe21318312eca5f407a1575f87e0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/shuffle-two-src-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-two-src-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-two-src-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-two-src.ll
M llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
M llvm/test/Transforms/PhaseOrdering/X86/hsub.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
Log Message:
-----------
[CostModel][X86] Attempt to match v4f32 shuffles that map to MOVSS/INSERTPS instruction
improveShuffleKindFromMask matches this as a SK_InsertSubvector of a v1f32 (which legalises to f32) into a v4f32 base vector, making it easy to recognise. MOVSS is limited to index0.
Commit: 1729e6e742ba9f6f210550000ace4bec72530c2e
https://github.com/llvm/llvm-project/commit/1729e6e742ba9f6f210550000ace4bec72530c2e
Author: David Green <david.green at arm.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/cvt-fp-int-fp.ll
M llvm/test/CodeGen/AArch64/round-fptosi-sat-scalar.ll
Log Message:
-----------
[AArch64] Improve bf16 fp_extend lowering. (#118966)
A bf16 fp_extend is just a shift into the higher bits. This changes the
lowering from using a relatively ugly tablegen pattern, to ISel
generating the shift using an extended vector. This is cleaner and
should optimize better. StrictFP goes through the same route as it
cannot round or set flags.
Commit: 1eed780a6a01b5b10de8a723318f0153b5adea0a
https://github.com/llvm/llvm-project/commit/1eed780a6a01b5b10de8a723318f0153b5adea0a
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
Log Message:
-----------
[bazel] Update dependency for a738d81cd2822698539b0482af48d49d91ea5a2e
Commit: a5e129ccdedf5c269a8e0fcad5e21381a7f0342c
https://github.com/llvm/llvm-project/commit/a5e129ccdedf5c269a8e0fcad5e21381a7f0342c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/X86/vector-insert-value.ll
Log Message:
-----------
[CostModel][X86] getVectorInstrCost - correctly cost v4f32 insertelement into index 0
This is just the MOVSS instruction (SSE41 INSERTPS is still necessary for index != 0)
This exposed an issue in VectorCombine::foldInsExtFNeg - we need to use the more general SK_PermuteTwoSrc shuffle kind to allow getShuffleCost to match other shuffle kinds (not just SK_Select).
Commit: ca5fd06366448c94e1da085984e9e69f8d6398c3
https://github.com/llvm/llvm-project/commit/ca5fd06366448c94e1da085984e9e69f8d6398c3
Author: 天音あめ <i at amane-a.me>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/CodeGen/xcore-abi.c
M clang/test/Sema/varargs.c
Log Message:
-----------
[clang] Fix crashes when passing VLA to va_arg (#119563)
Closes #119360.
This bug occurs when passing a VLA to `va_arg`. Since the return value
is inferred to be an array, it triggers
`ScalarExprEmitter::VisitCastExpr`, which converts it to a pointer and
subsequently calls `CodeGenFunction::EmitAggExpr`. At this point,
because the inferred type is an `AggExpr` instead of a `ScalarExpr`,
`ScalarExprEmitter::VisitVAArgExpr` is not invoked, and as a result,
`CodeGenFunction::EmitVariablyModifiedType` is also not called, leading
to the size of the VLA not being retrieved.
The solution is to move the call to
`CodeGenFunction::EmitVariablyModifiedType` into
`CodeGenFunction::EmitVAArg`, ensuring that the size of the VLA is
correctly obtained regardless of whether the expression is an `AggExpr`
or a `ScalarExpr`.
Commit: 882df0543527694e1f4976991c65712127458b33
https://github.com/llvm/llvm-project/commit/882df0543527694e1f4976991c65712127458b33
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/xor-and-or.ll
Log Message:
-----------
[InstCombine] Fold `(A | B) ^ (A & C) --> A ? ~C : B` (#121906)
Closes https://github.com/llvm/llvm-project/issues/121773.
Commit: 525f5262af81e460b4799e69e3f52701fd45f066
https://github.com/llvm/llvm-project/commit/525f5262af81e460b4799e69e3f52701fd45f066
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
A llvm/include/llvm/BinaryFormat/ELFRelocs/RISCV_nonstandard.def
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/test/MC/RISCV/custom_reloc.s
Log Message:
-----------
[RISCV] Support Parsing Nonstandard Relocations (#119909)
This allows nonstandard relocation names to be used in `.reloc` assembly
directives (giving the correct relocation number).
No translation is done by the assembler into `R_RISCV_CUSTOM<n>` names,
and the assembler does not automatically add the relevant
`R_RISCV_VENDOR` relocation with the vendor symbol. If we want, we can
have a different directive that does this later.
The first batch of relocations to be added are from [Qualcomm's RISC-V
psABI
extensions](https://github.com/quic/riscv-elf-psabi-quic-extensions/releases/tag/v0.1).
Commit: c27483763c883ad268ba61249d1c0274a719e2d6
https://github.com/llvm/llvm-project/commit/c27483763c883ad268ba61249d1c0274a719e2d6
Author: flovent <144676429+flovent at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UnhandledSelfAssignmentCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unhandled-self-assignment.cpp
Log Message:
-----------
[clang-tidy] bugprone-unhandled-self-assignment: fix smart pointer check against std::unique_ptr type (#121266)
Unlike other standard smart pointer types, std::unique_ptr has two
template arguments.
testcase need to be updated too.
Commit: a629d9e102bd3c110135d8c4a084af2eb5f49df9
https://github.com/llvm/llvm-project/commit/a629d9e102bd3c110135d8c4a084af2eb5f49df9
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
R llvm/include/llvm/IR/NVVMIntrinsicFlags.h
A llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
A llvm/test/Transforms/InstSimplify/const-fold-nvvm-f2i-d2i.ll
A llvm/test/Transforms/InstSimplify/const-fold-nvvm-f2ll-d2ll.ll
Log Message:
-----------
[NVPTX] Constant-folding for f2i, d2ui, f2ll etc. (#118965)
Add constant-folding support for the NVVM intrinsics for converting
float/double to signed/unsigned int32/int64 types, including all
rounding-modes and ftz modifiers.
Commit: 4e066b6be42f731eda3ee221d12d9c3d5d21177e
https://github.com/llvm/llvm-project/commit/4e066b6be42f731eda3ee221d12d9c3d5d21177e
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/test/Transforms/InstCombine/compare-signs.ll
Log Message:
-----------
[PatternMatch] Match commuted patterns in `Signum_match` (#121911)
Closes https://github.com/llvm/llvm-project/issues/121776.
Commit: 1332db36ee23f19eacf6a84bfda0f9c03a5706e7
https://github.com/llvm/llvm-project/commit/1332db36ee23f19eacf6a84bfda0f9c03a5706e7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] TransformFPLoadStorePair - early out if we're not loading a simple type
Its never going to transform into a legal integer type, so just bail - noticed while triaging the assertion reported in #121784
Commit: 7edeeab5e0023dabd6003d6f113575a5b5b6c83b
https://github.com/llvm/llvm-project/commit/7edeeab5e0023dabd6003d6f113575a5b5b6c83b
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M lldb/source/Host/posix/FileSystemPosix.cpp
Log Message:
-----------
[lldb][NetBSD] Remove unused include in FileSystemPosix.cpp (#121920)
Commit: ef391dbc29db097952e71d81cd88e9bd7e81a3fa
https://github.com/llvm/llvm-project/commit/ef391dbc29db097952e71d81cd88e9bd7e81a3fa
Author: Florian Mayer <fmayer at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
Log Message:
-----------
[LV] Drop incorrect inbounds for reverse vector pointer when folding tail (#120730)
When folding the tail, we may compute an address that we don't in the
original scalar loop and it may not be inbounds. Drop Inbounds in that
case.
Commit: 5f6b7145077386afac806eec1bb8e866c6166034
https://github.com/llvm/llvm-project/commit/5f6b7145077386afac806eec1bb8e866c6166034
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/unittests/StaticAnalyzer/Z3CrosscheckOracleTest.cpp
Log Message:
-----------
[analyzer][NFC] Simplify PositiveAnalyzerOption handling (#121910)
This simplifies #120239
Addresses my comment at:
https://github.com/llvm/llvm-project/pull/120239#issuecomment-2574600543
CPP-5920
Commit: ab5133bbc62af4686f305a3c7d85f74b9f5b949f
https://github.com/llvm/llvm-project/commit/ab5133bbc62af4686f305a3c7d85f74b9f5b949f
Author: Nico Weber <thakis at chromium.org>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
R clang/test/Driver/Inputs/MacOSX15.1.sdk/embedded/usr/include/.keep
R clang/test/Driver/Inputs/MacOSX15.1.sdk/embedded/usr/local/include/.keep
R clang/test/Driver/Inputs/MacOSX15.1.sdk/usr/include/c++/v1/.keep
R clang/test/Driver/Inputs/MacOSX15.1.sdk/usr/local/include/.keep
R clang/test/Driver/darwin-embedded-search-paths.c
M clang/test/Preprocessor/macho-embedded-predefines.c
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
Revert "[Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (#120507)"
This reverts commit 653a54727eaa18c43447ad686c987db67f1dda74.
Breaks tests, see https://github.com/llvm/llvm-project/pull/120507#issuecomment-2575246281
Commit: faa3f752896903c2d09d389970d3d0ebf50a1073
https://github.com/llvm/llvm-project/commit/faa3f752896903c2d09d389970d3d0ebf50a1073
Author: Jannik Glückert <jannik.glueckert at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libcxx/src/filesystem/operations.cpp
Log Message:
-----------
[libc++] Fix largefile handling in fs::copy_file (#121855)
Fix for issues reported in https://github.com/llvm/llvm-project/pull/109211
Commit: 0c8efbe3a0bd8a46a27835cfefefdc05c4d679a5
https://github.com/llvm/llvm-project/commit/0c8efbe3a0bd8a46a27835cfefefdc05c4d679a5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
Log Message:
-----------
[X86] Add shuffle test for #121823
Commit: c3fc41c60bdb76cda7c8b3937515f67f5d4e136e
https://github.com/llvm/llvm-project/commit/c3fc41c60bdb76cda7c8b3937515f67f5d4e136e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn build] Port bc51a2e3940a
Commit: 82ec2d6aa45fcfbfcf9f12504c10b1e457bda65c
https://github.com/llvm/llvm-project/commit/82ec2d6aa45fcfbfcf9f12504c10b1e457bda65c
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
Log Message:
-----------
[Coalescer] Consider NewMI's subreg index when updating lanemask. (#121780)
The code added in #116191 that updated the lanemasks for rematerialized
values checked if `DefMI`'s destination register had a subreg index.
This seems to have missed the following case:
```
%0:gpr32 = MOVi32imm 1
%1:gpr64 = SUBREG_TO_REG 0, %0:gpr32, %subreg.sub_32
```
which during rematerialization would have the following variables set:
```
DefMI = %0:gpr32 = MOVi32imm 1
NewMI = %3.sub_32:gpr64 = MOVi32imm 1 (rematerialized value)
```
When checking whether the lanemasks need to be generated, considering
whether DefMI's destination has a subreg index is insufficient, we
should look at DefMI's subreg index instead.
The added tests are a bit more involved, because I was not able to
reconstruct the issue without having some control flow in the test.
These tests come from actual reproducers.
Commit: 473cdb93e55deeea6a7f654e192f5227d85cee08
https://github.com/llvm/llvm-project/commit/473cdb93e55deeea6a7f654e192f5227d85cee08
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/test/CodeGen/sanitize-type-globals.cpp
Log Message:
-----------
[TySan] Don't report globals with incomplete types. (#121922)
Type metadata for incomplete types should also get handled at the place
they are defined.
Fixes https://github.com/llvm/llvm-project/issues/121014.
PR: https://github.com/llvm/llvm-project/pull/121922
Commit: 71ddde8ba52af7277b8f3a8dffa570963a3069f2
https://github.com/llvm/llvm-project/commit/71ddde8ba52af7277b8f3a8dffa570963a3069f2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/unittests/tools/llvm-exegesis/CMakeLists.txt
A llvm/unittests/tools/llvm-exegesis/RISCV/CMakeLists.txt
A llvm/unittests/tools/llvm-exegesis/RISCV/SnippetGeneratorTest.cpp
A llvm/unittests/tools/llvm-exegesis/RISCV/TargetTest.cpp
A llvm/unittests/tools/llvm-exegesis/RISCV/TestBase.h
Log Message:
-----------
[RISCV][llvm-exegesis] Add unittests. NFC (#121862)
This is largely based on Mips and PowerPC.
Commit: 2c7c07df828e5be1480c38d2a93a82294da10b47
https://github.com/llvm/llvm-project/commit/2c7c07df828e5be1480c38d2a93a82294da10b47
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/docs/DirectX/DXILResources.rst
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
M llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
Log Message:
-----------
[DirectX] Remove the "checked" variants of `dx.resource.load` (#120778)
We'd introduced separate versions of `llvm.dx.resource.load` with a
struct return to handle the CheckAccessFullyMapped case without making
the IR for the common case unnecessarily complicated. However, at this
point the common case is really `resource.getpointer`, so the ergonomics
of a simplified version of `load` don't actually gain us as much as the
cost of having multiple opcodes.
Drop the `dx.resource.loadchecked` functions and have `dx.resource.load`
consistently return `{element_type, i1}`.
Commit: 8178d3c9641998c23eda22740bacae212ee5b3ef
https://github.com/llvm/llvm-project/commit/8178d3c9641998c23eda22740bacae212ee5b3ef
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/docs/DirectX/DXILResources.rst
Log Message:
-----------
[DirectX] Add getpointer docs to DXILResources.rst (#120779)
Commit: 17c8c1c5098bd1fa68809d686867d01d56d5e564
https://github.com/llvm/llvm-project/commit/17c8c1c5098bd1fa68809d686867d01d56d5e564
Author: bcahoon <59846893+bcahoon at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
A llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.mir
A llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-read.mir
Log Message:
-----------
[AMDGPU] Do not fold into v_accvpr_mov/write/read (#120475)
In SIFoldOperands, leave copies for moving between agpr and vgpr
registers. The register coalescer is able to handle the copies
more efficiently than v_accvgpr_mov, v_accvgpr_write, and
v_accvgpr_read. Otherwise, the compiler generates unneccesary
instructions such as v_accvgpr_mov a0, a0.
Commit: d0812dbbff2ac839694ee1988e6af962fcd0bb1e
https://github.com/llvm/llvm-project/commit/d0812dbbff2ac839694ee1988e6af962fcd0bb1e
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_minmax/maxmin_f16 and v_minmax/maxmin_num_f16 (#120617)
True16 support for v_minmax/maxmin_f16(GFX11) and
v_minmax/maxmin_num_f16(GFX12).
These insts are updated at the same time since we are replacing the
`v_minmax/maxmin_f16` to `v_minmax/maxmin_fake16_f16` while
`v_minmax/maxmin_num_f16` are alias insts and share the same CodeGen
pattern.
Added a GFX12 runline in minmax.ll in fake16 flow
Commit: 96f8cfe4d05049abde300480812c6a96879ccdf8
https://github.com/llvm/llvm-project/commit/96f8cfe4d05049abde300480812c6a96879ccdf8
Author: vfdev <vfdev.5 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M mlir/CMakeLists.txt
M mlir/docs/Bindings/Python.md
M mlir/test/python/execution_engine.py
Log Message:
-----------
Cosmetic fixes in the code and typos in Python bindings docs (#121791)
Description:
- removed trailing spaces in few files
- fixed markdown link definition:
Commit: a0f5bbcfb71a28cd3eaa308250af63a0889a1c85
https://github.com/llvm/llvm-project/commit/a0f5bbcfb71a28cd3eaa308250af63a0889a1c85
Author: vfdev <vfdev.5 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
Log Message:
-----------
Fixed typo in dunder get/set methods in PyAttrBuilderMap (#121794)
Description:
- fixed a typo in the method name: dunde -> dunder
Commit: 7899572c88c6516b142c35e95e911917b623e057
https://github.com/llvm/llvm-project/commit/7899572c88c6516b142c35e95e911917b623e057
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll
Log Message:
-----------
AMDGPU: Forcibly disable verifier in test
The test added in f6365a47a1ad9ab6d432f6e40d14a11419e21282 fails the verifier
for the reason noted in the comment, but we need to skip the verifier
error in EXPENSIVE_CHECKS builds
Commit: 4e36d5b92d78822f9eeef6b62e7b037f5c2cb5b9
https://github.com/llvm/llvm-project/commit/4e36d5b92d78822f9eeef6b62e7b037f5c2cb5b9
Author: Petr Vesely <22935437+veselypeta at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
Log Message:
-----------
[NFC][Coroutines] Remove invalid coroutine intrinsic name (#114543)
Removes `llvm.coro.async.store_resume` from the list of coroutine
intrinsics. This is not a valid intrinsic name, and was likely added by
mistake with [this](https://reviews.llvm.org/D90612) change.
Commit: 785b16ad04a741dce65ebaa11ee86d9dd19dd699
https://github.com/llvm/llvm-project/commit/785b16ad04a741dce65ebaa11ee86d9dd19dd699
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/test/CodeGen/RISCV/GlobalISel/double-zfa.ll
Log Message:
-----------
[RISCV][GISel] Support G_MERGE_VALUES/G_UNMERGE_VALUES with Zfa. (#120379)
Without Zfa we use pseudos that are lowered to a stack load/store. With
Zfa we have instructions that can move a pair of registers to an FPR. Or
move the high or low half of an FPR to a GPR.
I've used a GINodeEquiv to make use of 3 of the 4 tablegen patterns. The
split case with Zfa requires 2 instructions which I'm doing through
custom isel like we do in SelectionDAG.
Commit: b7a6e9da124142a1bd28895eea768a158901a03b
https://github.com/llvm/llvm-project/commit/b7a6e9da124142a1bd28895eea768a158901a03b
Author: earnol <earnol at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M compiler-rt/lib/ubsan/ubsan_value.h
Log Message:
-----------
[ubsan] Use internal_memcpy to copy ubsan bits size (#121586)
While fetching amounts of bits used to correctly display ubsan value
reinterpret_cast was used, however as noted by Jakub Jelínek in
https://github.com/llvm/llvm-project/pull/96240 discussion it might
cause issues due to potentially unaligned memory access. The patch
addresses this problem.
Co-authored-by: Vladislav Aranov <vladislav.aranov at ericsson.com>
Commit: 619a5d3274350b87028c96cb8e8be51731d334cb
https://github.com/llvm/llvm-project/commit/619a5d3274350b87028c96cb8e8be51731d334cb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineTarge - pull out repeated getVectorNumElements calls. NFC.
Commit: 56c5a6ba836065a6e3be9d04e2c64aa8a758a3f4
https://github.com/llvm/llvm-project/commit/56c5a6ba836065a6e3be9d04e2c64aa8a758a3f4
Author: Kristóf Umann <dkszelethus at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[NFC][analyzer][docs] Crosslink MallocChecker's ownership attributes (#121939)
Forgot to mention these in the checker docs.
Commit: db81e8c42e121e62a00587b12d2b972dfcfb98c0
https://github.com/llvm/llvm-project/commit/db81e8c42e121e62a00587b12d2b972dfcfb98c0
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/include/clang-c/Index.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/AST/ast-print-openacc-update-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
A clang/test/SemaOpenACC/update-construct-ast.cpp
A clang/test/SemaOpenACC/update-construct.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[OpenACC] Initial sema implementation of 'update' construct
This executable construct has a larger list of clauses than some of the
others, plus has some additional restrictions. This patch implements
the AST node, plus the 'cannot be the body of a if, while, do, switch,
or label' statement restriction. Future patches will handle the
rest of the restrictions, which are based on clauses.
Commit: dd1e8aa09c0ab453a0566165b68e6a62fcd055e1
https://github.com/llvm/llvm-project/commit/dd1e8aa09c0ab453a0566165b68e6a62fcd055e1
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-update-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/SemaOpenACC/update-construct-ast.cpp
M clang/test/SemaOpenACC/update-construct.cpp
Log Message:
-----------
[OpenACC] Enable 'if' and 'if_present' for 'update' construct
The only restriction on 'if' is that only 1 can appear on an update
construct, so this enforces that. 'if_present' has no restrictions.
Commit: 937445365aab70d47b443c53d6cdd5707f388c3d
https://github.com/llvm/llvm-project/commit/937445365aab70d47b443c53d6cdd5707f388c3d
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] Reland posix part of #121616 setbuf, setvbuf. (#121658)
Commit: 611c96af8cdf950f00d593ee69cce2d165457a9e
https://github.com/llvm/llvm-project/commit/611c96af8cdf950f00d593ee69cce2d165457a9e
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Fir/basic-program.fir
Log Message:
-----------
[flang] Schedule InlineHLFIRAssign after BufferizeHLFIR. (#121863)
This helps to get rid of *some* calls to AssignTemporary runtime
that are appearing due to temporary_lhs hlfir.assign produced
in BufferizeHLFIR. I only tested it on `tonto`, and did not see
any performance changes. I will run more performance testing
before merging this.
Commit: 51c9c823ca187895478e42883ba7a8d1f3150e87
https://github.com/llvm/llvm-project/commit/51c9c823ca187895478e42883ba7a8d1f3150e87
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/add_sext_shl_constant.ll
Log Message:
-----------
[RISCV] Added test case for PR119527. NFC (#121816)
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 2e637dbbb8bc9a41f8eabd1df347ca2559b1abd7
https://github.com/llvm/llvm-project/commit/2e637dbbb8bc9a41f8eabd1df347ca2559b1abd7
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CanonicalizationPatterns.td
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/convert-fold.fir
M flang/test/Lower/array-substring.f90
M flang/test/Lower/vector-subscript-io.f90
Log Message:
-----------
[flang] Canonicalize redundant pointer converts. (#121864)
This patch adds a canonicalization pattern for optimizing redundant
"pointer" fir.converts. Such converts prevent the StackArrays pass
to recognize fir.freemem for the corresponding fir.allocmem, e.g.:
```
%69 = fir.allocmem !fir.array<2xi32>
%71:2 = hlfir.declare %69(%70) {uniq_name = ".tmp.arrayctor"} :
(!fir.heap<!fir.array<2xi32>>, !fir.shape<1>) ->
(!fir.heap<!fir.array<2xi32>>, !fir.heap<!fir.array<2xi32>>)
%95 = fir.convert %71#1 :
(!fir.heap<!fir.array<2xi32>>) -> !fir.ref<!fir.array<2xi32>>
%100 = fir.convert %95 :
(!fir.ref<!fir.array<2xi32>>) -> !fir.heap<!fir.array<2xi32>>
fir.freemem %100 : !fir.heap<!fir.array<2xi32>>
```
I found this in `tonto`, but the change does not affect performance at all.
Anyway, it looks like a reasonable thing to do, and it makes easier
to compare the performance profiles with other compilers'.
Commit: 8557a57c4b1a228ce63f2409dd5cc4c70a25e6fc
https://github.com/llvm/llvm-project/commit/8557a57c4b1a228ce63f2409dd5cc4c70a25e6fc
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M flang/lib/Lower/CMakeLists.txt
A flang/lib/Lower/OpenMP/PrivateReductionUtils.cpp
A flang/lib/Lower/OpenMP/PrivateReductionUtils.h
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
Log Message:
-----------
[flang][OpenMP][NFC] Move reduction init and cleanup region gen to helper (#120761)
This will allow code sharing between reduction and privatization after
my (still WIP) changes to `omp.private` to use an `alloc` region similar
to the one used for reduction declarations.
Commit: 57b80e8b1a7eaa5b8b9114e4bb2395e0d05c75a5
https://github.com/llvm/llvm-project/commit/57b80e8b1a7eaa5b8b9114e4bb2395e0d05c75a5
Author: Sean Perry <perry at ca.ibm.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/include/clang/Driver/Driver.h
M clang/lib/Driver/Driver.cpp
A clang/test/Driver/Inputs/config-zos/clang.cfg
A clang/test/Driver/Inputs/config-zos/def.cfg
A clang/test/Driver/Inputs/config-zos/tst/def.cfg
A clang/test/Driver/config-zos.c
A clang/test/Driver/config-zos1.c
Log Message:
-----------
[SystemZ][z/OS] Add z/OS customization file (#111182)
On z/OS, the location of the system libraries and side decks (aka
equivalent to libc, etc) are not in a predefined location. The system
does have a default location but sysadmins can change this and
frequently do. See the -mzos-hlq* options we have for z/OS.
To avoid every user needing to specify these -mzos-hlq* options, we
added support for a system install default config file that is always
read independent of the usual config file. The compiler will read this
customization config file before reading the usual config files.
The customization file is called clang.cfg and is located in:
- the etc dir within the compiler installation dir.
- or specified by the CLANG_CONFIG_PATH env var. This env var can either
be a directory or the fill path name of the file.
Commit: fbd2365c467ba5c28d65451cfffcbf563df2c647
https://github.com/llvm/llvm-project/commit/fbd2365c467ba5c28d65451cfffcbf563df2c647
Author: Damien L-G <dalg24 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libcxx/test/std/atomics/atomics.ref/exchange.pass.cpp
Log Message:
-----------
[libc++] Improve coverage of std::atomic_ref<T>::exchange() (#121596)
Adapted from libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/exchange.pass.cpp
as we did for testing other functionalities. Spotted that lapse in coverage when working on #121414.
Commit: 0a58a1c9a26d4fdfeaebfbcd0891bf2a844ee838
https://github.com/llvm/llvm-project/commit/0a58a1c9a26d4fdfeaebfbcd0891bf2a844ee838
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libc/src/time/mktime.cpp
Log Message:
-----------
[libc] update todo with bug link
Commit: 5130a4ea121fa74b0fe9a0c9a44ede651f94f93a
https://github.com/llvm/llvm-project/commit/5130a4ea121fa74b0fe9a0c9a44ede651f94f93a
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/runtime/derived.cpp
M flang/test/Lower/OpenMP/derived-type-allocatable.f90
Log Message:
-----------
[flang][OpenMP] Handle pointers and allocatables in clone init (#121824)
InitializeClone(), implemented in #120295, was not handling top
level pointers and allocatables correctly.
Pointers and unallocated variables must be skipped.
This caused some regressions in the Fujitsu testsuite:
https://linaro.atlassian.net/browse/LLVM-1488
Commit: 0d9cf2671e06c9124a0b5fc753330c39c8b4a791
https://github.com/llvm/llvm-project/commit/0d9cf2671e06c9124a0b5fc753330c39c8b4a791
Author: John Harrison <harjohn at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/OutputRedirector.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Ensure the IO forwarding threads are managed by the DAP object lifecycle. (#120457)
This moves the ownership of the threads that forward stdout/stderr to
the DAP object itself to ensure that the threads are joined and that the
forwarding is cleaned up when the DAP connection is disconnected.
This is part of a larger refactor to allow lldb-dap to run in a
listening mode and accept multiple connections.
---------
Co-authored-by: Pavel Labath <pavel at labath.sk>
Commit: aa9cc721e58f086ba6a3f9711fefdb61a184f786
https://github.com/llvm/llvm-project/commit/aa9cc721e58f086ba6a3f9711fefdb61a184f786
Author: Peter Waller <peter.waller at arm.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Passes/ReorderFunctions.cpp
A bolt/test/AArch64/pad-before-funcs.s
Log Message:
-----------
Reapply "[BOLT] Add --pad-funcs-before=func:n (#117924)" (#121918)
- **Reapply "[BOLT] Add --pad-funcs-before=func:n (#117924)"**
- **[BOLT] Fix --pad-funcs{,-before} state misinteraction**
When --pad-funcs-before was introduced, it introduced a bug whereby the
first one to get parsed could influence the other.
Ensure that each has its own state and test that they don't interact in
this manner by testing how the `_subsequent` symbol moves when both
arguments are supplied with different padding values.
Fixed by having a function (and static state) for each of before/after.
Commit: 15d3e4afd60c1c47af73816d23fbf767ff6c4542
https://github.com/llvm/llvm-project/commit/15d3e4afd60c1c47af73816d23fbf767ff6c4542
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/onehot_merge.ll
Log Message:
-----------
[InstCombine] Test for two types of bittests (NFC)
Commit: 292c1350d1509090949f037603663aa64985fe69
https://github.com/llvm/llvm-project/commit/292c1350d1509090949f037603663aa64985fe69
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libcxx/docs/TestingLibcxx.rst
A libcxx/utils/libcxx-benchmark-json
A libcxx/utils/libcxx-compare-benchmarks
Log Message:
-----------
[libc++] Add new utilities to compare benchmark results between builds (#120743)
Also, add documentation for it.
Commit: 6192fafe9c8d287daa9d40e3adcd24220a7872af
https://github.com/llvm/llvm-project/commit/6192fafe9c8d287daa9d40e3adcd24220a7872af
Author: goldsteinn <35538541+goldsteinn at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstCombine/select.ll
Log Message:
-----------
[InstSimplify] Use multi-op replacement when simplify `select` (#121708)
- **[InstSimplify] Refactor `simplifyWithOpsReplaced` to allow multiple
replacements; NFC**
- **[InstSimplify] Use multi-op replacement when simplify `select`**
In the case of `select X | Y == 0 :...` or `select X & Y == -1 : ...`
we can do more simplifications by trying to replace both `X` and `Y`
with the respective constant at once.
Handles some cases for https://github.com/llvm/llvm-project/pull/121672
more generically.
Commit: afa8aeeeec9a897a35ba5c8afc024d9b10504db1
https://github.com/llvm/llvm-project/commit/afa8aeeeec9a897a35ba5c8afc024d9b10504db1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/RISCV.td
A llvm/lib/Target/RISCV/RISCVPfmCounters.td
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/unittests/tools/llvm-exegesis/RISCV/TargetTest.cpp
Log Message:
-----------
[RISCV][llvm-exegesis] Add default Pfm cycle counter. (#121866)
Also tested with Ubuntu on SiFive's HiFive Premier P550 board. Curiously
latency is reporting ~1.5 on basic scalar arithmetic, scalar mul is
~3.5, and div is ~36.5. This 0.5 cycles higher than I expect.
Commit: 5c7a69674f818e41c32a6535e416e4a8fa280273
https://github.com/llvm/llvm-project/commit/5c7a69674f818e41c32a6535e416e4a8fa280273
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMSystemRegister.td
M llvm/lib/Target/ARM/Utils/ARMBaseInfo.cpp
M llvm/lib/Target/ARM/Utils/ARMBaseInfo.h
Log Message:
-----------
[ARM] Migrate from SearchableTable to GenericTable. NFC (#121840)
SearchableTable is the legacy version that does not appear to be well
documented. Not sure if the plan was to delete it eventually.
The enum from SearchableTable does not appear to be used so I did not
add a GenericEnum. MClassSysReg assigned EnumValueField 3 times, but
rather than creating 3 enums, this overwrites the previous assignment.
We can eventually use the PrimaryKey feature of GenericTable to remove
one of the SearchIndex declarations. This will sort the generated table
by the primary key and remove the separately generated indexing table to
reduce .rodata size.
This patch is just the mechanical migration. The size savings will be
done in follow ups.
Commit: 478648e2c0adbafa5e4cb10eb53aadbdf7de97d9
https://github.com/llvm/llvm-project/commit/478648e2c0adbafa5e4cb10eb53aadbdf7de97d9
Author: Caslyn Tonelli <6718161+Caslyn at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M compiler-rt/lib/gwp_asan/tests/harness.h
Log Message:
-----------
[gwp_asan] Soft-transition ZXTEST_USE_STREAMABLE_MACROS removal (#121887)
Soft-transition the removal of setting ZXTEST_USE_STREAMABLE_MACROS, by
only setting the macro if not already defined. A future PR will remove
setting the macro entirely in harness.h.
Commit: 49357b22dbb26d4aa6816dee279df70f1a2cd695
https://github.com/llvm/llvm-project/commit/49357b22dbb26d4aa6816dee279df70f1a2cd695
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/smed3.ll
M llvm/test/CodeGen/AMDGPU/umed3.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] true16 codegen pattern for v_med3_u/i16 (#121850)
True16 codegen pattern for v_med3_u/i16
Commit: e2c1b1fed43619bdb88bb5e99b7e8c2fff9f6553
https://github.com/llvm/llvm-project/commit/e2c1b1fed43619bdb88bb5e99b7e8c2fff9f6553
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-update-construct.cpp
M clang/test/SemaOpenACC/update-construct-ast.cpp
M clang/test/SemaOpenACC/update-construct.cpp
Log Message:
-----------
[OpenACC] enable 'async' and 'wait' for 'update' construct
These work the same here as they do for every other construct, so this
is as simple as enabling them and writing tests, which this patch does.
Commit: 6c3c90b5a81a3c27dbc195d7e49dc4c89e0e604f
https://github.com/llvm/llvm-project/commit/6c3c90b5a81a3c27dbc195d7e49dc4c89e0e604f
Author: Lei Wang <wlei at fb.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
A llvm/test/tools/llvm-profgen/context-depth.test
M llvm/test/tools/llvm-profgen/recursion-compression-pseudoprobe.test
M llvm/tools/llvm-profgen/PerfReader.cpp
Log Message:
-----------
[CSSPGO]Add a flag to limit unsymbolized context depth (#121531)
Adding a new flag(`--csprof-max-unsymbolized-context-depth`) to only
limit unsymbolized context depth. Currently,`--csprof-max-context-depth`
applies to both symbolized and unsymbolized profile context, there are
scenarios where `--csprof-max-context-depth` may not be flexible enough,
e.g. if we want to limit the context but still keep all the inlinings
from the leaf frame, we could set the value
csprof-max-unsymbolized-context-depth >= 1.
Commit: a15fedc399d5d1aa07c14531e5cd8d3efc583600
https://github.com/llvm/llvm-project/commit/a15fedc399d5d1aa07c14531e5cd8d3efc583600
Author: GeorgeHuyubo <113479859+GeorgeHuyubo at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
Log Message:
-----------
[lldb] Correct address calculation for reading segment data (#120655)
This commit addresses a bug introduced in commit bcf654c, which
prevented LLDB from parsing the GNU build ID for the main executable
from a core file. The fix finds the `p_vaddr` of the first `PT_LOAD`
segment as the `base_addr` and subtract this `base_addr` from the
virtual address being read.
Co-authored-by: George Hu <hyubo at meta.com>
Commit: ac604b2fa6ff0344a555954069721c0db7b874f9
https://github.com/llvm/llvm-project/commit/ac604b2fa6ff0344a555954069721c0db7b874f9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libc/src/__support/GPU/CMakeLists.txt
R libc/src/__support/GPU/amdgpu/CMakeLists.txt
R libc/src/__support/GPU/amdgpu/utils.h
R libc/src/__support/GPU/generic/CMakeLists.txt
R libc/src/__support/GPU/generic/utils.h
R libc/src/__support/GPU/nvptx/CMakeLists.txt
R libc/src/__support/GPU/nvptx/utils.h
M libc/src/__support/GPU/utils.h
M libc/src/time/gpu/clock.cpp
M libc/src/time/gpu/nanosleep.cpp
Log Message:
-----------
[libc] Switch to using the generic `<gpuintrin.h>` implementations (#121810)
Summary:
This patch switches the GPU utility helpers to wrapping around the
gpuintrin.h ones with a C++ flavor.
Commit: 666eee0ef85ff8a81904b9375fc22bc48cecc6b1
https://github.com/llvm/llvm-project/commit/666eee0ef85ff8a81904b9375fc22bc48cecc6b1
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/AST/ast-print-openacc-update-construct.cpp
M clang/test/SemaOpenACC/update-construct-ast.cpp
M clang/test/SemaOpenACC/update-construct.cpp
Log Message:
-----------
[OpenACC] enable 'device_type' for the 'update' construct
This has a similar restriction to 'set' in that only 'async' and 'wait'
are disallowed, so this implements that restriction and enables
'device_type'.
Commit: 68694259b298614f16f87d83a56be1207f36fa53
https://github.com/llvm/llvm-project/commit/68694259b298614f16f87d83a56be1207f36fa53
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
Log Message:
-----------
AMDGPU: Use getSignedTargetConstant for ImmOffset in SelectScratchSVAddr (#121978)
ImmOffset is signed and we will hit an assert with negative ImmOffset
when getTargetConstant is used.
Fixes: SWDEV-506453
Commit: ce33a48efdd61435e026733315f1ac960774c254
https://github.com/llvm/llvm-project/commit/ce33a48efdd61435e026733315f1ac960774c254
Author: Roland McGrath <mcgrathr at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libc/include/__llvm-libc-common.h
Log Message:
-----------
[libc] Keep headers compatible with -std=c89 mode (#121981)
C89 doesn't have the `restrict` keyword. When in `-std=c89`
mode, GNU-compatible compilers require the `__restrict` spelling.
Commit: cda43e1ba31346966830c01cd12120d884239128
https://github.com/llvm/llvm-project/commit/cda43e1ba31346966830c01cd12120d884239128
Author: Yi Kong <yikong at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libcxx/src/filesystem/operations.cpp
Log Message:
-----------
[libcxx] Fix build for glibc < 2.27 (#121893)
PR #109211 introduced a build break on systems with glibc < 2.27, since
copy_file_range was only introduced after that version. A version check
is added to prevent this breakage.
Commit: ea14bdb0356cdda727ac032470f6a0a2102d1281
https://github.com/llvm/llvm-project/commit/ea14bdb0356cdda727ac032470f6a0a2102d1281
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/uncountable-single-exit-loops.ll
Log Message:
-----------
[LV] Add test showing debug output for loops with uncountable BTCs.
Currently we print an early-exit related related debug message, even
though there's no early exit.
Commit: 29b5c18e466cea867e9e785e650d9ec2e5c295b9
https://github.com/llvm/llvm-project/commit/29b5c18e466cea867e9e785e650d9ec2e5c295b9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-opaque.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect.ll
Log Message:
-----------
[NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (#121834)
Summary:
This pass lowers the `__nvvm_reflect` builtin in the IR. However, this
currently runs in the standard optimization pipeline, not just the
backend pipeline. This means that if the user creates LLVM-IR without an
architecture set, it will always delete the reflect code even if it is
intended to be used later.
Pushing this into the backend pipeline will ensure that this works as
intended, allowing users to conditionally include code depending on
which target architecture the user ended up using. This fixes a bug in
OpenMP and missing code in `libc`.
Commit: 2ab447ad6983fb9f22f2fea480f3857522750860
https://github.com/llvm/llvm-project/commit/2ab447ad6983fb9f22f2fea480f3857522750860
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
Log Message:
-----------
Fix dangling IPOAmendableCB function_ref. (#120698)
The `IPOAmendableCB`'s type is `llvm::function_ref`, it is error-prone
to write code (e.g.
https://github.com/llvm/llvm-project/blob/5656cbca52545e608f6fb8b7c9a778c7c9b4b468/llvm/lib/Transforms/IPO/OpenMPOpt.cpp#L5812)
that assign a temporary lambda to an `IPOAmendableCB` object, which is a
use-after-free issue.
This patch changes the `IPOAmendableCB` to `std::function`, to avoid the
dangling issue.
Commit: e7a83fc74db78445c36a27f113e9b045f90f699a
https://github.com/llvm/llvm-project/commit/e7a83fc74db78445c36a27f113e9b045f90f699a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
Log Message:
-----------
[NVPTX] Fix a warning
This patch fixes:
llvm/lib/Target/NVPTX/NVVMReflect.cpp:225:18: error: object backing
the pointer will be destroyed at the end of the full-expression
[-Werror,-Wdangling-gsl]
Commit: 56936ec63dcc03f64c129ee45716431e56e5d3d1
https://github.com/llvm/llvm-project/commit/56936ec63dcc03f64c129ee45716431e56e5d3d1
Author: Sad Al Abdullah <siam9090 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M lldb/source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.cpp
Log Message:
-----------
Fixing FindUnusedPort method tcp_socket object creation with proper constructor parameter (#121879)
### Issue:
Currently lldb `platform connect unix-connect://localhost:43045/` is
failing and showing "Failed to connect port" error message.
### Cause:
TCPSocket(bool should_close, bool child_processes_inherit) constructor
was removed in commit
[c1dff71](https://github.com/llvm/llvm-project/commit/c1dff7152592f1beee9059ee8e2cb3cc68baea4d#diff-91817651b505a466ea94ddc44eca856f62073e03b05d0d0d2f4a55dcfea0002eL20).
However, the tcp_socket object creation still passes the deleted
constructor parameters, which causes the invocation of the wrong
constructor. As a result, the `FindUnusedPort` method is unable to
resolve the local port and always returns 0.
Commit: 75325c658e1f2dc81557cf4db9206310ae90c27f
https://github.com/llvm/llvm-project/commit/75325c658e1f2dc81557cf4db9206310ae90c27f
Author: thetruestblue <bblueconway at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M compiler-rt/cmake/base-config-ix.cmake
Log Message:
-----------
[Darwin][CompilerRT] Set compiler ID to 'Clang' for Compiler RT Tests for Apple Clang (#121858)
This patch restores previous behavior. Even when the Compiler ID is set
to AppleClang, we expect Compiler RT Tests to use Clang as the compiler
ID. This impacts various make and lit commands.
Caused by: https://github.com/llvm/llvm-project/pull/117812/files
rdar://141548700
Commit: 3b19e787fc5da27dfcc9ac6552b06a763f12ea03
https://github.com/llvm/llvm-project/commit/3b19e787fc5da27dfcc9ac6552b06a763f12ea03
Author: Prabhuk <prabhukr at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libc/config/baremetal/config.json
Log Message:
-----------
[libc] Keep framepointers for baremetal (#121836)
Keep framepointers enabled by default for the default baremetal libc
builds.
Frame pointers help unwind the stack and unwinding without frame pointer
is complex and increaseis the code size. This code size increase is
potentially larger than the savings achieved by disabling frame
pointers. Retaining the original behavior of retaining frame pointers as
the default behavior.
Commit: 0eaa69eb234798774a08743b64a9aa0cf71c5356
https://github.com/llvm/llvm-project/commit/0eaa69eb234798774a08743b64a9aa0cf71c5356
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
Log Message:
-----------
[VPlan] Handle VPExpandSCEVRecipe in isUniformAfterVectorization.
VPExpandSCEVRecipes must be placed in the entry and are alway uniform.
This fixes a crash by always identifying them as uniform, even if the
main vector loop region has been removed.
Fixes https://github.com/llvm/llvm-project/issues/121897.
Commit: 858f025a00fd107e9b8f97b630028d40c0c68725
https://github.com/llvm/llvm-project/commit/858f025a00fd107e9b8f97b630028d40c0c68725
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M .github/workflows/pr-code-format.yml
Log Message:
-----------
[ci] Bump the version of clang-format used in the CI (#119915)
The version of clang-format we use in the CI to format all PRs is a bit
outdated, leading to some confusion when the CI job produces different
output from what people have locally.
Commit: 71e9a48227a0599130b2f9ed090366bb973c57e5
https://github.com/llvm/llvm-project/commit/71e9a48227a0599130b2f9ed090366bb973c57e5
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libcxx/include/__vector/vector_bool.h
A libcxx/test/std/containers/sequences/vector.bool/at.pass.cpp
A libcxx/test/std/containers/sequences/vector.bool/at_const.pass.cpp
Log Message:
-----------
[libc++] Mark vector<bool>::at() as constexpr to conform to C++20 standard (#121848)
Closes #121844.
Commit: 841895543edcf98bd16027c6b85fe7c6419a4566
https://github.com/llvm/llvm-project/commit/841895543edcf98bd16027c6b85fe7c6419a4566
Author: Petr Hosek <phosek at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libcxx/src/include/overridable_function.h
M libcxx/src/new.cpp
M libcxxabi/src/stdlib_new_delete.cpp
Log Message:
-----------
[libcxx] Use alias for detecting overriden function (#120805)
This mechanism is preferable in environments like embedded since it
doesn't require special handling of the custom section.
This is a reland of https://github.com/llvm/llvm-project/pull/114961
which addresses the issue reported by downstream users. Specifically,
the two differences from the previous version are:
* The internal `symbol##_impl__` symbol in the Mach-O implementation is
annotated with `__attribute__((used))` to prevent LTO from deleting it
which we've seen in the previous version.
* `__is_function_overridden` is marked as `inline` so these symbols are
placed in a COMDAT (or fully inlined) to avoid duplicate symbol errors
which we've seen in the previous version.
Commit: 9612175f22146505ea871e4f60a5d701b45ffeeb
https://github.com/llvm/llvm-project/commit/9612175f22146505ea871e4f60a5d701b45ffeeb
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libcxx/docs/Hardening.rst
Log Message:
-----------
[libc++][NFC] Remove stray backtick in documentation
Commit: 1855333e3a843174c0d7421d4c5e404649f6b75a
https://github.com/llvm/llvm-project/commit/1855333e3a843174c0d7421d4c5e404649f6b75a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libcxx/docs/Hardening.rst
Log Message:
-----------
[libc++] Fix documentation for setting hardening ABI macros (#121946)
The documentation was misleading, suggesting that people could simply
define these macros, when in reality they must be passed at CMake
configuration time in a very specific way.
This was reported in #https://github.com/bitcoin/bitcoin/pull/31612.
Commit: 287a17de15d87b0d56e25841d2226f65a1973883
https://github.com/llvm/llvm-project/commit/287a17de15d87b0d56e25841d2226f65a1973883
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for 0d9cf2671e06c9124a0b5fc753330c39c8b4a791
Commit: 0bfee00034ce56bd7d11e4460ffb0fc6612b7cc9
https://github.com/llvm/llvm-project/commit/0bfee00034ce56bd7d11e4460ffb0fc6612b7cc9
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port afa8aeeeec9a897a35ba5c8afc024d9b10504db1
Commit: 2015c0a405ddb1e54d8b1494fcc06fdbf2fa2265
https://github.com/llvm/llvm-project/commit/2015c0a405ddb1e54d8b1494fcc06fdbf2fa2265
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
Log Message:
-----------
[AArch64] Remove unused AltName field from PHint GenericTable. NFC
Commit: c6f67b8e39a907fb96b715cae3ee90e4c1b248aa
https://github.com/llvm/llvm-project/commit/c6f67b8e39a907fb96b715cae3ee90e4c1b248aa
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M mlir/lib/Dialect/Affine/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/test/Dialect/Affine/value-bounds-op-interface-impl.mlir
Log Message:
-----------
[mlir][affine] Add ValueBoundsOpInterface to [de]linearize_index (#121833)
Since a need for it came up dowstream (in proving that loops run at
least once), this commit implements the ValueBoundsOpInterface for
affine.delinearize_index and affine.linearize_index, using affine map
representations of the operations they perform.
These implementations also use information from outer bounds to impose
additional constraints when those are available.
Commit: 36e4176f1d83d04cdebb4e1870561099b2478d80
https://github.com/llvm/llvm-project/commit/36e4176f1d83d04cdebb4e1870561099b2478d80
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
A llvm/test/CodeGen/RISCV/rvv/vlopt-volatile-ld.mir
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
Log Message:
-----------
[RISCV][VLOPT] Add strided, unit strided, and indexed loads to isSupported (#121705)
Add to getOperandInfo too since that is needed to reduce the VL.
Commit: b22551373cbde6392929325a33694f572b4fd016
https://github.com/llvm/llvm-project/commit/b22551373cbde6392929325a33694f572b4fd016
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/div.s
Log Message:
-----------
[RISCV] Add missing SiFive P400 scheduling model test for divisions. NFC
Add the missing scheduling model test for scalar divisions.
NFC.
Commit: 142787d3687eb58633c7c55a7a9f328ba4504986
https://github.com/llvm/llvm-project/commit/142787d3687eb58633c7c55a7a9f328ba4504986
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
Log Message:
-----------
[RISCV][VLOPT] Add support for checkUsers when UserMI is a Single-Width Integer Reduction (#120345)
Reductions are weird because for some operands, they are vector
registers but only read the first lane. For these operands, we do not
need to check to make sure the EEW and EMUL ratios match. The EEWs,
however, do need to match.
Commit: 90d79ca4c769ac3e28ec4b60dd82e6a5bb5e0aae
https://github.com/llvm/llvm-project/commit/90d79ca4c769ac3e28ec4b60dd82e6a5bb5e0aae
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/mul-cpop.s
Log Message:
-----------
[RISCV] Update the latencies of MUL and CPOP in SiFive P400 scheduling model (#122007)
According to llvm-exegesis, they should have around 2 cycles of latency
on P400 cores.
Commit: 2359635457b1f2c6f2c5d33ca84d0fda7729a19d
https://github.com/llvm/llvm-project/commit/2359635457b1f2c6f2c5d33ca84d0fda7729a19d
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M .github/workflows/commit-access-review.py
Log Message:
-----------
workflows/commit-access-review: Exclude users who have recently requested access (#119102)
Now that we are accepting commit access requests via GitHub issues, we
can keep track of who has recently requested access.
Commit: 4c4364869c490600b4e33606d481fb27b438d090
https://github.com/llvm/llvm-project/commit/4c4364869c490600b4e33606d481fb27b438d090
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOpt] Kill all uses of and remove twoTimesVLMUL [NFC] (#122003)
Case analysis:
* EEW=SEW*2, getEMULEqualsEEWDivSEWTimesLMUL(EEW) returns 2 x VLMUL
* EEW=SEW, getEMULEqualsEEWDivSEWTimesLMUL(EEW) returns VLMUL
Commit: 6ad0dcf67f5dccdf8506ce5f51d793062a1c6879
https://github.com/llvm/llvm-project/commit/6ad0dcf67f5dccdf8506ce5f51d793062a1c6879
Author: Roland McGrath <mcgrathr at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/include/CMakeLists.txt
M libc/include/arpa/inet.yaml
M libc/include/assert.yaml
M libc/include/complex.yaml
M libc/include/ctype.yaml
M libc/include/dirent.yaml
M libc/include/dlfcn.yaml
M libc/include/elf.yaml
M libc/include/errno.yaml
M libc/include/fcntl.yaml
M libc/include/features.yaml
M libc/include/fenv.yaml
M libc/include/float.yaml
M libc/include/inttypes.yaml
M libc/include/limits.yaml
M libc/include/link.yaml
M libc/include/locale.yaml
M libc/include/malloc.yaml
M libc/include/math.yaml
M libc/include/pthread.yaml
M libc/include/sched.yaml
M libc/include/search.yaml
M libc/include/setjmp.yaml
M libc/include/signal.yaml
M libc/include/spawn.yaml
M libc/include/stdbit.yaml
M libc/include/stdckdint.yaml
M libc/include/stdfix.yaml
M libc/include/stdint.yaml
M libc/include/stdio.yaml
M libc/include/stdlib.yaml
M libc/include/string.yaml
M libc/include/strings.yaml
M libc/include/sys/auxv.yaml
M libc/include/sys/epoll.yaml
M libc/include/sys/ioctl.yaml
M libc/include/sys/mman.yaml
M libc/include/sys/prctl.yaml
M libc/include/sys/random.yaml
M libc/include/sys/resource.yaml
M libc/include/sys/select.yaml
M libc/include/sys/sendfile.yaml
M libc/include/sys/socket.yaml
M libc/include/sys/stat.yaml
M libc/include/sys/statvfs.yaml
M libc/include/sys/syscall.yaml
M libc/include/sys/time.yaml
M libc/include/sys/types.yaml
M libc/include/sys/utsname.yaml
M libc/include/sys/wait.yaml
M libc/include/termios.yaml
M libc/include/threads.yaml
M libc/include/time.yaml
M libc/include/uchar.yaml
M libc/include/unistd.yaml
M libc/include/wchar.yaml
M libc/utils/hdrgen/header.py
A libc/utils/hdrgen/main.py
M libc/utils/hdrgen/tests/input/test_small.yaml
M libc/utils/hdrgen/tests/test_integration.py
M libc/utils/hdrgen/yaml_to_classes.py
Log Message:
-----------
[libc] Revamp hdrgen command line and build integration (#121522)
This adds a new main command-line entry point for hdrgen, in the
new main.py. This new interface is used for generating a header.
The old ways of invoking yaml_to_classes.py for other purposes
are left there for now, but `--e` is renamed to `--entry-point`
for consistency with the new CLI.
The YAML schema is expanded with the `header_template` key where
the corresponding `.h.def` file's path is given relative to where
the YAML file is found. The build integration no longer gives
the `.h.def` path on the command line. Instead, the script now
emits a depfile that's used by the cmake rules to track that.
The output file is always explicit in the script command line
rather than sometimes being derived from a directory path.
Commit: 94c0db06ab8cf0897ff32884ea6f683f5fc5a7b9
https://github.com/llvm/llvm-project/commit/94c0db06ab8cf0897ff32884ea6f683f5fc5a7b9
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp
M clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected
A clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c
A clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c.expected
A clang/test/utils/update_cc_test_checks/c-symbol-mangling.test
Log Message:
-----------
[update_cc_test_checks] Add test for missing handling of mangled names
We are missing MSVC C++ functions since the name is quoted in the LLVM IR,
so we don't find them in the generated IR and therefore don't add the test
checks. Additionally, there is an issue with finding functions using NEON
types (see https://github.com/llvm/llvm-project/pull/121800).
Pull Request: https://github.com/llvm/llvm-project/pull/121976
Commit: ca3fd633691b20d780fa3a54b22abc09860e59d9
https://github.com/llvm/llvm-project/commit/ca3fd633691b20d780fa3a54b22abc09860e59d9
Author: Michael Jones <michaelrj at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M libc/utils/hdrgen/README.rst
Log Message:
-----------
[libc] clean up the hdrgen docs a bit (#121974)
Since the files have been reorganized, the readme is out of date. This
patch updates it to be more accurate.
Commit: 45d46983bf7bda53bd7ee8e36a47571b3980fbd7
https://github.com/llvm/llvm-project/commit/45d46983bf7bda53bd7ee8e36a47571b3980fbd7
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
A llvm/test/CodeGen/NVPTX/fabs-fneg-free.ll
Log Message:
-----------
[NVPTX] designate fabs and fneg as free (#121513)
Commit: b8ad6fb0665b41f9f30807d895868f610d9361e7
https://github.com/llvm/llvm-project/commit/b8ad6fb0665b41f9f30807d895868f610d9361e7
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/ThinLTO/X86/memprof-recursive.ll
A llvm/test/Transforms/MemProfContextDisambiguation/recursive.ll
Log Message:
-----------
[MemProf] Allow cloning of callsites in recursive cycles (#121985)
Optionally (by default) no longer mark callsite nodes as Recursive,
which means they would be automatically skipped during cloning. This was
too conservative as it prevents cloning of any callsite that showed up
in any recursive cycle, even for non-recursive contexts.
While this will enable partial cloning of recursive contexts, the
recursive calls themselves will not be updated to call the correct
clone, possibly leading to some unnecessary but benign cloning and
affecting bytes hinted reporting. To prevent this, optional support
looks for recursive cycles in contexts during cloning and removes
those contexts from cloning. This requires some additional runtime
overhead, so is disabled by default for now.
Support for correct cloning of recursive cycles is WIP.
Commit: c4387583ff79beb98ea9738469219345c13dc0d5
https://github.com/llvm/llvm-project/commit/c4387583ff79beb98ea9738469219345c13dc0d5
Author: offsake <sergey.i.zverev at intel.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
Log Message:
-----------
[NFC][SandboxVectorizer] Disable default copy CTOR/assigment for SchedBundle. (#121846)
Explicitly disable copy CTOR/assigment for SchedBundle to avoid
acsidentional
usage of default versions that do not handle Nodes copies properly.
A developer will need to implement them once required.
Commit: 9184c42869b87a59839cafdb8a3679e7ec2faeb1
https://github.com/llvm/llvm-project/commit/9184c42869b87a59839cafdb8a3679e7ec2faeb1
Author: Vyacheslav Klochkov <vyacheslav.n.klochkov at intel.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
A llvm/test/Transforms/LoadStoreVectorizer/X86/massive_indirection.ll
Log Message:
-----------
[LoadStoreVectorizer] Postprocess and merge equivalence classes (#121861)
This patch introduces a new method:
void Vectorizer::mergeEquivalenceClasses(EquivalenceClassMap &EQClasses)
const;
The method is called at the end of
Vectorizer::collectEquivalenceClasses() and is needed to merge
equivalence classes that differ only by their underlying objects (UO1
and UO2), where UO1 is 1-level-indirection underlying base for UO2. This
situation arises due to the limited lookup depth used during the search
of underlying bases with llvm::getUnderlyingObject(ptr).
Using any fixed lookup depth can result into creation of multiple
equivalence classes that only differ by 1-level indirection bases.
The new approach merges equivalence classes if they have adjacent bases
(1-level indirection). If a series of equivalence classes form ladder
formed of 1-step/level indirections, they are all merged into a single
equivalence class. This provides more opportunities for the load-store
vectorizer to generate better vectors.
---------
Signed-off-by: Klochkov, Vyacheslav N <vyacheslav.n.klochkov at intel.com>
Commit: 30ba8be22eb0e3f771624f6f47229129cf74e976
https://github.com/llvm/llvm-project/commit/30ba8be22eb0e3f771624f6f47229129cf74e976
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang-tools-extra/clangd/HeuristicResolver.h
M clang-tools-extra/clangd/unittests/CMakeLists.txt
A clang-tools-extra/clangd/unittests/HeuristicResolverTests.cpp
Log Message:
-----------
[clangd] Add a unit test suite for HeuristicResolver (#121313)
Fixes https://github.com/clangd/clangd/issues/2154
Commit: db408acc0498a8e5ece91b8d745e3cc412542398
https://github.com/llvm/llvm-project/commit/db408acc0498a8e5ece91b8d745e3cc412542398
Author: Volodymyr Sapsai <vsapsai at apple.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/include/module.modulemap
M llvm/include/module.modulemap
Log Message:
-----------
[Modules] Fix modular build. (#122034)
Add a new file to the module map and remove 2 missing files (migrated
from .def to .td).
Commit: 4583f6d3443c8dc6605c868724e3743161954210
https://github.com/llvm/llvm-project/commit/4583f6d3443c8dc6605c868724e3743161954210
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/test/CodeGen/nvptx_attributes.c
M clang/test/CodeGenCUDA/device-fun-linkage.cu
M clang/test/CodeGenCUDA/grid-constant.cu
M clang/test/CodeGenCUDA/offload_via_llvm.cu
M clang/test/CodeGenCUDA/ptx-kernels.cu
M clang/test/CodeGenCUDA/usual-deallocators.cu
M clang/test/CodeGenOpenCL/ptx-calls.cl
M clang/test/CodeGenOpenCL/ptx-kernels.cl
M clang/test/CodeGenOpenCL/reflect.cl
M clang/test/Headers/gpuintrin.c
M llvm/lib/Target/NVPTX/NVPTXCtorDtorLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/test/Analysis/UniformityAnalysis/NVPTX/daorder.ll
M llvm/test/Analysis/UniformityAnalysis/NVPTX/diverge.ll
M llvm/test/Analysis/UniformityAnalysis/NVPTX/hidden_diverge.ll
M llvm/test/Analysis/UniformityAnalysis/NVPTX/irreducible.ll
M llvm/test/CodeGen/NVPTX/b52037.ll
M llvm/test/CodeGen/NVPTX/bug21465.ll
M llvm/test/CodeGen/NVPTX/bug22322.ll
M llvm/test/CodeGen/NVPTX/bug26185.ll
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/generic-to-nvvm.ll
M llvm/test/CodeGen/NVPTX/i1-array-global.ll
M llvm/test/CodeGen/NVPTX/i1-ext-load.ll
M llvm/test/CodeGen/NVPTX/i1-global.ll
M llvm/test/CodeGen/NVPTX/i1-param.ll
M llvm/test/CodeGen/NVPTX/intr-range.ll
M llvm/test/CodeGen/NVPTX/kernel-param-align.ll
M llvm/test/CodeGen/NVPTX/load-with-non-coherent-cache.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/lower-alloca.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/lower-ctor-dtor.ll
M llvm/test/CodeGen/NVPTX/lower-kernel-ptr-arg.ll
M llvm/test/CodeGen/NVPTX/maxclusterrank.ll
M llvm/test/CodeGen/NVPTX/noduplicate-syncthreads.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
M llvm/test/CodeGen/NVPTX/nvcl-param-align.ll
M llvm/test/CodeGen/NVPTX/refl1.ll
M llvm/test/CodeGen/NVPTX/reg-copy.ll
M llvm/test/CodeGen/NVPTX/simple-call.ll
M llvm/test/CodeGen/NVPTX/surf-read-cuda.ll
M llvm/test/CodeGen/NVPTX/surf-read.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
M llvm/test/CodeGen/NVPTX/surf-write-cuda.ll
M llvm/test/CodeGen/NVPTX/surf-write.ll
M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
M llvm/test/CodeGen/NVPTX/tex-read.ll
M llvm/test/CodeGen/NVPTX/unreachable.ll
M llvm/test/DebugInfo/NVPTX/debug-addr-class.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/Transforms/LoopStrengthReduce/NVPTX/trunc.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/speculative-slsr.ll
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
the `ptx_kernel` calling convention is a more idiomatic and standard way
of specifying a NVPTX kernel than using the metadata which is not
supposed to change the meaning of the program. Further, checking the
calling convention is significantly faster than traversing the metadata,
improving compile time.
This change updates the clang and mlir frontends as well as the
NVPTXCtorDtorLowering pass to emit kernels using the calling convention.
In addition, this updates all NVPTX unit tests to use the calling
convention as well.
Commit: dde5546b79f784ab71cac325e0a0698c67c4dcde
https://github.com/llvm/llvm-project/commit/dde5546b79f784ab71cac325e0a0698c67c4dcde
Author: Luke Quinn <quic_lquinn at quicinc.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/add-imm.ll
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/combine.ll
M llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-add-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-addo-subo-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-const-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sat-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sub-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/scmp.ll
M llvm/test/CodeGen/RISCV/GlobalISel/ucmp.ll
Log Message:
-----------
[RISCV] GISel custom lowering for G_ADD/G_SUB (#121587)
Custom lowering for s32 G_ADD/SUB to help match selection dag better.
Specifically for RV64 a s32 is produced as a add+sext the output this
allows for fewer instructions to sign extend a couple patterns. Allows
for the generation of addiw,subw,negw to reduce required instructions to
load values quicker
Log2_ceil_i32 in rvzbb.ll shows a more obvious improvement case.
Commit: bfb0a518e73623732c6567916d066df817e0cb0c
https://github.com/llvm/llvm-project/commit/bfb0a518e73623732c6567916d066df817e0cb0c
Author: Lang Hames <lhames at gmail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/test/ExecutionEngine/JITLink/AArch32/ELF_data_alignment.s
M llvm/test/ExecutionEngine/JITLink/AArch64/ELF_ehframe.s
M llvm/test/ExecutionEngine/JITLink/AArch64/MachO_compact_unwind.s
M llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ehframe.s
M llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_loongarch64_ehframe.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_call.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_call_rvc.s
M llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s
M llvm/test/ExecutionEngine/JITLink/ppc64/ELF_ppc64_ehframe.s
M llvm/test/ExecutionEngine/JITLink/ppc64/external_weak.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_abs.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_any.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_associative.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_exact_match.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_intervene.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_largest.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_noduplicate.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_offset.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_same_size.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_weak.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_common_symbol.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_duplicate_externals.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_file_debug.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_static_var.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_weak_external.s
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_debug_section_lifetime_is_NoAlloc.yaml
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_basic.s
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_large_static_personality_encodings.s
M llvm/test/ExecutionEngine/JITLink/x86-64/LocalDependencyPropagation.s
M llvm/test/ExecutionEngine/JITLink/x86-64/MachO-check-dwarf-filename.s
M llvm/test/ExecutionEngine/JITLink/x86-64/MachO_compact_unwind.s
M llvm/test/ExecutionEngine/JITLink/x86-64/MachO_cstring_section_alignment.s
M llvm/test/ExecutionEngine/JITLink/x86-64/MachO_cstring_section_splitting.s
M llvm/test/ExecutionEngine/JITLink/x86-64/MachO_non_subsections_via_symbols.s
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[llvm-jitlink] Use -num-threads=0 for regression tests relying on debug output.
ORC and JITLink debugging output write the dbgs() raw_ostream, which isn't
thread-safe. Use -num-threads=0 to force single-threaded linking for tests that
produce debugging output.
The llvm-jitlink tool is updated to suggest -num-threads=0 when debugging
output is enabled.
Commit: b253a80f54fab085322bd856ba7f88c4773f0774
https://github.com/llvm/llvm-project/commit/b253a80f54fab085322bd856ba7f88c4773f0774
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
Log Message:
-----------
[RISCV][VLOPT] Add mask load to isSupported and getOperandInfo (#122030)
Add mask store to getOperandInfo since it has the same behavior.
Commit: 2a1632824df7eaaebfe9d0d1bee349cb5c76e834
https://github.com/llvm/llvm-project/commit/2a1632824df7eaaebfe9d0d1bee349cb5c76e834
Author: Mingjie Xu <xumingjie.enna1 at bytedance.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/Transforms/Instrumentation/TypeSanitizer.h
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
M llvm/test/Instrumentation/TypeSanitizer/access-with-offset.ll
M llvm/test/Instrumentation/TypeSanitizer/alloca-only.ll
M llvm/test/Instrumentation/TypeSanitizer/alloca.ll
M llvm/test/Instrumentation/TypeSanitizer/anon.ll
M llvm/test/Instrumentation/TypeSanitizer/basic-nosan.ll
M llvm/test/Instrumentation/TypeSanitizer/basic.ll
M llvm/test/Instrumentation/TypeSanitizer/byval.ll
M llvm/test/Instrumentation/TypeSanitizer/globals.ll
M llvm/test/Instrumentation/TypeSanitizer/invalid-metadata.ll
M llvm/test/Instrumentation/TypeSanitizer/memintrinsics.ll
M llvm/test/Instrumentation/TypeSanitizer/nosanitize.ll
M llvm/test/Instrumentation/TypeSanitizer/sanitize-no-tbaa.ll
M llvm/test/Instrumentation/TypeSanitizer/swifterror.ll
Log Message:
-----------
[tysan] Convert TySan from function+module pass to just module pass (#120667)
As mentioned in https://github.com/llvm/llvm-project/pull/118989, all
sanitizers but tsan are converted to just module pass for easier
maintenance.
This patch removes the TySan function pass, convert TySan from
function+module pass to just module pass.
Commit: 9020d193e6ef03e8070ac44078c5d8d9e86c4f2a
https://github.com/llvm/llvm-project/commit/9020d193e6ef03e8070ac44078c5d8d9e86c4f2a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/combine-neg-abs.ll
Log Message:
-----------
[RISCV][GISel] Re-generate combine-neg-abs.ll to fix build bot failure. NFC
Test was added while #121587 was in review.
Commit: b4ae4192989f97503626748421f32745897941ba
https://github.com/llvm/llvm-project/commit/b4ae4192989f97503626748421f32745897941ba
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/lib/AST/ParentMap.cpp
Log Message:
-----------
[clang] [NFC] explicitly check if ParentMap contains key (#121736)
The implementation of ParentMap assumes that the key is absent if it is
mapped to nullptr. This breaks when trying to store a tuple as the value
type. Remove this assumption by explicit uses of `try_emplace()`.
Commit: 162814a7ec00e2c89693f96568b72956d1bf2f0f
https://github.com/llvm/llvm-project/commit/162814a7ec00e2c89693f96568b72956d1bf2f0f
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M lld/MachO/ConcatOutputSection.h
M lld/MachO/MapFile.cpp
M lld/MachO/OutputSection.h
M lld/test/MachO/arm64-thunks.s
Log Message:
-----------
[lld-macho] Include branch extension thunks in linker map (#120496)
This patch extends the MachO linker's map file generation to include
branch extension thunk symbols. Previously, thunks were omitted from the
map file, making it difficult to understand the final layout of the
binary, especially when debugging issues related to long branch thunks.
This change ensures thunks are included and correctly interleaved with
other symbols based on their address, providing an accurate
representation of the linked output.
Commit: d6bfe10ac9963eb63e141d6c50e9a183c08d35da
https://github.com/llvm/llvm-project/commit/d6bfe10ac9963eb63e141d6c50e9a183c08d35da
Author: Ian Anderson <iana at apple.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
A clang/test/Driver/Inputs/MacOSX15.1.sdk/embedded/usr/include/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/embedded/usr/local/include/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/usr/include/c++/v1/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/usr/local/include/.keep
A clang/test/Driver/darwin-embedded-search-paths.c
M clang/test/Preprocessor/macho-embedded-predefines.c
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
[Darwin][Driver][clang] apple-none-macho orders the resource directory after internal-externc-isystem when nostdlibinc is used (#122035)
Embedded development often needs to use a different C standard library,
replacing the existing one normally passed as -internal-externc-isystem.
This works fine for an apple-macos target, but apple-none-macho doesn't
work because the MachO driver doesn't implement
AddClangSystemIncludeArgs to add the resource directory as
-internal-isystem like most other drivers do. Move most of the search
path logic from Darwin and DarwinClang down into an AppleMachO toolchain
between the MachO and Darwin toolchains.
Also define __MACH__ for apple-none-macho, as Swift expects all MachO
targets to have that defined.
Commit: 61b806f43b2d6b3673a8f91393a28c98521472a8
https://github.com/llvm/llvm-project/commit/61b806f43b2d6b3673a8f91393a28c98521472a8
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/lib/AST/ParentMap.cpp
Log Message:
-----------
[clang] assign the correct parent in update to ParentMap
This fixes a bug that slipped into #121736.
Commit: f0d5104c944b329c479802788571ed6df41e0e86
https://github.com/llvm/llvm-project/commit/f0d5104c944b329c479802788571ed6df41e0e86
Author: Luke Lau <luke at igalia.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blend-any-of-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Handle some VPInstructions in may{Read,Write}FromMemory (#120058)
This just copies the same conservative definition from mayWriteToMemory,
and enables more VPInstructions to be hoisted out in LICM.
I think this should give more accurate costs, and I was able to build
llvm-test-suite without the legacy-vplan cost model assertion going off.
Commit: f50f9698ad012882df8dd605f5482e280c138266
https://github.com/llvm/llvm-project/commit/f50f9698ad012882df8dd605f5482e280c138266
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-hip.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-opencl.mlir
M mlir/test/Conversion/GPUToSPIRV/printf.mlir
M mlir/test/Dialect/GPU/indirect-device-func-call.mlir
M mlir/test/Dialect/GPU/ops.mlir
M mlir/test/Dialect/GPU/test-nvvm-pipeline.mlir
M mlir/test/Integration/GPU/CUDA/assert.mlir
M mlir/test/Integration/GPU/CUDA/printf.mlir
M mlir/test/Integration/GPU/CUDA/sm90/cga_cluster.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir
M mlir/test/Integration/GPU/ROCM/printf.mlir
Log Message:
-----------
[MLIR][GPU] Fix gpu.printf (#121940)
Commit: de67ca12183787414869f8426a3bb65a6615e945
https://github.com/llvm/llvm-project/commit/de67ca12183787414869f8426a3bb65a6615e945
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
Log Message:
-----------
Fix extra parenthesis in diagnostic (#122055)
Following https://github.com/llvm/llvm-project/pull/120380,
`err_pack_expansion_length_conflict` has one close paren too many.
Remove the extra parenthesis.
Commit: 457f30247319a18a95c29ba0ccfcc88beb1c3a44
https://github.com/llvm/llvm-project/commit/457f30247319a18a95c29ba0ccfcc88beb1c3a44
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/test/MC/AMDGPU/gfx1030_err.s
M llvm/test/MC/AMDGPU/gfx10_asm_smem_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_smem_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_mimg_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_smem_err.s
Log Message:
-----------
[AMDGPU] Disallow null for more resource operands (#121941)
Following on from #115200, disallow the null sgpr as a resource operand
in some instructions that were missed.
Commit: a8dab1aa036f248d551f7839360eb03fac4b7d96
https://github.com/llvm/llvm-project/commit/a8dab1aa036f248d551f7839360eb03fac4b7d96
Author: David Green <david.green at arm.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/shuffle-extract.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
Log Message:
-----------
[AArch64] Add a subvector extract cost. (#121472)
These can generally be emitted using an ext instruction or mov from the
high half. The half half extracts can be free depending on the users,
but that is not handled here, just the basic costs. It originally
included all subvector extracts, but that was toned-down to just
half-vector extracts to try and help the mid end not breakup high/low
extracts without having the SLP vectorizer create a mess using other
shuffles.
Commit: 49668d5efef19402effdad4d4d1d17732a1c6fdb
https://github.com/llvm/llvm-project/commit/49668d5efef19402effdad4d4d1d17732a1c6fdb
Author: Karthika Devi C <quic_kartc at quicinc.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M polly/include/polly/CodeGen/BlockGenerators.h
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
A polly/test/CodeGen/reggen_domtree_crash.ll
Log Message:
-----------
[Polly] Switch DT/LI in RegionGenerator for parallel subfn (#120413)
The patch #102460 already implements separate DT/LI/SE for parallel sub
function. Crashes have been reported while region generator tries using
oringinal function's DT while creating new parallel sub function due to
checks in #101198. This patch aims at fixing those cases by switching
the DT/LI while generating parallel function using Region Generator.
Fixes #117877
Commit: e7244d8659f1ee7b6dcf8fc90e33d81cda178f45
https://github.com/llvm/llvm-project/commit/e7244d8659f1ee7b6dcf8fc90e33d81cda178f45
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M bolt/lib/Core/CMakeLists.txt
M bolt/lib/Passes/CMakeLists.txt
M bolt/lib/Profile/CMakeLists.txt
M bolt/lib/Rewrite/CMakeLists.txt
M bolt/lib/RuntimeLibs/CMakeLists.txt
M bolt/lib/Target/AArch64/CMakeLists.txt
M bolt/lib/Target/RISCV/CMakeLists.txt
M bolt/lib/Target/X86/CMakeLists.txt
M bolt/lib/Utils/CMakeLists.txt
M llvm/cmake/modules/AddLLVM.cmake
Log Message:
-----------
[BOLT][CMake] Don't export bolt libraries in LLVMExports.cmake (#121936)
Bolt makes use of add_llvm_library and as such ends up exporting its
libraries from LLVMExports.cmake, which is not correct.
Bolt doesn't have its own exports file, and I assume that there is no
desire to have one either -- Bolt libraries are not intended to be
consumed as a cmake module, right?
As such, this PR adds a NO_EXPORT option to simplify exclude these
libraries from the exports file.
Commit: c1d01b2fc2932ca3ae6fb81a978f260298dbf343
https://github.com/llvm/llvm-project/commit/c1d01b2fc2932ca3ae6fb81a978f260298dbf343
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeConv2D.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-conv2d.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Add missing verifier for `tosa.pad` (#120934)
This PR adds a missing verifier for `tosa.pad`, ensuring that the
padding shape matches [2*rank(shape1)] according to V1.0.0
Specification. Fixes #119840.
Commit: 366e62a0cb5d1c94d3b281f094755c4dd4c76df9
https://github.com/llvm/llvm-project/commit/366e62a0cb5d1c94d3b281f094755c4dd4c76df9
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
A llvm/test/CodeGen/X86/uint_to_half.ll
Log Message:
-----------
[X86] Combine `uitofp <v x i32> to <v x half>` (#121809)
Closes #121793
Commit: e5341784dbcc9e166827233a66fb54645204a43e
https://github.com/llvm/llvm-project/commit/e5341784dbcc9e166827233a66fb54645204a43e
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Update inlining maintainers (#120579)
Update maintainers for inlining, and add section for NewPM/CGSCC.
Commit: 70ab81bc749d0ad67362e612dbb6429ed00a47ec
https://github.com/llvm/llvm-project/commit/70ab81bc749d0ad67362e612dbb6429ed00a47ec
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/test/MC/AArch64/armv9.6a-rme-gpc3.s
M llvm/test/MC/Disassembler/AArch64/armv9.6a-rme-gpc3.txt
Log Message:
-----------
[AArch64] Ensure APAS instruction passes register parameter (#121928)
In PR #112341, the `APAS` instruction was added as part of the Armv9.6-A
specification, but it didn't take the Xt register parameter. This change
fixes this.
Commit: b037bceef6a40c5c00c1f67cc5a334e2c4e5e041
https://github.com/llvm/llvm-project/commit/b037bceef6a40c5c00c1f67cc5a334e2c4e5e041
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/include/llvm/ADT/STLFunctionalExtras.h
Log Message:
-----------
Add LLVM_GSL_POINTER to llvm::function_ref. (#120699)
This can enable clang to detect dangling assignment issues, see #120698.
Commit: 32bc029be6265838833623fdd88cc665d5658dc7
https://github.com/llvm/llvm-project/commit/32bc029be6265838833623fdd88cc665d5658dc7
Author: David Green <david.green at arm.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[AArch64] Fix signed comparison warning. NFC
Commit: 44e8ee73591bad22ae19748be825c4b66d7b3dde
https://github.com/llvm/llvm-project/commit/44e8ee73591bad22ae19748be825c4b66d7b3dde
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M flang/docs/Extensions.md
Log Message:
-----------
[flang][doc] refine zero initialization extension documentation (#121956)
Following-up on [comments
](https://github.com/llvm/llvm-project/issues/62432#issuecomment-2555316522)
in the issue that motivated this extension.
Commit: 303249c4490a7777a744d9afd449b64ff1132a42
https://github.com/llvm/llvm-project/commit/303249c4490a7777a744d9afd449b64ff1132a42
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/test/Transforms/stack-arrays.fir
Log Message:
-----------
[flang][StackArrays] track pointers through fir.convert (#121919)
This does add a little computational complexity because now every
freemem operation has to be tested for every allocation. This could be
improved with some more memoisation but I think it is easier to read
this way. Let me know if you would prefer me to change this to
pre-compute the normalised addresses each freemem operation is using.
Weirdly, this change resulted in a verifier failure for the fir.declare
in the previous test case. Maybe it was previously removed as dead code
and now it isn't. Anyway I fixed that too.
Commit: 67efbd0bf1b2df8a479e09eb2be7db4c3c892f2c
https://github.com/llvm/llvm-project/commit/67efbd0bf1b2df8a479e09eb2be7db4c3c892f2c
Author: Ryan Mansfield <ryan_mansfield at apple.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/MIRSampleProfile.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[LLVM] Fix various cl::desc typos and whitespace issues (NFC) (#121955)
Commit: 360a03c980e3e96ac53746b118a04305a28a5310
https://github.com/llvm/llvm-project/commit/360a03c980e3e96ac53746b118a04305a28a5310
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/quant-test.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-conv2d.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[mlir][tosa] Add acc_type to Tosa-v1.0 Conv Ops (#121466)
Tosa v1.0 adds accumulator type attributes to the various convolution
operations defined in the spec. Update the dialect and any lit tests to
include these attributes.
Signed-off-by: Tai Ly <tai.ly at arm.com>
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: 30b7da72f2abef7cad4d1b38e141e7d2ef170d88
https://github.com/llvm/llvm-project/commit/30b7da72f2abef7cad4d1b38e141e7d2ef170d88
Author: Brad Smith <brad at comstyle.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M lldb/source/Host/openbsd/Host.cpp
Log Message:
-----------
[lldb][OpenBSD][NFC] Replace tab with spaces (#122041)
Commit: 20d7fa1cc33c72f68bd41fa616b2dab4a4967618
https://github.com/llvm/llvm-project/commit/20d7fa1cc33c72f68bd41fa616b2dab4a4967618
Author: gbMattN <146744444+gbMattN at users.noreply.github.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M compiler-rt/lib/tysan/tysan.cpp
M compiler-rt/lib/tysan/tysan_flags.inc
A compiler-rt/test/tysan/print_stacktrace.c
Log Message:
-----------
[TySan] Added a 'print_stacktrace' flag for more detailed errors (#121756)
Raised in issue #121697
Commit: bfa711a970d50c9101c8962609f9aad4f5395825
https://github.com/llvm/llvm-project/commit/bfa711a970d50c9101c8962609f9aad4f5395825
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
Log Message:
-----------
[InstCombine] Use combineMetadataForCSE in phi of loads fold
Use combineMetadataForCSE instead of manually enumerating known
metadata kinds. This is a typical sinking transform for which
combineMetadataForCSE is safe to use (with DoesKMove=true).
Part of https://github.com/llvm/llvm-project/issues/121495.
Commit: edf14ed6b182b9ae9efa0c854f3d4744bb67bf08
https://github.com/llvm/llvm-project/commit/edf14ed6b182b9ae9efa0c854f3d4744bb67bf08
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Don't form a type constraint if the concept is invalid (#122065)
After 0dedd6fe1 and 03229e7c0, invalid concept declarations might lack
expressions for evaluation and normalization. This could make it crash
in certain scenarios, apart from the one of evaluation concepts showed
in 03229e7c0, there's also an issue when checking specializations where
the normalization also relies on a non-null expression.
This patch prevents that by avoiding building up a type constraint in
such situations, thereafter the template parameter wouldn't have a
concept specialization of a null expression.
With this patch, the assumption in ASTWriterDecl is no longer valid.
Namely, HasConstraint and TypeConstraintInitialized must now represent
different meanings for both source fidelity and semantic requirements.
Fixes https://github.com/llvm/llvm-project/issues/115004
Fixes https://github.com/llvm/llvm-project/issues/121980
Commit: 9fc152d25ea1610efe2824c763e96e790d520910
https://github.com/llvm/llvm-project/commit/9fc152d25ea1610efe2824c763e96e790d520910
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/test/CodeGen/tbaa-pointers.c
Log Message:
-----------
[TBAA] Add Clang pointer TBAA test with void *.
Commit: 03e7862962d01a5605f1eeeb26626083584945ff
https://github.com/llvm/llvm-project/commit/03e7862962d01a5605f1eeeb26626083584945ff
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Log Message:
-----------
[ValueTracking] Move `getFlippedStrictnessPredicateAndConstant` into ValueTracking. NFC. (#122064)
Needed by https://github.com/llvm/llvm-project/pull/121958.
Commit: 7060d2a12b6da41ab0e3d86ff7fe1501e4f40769
https://github.com/llvm/llvm-project/commit/7060d2a12b6da41ab0e3d86ff7fe1501e4f40769
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll
Log Message:
-----------
[CodeGenPrepare] Regenerate test `X86/codegen-prepare-addrmode-sext.ll` (#122101)
Needed by https://github.com/llvm/llvm-project/pull/71058
Commit: 1c067a513c757b731434fd793351c52b49628489
https://github.com/llvm/llvm-project/commit/1c067a513c757b731434fd793351c52b49628489
Author: William Moses <gh at wsmoses.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/metadata-alias-scopes.ll
M mlir/test/Target/LLVMIR/attribute-alias-scopes.mlir
Log Message:
-----------
[MLIR] Enable import of non self referential alias scopes (#121987)
Fixes #121965.
---------
Co-authored-by: Christian Ulmann <christianulmann at gmail.com>
Co-authored-by: Alex Zinenko <git at ozinenko.com>
Commit: 51d7605df9647f54d702df1f7d4029e95dce7156
https://github.com/llvm/llvm-project/commit/51d7605df9647f54d702df1f7d4029e95dce7156
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-merged-funcs-dwarf.yaml
Log Message:
-----------
Fix macho-merged-funcs-dwarf.yaml test on Windows
Commit: 72b6a573639fe85eb121c66e47b2c9e6ea64df5e
https://github.com/llvm/llvm-project/commit/72b6a573639fe85eb121c66e47b2c9e6ea64df5e
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UnusedLocalNonTrivialVariableCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unused-local-non-trivial-variable.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unused-local-non-trivial-variable-name-independence.cpp
Log Message:
-----------
[clang-tidy] fix false positives when using name-independent variables after C++26 for bugprone-unused-local-non-trivial-variable (#121783)
Fixed: #121731
According to https://eel.is/c++draft/basic.scope.scope#5, name
independent declaration should not be warned as unused
Commit: 645c1ee8969cb79f6fad478944a1a6ccaa47aed6
https://github.com/llvm/llvm-project/commit/645c1ee8969cb79f6fad478944a1a6ccaa47aed6
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Driver/fsave-main-program.f90
A flang/test/Lower/fsave-main-program.f90
Log Message:
-----------
[flang][driver] add option to make all main program variable static (#121968)
Co-authored-by: Kiran Chandramohan <kiranchandramohan at gmail.com>
Commit: 7004d6815b3a0c6d9c15a19b6927746a97564ba7
https://github.com/llvm/llvm-project/commit/7004d6815b3a0c6d9c15a19b6927746a97564ba7
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] adding setlinebuf/setbuffer interception. (#122018)
catering to platform differences as those calls are not posix.
Commit: d07762e47419a1ef892729a420d0c4769b6702a7
https://github.com/llvm/llvm-project/commit/d07762e47419a1ef892729a420d0c4769b6702a7
Author: Jessica Del <50999226+OutOfCache at users.noreply.github.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/test/tools/UpdateTestChecks/lit.local.cfg
M llvm/utils/UpdateTestChecks/common.py
Log Message:
-----------
[UpdateTestChecks][NFC] - Fix typos (#121964)
substition -> substitution
in-betweem -> in-between
Commit: 72a28a3bf0b539bcdfd8f41905675ce6a890c0ac
https://github.com/llvm/llvm-project/commit/72a28a3bf0b539bcdfd8f41905675ce6a890c0ac
Author: Jan Voung <jvoung at google.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/CachedConstAccessorsLattice.h
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/include/clang/Analysis/FlowSensitive/SmartPointerAccessorCaching.h
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Analysis/FlowSensitive/SmartPointerAccessorCaching.cpp
M clang/unittests/Analysis/FlowSensitive/CachedConstAccessorsLatticeTest.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
Log Message:
-----------
[clang][dataflow] Use smart pointer caching in unchecked optional accessor (#120249)
Part 2 (and final part) following
https://github.com/llvm/llvm-project/pull/120102
Allows users to do things like:
```
if (o->x.has_value()) {
((*o).x).value();
}
```
where the `->` and `*` are operator overload calls.
A user could instead extract the nested optional into a local variable
once instead of doing two accessor calls back to back, but currently
they are unsure why the code is flagged.
Commit: 81fc3add1e627c23b7270fe2739cdacc09063e54
https://github.com/llvm/llvm-project/commit/81fc3add1e627c23b7270fe2739cdacc09063e54
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/NarrowingConversionsCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/TooSmallLoopVariableCheck.cpp
M clang-tools-extra/clang-tidy/hicpp/MultiwayPathsCoveredCheck.cpp
M clang-tools-extra/clangd/Hover.cpp
M clang/include/clang/AST/Decl.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGNonTrivialStruct.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
M clang/lib/CodeGen/SwiftCallingConv.cpp
M clang/lib/CodeGen/Targets/LoongArch.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/CodeGen/Targets/XCore.cpp
M clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/tools/libclang/CXType.cpp
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
[clang] Avoid re-evaluating field bitwidth (#117732)
Save the bitwidth value as a `ConstantExpr` with the value set. Remove
the `ASTContext` parameter from `getBitWidthValue()`, so the latter
simply returns the value from the `ConstantExpr` instead of
constant-evaluating the bitwidth expression every time it is called.
Commit: 35c5e56b6113b468b521c071ac141b4bb94da1d7
https://github.com/llvm/llvm-project/commit/35c5e56b6113b468b521c071ac141b4bb94da1d7
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang-tools-extra/include-cleaner/lib/Analysis.cpp
M clang/tools/driver/driver.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
Log Message:
-----------
Clean up -Wdangling-assignment-gsl in clang and mlir
These are triggering after b037bceef6a40c5c00c1f67cc5a334e2c4e5e041.
Commit: 1411a9ae9358c7fc17e84876b82f6d2293c7ba4d
https://github.com/llvm/llvm-project/commit/1411a9ae9358c7fc17e84876b82f6d2293c7ba4d
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M libcxx/src/experimental/tzdb.cpp
Log Message:
-----------
[libc++][NFC] Add missing includes in tzdb.cpp
Commit: 346fad5c2c28d0cd39475ae979ee468a420ebed7
https://github.com/llvm/llvm-project/commit/346fad5c2c28d0cd39475ae979ee468a420ebed7
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/test/CodeGen/tbaa-pointers.c
Log Message:
-----------
[TBAA] Simplify checks for unnamed struct case, where anyptr is used.
Commit: 59bdea24b09bca9332a7092b583ebf377efb0d50
https://github.com/llvm/llvm-project/commit/59bdea24b09bca9332a7092b583ebf377efb0d50
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/NarrowingConversionsCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/TooSmallLoopVariableCheck.cpp
M clang-tools-extra/clang-tidy/hicpp/MultiwayPathsCoveredCheck.cpp
M clang-tools-extra/clangd/Hover.cpp
M clang/include/clang/AST/Decl.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Randstruct.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGNonTrivialStruct.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
M clang/lib/CodeGen/SwiftCallingConv.cpp
M clang/lib/CodeGen/Targets/LoongArch.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/CodeGen/Targets/XCore.cpp
M clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/tools/libclang/CXType.cpp
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
Revert "[clang] Avoid re-evaluating field bitwidth (#117732)"
This reverts commit 81fc3add1e627c23b7270fe2739cdacc09063e54.
This breaks some LLDB tests, e.g.
SymbolFile/DWARF/x86/no_unique_address-with-bitfields.cpp:
lldb: ../llvm-project/clang/lib/AST/Decl.cpp:4604: unsigned int clang::FieldDecl::getBitWidthValue() const: Assertion `isa<ConstantExpr>(getBitWidth())' failed.
Commit: 0d7022ed75ef4d1efdfbdbf206e3f4041a9cd18b
https://github.com/llvm/llvm-project/commit/0d7022ed75ef4d1efdfbdbf206e3f4041a9cd18b
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
Log Message:
-----------
[MLIR][GPU] Fix gpu.printf test syntax after f50f9698ad012882df8dd605f5482e280c138266
Commit: fdd7cafb9078e146634a3fbb72a8949108dca425
https://github.com/llvm/llvm-project/commit/fdd7cafb9078e146634a3fbb72a8949108dca425
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
Log Message:
-----------
[z/OS][SystemZ] Clang dependency files are text files (#121849)
The dependency file and the P1689 file are text files, but the
open call misses the OF_Text flag. This PR adds the flag.
Fixes regressions in test cases ClangScanDeps/modules-extern-unrelated.m
and ClangScanDeps/P1689.cppm.
Commit: 1160994602b90890efd4df4e134e46cc3ad34bc8
https://github.com/llvm/llvm-project/commit/1160994602b90890efd4df4e134e46cc3ad34bc8
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/RISCV/long-gep-chains.ll
Log Message:
-----------
[SLP]Fix a crash for very long GEP chains
Need to check if the GEP bases are equal and return false early. Also,
need to return false if the lookup is too deep, considering bases equal
too. Fixes a crash in the assertion.
Commit: 81898ac00e04ed3f352534a810829bdf4e6e14b7
https://github.com/llvm/llvm-project/commit/81898ac00e04ed3f352534a810829bdf4e6e14b7
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/OutputRedirector.cpp
M lldb/tools/lldb-dap/OutputRedirector.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
Revert "[lldb-dap] Ensure the IO forwarding threads are managed by the DAP object lifecycle. (#120457)"
This reverts commit 0d9cf2671e06c9124a0b5fc753330c39c8b4a791. Breaks the
lldb-aarch64-windows buildbot.
Commit: b66f6b25cb5107d4c8f78d13b08d2bdba39ad919
https://github.com/llvm/llvm-project/commit/b66f6b25cb5107d4c8f78d13b08d2bdba39ad919
Author: Chris B <chris.bieneman at me.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaStmtAttr.cpp
R clang/test/AST/HLSL/HLSLControlFlowHint.hlsl
R clang/test/CodeGenHLSL/HLSLControlFlowHint.hlsl
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
R llvm/test/CodeGen/DirectX/HLSLControlFlowHint.ll
R llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
R llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint.ll
Log Message:
-----------
Revert #116331 & #121852 (#122105)
Commit: f37bee1d929a90dd3dbb67a4a9d0a52400a8a78f
https://github.com/llvm/llvm-project/commit/f37bee1d929a90dd3dbb67a4a9d0a52400a8a78f
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
Log Message:
-----------
[ReachingDefAnalysis][NFC] Rename `PhysReg` to `Reg`. (#122112)
This is in order to prepare for future MR where we will extend
`ReachingDefAnalysis` to stack slots.
Commit: 322ff423159f618f2dbfdce2031dbd296deb966f
https://github.com/llvm/llvm-project/commit/322ff423159f618f2dbfdce2031dbd296deb966f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/AArch64/block_scaling_decompr_8bit.ll
Log Message:
-----------
[PhaseOrdering][AArch64] block_scaling_decompr_8bit.ll - use -passes="default<O3>" to allow DOS to correctly evaluate the RUN command
Necessary for running update_test_checks.py on windows
Commit: fe162bed532b78f606fe3d937ba732787dd7bd64
https://github.com/llvm/llvm-project/commit/fe162bed532b78f606fe3d937ba732787dd7bd64
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M clang/test/Driver/darwin-embedded-search-paths.c
Log Message:
-----------
Make test more lenient for custom clang version strings
The version string can be anything, don't restrict it to digits and
dots. It's derived from the resource dir, so just check for that.
Commit: 811b7207fbb963c7f021725e81de9793ce5d8a53
https://github.com/llvm/llvm-project/commit/811b7207fbb963c7f021725e81de9793ce5d8a53
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-01-08 (Wed, 08 Jan 2025)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/commit-access-review.py
M .github/workflows/pr-code-format.yml
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/CMakeLists.txt
M bolt/lib/Passes/CMakeLists.txt
M bolt/lib/Passes/ReorderFunctions.cpp
M bolt/lib/Profile/CMakeLists.txt
M bolt/lib/Rewrite/CMakeLists.txt
M bolt/lib/RuntimeLibs/CMakeLists.txt
M bolt/lib/Target/AArch64/CMakeLists.txt
M bolt/lib/Target/RISCV/CMakeLists.txt
M bolt/lib/Target/X86/CMakeLists.txt
M bolt/lib/Utils/CMakeLists.txt
M bolt/test/AArch64/pad-before-funcs.s
M clang-tools-extra/clang-tidy/bugprone/UnhandledSelfAssignmentCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnusedLocalNonTrivialVariableCheck.cpp
M clang-tools-extra/clangd/HeuristicResolver.h
M clang-tools-extra/clangd/unittests/CMakeLists.txt
A clang-tools-extra/clangd/unittests/HeuristicResolverTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unused-local-non-trivial-variable.rst
M clang-tools-extra/include-cleaner/lib/Analysis.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unhandled-self-assignment.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unused-local-non-trivial-variable-name-independence.cpp
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_type.py
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang-c/Index.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Analysis/FlowSensitive/CachedConstAccessorsLattice.h
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/include/clang/Analysis/FlowSensitive/SmartPointerAccessorCaching.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
A clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/clang/Basic/arm_sme.td
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaOpenACC.h
A clang/include/clang/Sema/SemaSPIRV.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/include/module.modulemap
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/ParentMap.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Analysis/FlowSensitive/SmartPointerAccessorCaching.cpp
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
A clang/lib/Driver/ToolChains/SYCL.cpp
A clang/lib/Driver/ToolChains/SYCL.h
M clang/lib/Format/MatchFilePath.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/CMakeLists.txt
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaOpenACC.cpp
A clang/lib/Sema/SemaSPIRV.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/Z3CrosscheckVisitor.cpp
A clang/test/AST/ast-print-openacc-set-construct.cpp
A clang/test/AST/ast-print-openacc-update-construct.cpp
M clang/test/Analysis/analyzer-config.c
A clang/test/Analysis/z3-crosscheck-max-attempts.cpp
M clang/test/Analysis/z3/D83660.c
R clang/test/Analysis/z3/Inputs/MockZ3_solver_check.c
A clang/test/Analysis/z3/Inputs/MockZ3_solver_check.cpp
M clang/test/CXX/drs/cwg0xx.cpp
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CXX/drs/cwg17xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg20xx.cpp
M clang/test/CXX/drs/cwg21xx.cpp
M clang/test/CXX/drs/cwg22xx.cpp
M clang/test/CXX/drs/cwg23xx.cpp
A clang/test/CXX/drs/cwg273.cpp
M clang/test/CXX/drs/cwg27xx.cpp
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg4xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
M clang/test/CXX/drs/cwg9xx.cpp
M clang/test/CodeGen/AArch64/fmv-dependencies.c
A clang/test/CodeGen/AArch64/fmv-features.c
M clang/test/CodeGen/AArch64/fmv-streaming.c
M clang/test/CodeGen/AArch64/neon-vcmla.c
M clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGen/nvptx_attributes.c
M clang/test/CodeGen/sanitize-type-globals.cpp
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGen/scoped-fence-ops.c
M clang/test/CodeGen/tbaa-pointers.c
M clang/test/CodeGen/xcore-abi.c
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
M clang/test/CodeGenCUDA/device-fun-linkage.cu
M clang/test/CodeGenCUDA/grid-constant.cu
M clang/test/CodeGenCUDA/offload_via_llvm.cu
M clang/test/CodeGenCUDA/ptx-kernels.cu
M clang/test/CodeGenCUDA/usual-deallocators.cu
A clang/test/CodeGenHLSL/debug/rwbuffer_debug_info.hlsl
M clang/test/CodeGenOpenCL/ptx-calls.cl
M clang/test/CodeGenOpenCL/ptx-kernels.cl
M clang/test/CodeGenOpenCL/reflect.cl
A clang/test/CodeGenSPIRV/Builtins/distance.c
A clang/test/Driver/Inputs/MacOSX15.1.sdk/embedded/usr/include/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/embedded/usr/local/include/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/usr/include/c++/v1/.keep
A clang/test/Driver/Inputs/MacOSX15.1.sdk/usr/local/include/.keep
A clang/test/Driver/Inputs/config-zos/clang.cfg
A clang/test/Driver/Inputs/config-zos/def.cfg
A clang/test/Driver/Inputs/config-zos/tst/def.cfg
A clang/test/Driver/config-zos.c
A clang/test/Driver/config-zos1.c
A clang/test/Driver/darwin-embedded-search-paths.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/spirv-openmp-toolchain.c
A clang/test/Driver/sycl-offload-jit.cpp
M clang/test/Headers/gpuintrin.c
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/Preprocessor/macho-embedded-predefines.c
M clang/test/Sema/varargs.c
M clang/test/SemaCXX/type-traits.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
A clang/test/SemaOpenACC/set-construct-ast.cpp
A clang/test/SemaOpenACC/set-construct.cpp
M clang/test/SemaOpenACC/unimplemented-construct.c
A clang/test/SemaOpenACC/update-construct-ast.cpp
A clang/test/SemaOpenACC/update-construct.cpp
A clang/test/SemaSPIRV/BuiltIns/distance-errors.c
M clang/test/SemaTemplate/concepts.cpp
M clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp
M clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected
A clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c
A clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c.expected
A clang/test/utils/update_cc_test_checks/c-symbol-mangling.test
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/driver/driver.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/unittests/Analysis/FlowSensitive/CachedConstAccessorsLatticeTest.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/www/cxx_dr_status.html
M clang/www/make_cxx_dr_status
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/aarch64/arm_apple_sme_abi.s
M compiler-rt/lib/gwp_asan/tests/harness.h
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/tysan/tysan.cpp
M compiler-rt/lib/tysan/tysan_flags.inc
M compiler-rt/lib/ubsan/ubsan_value.h
A compiler-rt/test/tysan/print_stacktrace.c
M flang/docs/Extensions.md
M flang/include/flang/Optimizer/Dialect/CanonicalizationPatterns.td
M flang/lib/Common/Fortran.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CMakeLists.txt
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
A flang/lib/Lower/OpenMP/PrivateReductionUtils.cpp
A flang/lib/Lower/OpenMP/PrivateReductionUtils.h
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Parser/prescan.cpp
M flang/runtime/derived.cpp
A flang/test/Driver/fsave-main-program.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Driver/parse-error.ll
M flang/test/Fir/basic-program.fir
M flang/test/Fir/convert-fold.fir
M flang/test/Lower/OpenMP/derived-type-allocatable.f90
A flang/test/Lower/OpenMP/firstprivate-alloc-comp.f90
M flang/test/Lower/array-substring.f90
A flang/test/Lower/fsave-main-program.f90
M flang/test/Lower/vector-subscript-io.f90
A flang/test/Parser/OpenMP/compiler-directive-continuation.f90
M flang/test/Semantics/cuf10.cuf
M flang/test/Transforms/stack-arrays.fir
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/config/baremetal/config.json
A libc/config/gpu/amdgpu/config.json
A libc/config/gpu/amdgpu/entrypoints.txt
A libc/config/gpu/amdgpu/headers.txt
R libc/config/gpu/config.json
R libc/config/gpu/entrypoints.txt
R libc/config/gpu/headers.txt
A libc/config/gpu/nvptx/config.json
A libc/config/gpu/nvptx/entrypoints.txt
A libc/config/gpu/nvptx/headers.txt
M libc/docs/CMakeLists.txt
R libc/docs/headers/arpa/inet.rst
R libc/docs/headers/assert.rst
R libc/docs/headers/ctype.rst
R libc/docs/headers/errno.rst
R libc/docs/headers/fenv.rst
R libc/docs/headers/float.rst
R libc/docs/headers/inttypes.rst
R libc/docs/headers/locale.rst
R libc/docs/headers/setjmp.rst
R libc/docs/headers/signal.rst
R libc/docs/headers/stdbit.rst
R libc/docs/headers/stdio.rst
R libc/docs/headers/stdlib.rst
R libc/docs/headers/string.rst
R libc/docs/headers/strings.rst
R libc/docs/headers/sys/mman.rst
R libc/docs/headers/threads.rst
R libc/docs/headers/uchar.rst
R libc/docs/headers/wchar.rst
R libc/docs/headers/wctype.rst
M libc/include/CMakeLists.txt
M libc/include/__llvm-libc-common.h
M libc/include/arpa/inet.yaml
M libc/include/assert.yaml
M libc/include/complex.yaml
M libc/include/ctype.yaml
M libc/include/dirent.yaml
M libc/include/dlfcn.yaml
M libc/include/elf.yaml
M libc/include/errno.yaml
M libc/include/fcntl.yaml
M libc/include/features.yaml
M libc/include/fenv.yaml
M libc/include/float.yaml
M libc/include/inttypes.yaml
M libc/include/limits.yaml
M libc/include/link.yaml
M libc/include/locale.yaml
M libc/include/malloc.yaml
M libc/include/math.yaml
M libc/include/pthread.yaml
M libc/include/sched.yaml
M libc/include/search.yaml
M libc/include/setjmp.yaml
M libc/include/signal.yaml
M libc/include/spawn.yaml
M libc/include/stdbit.yaml
M libc/include/stdckdint.yaml
M libc/include/stdfix.yaml
M libc/include/stdint.yaml
M libc/include/stdio.yaml
M libc/include/stdlib.yaml
M libc/include/string.yaml
M libc/include/strings.yaml
M libc/include/sys/auxv.yaml
M libc/include/sys/epoll.yaml
M libc/include/sys/ioctl.yaml
M libc/include/sys/mman.yaml
M libc/include/sys/prctl.yaml
M libc/include/sys/random.yaml
M libc/include/sys/resource.yaml
M libc/include/sys/select.yaml
M libc/include/sys/sendfile.yaml
M libc/include/sys/socket.yaml
M libc/include/sys/stat.yaml
M libc/include/sys/statvfs.yaml
M libc/include/sys/syscall.yaml
M libc/include/sys/time.yaml
M libc/include/sys/types.yaml
M libc/include/sys/utsname.yaml
M libc/include/sys/wait.yaml
M libc/include/termios.yaml
M libc/include/threads.yaml
M libc/include/time.yaml
M libc/include/uchar.yaml
M libc/include/unistd.yaml
M libc/include/wchar.yaml
M libc/src/__support/GPU/CMakeLists.txt
R libc/src/__support/GPU/amdgpu/CMakeLists.txt
R libc/src/__support/GPU/amdgpu/utils.h
R libc/src/__support/GPU/generic/CMakeLists.txt
R libc/src/__support/GPU/generic/utils.h
R libc/src/__support/GPU/nvptx/CMakeLists.txt
R libc/src/__support/GPU/nvptx/utils.h
M libc/src/__support/GPU/utils.h
M libc/src/stdlib/qsort_pivot.h
M libc/src/time/gpu/clock.cpp
M libc/src/time/gpu/nanosleep.cpp
M libc/src/time/mktime.cpp
M libc/test/src/stdlib/SortingTest.h
M libc/utils/docgen/arpa/inet.yaml
A libc/utils/docgen/strings.yaml
M libc/utils/docgen/sys/mman.yaml
M libc/utils/hdrgen/README.rst
M libc/utils/hdrgen/header.py
A libc/utils/hdrgen/main.py
M libc/utils/hdrgen/tests/input/test_small.yaml
M libc/utils/hdrgen/tests/test_integration.py
M libc/utils/hdrgen/yaml_to_classes.py
M libcxx/docs/Hardening.rst
M libcxx/docs/TestingLibcxx.rst
M libcxx/include/__vector/vector_bool.h
M libcxx/include/forward_list
M libcxx/src/experimental/tzdb.cpp
M libcxx/src/filesystem/operations.cpp
M libcxx/src/include/overridable_function.h
M libcxx/src/new.cpp
M libcxx/test/benchmarks/numeric/gcd.bench.cpp
A libcxx/test/libcxx/containers/sequences/forwardlist/assert.pass.cpp
M libcxx/test/std/atomics/atomics.ref/exchange.pass.cpp
A libcxx/test/std/containers/sequences/vector.bool/at.pass.cpp
A libcxx/test/std/containers/sequences/vector.bool/at_const.pass.cpp
A libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.copy_file/copy_file_procfs.pass.cpp
A libcxx/utils/libcxx-benchmark-json
A libcxx/utils/libcxx-compare-benchmarks
M libcxxabi/src/stdlib_new_delete.cpp
M lld/COFF/Driver.h
M lld/ELF/SymbolTable.cpp
M lld/MachO/ConcatOutputSection.h
M lld/MachO/MapFile.cpp
M lld/MachO/OutputSection.h
M lld/test/MachO/arm64-thunks.s
M lldb/bindings/python/python-swigsafecast.swig
M lldb/include/lldb/API/SBModule.h
M lldb/include/lldb/Core/Progress.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Core/Progress.cpp
M lldb/source/Host/openbsd/Host.cpp
M lldb/source/Host/posix/FileSystemPosix.cpp
M lldb/source/Plugins/InstrumentationRuntime/ASanLibsanitizers/InstrumentationRuntimeASanLibsanitizers.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/unittests/Core/ProgressReportTest.cpp
M llvm/Maintainers.md
M llvm/cmake/modules/AddLLVM.cmake
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/GettingStarted.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/STLFunctionalExtras.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/BinaryFormat/ELF.h
A llvm/include/llvm/BinaryFormat/ELFRelocs/RISCV_nonstandard.def
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/DebugInfo/GSYM/FunctionInfo.h
M llvm/include/llvm/DebugInfo/GSYM/GsymReader.h
M llvm/include/llvm/DebugInfo/GSYM/MergedFunctionsInfo.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
R llvm/include/llvm/IR/NVVMIntrinsicFlags.h
A llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/include/llvm/Support/Recycler.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/include/llvm/Transforms/Instrumentation/TypeSanitizer.h
M llvm/include/llvm/Transforms/Utils/FunctionImportUtils.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/include/module.modulemap
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/MIRSampleProfile.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp
M llvm/lib/DebugInfo/GSYM/GsymReader.cpp
M llvm/lib/DebugInfo/GSYM/MergedFunctionsInfo.cpp
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/TableGen/TGParser.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMSystemRegister.td
M llvm/lib/Target/ARM/Utils/ARMBaseInfo.cpp
M llvm/lib/Target/ARM/Utils/ARMBaseInfo.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXCtorDtorLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
A llvm/lib/Target/RISCV/RISCVPfmCounters.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
R llvm/lib/Target/SPIRV/SPIRVDuplicatesTracker.cpp
M llvm/lib/Target/SPIRV/SPIRVDuplicatesTracker.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AArch64/cast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-extract.ll
M llvm/test/Analysis/CostModel/X86/alternate-shuffle-cost.ll
M llvm/test/Analysis/CostModel/X86/reduction.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-select-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-select-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-select-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-select.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splice.ll
M llvm/test/Analysis/CostModel/X86/shuffle-two-src-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-two-src-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-two-src-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-two-src.ll
M llvm/test/Analysis/CostModel/X86/vector-insert-value.ll
M llvm/test/Analysis/UniformityAnalysis/NVPTX/daorder.ll
M llvm/test/Analysis/UniformityAnalysis/NVPTX/diverge.ll
M llvm/test/Analysis/UniformityAnalysis/NVPTX/hidden_diverge.ll
M llvm/test/Analysis/UniformityAnalysis/NVPTX/irreducible.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-store-vector-bools.mir
M llvm/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/cvt-fp-int-fp.ll
M llvm/test/CodeGen/AArch64/machine-combiner.ll
A llvm/test/CodeGen/AArch64/reduce-or-opt.ll
M llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
M llvm/test/CodeGen/AArch64/round-fptosi-sat-scalar.ll
A llvm/test/CodeGen/AArch64/sme-intrinsics-state.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
A llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
A llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
A llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.mir
A llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-read.mir
A llvm/test/CodeGen/AMDGPU/remat-physreg-copy-subreg-extract-already-live-at-def-issue120970.mir
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/smed3.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
A llvm/test/CodeGen/AMDGPU/swdev502267-use-after-free-last-chance-recoloring-alloc-succeeds.mir
A llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll
M llvm/test/CodeGen/AMDGPU/umed3.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-meta-instructions.mir
A llvm/test/CodeGen/ARM/sink-store-pre-load-dependency.mir
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
M llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
M llvm/test/CodeGen/NVPTX/b52037.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bug21465.ll
M llvm/test/CodeGen/NVPTX/bug22322.ll
M llvm/test/CodeGen/NVPTX/bug26185.ll
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
A llvm/test/CodeGen/NVPTX/fabs-fneg-free.ll
M llvm/test/CodeGen/NVPTX/generic-to-nvvm.ll
M llvm/test/CodeGen/NVPTX/i1-array-global.ll
M llvm/test/CodeGen/NVPTX/i1-ext-load.ll
M llvm/test/CodeGen/NVPTX/i1-global.ll
M llvm/test/CodeGen/NVPTX/i1-param.ll
M llvm/test/CodeGen/NVPTX/intr-range.ll
M llvm/test/CodeGen/NVPTX/kernel-param-align.ll
M llvm/test/CodeGen/NVPTX/load-with-non-coherent-cache.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/lower-alloca.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/lower-ctor-dtor.ll
M llvm/test/CodeGen/NVPTX/lower-kernel-ptr-arg.ll
M llvm/test/CodeGen/NVPTX/maxclusterrank.ll
M llvm/test/CodeGen/NVPTX/noduplicate-syncthreads.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
M llvm/test/CodeGen/NVPTX/nvcl-param-align.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-opaque.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect.ll
M llvm/test/CodeGen/NVPTX/refl1.ll
M llvm/test/CodeGen/NVPTX/reg-copy.ll
M llvm/test/CodeGen/NVPTX/simple-call.ll
M llvm/test/CodeGen/NVPTX/surf-read-cuda.ll
M llvm/test/CodeGen/NVPTX/surf-read.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
M llvm/test/CodeGen/NVPTX/surf-write-cuda.ll
M llvm/test/CodeGen/NVPTX/surf-write.ll
M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
M llvm/test/CodeGen/NVPTX/tex-read.ll
M llvm/test/CodeGen/NVPTX/unreachable.ll
M llvm/test/CodeGen/PowerPC/ppc32-pic-large.ll
M llvm/test/CodeGen/RISCV/GlobalISel/add-imm.ll
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/combine-neg-abs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/combine.ll
M llvm/test/CodeGen/RISCV/GlobalISel/double-zfa.ll
M llvm/test/CodeGen/RISCV/GlobalISel/freeze.ll
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-add-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-addo-subo-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-const-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctlz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ctpop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sat-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-sub-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/scmp.ll
M llvm/test/CodeGen/RISCV/GlobalISel/ucmp.ll
M llvm/test/CodeGen/RISCV/add_sext_shl_constant.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
A llvm/test/CodeGen/RISCV/rvv/vlopt-volatile-ld.mir
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
M llvm/test/CodeGen/SPIRV/AtomicCompareExchange.ll
M llvm/test/CodeGen/SPIRV/event-zero-const.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-simple-hierarchy.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_const.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-addrcast.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_shader_clock/shader_clock.ll
A llvm/test/CodeGen/SPIRV/global-var-name-linkage.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cross.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/distance.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/length.ll
M llvm/test/CodeGen/SPIRV/iaddcarry-builtin.ll
M llvm/test/CodeGen/SPIRV/image-unoptimized.ll
M llvm/test/CodeGen/SPIRV/isubborrow-builtin.ll
M llvm/test/CodeGen/SPIRV/keep-tracked-const.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshl.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshr.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
M llvm/test/CodeGen/SPIRV/logical-access-chain.ll
M llvm/test/CodeGen/SPIRV/opencl/degrees.ll
A llvm/test/CodeGen/SPIRV/opencl/distance.ll
M llvm/test/CodeGen/SPIRV/opencl/radians.ll
M llvm/test/CodeGen/SPIRV/pointers/PtrCast-null-in-OpSpecConstantOp.ll
M llvm/test/CodeGen/SPIRV/pointers/struct-opaque-pointers.ll
M llvm/test/CodeGen/SPIRV/transcoding/SampledImage.ll
M llvm/test/CodeGen/SPIRV/transcoding/cl-types.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll
M llvm/test/CodeGen/SPIRV/transcoding/sub_group_non_uniform_arithmetic.ll
M llvm/test/CodeGen/SPIRV/unnamed-global.ll
M llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll
A llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
A llvm/test/CodeGen/X86/uint_to_half.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
M llvm/test/DebugInfo/NVPTX/debug-addr-class.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/ExecutionEngine/JITLink/AArch32/ELF_data_alignment.s
M llvm/test/ExecutionEngine/JITLink/AArch64/ELF_ehframe.s
M llvm/test/ExecutionEngine/JITLink/AArch64/MachO_compact_unwind.s
M llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ehframe.s
M llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_loongarch64_ehframe.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_call.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_call_rvc.s
M llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s
M llvm/test/ExecutionEngine/JITLink/ppc64/ELF_ppc64_ehframe.s
M llvm/test/ExecutionEngine/JITLink/ppc64/external_weak.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_abs.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_any.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_associative.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_exact_match.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_intervene.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_largest.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_noduplicate.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_offset.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_same_size.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_comdat_weak.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_common_symbol.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_duplicate_externals.test
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_file_debug.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_static_var.s
M llvm/test/ExecutionEngine/JITLink/x86-64/COFF_weak_external.s
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_debug_section_lifetime_is_NoAlloc.yaml
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_basic.s
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_large_static_personality_encodings.s
M llvm/test/ExecutionEngine/JITLink/x86-64/LocalDependencyPropagation.s
M llvm/test/ExecutionEngine/JITLink/x86-64/MachO-check-dwarf-filename.s
M llvm/test/ExecutionEngine/JITLink/x86-64/MachO_compact_unwind.s
M llvm/test/ExecutionEngine/JITLink/x86-64/MachO_cstring_section_alignment.s
M llvm/test/ExecutionEngine/JITLink/x86-64/MachO_cstring_section_splitting.s
M llvm/test/ExecutionEngine/JITLink/x86-64/MachO_non_subsections_via_symbols.s
M llvm/test/Instrumentation/TypeSanitizer/access-with-offset.ll
M llvm/test/Instrumentation/TypeSanitizer/alloca-only.ll
M llvm/test/Instrumentation/TypeSanitizer/alloca.ll
M llvm/test/Instrumentation/TypeSanitizer/anon.ll
M llvm/test/Instrumentation/TypeSanitizer/basic-nosan.ll
M llvm/test/Instrumentation/TypeSanitizer/basic.ll
M llvm/test/Instrumentation/TypeSanitizer/byval.ll
M llvm/test/Instrumentation/TypeSanitizer/globals.ll
M llvm/test/Instrumentation/TypeSanitizer/invalid-metadata.ll
M llvm/test/Instrumentation/TypeSanitizer/memintrinsics.ll
M llvm/test/Instrumentation/TypeSanitizer/nosanitize.ll
M llvm/test/Instrumentation/TypeSanitizer/sanitize-no-tbaa.ll
M llvm/test/Instrumentation/TypeSanitizer/swifterror.ll
A llvm/test/Linker/Inputs/libdevice-with-wrong-dl.ll
M llvm/test/Linker/cuda-libdevice.ll
M llvm/test/MC/AArch64/armv9.6a-rme-gpc3.s
M llvm/test/MC/AMDGPU/gfx1030_err.s
M llvm/test/MC/AMDGPU/gfx10_asm_smem_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_smem_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_mimg_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_smem_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AArch64/armv9.6a-rme-gpc3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt
M llvm/test/MC/RISCV/custom_reloc.s
A llvm/test/MC/RISCV/xqcicm-invalid.s
A llvm/test/MC/RISCV/xqcicm-valid.s
M llvm/test/TableGen/template-args.td
A llvm/test/ThinLTO/X86/memprof-recursive.ll
A llvm/test/Transforms/CodeGenPrepare/AArch64/reduce-or-opt.ll
M llvm/test/Transforms/InstCombine/add-shl-sdiv-to-srem.ll
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/bit-checks.ll
M llvm/test/Transforms/InstCombine/compare-signs.ll
M llvm/test/Transforms/InstCombine/icmp-add.ll
M llvm/test/Transforms/InstCombine/onehot_merge.ll
M llvm/test/Transforms/InstCombine/phi.ll
M llvm/test/Transforms/InstCombine/select-divrem.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/xor-and-or.ll
A llvm/test/Transforms/InstSimplify/const-fold-nvvm-f2i-d2i.ll
A llvm/test/Transforms/InstSimplify/const-fold-nvvm-f2ll-d2ll.ll
A llvm/test/Transforms/LoadStoreVectorizer/X86/massive_indirection.ll
M llvm/test/Transforms/LoopStrengthReduce/NVPTX/trunc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blend-any-of-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
A llvm/test/Transforms/LoopVectorize/uncountable-single-exit-loops.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
A llvm/test/Transforms/MemProfContextDisambiguation/recursive.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/block_scaling_decompr_8bit.ll
M llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
M llvm/test/Transforms/PhaseOrdering/X86/hsub.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/long-gep-chains.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/speculative-slsr.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
M llvm/test/Transforms/VectorCombine/X86/extract-fneg-insert.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-cmps.ll
M llvm/test/tools/UpdateTestChecks/lit.local.cfg
M llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-merged-funcs-dwarf.yaml
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/ARM/cortex-a57-memory-instructions.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/div.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP400/mul-cpop.s
A llvm/test/tools/llvm-profgen/context-depth.test
M llvm/test/tools/llvm-profgen/recursion-compression-pseudoprobe.test
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-gsymutil/Opts.td
M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-link/llvm-link.cpp
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
M llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/RecyclerTest.cpp
M llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/unittests/tools/llvm-exegesis/CMakeLists.txt
A llvm/unittests/tools/llvm-exegesis/RISCV/CMakeLists.txt
A llvm/unittests/tools/llvm-exegesis/RISCV/SnippetGeneratorTest.cpp
A llvm/unittests/tools/llvm-exegesis/RISCV/TargetTest.cpp
A llvm/unittests/tools/llvm-exegesis/RISCV/TestBase.h
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
M mlir/CMakeLists.txt
M mlir/docs/Bindings/Python.md
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/IR/OperationSupport.h
M mlir/include/mlir/Transforms/LocationSnapshot.h
M mlir/include/mlir/Transforms/Passes.td
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/Affine/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeConv2D.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/LocationSnapshot.cpp
M mlir/test/Conversion/AffineToStandard/lower-affine-to-vector.mlir
M mlir/test/Conversion/AffineToStandard/lower-affine.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-hip.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-opencl.mlir
M mlir/test/Conversion/GPUToSPIRV/printf.mlir
M mlir/test/Conversion/MemRefToLLVM/expand-then-convert-to-llvm.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Affine/value-bounds-op-interface-impl.mlir
M mlir/test/Dialect/GPU/indirect-device-func-call.mlir
M mlir/test/Dialect/GPU/ops.mlir
M mlir/test/Dialect/GPU/test-nvvm-pipeline.mlir
M mlir/test/Dialect/LLVM/lower-to-llvm-e2e-with-target-tag.mlir
M mlir/test/Dialect/LLVM/lower-to-llvm-e2e-with-top-level-named-sequence.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/quant-test.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-conv2d.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Integration/GPU/CUDA/assert.mlir
M mlir/test/Integration/GPU/CUDA/printf.mlir
M mlir/test/Integration/GPU/CUDA/sm90/cga_cluster.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
M mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir
M mlir/test/Integration/GPU/ROCM/printf.mlir
M mlir/test/Target/LLVMIR/Import/metadata-alias-scopes.ll
M mlir/test/Target/LLVMIR/attribute-alias-scopes.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Transforms/location-snapshot.mlir
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
M mlir/test/python/execution_engine.py
A mlir/test/tblgen-lsp-server/templ-arg-check.test
M polly/include/polly/CodeGen/BlockGenerators.h
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
A polly/test/CodeGen/reggen_domtree_crash.ll
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
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