[all-commits] [llvm/llvm-project] 068d33: AMDGPU: Reduce 64-bit add width if high bits are k...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/rocm-llvm-237/dag-combine-add64-const-known-zero
  Home:   https://github.com/llvm/llvm-project
  Commit: 068d33456ce13505ab9f273b9f8be6bebaa4c67b
      https://github.com/llvm/llvm-project/commit/068d33456ce13505ab9f273b9f8be6bebaa4c67b
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-08 (Wed, 08 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
    M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
    M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
    M llvm/test/CodeGen/AMDGPU/sub64-low-32-bits-known-zero.ll

  Log Message:
  -----------
  AMDGPU: Reduce 64-bit add width if high bits are known 0

If one of the inputs has all 0 bits, the low part cannot
carry and we can just pass through the original value.

Add case: https://alive2.llvm.org/ce/z/TNc7hf
Sub case: https://alive2.llvm.org/ce/z/AjH2-J

We could do this in the general case with computeKnownBits,
but add is so common this could be potentially expensive for
something which will fire infrequently.

One potential concern is this could break the 64-bit add
we expect to see for addressing mode matching, but these
constants shouldn't appear often in addressing expressions.
One test for large offset expressions changes but isn't worse.

Fixes https://github.com/ROCm/llvm-project/issues/237


  Commit: 047d10e20a0989b4f9a06dea92eabefaffd0fdde
      https://github.com/llvm/llvm-project/commit/047d10e20a0989b4f9a06dea92eabefaffd0fdde
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-08 (Wed, 08 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
    M llvm/test/CodeGen/AMDGPU/sub64-low-32-bits-known-zero.ll

  Log Message:
  -----------
  XXX - Use computeKnownBits for the general case


  Commit: 9a761beefbaf9eabf4d7f4750819ba418aa2f720
      https://github.com/llvm/llvm-project/commit/9a761beefbaf9eabf4d7f4750819ba418aa2f720
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-08 (Wed, 08 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
    M llvm/test/CodeGen/AMDGPU/sub64-low-32-bits-known-zero.ll

  Log Message:
  -----------
  Revert "XXX - Use computeKnownBits for the general case"

This reverts commit e3d348374fa67b6daa09d5838d09eed8fe0dc083.


Compare: https://github.com/llvm/llvm-project/compare/068d33456ce1%5E...9a761beefbaf

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