[all-commits] [llvm/llvm-project] f6365a: AMDGPU: Fix assert on physreg MUBUF rsrc operand (...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f6365a47a1ad9ab6d432f6e40d14a11419e21282
      https://github.com/llvm/llvm-project/commit/f6365a47a1ad9ab6d432f6e40d14a11419e21282
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-07 (Tue, 07 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    A llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll

  Log Message:
  -----------
  AMDGPU: Fix assert on physreg MUBUF rsrc operand (#120815)

The stack case uses a physical register and should not ordinarily
reach here, but strange things happen at -O0. The testcase still
errors because we do not yet attempt to handle arbitrary dynamic
sized allocas yet.

Fixes: SWDEV-503538



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