[all-commits] [llvm/llvm-project] c8d435: [RISCV] Use ISD::XOR instead of RISCVISD::VMXOR_VL...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c8d435f9afac73d31b53cc120678f60ac4922f97
      https://github.com/llvm/llvm-project/commit/c8d435f9afac73d31b53cc120678f60ac4922f97
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-01-06 (Mon, 06 Jan 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll

  Log Message:
  -----------
  [RISCV] Use ISD::XOR instead of RISCVISD::VMXOR_VL in lowerVectorMaskVecReduction of scalable ISD::VECREDUCE_AND (#121812)

This allows combining the XOR with earlier ISD::ANDs inserted by type
legalization.



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