[all-commits] [llvm/llvm-project] dc0e25: [AMDGPU] Remove Dwarf encodings for subregisters (...

[Emma Pilkington via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dc0e258fe4d9d97cefdfeefc932e1e9e15dc542d
      https://github.com/llvm/llvm-project/commit/dc0e258fe4d9d97cefdfeefc932e1e9e15dc542d
  Author: Emma Pilkington <emma.pilkington95 at gmail.com>
  Date:   2025-01-06 (Mon, 06 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
    M llvm/test/CodeGen/AMDGPU/waitcnt-meta-instructions.mir
    M llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
    M llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp

  Log Message:
  -----------
  [AMDGPU] Remove Dwarf encodings for subregisters (#117891)

Previously, registers and subregisters mapped to the same Dwarf
encoding. We don't really have any way to refer to subregisters directly
from Dwarf, the expression emitter should instead use DW_OPs to stencil
out the subregister from the whole register. This was also confusing
tools that need to map back to the llvm reg (e.g. dwarfdump), since
getLLVMRegNum() would arbitrarily return the _LO16 register.



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