[all-commits] [llvm/llvm-project] 2d53ea: [AArch64][GlobalISel] Fix legalization for <4 x i1...

[Amara Emerson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2d53eaff4aee73605170ce9910cde68fa7a300b2
      https://github.com/llvm/llvm-project/commit/2d53eaff4aee73605170ce9910cde68fa7a300b2
  Author: Amara Emerson <amara at apple.com>
  Date:   2025-01-06 (Mon, 06 Jan 2025)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Fix legalization for <4 x i1> vector stores.

This case is different from the earlier <8 x i1> case handled because it triggers
a legalization failure in lowerStore() that's intended for scalar code.

It also was triggering incorrect bitcast actions in the AArch64 rules that weren't
expecting truncating stores.

With these two fixed, more cases are handled. The code is still bad, including
some missing load promotion in our combiners that result in dead stores hanging
around at the end of codegen. Again, we can fix these in separate changes.

Reviewers: davemgreen, madhur13490, topperc, arsenm

Reviewed By: davemgreen

Pull Request: https://github.com/llvm/llvm-project/pull/121185



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