[all-commits] [llvm/llvm-project] d34f7e: DAG: Fix assuming f16 is the only 16-bit fp type i...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d34f7ead886aaaca50f672c47e4f97e078d574db
      https://github.com/llvm/llvm-project/commit/d34f7ead886aaaca50f672c47e4f97e078d574db
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-06 (Mon, 06 Jan 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    A llvm/test/CodeGen/AMDGPU/issue121601-combine-concat-vectors-assumes-f16.ll

  Log Message:
  -----------
  DAG: Fix assuming f16 is the only 16-bit fp type in concat vector combine (#121637)

This would see if there are mixed integer and FP types and pick an
equivalently sized FP type to use as the vector element type, and only
cast if there were mixed integers. We need to insert a cast if the types
are mixed, which may include different FP types.

Fixes #121601



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