[all-commits] [llvm/llvm-project] 684052: Revert "[RISCV][CG]Use processShuffleMasks for per...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 684052173971868aab0e6b62d7770a6299e84141
      https://github.com/llvm/llvm-project/commit/684052173971868aab0e6b62d7770a6299e84141
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-01-01 (Wed, 01 Jan 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll

  Log Message:
  -----------
  Revert "[RISCV][CG]Use processShuffleMasks for per-register shuffles"

This reverts commit b8952d4b1b0c73bf39d6440ad3166a088ced563f.

spec x264 fails to build in all VLS configurations, with the assertion
failure: clang: ../llvm-project/llvm/lib/Target/RISCV/RISCVISelLowering.cpp:5246: llvm::SDValue lowerShuffleViaVRegSplitting(llvm::ShuffleVectorSDNode*, llvm::SelectionDAG&, const llvm::RISCVSubtarget&): Assertion `RegCnt == NumOfDestRegs && "Whole vector must be processed"' failed.

I can reduce a failing piece of IR, but the failure appears pretty
broad, so I suspect any reasonable vls build will hit it.



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