[all-commits] [llvm/llvm-project] 09712f: AMDGPU: Fix assert on physreg MUBUF rsrc operand

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/swdev503538/fix-assert-on-mubuf-physreg-srd
  Home:   https://github.com/llvm/llvm-project
  Commit: 09712f4b2007e10185ddf6fe3a06b9878615fe41
      https://github.com/llvm/llvm-project/commit/09712f4b2007e10185ddf6fe3a06b9878615fe41
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-12-21 (Sat, 21 Dec 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    A llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll

  Log Message:
  -----------
  AMDGPU: Fix assert on physreg MUBUF rsrc operand

The stack case uses a physical register and should not ordinarily
reach here, but strange things happen at -O0. The testcase still
errors because we do not yet attempt to handle arbitrary dynamic
sized allocas yet.

Fixes: SWDEV-503538



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