[all-commits] [llvm/llvm-project] d8a5fa: [MC][Mips] Add MipsWinCOFFObjectWriter/MipsWinCOFF...

[Hervé Poussineau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d8a5fae6913a0f6c7e3c814315c1a11fcfd609a1
      https://github.com/llvm/llvm-project/commit/d8a5fae6913a0f6c7e3c814315c1a11fcfd609a1
  Author: Hervé Poussineau <hpoussin at reactos.org>
  Date:   2024-12-20 (Fri, 20 Dec 2024)

  Changed paths:
    M llvm/lib/Target/Mips/MCTargetDesc/CMakeLists.txt
    M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
    A llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFObjectWriter.cpp
    A llvm/lib/Target/Mips/MCTargetDesc/MipsWinCOFFStreamer.cpp
    M llvm/lib/Target/Mips/MipsTargetMachine.cpp
    M llvm/test/CodeGen/Mips/Fast-ISel/br1.ll
    M llvm/test/CodeGen/Mips/Fast-ISel/icmpbr1.ll
    M llvm/test/CodeGen/Mips/addressing-mode.ll
    M llvm/test/CodeGen/Mips/atomic-min-max-64.ll
    M llvm/test/CodeGen/Mips/atomic-min-max.ll
    M llvm/test/CodeGen/Mips/brconeq.ll
    M llvm/test/CodeGen/Mips/brconeqk.ll
    M llvm/test/CodeGen/Mips/brconeqz.ll
    M llvm/test/CodeGen/Mips/brconge.ll
    M llvm/test/CodeGen/Mips/brcongt.ll
    M llvm/test/CodeGen/Mips/brconle.ll
    M llvm/test/CodeGen/Mips/brconlt.ll
    M llvm/test/CodeGen/Mips/brconne.ll
    M llvm/test/CodeGen/Mips/brconnek.ll
    M llvm/test/CodeGen/Mips/brconnez.ll
    M llvm/test/CodeGen/Mips/cconv/memory-layout.ll
    M llvm/test/CodeGen/Mips/cfi_offset.ll
    M llvm/test/CodeGen/Mips/dins.ll
    M llvm/test/CodeGen/Mips/dsp-r1.ll
    M llvm/test/CodeGen/Mips/eh-return32.ll
    M llvm/test/CodeGen/Mips/eh-return64.ll
    M llvm/test/CodeGen/Mips/emit-big-cst.ll
    M llvm/test/CodeGen/Mips/ex2.ll
    M llvm/test/CodeGen/Mips/fpbr.ll
    M llvm/test/CodeGen/Mips/frame-address.ll
    M llvm/test/CodeGen/Mips/jumptable_labels.ll
    M llvm/test/CodeGen/Mips/llvm-ir/add.ll
    M llvm/test/CodeGen/Mips/llvm-ir/indirectbr.ll
    M llvm/test/CodeGen/Mips/llvm-ir/select-int.ll
    M llvm/test/CodeGen/Mips/load-store-left-right.ll
    M llvm/test/CodeGen/Mips/mcount.ll
    M llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-lbu16-lhu16-sb16-sh16.ll
    M llvm/test/CodeGen/Mips/mips64directive.ll
    M llvm/test/CodeGen/Mips/msa/2r.ll
    M llvm/test/CodeGen/Mips/msa/2r_vector_scalar.ll
    M llvm/test/CodeGen/Mips/msa/2rf.ll
    M llvm/test/CodeGen/Mips/msa/2rf_exup.ll
    M llvm/test/CodeGen/Mips/msa/2rf_float_int.ll
    M llvm/test/CodeGen/Mips/msa/2rf_fq.ll
    M llvm/test/CodeGen/Mips/msa/2rf_int_float.ll
    M llvm/test/CodeGen/Mips/msa/2rf_tq.ll
    M llvm/test/CodeGen/Mips/msa/3r-a.ll
    M llvm/test/CodeGen/Mips/msa/3r-b.ll
    M llvm/test/CodeGen/Mips/msa/3r-c.ll
    M llvm/test/CodeGen/Mips/msa/3r-d.ll
    M llvm/test/CodeGen/Mips/msa/3r-i.ll
    M llvm/test/CodeGen/Mips/msa/3r-m.ll
    M llvm/test/CodeGen/Mips/msa/3r-p.ll
    M llvm/test/CodeGen/Mips/msa/3r-s.ll
    M llvm/test/CodeGen/Mips/msa/3r-v.ll
    M llvm/test/CodeGen/Mips/msa/3r_4r.ll
    M llvm/test/CodeGen/Mips/msa/3r_4r_widen.ll
    M llvm/test/CodeGen/Mips/msa/3r_splat.ll
    M llvm/test/CodeGen/Mips/msa/3rf.ll
    M llvm/test/CodeGen/Mips/msa/3rf_4rf.ll
    M llvm/test/CodeGen/Mips/msa/3rf_4rf_q.ll
    M llvm/test/CodeGen/Mips/msa/3rf_exdo.ll
    M llvm/test/CodeGen/Mips/msa/3rf_float_int.ll
    M llvm/test/CodeGen/Mips/msa/3rf_int_float.ll
    M llvm/test/CodeGen/Mips/msa/3rf_q.ll
    M llvm/test/CodeGen/Mips/msa/arithmetic_float.ll
    M llvm/test/CodeGen/Mips/msa/bit.ll
    M llvm/test/CodeGen/Mips/msa/bitcast.ll
    M llvm/test/CodeGen/Mips/msa/compare.ll
    M llvm/test/CodeGen/Mips/msa/compare_float.ll
    M llvm/test/CodeGen/Mips/msa/elm_copy.ll
    M llvm/test/CodeGen/Mips/msa/elm_cxcmsa.ll
    M llvm/test/CodeGen/Mips/msa/elm_insv.ll
    M llvm/test/CodeGen/Mips/msa/elm_move.ll
    M llvm/test/CodeGen/Mips/msa/elm_shift_slide.ll
    M llvm/test/CodeGen/Mips/msa/endian.ll
    M llvm/test/CodeGen/Mips/msa/frameindex.ll
    M llvm/test/CodeGen/Mips/msa/i10.ll
    M llvm/test/CodeGen/Mips/msa/i5-a.ll
    M llvm/test/CodeGen/Mips/msa/i5-c.ll
    M llvm/test/CodeGen/Mips/msa/i5-m.ll
    M llvm/test/CodeGen/Mips/msa/i5_ld_st.ll
    M llvm/test/CodeGen/Mips/msa/i8.ll
    M llvm/test/CodeGen/Mips/msa/remat-ldi.ll
    M llvm/test/CodeGen/Mips/msa/shift-dagcombine.ll
    M llvm/test/CodeGen/Mips/msa/shift_constant_pool.ll
    M llvm/test/CodeGen/Mips/msa/special.ll
    M llvm/test/CodeGen/Mips/msa/spill.ll
    M llvm/test/CodeGen/Mips/msa/vec.ll
    M llvm/test/CodeGen/Mips/msa/vecs10.ll
    M llvm/test/CodeGen/Mips/octeon.ll
    M llvm/test/CodeGen/Mips/prevent-hoisting.ll
    M llvm/test/CodeGen/Mips/selTBteqzCmpi.ll
    M llvm/test/CodeGen/Mips/selTBtnezCmpi.ll
    M llvm/test/CodeGen/Mips/selTBtnezSlti.ll
    M llvm/test/CodeGen/Mips/seleq.ll
    M llvm/test/CodeGen/Mips/seleqk.ll
    M llvm/test/CodeGen/Mips/selgek.ll
    M llvm/test/CodeGen/Mips/selgt.ll
    M llvm/test/CodeGen/Mips/selle.ll
    M llvm/test/CodeGen/Mips/selltk.ll
    M llvm/test/CodeGen/Mips/selne.ll
    M llvm/test/CodeGen/Mips/selnek.ll
    M llvm/test/CodeGen/Mips/selpat.ll
    M llvm/test/CodeGen/Mips/unalignedload.ll
    M llvm/test/DebugInfo/Mips/tls.ll
    A llvm/test/MC/Mips/coff-basic.ll
    A llvm/test/MC/Mips/coff-relocs.ll

  Log Message:
  -----------
  [MC][Mips] Add MipsWinCOFFObjectWriter/MipsWinCOFFStreamer (#114611)

llc is now able to create MIPS COFF files for simple cases.



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