[all-commits] [llvm/llvm-project] 411184: [BOLT] Correctly print preferred disassembly for a...

[Kristof Beyls via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4111841f88eeca184e833e3643c5bf1dca6f7014
      https://github.com/llvm/llvm-project/commit/4111841f88eeca184e833e3643c5bf1dca6f7014
  Author: Kristof Beyls <kristof.beyls at arm.com>
  Date:   2024-12-20 (Fri, 20 Dec 2024)

  Changed paths:
    M bolt/lib/Core/BinaryContext.cpp
    M bolt/test/RISCV/call-annotations.s
    M bolt/test/RISCV/relax.s
    M bolt/test/RISCV/reloc-branch.s
    M bolt/test/RISCV/reloc-jal.s

  Log Message:
  -----------
  [BOLT] Correctly print preferred disassembly for annotated instructions (#120564)

This patch makes sure that `BinaryContext::printInstruction` prints the
preferred disassembly. Preferred disassembly only gets printed when
there are no annotations on the MCInst. Therefore, this patch
temporarily removes the annotations before printing it.

A few examples of before and after on AArch64 instructions are as
follows:

```
  BEFORE                     AFTER
                             (preferred disassembly)

  ret   x30                  ret
  orr   x30, xzr, x0         mov   x30, x0
  hint  #29                  autiasp
  hint  #12                  autia1716
```

Clearly, the preferred disassembly is easier for developers to read, and
is the disassembly that tools should be printing.

This patch is motivated as part of future work on the
llvm-bolt-binary-analysis tool, making sure that the reports it prints
do use preferred disassembly.

This patch was cherry-picked from
https://github.com/kbeyls/llvm-project/tree/bolt-gadget-scanner-prototype.

In this current patch, this only affects existing RISCV test cases.

This patch also does improve test cases in future patches that will
introduce a binary analysis for llvm-bolt-binary-analysis that checks
for correct application of pac-ret (pointer authentication on return
addresses).



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