[all-commits] [llvm/llvm-project] f334db: [llvm][CodeGen] Intrinsic `llvm.powi.*` code gen f...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Thu Dec 19 16:06:18 PST 2024
Branch: refs/heads/users/vitalybuka/spr/boundschecking-add-support-for-runtime-handlers
Home: https://github.com/llvm/llvm-project
Commit: f334db92be168876b618db72dc93078ce23ffa89
https://github.com/llvm/llvm-project/commit/f334db92be168876b618db72dc93078ce23ffa89
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
A llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
A llvm/test/CodeGen/LoongArch/lsx/fpowi.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpowi.ll
Log Message:
-----------
[llvm][CodeGen] Intrinsic `llvm.powi.*` code gen for vector arguments (#118242)
Scalarize vector FPOWI instead of promoting the type. This allows the
scalar FPOWIs to be visited and converted to libcalls before promoting
the type.
FIXME: This should be done in LegalizeVectorOps/LegalizeDAG, but call
lowering needs the unpromoted EVT.
Without this patch, in some backends, such as RISCV64 and LoongArch64,
the i32 type is illegal and will be promoted. This causes exponent type
check to fail when ISD::FPOWI node generates a libcall.
Fix https://github.com/llvm/llvm-project/issues/118079
Commit: 60a2f32cf5ce75c9a2511d7fc2b0f24699605912
https://github.com/llvm/llvm-project/commit/60a2f32cf5ce75c9a2511d7fc2b0f24699605912
Author: Thurston Dang <thurston at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/Driver/sanitizer-ld.c
M compiler-rt/test/hwasan/TestCases/sizes.cpp
Log Message:
-----------
Revert "[driver] Fix sanitizer libc++ runtime linking (#120370)"
This reverts commit 9af5de320b77d3757ea2b7e3d85c67f88dfbabb5.
Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/24/builds/3394/steps/10/logs/stdio)
"Unexpectedly Passed Tests (1):
llvm-libc++-shared.cfg.in :: libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp"
Commit: ffff7bb582a39c5444ce1e43fd272a35cb87498d
https://github.com/llvm/llvm-project/commit/ffff7bb582a39c5444ce1e43fd272a35cb87498d
Author: Thurston Dang <thurston at google.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/SanitizerArgs.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/CodeGen/ubsan-trap-debugloc.c
M clang/test/CodeGen/ubsan-trap-merge.c
M clang/test/Driver/fsanitize.c
Log Message:
-----------
Reapply "[ubsan] Add -fsanitize-merge (and -fno-sanitize-merge) (#120…464)" (#120511)
This reverts commit 2691b964150c77a9e6967423383ad14a7693095e. This
reapply fixes the buildbot breakage of the original patch, by updating
clang/test/CodeGen/ubsan-trap-debugloc.c to specify -fsanitize-merge
(the default, which is merge, is applied by the driver but not
clang_cc1).
This reapply also expands clang/test/CodeGen/ubsan-trap-merge.c.
----
Original commit message:
'-mllvm -ubsan-unique-traps'
(https://github.com/llvm/llvm-project/pull/65972) applies to all UBSan
checks. This patch introduces -fsanitize-merge (defaults to on,
maintaining the status quo behavior) and -fno-sanitize-merge (equivalent
to '-mllvm -ubsan-unique-traps'), with the option to selectively
applying non-merged handlers to a subset of UBSan checks (e.g.,
-fno-sanitize-merge=bool,enum).
N.B. we do not use "trap" in the argument name since
https://github.com/llvm/llvm-project/pull/119302 has generalized
-ubsan-unique-traps to work for non-trap modes (min-rt and regular rt).
This patch does not remove the -ubsan-unique-traps flag; that will
override -f(no-)sanitize-merge.
Commit: 4530273d7ce8615d2773bbdffce8e2d2fa9dceee
https://github.com/llvm/llvm-project/commit/4530273d7ce8615d2773bbdffce8e2d2fa9dceee
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][cuda] Allocate descriptor in managed memory when emboxing device memory (#120485)
When emboxing memory that comes from CUFMemAlloc, we need to allocate
the descriptor in manage memory as it might be passed to a kernel.
Commit: 89b34ec9ccb93bff5064227ac2424cc1bdf73b8d
https://github.com/llvm/llvm-project/commit/89b34ec9ccb93bff5064227ac2424cc1bdf73b8d
Author: Nico Weber <thakis at chromium.org>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/targets_with_exegesis.gni
A llvm/utils/gn/secondary/llvm/tools/llvm-exegesis/lib/RISCV/BUILD.gn
Log Message:
-----------
[gn] port 8e8692a5420370 (RISCV support for llvm-exegesis)
Commit: b56d1ec6cb8b5cb3ff46cba39a1049ecf3831afb
https://github.com/llvm/llvm-project/commit/b56d1ec6cb8b5cb3ff46cba39a1049ecf3831afb
Author: Peter Hawkins <phawkins at google.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M mlir/cmake/modules/MLIRDetectPythonEnv.cmake
M mlir/include/mlir/Bindings/Python/IRTypes.h
M mlir/include/mlir/Bindings/Python/NanobindAdaptors.h
M mlir/include/mlir/Bindings/Python/PybindAdaptors.h
M mlir/lib/Bindings/Python/Globals.h
M mlir/lib/Bindings/Python/IRAffine.cpp
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRInterfaces.cpp
M mlir/lib/Bindings/Python/IRModule.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/Bindings/Python/IRTypes.cpp
M mlir/lib/Bindings/Python/MainModule.cpp
A mlir/lib/Bindings/Python/NanobindUtils.h
M mlir/lib/Bindings/Python/Pass.cpp
M mlir/lib/Bindings/Python/Pass.h
R mlir/lib/Bindings/Python/PybindUtils.h
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/Bindings/Python/Rewrite.h
M mlir/python/CMakeLists.txt
M mlir/python/requirements.txt
M mlir/test/python/ir/symbol_table.py
M utils/bazel/WORKSPACE
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir python] Port Python core code to nanobind. (#120473)
Relands #118583, with a fix for Python 3.8 compatibility. It was not
possible to set the buffer protocol accessers via slots in Python 3.8.
Why? https://nanobind.readthedocs.io/en/latest/why.html says it better
than I can, but my primary motivation for this change is to improve MLIR
IR construction time from JAX.
For a complicated Google-internal LLM model in JAX, this change improves
the MLIR
lowering time by around 5s (out of around 30s), which is a significant
speedup for simply switching binding frameworks.
To a large extent, this is a mechanical change, for instance changing
`pybind11::` to `nanobind::`.
Notes:
* this PR needs Nanobind 2.4.0, because it needs a bug fix
(https://github.com/wjakob/nanobind/pull/806) that landed in that
release.
* this PR does not port the in-tree dialect extension modules. They can
be ported in a future PR.
* I removed the py::sibling() annotations from def_static and def_class
in `PybindAdapters.h`. These ask pybind11 to try to form an overload
with an existing method, but it's not possible to form mixed
pybind11/nanobind overloads this ways and the parent class is now
defined in nanobind. Better solutions may be possible here.
* nanobind does not contain an exact equivalent of pybind11's buffer
protocol support. It was not hard to add a nanobind implementation of a
similar API.
* nanobind is pickier about casting to std::vector<bool>, expecting that
the input is a sequence of bool types, not truthy values. In a couple of
places I added code to support truthy values during casting.
* nanobind distinguishes bytes (`nb::bytes`) from strings (e.g.,
`std::string`). This required nb::bytes overloads in a few places.
Commit: dc72ec808d97a83fe9d3c1889302067cbee24c91
https://github.com/llvm/llvm-project/commit/dc72ec808d97a83fe9d3c1889302067cbee24c91
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
Log Message:
-----------
[RISCV] Custom legalize vp.merge for mask vectors. (#120479)
The default legalization uses vmslt with a vector of XLen to compute a
mask. This doesn't work if the type isn't legal. For fixed vectors it
will scalarize. For scalable vectors it crashes the compiler.
This patch uses an alternate strategy that promotes the i1 vector to an
i8 vector and does the merge. I don't claim this to be the best
lowering. I wrote it quickly almost 3 years ago when a crash was
reported in our downstream.
Fixes #120405.
Commit: f0dcf3240dffe3767c7f3a2e2da5b92ae9fd1bef
https://github.com/llvm/llvm-project/commit/f0dcf3240dffe3767c7f3a2e2da5b92ae9fd1bef
Author: Nathan Chancellor <nathan at kernel.org>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Sema/tautological-pointer-comparison.c
Log Message:
-----------
[Sema] Fix tautological bounds check warning with -fwrapv (#120480)
The tautological bounds check warning added in #120222 does not take
into account whether signed integer overflow is well defined or not,
which could result in a developer removing a bounds check that may not
actually be always false because of different overflow semantics.
```c
int check(const int* foo, unsigned int idx)
{
return foo + idx < foo;
}
```
```
$ clang -O2 -c test.c
test.c:3:19: warning: pointer comparison always evaluates to false [-Wtautological-compare]
3 | return foo + idx < foo;
| ^
1 warning generated.
# Bounds check is eliminated without -fwrapv, warning was correct
$ llvm-objdump -dr test.o
...
0000000000000000 <check>:
0: 31 c0 xorl %eax, %eax
2: c3 retq
```
```
$ clang -O2 -fwrapv -c test.c
test.c:3:19: warning: pointer comparison always evaluates to false [-Wtautological-compare]
3 | return foo + idx < foo;
| ^
1 warning generated.
# Bounds check remains, warning was wrong
$ llvm-objdump -dr test.o
0000000000000000 <check>:
0: 89 f0 movl %esi, %eax
2: 48 8d 0c 87 leaq (%rdi,%rax,4), %rcx
6: 31 c0 xorl %eax, %eax
8: 48 39 f9 cmpq %rdi, %rcx
b: 0f 92 c0 setb %al
e: c3 retq
```
Commit: 1cc926b8b6976ac4a5a411eae564cfde2df1ef9d
https://github.com/llvm/llvm-project/commit/1cc926b8b6976ac4a5a411eae564cfde2df1ef9d
Author: Pavel Samolysov <samolisov at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/ScopedHashTableTest.cpp
Log Message:
-----------
[ADT] Add a unittest for the ScopedHashTable class (#120183)
The ScopedHashTable class is particularly used to develop string tables
for parsers and code convertors. For instance, the MLIRGen class from the
toy example for MLIR actively uses this class to define scopes for
declared variables. To demonstrate common use cases for the
ScopedHashTable class as well as to check its behavior in different
situations, the unittest has been added.
Signed-off-by: Pavel Samolysov <samolisov at gmail.com>
Commit: 76275c0c41739a30939afd1709174861a587a823
https://github.com/llvm/llvm-project/commit/76275c0c41739a30939afd1709174861a587a823
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
Log Message:
-----------
[gn build] Port 1cc926b8b697
Commit: fe2685303b215182b1acc5b6fb8be30c24bd6e8e
https://github.com/llvm/llvm-project/commit/fe2685303b215182b1acc5b6fb8be30c24bd6e8e
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a crash caused by commit f03bf8c45f43
Commit: c94ce0cca25229cd0e38560ad6e56a1a2f9a0c8b
https://github.com/llvm/llvm-project/commit/c94ce0cca25229cd0e38560ad6e56a1a2f9a0c8b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/unittests/ADT/ScopedHashTableTest.cpp
Log Message:
-----------
[ADT] Fix warnings
This patch fixes warnings of the form:
llvm/unittests/ADT/ScopedHashTableTest.cpp:41:20: error:
'ScopedHashTableScope' may not intend to support class template
argument deduction [-Werror,-Wctad-maybe-unsupported]
Commit: 104ad9258a0f93a969bf7a85ebc0c7d9c533edf1
https://github.com/llvm/llvm-project/commit/104ad9258a0f93a969bf7a85ebc0c7d9c533edf1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[SelectionDAG] Rename SDNode::uses() to users(). (#120499)
This function is most often used in range based loops or algorithms
where the iterator is implicitly dereferenced. The dereference returns
an SDNode * of the user rather than SDUse * so users() is a better name.
I've long beeen annoyed that we can't write a range based loop over
SDUse when we need getOperandNo. I plan to rename use_iterator to
user_iterator and add a use_iterator that returns SDUse& on dereference.
This will make it more like IR.
Commit: 2302142f2318ba9624b847cd8c1a7e2d255be5c5
https://github.com/llvm/llvm-project/commit/2302142f2318ba9624b847cd8c1a7e2d255be5c5
Author: Tyler Nowicki <tyler.nowicki at amd.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/docs/Coroutines.rst
Log Message:
-----------
[Coroutines][Docs] Add a discussion on the handling of certain parameter attribs (#117183)
ByVal arguments and Swifterror require special handling in the coroutine
passes. The goal of this section is to provide a description of how
these parameter attributes are handled.
Commit: 2c782ab2718758bd106ad5939adf7cfb6cd9d1e9
https://github.com/llvm/llvm-project/commit/2c782ab2718758bd106ad5939adf7cfb6cd9d1e9
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
A llvm/test/CodeGen/RISCV/machine-pipeliner.ll
Log Message:
-----------
[RISCV] Add software pipeliner support (#117546)
This patch adds basic support of `MachinePipeliner` and disable
it by default.
The functionality should be OK and all llvm-test-suite tests have
passed.
Commit: 5c55f9664f7e2f9fe29589a97bc5818d6b8d3c9c
https://github.com/llvm/llvm-project/commit/5c55f9664f7e2f9fe29589a97bc5818d6b8d3c9c
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/test/SemaTemplate/pack-deduction.cpp
Log Message:
-----------
[Clang] Don't assume unexpanded PackExpansions' size when expanding packs (#120380)
CheckParameterPacksForExpansion() previously assumed that template
arguments don't include PackExpansion types when attempting another pack
expansion (i.e. when NumExpansions is present). However, this assumption
doesn't hold for type aliases, whose substitution might involve
unexpanded packs. This can lead to incorrect diagnostics during
substitution because the pack size is not yet determined.
To address this, this patch calculates the minimum pack size (ignoring
unexpanded PackExpansionTypes) and compares it to the previously
expanded size. If the minimum pack size is smaller, then there's still a
chance for future substitution to expand it to a correct size, so we
don't diagnose it too eagerly.
Fixes #61415
Fixes #32252
Fixes #17042
Commit: 4ca4287da472c045f1587b1e8c7bd2ba8ef2e5c0
https://github.com/llvm/llvm-project/commit/4ca4287da472c045f1587b1e8c7bd2ba8ef2e5c0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Log Message:
-----------
[SelectionDAG] Replace findGlueUse in SelectionDAGISel with SDNode::getGluedUser. NFC (#120512)
Commit: bd261ecc5aeefd62150cb5f04e4a4f0cb7a12e1c
https://github.com/llvm/llvm-project/commit/bd261ecc5aeefd62150cb5f04e4a4f0cb7a12e1c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[SelectionDAG] Add SDNode::user_begin() and use it in some places (#120509)
Most of these are just places that want the first user and aren't
iterating over the whole list.
While there I changed some use_size() == 1 to hasOneUse() which
is more efficient.
This is part of an effort to rename use_iterator to user_iterator
and provide a use_iterator that dereferences to SDUse&. This patch
helps reduce the diff on later patches.
Commit: 296c29483e4000963a08fc51828df948d47e945a
https://github.com/llvm/llvm-project/commit/296c29483e4000963a08fc51828df948d47e945a
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
R llvm/test/tools/llvm-mca/RISCV/SiFive7/reductions.s
R llvm/test/tools/llvm-mca/RISCV/SiFive7/strided-load-store.s
R llvm/test/tools/llvm-mca/RISCV/SiFive7/strided-load-x0.s
R llvm/test/tools/llvm-mca/RISCV/SiFive7/vector-integer-arithmetic.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/different-lmul-instruments.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/different-sew-instruments.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/disable-im.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/fractional-lmul-data.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/lmul-instrument-at-start.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/lmul-instrument-in-middle.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/lmul-instrument-in-region.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/lmul-instrument-straddles-region.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/multiple-same-lmul-instruments.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/multiple-same-sew-instruments.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/needs-sew-but-only-lmul.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/no-vsetvli-to-start.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/reductions.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/riscv-lmul-instrument-no-data-is-err.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/riscv-sew-instrument-no-data-is-err.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-at-start.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-in-middle.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-in-region.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-straddles-region.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/strided-load-store.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/strided-load-x0.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/unknown-instrument-is-err.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/unknown-lmul-is-err.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/unknown-sew-is-err.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vector-integer-arithmetic.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vle-vse.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetivli-lmul-instrument.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetivli-lmul-sew-instrument.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetvli-lmul-instrument.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetvli-lmul-sew-instrument.s
R llvm/test/tools/llvm-mca/RISCV/different-lmul-instruments.s
R llvm/test/tools/llvm-mca/RISCV/different-sew-instruments.s
R llvm/test/tools/llvm-mca/RISCV/disable-im.s
R llvm/test/tools/llvm-mca/RISCV/fractional-lmul-data.s
R llvm/test/tools/llvm-mca/RISCV/lmul-instrument-at-start.s
R llvm/test/tools/llvm-mca/RISCV/lmul-instrument-in-middle.s
R llvm/test/tools/llvm-mca/RISCV/lmul-instrument-in-region.s
R llvm/test/tools/llvm-mca/RISCV/lmul-instrument-straddles-region.s
R llvm/test/tools/llvm-mca/RISCV/multiple-same-lmul-instruments.s
R llvm/test/tools/llvm-mca/RISCV/multiple-same-sew-instruments.s
R llvm/test/tools/llvm-mca/RISCV/needs-sew-but-only-lmul.s
R llvm/test/tools/llvm-mca/RISCV/no-vsetvli-to-start.s
R llvm/test/tools/llvm-mca/RISCV/riscv-lmul-instrument-no-data-is-err.s
R llvm/test/tools/llvm-mca/RISCV/riscv-sew-instrument-no-data-is-err.s
R llvm/test/tools/llvm-mca/RISCV/sew-instrument-at-start.s
R llvm/test/tools/llvm-mca/RISCV/sew-instrument-in-middle.s
R llvm/test/tools/llvm-mca/RISCV/sew-instrument-in-region.s
R llvm/test/tools/llvm-mca/RISCV/sew-instrument-straddles-region.s
R llvm/test/tools/llvm-mca/RISCV/unknown-instrument-is-err.s
R llvm/test/tools/llvm-mca/RISCV/unknown-lmul-is-err.s
R llvm/test/tools/llvm-mca/RISCV/unknown-sew-is-err.s
R llvm/test/tools/llvm-mca/RISCV/vle-vse.s
R llvm/test/tools/llvm-mca/RISCV/vsetivli-lmul-instrument.s
R llvm/test/tools/llvm-mca/RISCV/vsetivli-lmul-sew-instrument.s
R llvm/test/tools/llvm-mca/RISCV/vsetvli-lmul-instrument.s
R llvm/test/tools/llvm-mca/RISCV/vsetvli-lmul-sew-instrument.s
Log Message:
-----------
[RISCV][MCA] Move sifive-x280 tests to directory SiFiveX280 (#120522)
Commit: a3bf87357da3bae1a35c7a855988287b1fc7ca2f
https://github.com/llvm/llvm-project/commit/a3bf87357da3bae1a35c7a855988287b1fc7ca2f
Author: Fangrui Song <i at maskray.me>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/MC/ELF/noexec.s
M llvm/tools/llvm-mc/llvm-mc.cpp
Log Message:
-----------
[llvm-mc] --no-exec-stack: replace initSection with switchSection. NFC
AsmParser will call initSection unless -n is specified.
It is not good to call initSection twice.
Commit: e389492d6a00e1c49a034e13343098541ebd03c6
https://github.com/llvm/llvm-project/commit/e389492d6a00e1c49a034e13343098541ebd03c6
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
A llvm/include/llvm/Analysis/DroppedVariableStats.h
R llvm/include/llvm/Passes/DroppedVariableStats.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/Analysis/CMakeLists.txt
A llvm/lib/Analysis/DroppedVariableStats.cpp
M llvm/lib/Passes/CMakeLists.txt
R llvm/lib/Passes/DroppedVariableStats.cpp
Log Message:
-----------
[NFC] Move DroppedVariableStats code to Analysis (#120502)
This is done because the CodeGen library and Passes library both link
against Analysis, to avoid adding a dependency between CodeGen and
Passes if we want to extend the DroppedVariableStats code for MIR stats
as well, as seen in https://github.com/llvm/llvm-project/pull/120501
Commit: 2c3126247873f126be3218425f1d053aa6d5e8e8
https://github.com/llvm/llvm-project/commit/2c3126247873f126be3218425f1d053aa6d5e8e8
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
Log Message:
-----------
[gn build] Port e389492d6a00
Commit: 16bc44a71266e8855dddffa932f82ad184450ba0
https://github.com/llvm/llvm-project/commit/16bc44a71266e8855dddffa932f82ad184450ba0
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Update BPF maintainer (#120429)
Nowadays yonghong-song and eddyz87 are more involved with LLVM
BPF development than 4ast, so update the maintainer list to reflect
this.
Commit: 70f326c4bcb4f45744ff93c12a963ffad28136ef
https://github.com/llvm/llvm-project/commit/70f326c4bcb4f45744ff93c12a963ffad28136ef
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Move Bigcheese to inactive maintainer for Windows object tools (#120425)
Bigcheese isn't actively working on Windows support in object tools
anymore, so move him to the inactive maintainer list. I'm also not
aware of anyone else who is actively involved in this area currently,
so I'm dropping the category entirely for now.
Commit: 881447fe443788f556fbf5462384ee5677d5d7ef
https://github.com/llvm/llvm-project/commit/881447fe443788f556fbf5462384ee5677d5d7ef
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Update maintainers for binary utilities (#120428)
We currently list jakehehrlich as the maintainer for llvm-objcopy /
ObjCopy, but he hasn't been involved with LLVM for more than 5 years.
Convert the llvm-object category into a broader binary utilities
category and add jh7370 and MaskRay as the new maintainers.
Commit: 223c7648468cd4f649a578d3f9cbc27a63523192
https://github.com/llvm/llvm-project/commit/223c7648468cd4f649a578d3f9cbc27a63523192
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/include/llvm/Analysis/DroppedVariableStats.h
M llvm/include/llvm/CodeGen/MachineFunctionPass.h
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/DroppedVariableStats.cpp
M llvm/lib/CodeGen/MachineFunctionPass.cpp
M llvm/unittests/MIR/CMakeLists.txt
A llvm/unittests/MIR/DroppedVariableStatsMIRTest.cpp
Log Message:
-----------
Add a pass to collect dropped var stats for MIR (#120501)
Reland "Add a pass to collect dropped var stats for MIR" (#117044)
I am trying to reland https://github.com/llvm/llvm-project/pull/115566
I also moved the DroppedVariableStats code to the Analysis lib
This is part of a stack of patches with
https://github.com/llvm/llvm-project/pull/120502 being the first one in
the stack
Commit: 16d952898f2b41e768f7f2bfd867e48a5b7ef976
https://github.com/llvm/llvm-project/commit/16d952898f2b41e768f7f2bfd867e48a5b7ef976
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/include/llvm/Analysis/DroppedVariableStats.h
M llvm/include/llvm/CodeGen/MachineFunctionPass.h
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/DroppedVariableStats.cpp
M llvm/lib/CodeGen/MachineFunctionPass.cpp
M llvm/unittests/MIR/CMakeLists.txt
R llvm/unittests/MIR/DroppedVariableStatsMIRTest.cpp
Log Message:
-----------
Revert "Add a pass to collect dropped var stats for MIR (#120501)"
This reverts commit 223c7648468cd4f649a578d3f9cbc27a63523192.
Reverted due to vuildbot failure:
flang-aarch64-libcxx
Linking CXX shared library lib/libLLVMAnalysis.so.20.0git
FAILED: lib/libLLVMAnalysis.so.20.0git
Commit: 0f9257b9abab72afdc210412a21c628f2df1a1f0
https://github.com/llvm/llvm-project/commit/0f9257b9abab72afdc210412a21c628f2df1a1f0
Author: Djordje Todorovic <djordje.todorovic at htecgroup.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
A llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
A llvm/test/tools/llvm-mca/RISCV/MIPS/p8700.s
Log Message:
-----------
[RISCV] Add scheduling model for mips p8700 CPU (#119885)
Depends on #119882.
Commit: 023fb258b0a8f81b4eb80a8a1c8e1c48a71873de
https://github.com/llvm/llvm-project/commit/023fb258b0a8f81b4eb80a8a1c8e1c48a71873de
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Update ADT/Support maintainers (#120423)
Nominate dwblaikie and kuhar as new maintainers for ADT/Support,
replacing chandlerc.
Commit: 9fa109a5088bff9e8eabf6d67d0650fbd3db27cb
https://github.com/llvm/llvm-project/commit/9fa109a5088bff9e8eabf6d67d0650fbd3db27cb
Author: Djordje Todorovic <djordje.todorovic at htecgroup.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
R llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
R llvm/test/tools/llvm-mca/RISCV/MIPS/p8700.s
Log Message:
-----------
Revert "[RISCV] Add scheduling model for mips p8700 CPU" (#120537)
Reverts llvm/llvm-project#119885
llvm-project/llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td:20:5:
error: Processor does not define resources for WriteFCvtF32ToF16
def MIPSP8700Model : SchedMachineModel {
Commit: e4351f27cdaa6ca80312b6fca5c160d78acd9bb4
https://github.com/llvm/llvm-project/commit/e4351f27cdaa6ca80312b6fca5c160d78acd9bb4
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[TOSA] Don't run validation pass on non TOSA operations (#120205)
This commit ensures the validation pass is not run on operations from
other dialects. In doing so, operations from other dialects that, for
example, use types not supported by TOSA don't result in an error.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: beea5acc5e7d17a29e48f5dc627019e4db510e23
https://github.com/llvm/llvm-project/commit/beea5acc5e7d17a29e48f5dc627019e4db510e23
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
Reapply "[driver] Fix sanitizer libc++ runtime linking (#120370)" (#120538)
Reland without item 2 from #120370 to avoid breaking libc++ tests.
This reverts commit 60a2f32cf5ce75c9a2511d7fc2b0f24699605912.
Commit: 9fc2fadbfcb34df5f72bdaed28a7874bf584eed7
https://github.com/llvm/llvm-project/commit/9fc2fadbfcb34df5f72bdaed28a7874bf584eed7
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/Expr.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/atomic-test-and-set.c
M clang/test/Sema/atomic-ops.c
Log Message:
-----------
[Clang] Re-write codegen for atomic_test_and_set and atomic_clear (#120449)
Re-write the sema and codegen for the atomic_test_and_set and
atomic_clear builtin functions to go via AtomicExpr, like the other
atomic builtins do. This simplifies the code, because AtomicExpr already
handles things like generating code for to dynamically select the memory
ordering, which was duplicated for these builtins. This also fixes a few
crash bugs, one when passing an integer to the pointer argument, and one
when using an array.
This also adds diagnostics for the memory orderings which are not valid
for atomic_clear according to
https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-Builtins.html, which
were missing before.
Fixes #111293.
Commit: 2210da3b823ccf21fc634c858827c9f12c864b51
https://github.com/llvm/llvm-project/commit/2210da3b823ccf21fc634c858827c9f12c864b51
Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
Log Message:
-----------
[lldb][AIX] clang-format changes for ProcessLauncherPosixFork.cpp (#120459)
This PR is in reference to porting LLDB on AIX.
Link to discussions on llvm discourse and github:
1. https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640
2. https://github.com/llvm/llvm-project/issues/101657
The complete changes for porting are present in this draft PR:
https://github.com/llvm/llvm-project/pull/102601
Added clang-format changes for ProcessLauncherPosixFork.cpp which will
be followed by ptrace changes in:
- https://github.com/llvm/llvm-project/pull/120390
Commit: 9829598933a0b79117891dd733fde5374e59f064
https://github.com/llvm/llvm-project/commit/9829598933a0b79117891dd733fde5374e59f064
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
Log Message:
-----------
[AArch64][SME2] Extend getRegAllocationHints for ZPRStridedOrContiguousReg (#119865)
ZPR2StridedOrContiguous loads used by a FORM_TRANSPOSED_REG_TUPLE
pseudo should attempt to assign a strided register to avoid unnecessary
copies, even though this may overlap with the list of SVE callee-saved registers.
Commit: 3c661cf03a2b1f669710a93bf73b15c831171888
https://github.com/llvm/llvm-project/commit/3c661cf03a2b1f669710a93bf73b15c831171888
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/test/MC/AArch64/arm64-elf-relocs.s
M llvm/test/MC/AArch64/ilp32-diagnostics.s
Log Message:
-----------
[PAC][MC][ELF][AArch64] Support signed TLSDESC (#120010)
Support the following relocations and assembly operators:
- `R_AARCH64_AUTH_TLSDESC_ADR_PAGE21` (`:tlsdesc_auth:` for `adrp`)
- `R_AARCH64_AUTH_TLSDESC_LD64_LO12` (`:tlsdesc_auth_lo12:` for `ldr`)
- `R_AARCH64_AUTH_TLSDESC_ADD_LO12` (`:tlsdesc_auth_lo12:` for `add`)
Commit: 431975b630d475920dfba4f38ac501d521427b34
https://github.com/llvm/llvm-project/commit/431975b630d475920dfba4f38ac501d521427b34
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] LowerShift - directly initialize SmallVector with build vector operands. NFC.
Don't push_back the operands separately.
Commit: 976f877388cec5c8976ebe404e6ee68ff7bd5906
https://github.com/llvm/llvm-project/commit/976f877388cec5c8976ebe404e6ee68ff7bd5906
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] ExtendToType - directly initialize SmallVector with build vector operands. NFC.
Don't push_back the operands separately.
Commit: c616fdc8d0d6598679f667c351b458cb1cf8101b
https://github.com/llvm/llvm-project/commit/c616fdc8d0d6598679f667c351b458cb1cf8101b
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Pass user search paths to linker before implict ones (#119875)
Responsibility for setting up implicit library search paths was recently
transferred to the PS5 driver (llvm#109796). Prior to this, SIE private
patches in lld performed this function. During the transition, I failed
to maintain the order in which implicit and user-supplied search paths
were supplied/considered. This change ensures user-supplied search paths
appear before any implicit ones on the link line.
SIE tracker: TOOLCHAIN-17490
Commit: 10d84a86e54cfd0dcd3412e415edeb36b3f622c3
https://github.com/llvm/llvm-project/commit/10d84a86e54cfd0dcd3412e415edeb36b3f622c3
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/lld/BUILD.bazel
Log Message:
-----------
[bazel] port 79e859e049c77b5190a54fc1ecf1d262e3ef9f11
Commit: cffe22a93726a64e6a205b5dcd1c306a62488412
https://github.com/llvm/llvm-project/commit/cffe22a93726a64e6a205b5dcd1c306a62488412
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
R llvm/include/llvm/Analysis/DroppedVariableStats.h
A llvm/include/llvm/Passes/DroppedVariableStats.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/Analysis/CMakeLists.txt
R llvm/lib/Analysis/DroppedVariableStats.cpp
M llvm/lib/Passes/CMakeLists.txt
A llvm/lib/Passes/DroppedVariableStats.cpp
Log Message:
-----------
Revert "[NFC] Move DroppedVariableStats code to Analysis (#120502)"
that introduces a circular dependency of analysis -> codegen -> target
This reverts commit e389492d6a00e1c49a034e13343098541ebd03c6.
Commit: a3bb2d675f2cf0409b681273719b5e064a2c137f
https://github.com/llvm/llvm-project/commit/a3bb2d675f2cf0409b681273719b5e064a2c137f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
Log Message:
-----------
[gn build] Port cffe22a93726
Commit: c18fda02e1c5dd68ce65b8505d3976f0d5714d52
https://github.com/llvm/llvm-project/commit/c18fda02e1c5dd68ce65b8505d3976f0d5714d52
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
Log Message:
-----------
[LoopVectorize] Use new single string variant of reportVectorizationFailure (#120414)
Commit: eaf482f01252a0276a6b422dabe810a1abc7e168
https://github.com/llvm/llvm-project/commit/eaf482f01252a0276a6b422dabe810a1abc7e168
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-cast.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/AArch64/sve-trunc.ll
Log Message:
-----------
[AArch64] Tweak truncate costs for some scalable vector types (#119542)
== We were previously returning an invalid cost when truncating
anything to <vscale x 2 x i1>, which is incorrect since we can
generate perfectly good code for this.
== The costs for truncating legal or unpacked types to predicates
seemed overly optimistic. For example, when truncating
<vscale x 8 x i16> to <vscale x 8 x i1> we typically do
something like
and z0.h, z0.h, #0x1
cmpne p0.h, p0/z, z0.h, #0
I guess it might depend upon whether the input value is
generated in the same block or not and if we can avoid the
inreg zero-extend. However, it feels safe to take the more
conservative cost here.
== The costs for some truncates such as
trunc <vscale x 2 x i32> %a to <vscale x 2 x i16>
were 1, whereas in actual fact they are free and no instructions
are required.
== Also, for this
trunc <vscale x 8 x i32> %a to <vscale x 8 x i16>
it's just a single uzp1 instruction so I reduced the cost to 1.
In general, I've added costs for all cases where the destination
type is legal or unpacked. One unfortunate side effect of this
is the costs for some fixed-width truncates when using SVE now
look too optimistic.
Commit: e020f460275aab9053d9e090d0b777b40da14a81
https://github.com/llvm/llvm-project/commit/e020f460275aab9053d9e090d0b777b40da14a81
Author: David Green <david.green at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
A llvm/test/CodeGen/Thumb2/bf16-instructions.ll
Log Message:
-----------
[ARM] Fix BF16 lowering with FullFP16
This adds test coverage for bf16 instructions, making sure that lowering bf16
works with and without +fullfp16.
Commit: ecdc5289afec1af98640b6375a52aaf448fe7388
https://github.com/llvm/llvm-project/commit/ecdc5289afec1af98640b6375a52aaf448fe7388
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-type-vararg.cpp
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
A clang/test/Sema/builtin-assume-aligned-downgrade.c
M clang/test/Sema/builtin-assume-aligned.c
Log Message:
-----------
[Clang] Fix crash in __builtin_assume_aligned (#114217)
The CodeGen for __builtin_assume_aligned assumes that the first argument
is a pointer, so crashes if the int-conversion error is downgraded or
disabled. Emit a non-downgradable error if the argument is not a
pointer, like we currently do for __builtin_launder.
Fixes #110914.
Commit: 30f386cb4d43d0bd8f57c49f68f71defd7dcf968
https://github.com/llvm/llvm-project/commit/30f386cb4d43d0bd8f57c49f68f71defd7dcf968
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/MC/AArch64/SVE/bfcvtnt-diagnostics.s
M llvm/test/MC/AArch64/SVE/bfcvtnt.s
Log Message:
-----------
[AArch64] Fixup destructive floating-point precision conversions (#118788)
This patch changes the zeroing forms of `FCVTXNT`, `FCVTNT`, and
`BFCVTNT` such that their destination operand is also listed as a dag
input. These narrowing down-conversions leave the even elements of the
destination vector unchanged, regardless of the predicate type.
This patch also makes the merging form of `BFCVTNT` non-movprfx'able.
- `FCVTXNT` - [Arm
Developer](https://developer.arm.com/documentation/ddi0602/2024-09/SVE-Instructions/FCVTXNT--Floating-point-down-convert--rounding-to-odd--top--predicated--?lang=en)
- `FCVTNT` - [Arm
Developer](https://developer.arm.com/documentation/ddi0602/2024-09/SVE-Instructions/FCVTNT--predicated---Floating-point-down-convert-and-narrow--top--predicated--?lang=en)
- `BFCVTNT` - [Arm
Developer](https://developer.arm.com/documentation/ddi0602/2024-09/SVE-Instructions/BFCVTNT--Floating-point-down-convert-and-narrow-to-BFloat16--top--predicated--?lang=en)
Commit: 5a3f1acad7e8ce0e8cb90165794dce71f4b80bcd
https://github.com/llvm/llvm-project/commit/5a3f1acad7e8ce0e8cb90165794dce71f4b80bcd
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
Log Message:
-----------
[LLParser] Remove redundant code (NFC) (#120478)
Commit: 5fb8d70e5f1c5d26bfa6ca9034863c10f3d8669d
https://github.com/llvm/llvm-project/commit/5fb8d70e5f1c5d26bfa6ca9034863c10f3d8669d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
Log Message:
-----------
ARM: Handle vldrh and vstrh in stack access hooks (#120527)
Commit: 056e5eccaf440e9127990f9fba1e5cacac399a14
https://github.com/llvm/llvm-project/commit/056e5eccaf440e9127990f9fba1e5cacac399a14
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
Log Message:
-----------
[AMDGPU] Remove unneeded use of !dag. NFC. (#120546)
Commit: b41240be6b9e58687011b2bd1b942c6625cbb5ad
https://github.com/llvm/llvm-project/commit/b41240be6b9e58687011b2bd1b942c6625cbb5ad
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
A clang/include/clang/StaticAnalyzer/Core/PathSensitive/APSIntPtr.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
M clang/lib/StaticAnalyzer/Core/BasicValueFactory.cpp
M clang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
Log Message:
-----------
[analyzer][NFC] Introduce APSIntPtr, a safe wrapper of APSInt (1/4) (#120435)
One could create dangling APSInt references in various ways in the past, that were sometimes assumed to be persisted in the BasicValueFactor.
One should always use BasicValueFactory to create persistent APSInts, that could be used by ConcreteInts or SymIntExprs and similar long-living objects.
If one used a temporary or local variables for this, these would dangle.
To enforce the contract of the analyzer BasicValueFactory and the uses of APSInts, let's have a dedicated strong-type for this.
The idea is that APSIntPtr is always owned by the BasicValueFactory, and that is the only component that can construct it.
These PRs are all NFC - besides fixing dangling APSInt references.
Commit: 060d62b48aeb5080ffcae1dc56e41a06c6f56701
https://github.com/llvm/llvm-project/commit/060d62b48aeb5080ffcae1dc56e41a06c6f56701
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
A llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
Log Message:
-----------
[LoopVectorizer] Add support for partial reductions (#92418)
Following on from https://github.com/llvm/llvm-project/pull/94499, this
patch adds support to the Loop Vectorizer to emit the partial reduction
intrinsics where they may be beneficial for the target.
---------
Co-authored-by: Samuel Tebbs <samuel.tebbs at arm.com>
Commit: d0d5101f9959013e42f6f07d79d0fe638aaa0aa3
https://github.com/llvm/llvm-project/commit/d0d5101f9959013e42f6f07d79d0fe638aaa0aa3
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/MemRegion.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundCheckerV2.cpp
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
M clang/lib/StaticAnalyzer/Checkers/BitwiseShiftChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp
M clang/lib/StaticAnalyzer/Checkers/Iterator.cpp
M clang/lib/StaticAnalyzer/Checkers/IteratorModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/MmapWriteExecChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
M clang/lib/StaticAnalyzer/Core/SVals.cpp
M clang/lib/StaticAnalyzer/Core/SimpleConstraintManager.cpp
M clang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
Log Message:
-----------
[analyzer][NFC] Migrate nonloc::ConcreteInt to use APSIntPtr (2/4) (#120436)
Commit: 13e20bcb98e57831d46162b9ba42a78d85e8283d
https://github.com/llvm/llvm-project/commit/13e20bcb98e57831d46162b9ba42a78d85e8283d
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
M clang/lib/StaticAnalyzer/Core/SVals.cpp
M clang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
Log Message:
-----------
[analyzer][NFC] Migrate loc::ConcreteInt to use APSIntPtr (3/4) (#120437)
Commit: 23377890d022eb1fa9cb42eba5c4f72a1f8ac38d
https://github.com/llvm/llvm-project/commit/23377890d022eb1fa9cb42eba5c4f72a1f8ac38d
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h
M clang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
M clang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
M clang/lib/StaticAnalyzer/Core/SymbolManager.cpp
Log Message:
-----------
[analyzer][NFC] Migrate {SymInt,IntSym}Expr to use APSIntPtr (4/4) (#120438)
Commit: eace8269d9aeb67013d273735ec1be1002a6fac1
https://github.com/llvm/llvm-project/commit/eace8269d9aeb67013d273735ec1be1002a6fac1
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
Log Message:
-----------
[clang] NFC, simplify the shouldLifetimeExtendThroughPath.
Commit: 6586c676b42aa9c7e78f9b1d419767a02793a70f
https://github.com/llvm/llvm-project/commit/6586c676b42aa9c7e78f9b1d419767a02793a70f
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Sema/SemaDecl.cpp
A clang/test/CodeGen/AArch64/fmv-mix-explicit-implicit-default.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGenCXX/fmv-namespace.cpp
M clang/test/Sema/attr-target-version.c
M clang/test/SemaCXX/attr-target-version.cpp
Log Message:
-----------
[FMV][AArch64] Emit mangled default version if explicitly specified. (#120022)
Currently we need at least one more version other than the default to
trigger FMV. However we would like a header file declaration
__attribute__((target_version("default"))) void f(void);
to guarantee that there will be f.default
Commit: eb812d28f542bf0de54c157a7391e446739570cc
https://github.com/llvm/llvm-project/commit/eb812d28f542bf0de54c157a7391e446739570cc
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86RegisterInfo.td
M llvm/test/CodeGen/X86/apx/mul-i1024.ll
Log Message:
-----------
[X86] Put R20/R21/R28/R29 later in GR64 list (#120510)
Because these registers require an extra byte to encode in certain
memory form. Putting them later in the list will reduce code size when
EGPR is enabled. And align the same order in GR8, GR16 and GR32 lists.
Example:
movq (%r20), %r11 # encoding: [0xd5,0x1c,0x8b,0x1c,0x24]
movq (%r22), %r11 # encoding: [0xd5,0x1c,0x8b,0x1e]
Commit: 89da344e5879e5347b5057520d5230e40ae24831
https://github.com/llvm/llvm-project/commit/89da344e5879e5347b5057520d5230e40ae24831
Author: Vinay Deshmukh <32487576+vinay-deshmukh at users.noreply.github.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/include/clang/AST/AttrIterator.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/Analysis/CFG.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
A clang/test/Analysis/cxx23-assume-attribute.cpp
M clang/test/Analysis/out-of-bounds-new.cpp
Log Message:
-----------
[analyzer] Handle [[assume(cond)]] as __builtin_assume(cond) (#116462)
Resolves #100762
Gist of the change:
1. All the symbol analysis, constraint manager and expression parsing
logic was already present, but the previous code didn't "visit" the
expressions within `assume()` by parsing those expressions, all of the
code "just works" by evaluating the SVals, and hence leaning on the same
logic that makes the code with `__builtin_assume` work
2. "Ignore" an expression from adding in CFG if it has side-effects (
similar to CGStmt.cpp (todo add link))
3. Add additional test case for ternary operator handling and modify
CFG.cpp's VisitGuardedExpr code for `continue`-ing if the `ProgramPoint`
is a `StmtPoint`
---------
Co-authored-by: Balazs Benics <benicsbalazs at gmail.com>
Commit: 9bb1d0369c064d50c5f0f7ed6313289c8a42d14f
https://github.com/llvm/llvm-project/commit/9bb1d0369c064d50c5f0f7ed6313289c8a42d14f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/reduction.ll
Log Message:
-----------
[X86] getShuffleCost - when splitting shuffles, if a whole vector source is just copied we should treat this as free. (#120561)
If the shuffle split results in referencing a single legalised whole vector (i.e. no permutation), then this can be treated as free.
We already do something similar for broadcasts / whole subvector insertion + extraction - its purely an issue for register allocation.
Commit: ca98a3d9bbc254cbb7f028866a7d2077b7994ee8
https://github.com/llvm/llvm-project/commit/ca98a3d9bbc254cbb7f028866a7d2077b7994ee8
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-int-fp.ll
A llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-to-int.ll
A llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-int-to-fp.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-to-fp.ll
Log Message:
-----------
[AArch64][SVE] Use SVE for scalar FP converts in streaming[-compatible] functions (1/n) (#118505)
In streaming[-compatible] functions, use SVE for scalar FP conversions
to/from integer types. This can help avoid moves between FPRs and GRPs,
which could be costly.
This patch also updates definitions of SCVTF_ZPmZ_StoD and
UCVTF_ZPmZ_StoD to disallow lowering to them from ISD nodes, as doing so
requires creating a [U|S]INT_TO_FP_MERGE_PASSTHRU node with inconsistent
types.
Follow up to #112213.
Note: This PR does not include support for f64 <-> i32 conversions (like
#112564), which needs a bit more work to support.
Commit: 32220601247896f508ccfde614f5ba6afc85b27d
https://github.com/llvm/llvm-project/commit/32220601247896f508ccfde614f5ba6afc85b27d
Author: Djordje Todorovic <djordje.todorovic at htecgroup.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
A llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
A llvm/test/tools/llvm-mca/RISCV/MIPS/p8700.s
Log Message:
-----------
Reland "[RISCV] Add scheduling model for mips p8700 CPU" (#120550)
This patch introduces a scheduling model for the MIPS p8700, an
out-of-order
RISC-V processor. The model includes pipelines for the following units:
- 2 Integer Arithmetic/Logical Units (ALU and AL2)
- Multiply/Divide Unit (MDU)
- Branch Unit (CTI)
- Load/Store Unit (LSU)
- Short Floating-Point Pipe (FPUS)
- Long Floating-Point Pipe (FPUL)
For additional details, refer to the official product page:
https://mips.com/products/hardware/p8700/.
Also adds `UnsupportedSchedZfhmin` to handle cases like
`WriteFCvtF16ToF32` that
previously caused build failures.
Commit: db84ae3a68173fc561acb79adb6c557cb73ad938
https://github.com/llvm/llvm-project/commit/db84ae3a68173fc561acb79adb6c557cb73ad938
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/arm_sve_sme_incl.td
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[Clang][AArch64] Add signed index/offset variants of sve2p1 qword stores (#120549)
This patch adds signed offset/index variants to the SVE2p1 quadword
store intrinsics, in accordance with
https://github.com/ARM-software/acle/pull/359.
Commit: eba7690d2b94ebe7fcf3e8ceecd4486f328de035
https://github.com/llvm/llvm-project/commit/eba7690d2b94ebe7fcf3e8ceecd4486f328de035
Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M lldb/include/lldb/Host/HostGetOpt.h
M lldb/include/lldb/Host/common/GetOptInc.h
Log Message:
-----------
[lldb][AIX] GetOpt support in AIX (#120574)
This PR is in reference to porting LLDB on AIX.
Link to discussions on llvm discourse and github:
1. https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640
2. https://github.com/llvm/llvm-project/issues/101657
The complete changes for porting are present in this draft PR:
https://github.com/llvm/llvm-project/pull/102601
Adding changes for minimal build for lldb binary on AIX.
getopt.h is missing in AIX, so instead relying on LLDB's getopt
functions.
Commit: 0745add7f458e0a65e048f8c74933bdb48ae97d9
https://github.com/llvm/llvm-project/commit/0745add7f458e0a65e048f8c74933bdb48ae97d9
Author: Matthias Springer <me at m-sp.org>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M mlir/lib/Dialect/GPU/Pipelines/GPUToNVVMPipeline.cpp
Log Message:
-----------
[mlir][GPU] Do not strip location info when lowering to NVVM (#120432)
This is needed for a subsequent commit that reads location information
when lowering `gpu.assert`.
Commit: 9469fd24b9a377947ed7726aee671a6095d44e44
https://github.com/llvm/llvm-project/commit/9469fd24b9a377947ed7726aee671a6095d44e44
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/arm_sve_sme_incl.td
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1_single.c
Log Message:
-----------
[Clang][AArch64] Remove const from base pointers in sve2p1 stores (#120551)
This patch removes the const qualifier from the base pointer argument of
`svst1wq`/`svst1wq_vnum` and `svst1dq`/`svst1dq_vnum`, in accordance
with https://github.com/ARM-software/acle/pull/359.
Commit: 94837c8b5761d20310947be5d2e1e568f67e8c0c
https://github.com/llvm/llvm-project/commit/94837c8b5761d20310947be5d2e1e568f67e8c0c
Author: Tim Creech <timothy.m.creech at intel.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/cmake/modules/AddLLVM.cmake
Log Message:
-----------
Add llvm-profgen to the list of toolchain tools (#120106)
This tool is used for SPGO and is invoked directly by users as described
in the Clang User's Manual[^1].
This change will include llvm-profgen in installations configured with
LLVM_INSTALL_TOOLCHAIN_ONLY, such as those provided by LLVM's executable
Windows installers. This is useful now that LLVM can perform SPGO on
Windows.
[^1]:
https://clang.llvm.org/docs/UsersManual.html#using-sampling-profilers
Commit: 6f8afafd308d37d9abc4af0801dd5a4451c13718
https://github.com/llvm/llvm-project/commit/6f8afafd308d37d9abc4af0801dd5a4451c13718
Author: Veera <32646674+veera-sivarajan at users.noreply.github.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
A llvm/test/Transforms/InstCombine/select-with-extreme-eq-cond.ll
Log Message:
-----------
[InstCombine] Fold `A == MIN_INT ? B != MIN_INT : A < B` to `A < B` (#120177)
This PR folds:
`A == MIN_INT ? B != MIN_INT : A < B` to `A < B`
`A == MAX_INT ? B != MAX_INT : A > B` to `A > B`
Proof: https://alive2.llvm.org/ce/z/bR6E2s
This helps in optimizing comparison of optional unsigned non-zero types
in https://github.com/rust-lang/rust/issues/49892.
Rust compiler's current output: https://rust.godbolt.org/z/9fxfq3Gn8
Commit: 1f2d934525833c4aae5f0436fd99551c776fd246
https://github.com/llvm/llvm-project/commit/1f2d934525833c4aae5f0436fd99551c776fd246
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.h
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Support pointers in __builtin_mem{move,cpy} (#120560)
Unfortunately, that means we can't use the __builtin_bit_cast
implementation for this.
Commit: a161e73fcc957860afe1ff603d3ed77ea0311cc3
https://github.com/llvm/llvm-project/commit/a161e73fcc957860afe1ff603d3ed77ea0311cc3
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
Log Message:
-----------
[AMDGPU] Remove unnecessary casts to GCNSubtarget
Commit: 310e79875752886a7713911e2a1ec14bc75bd4b3
https://github.com/llvm/llvm-project/commit/310e79875752886a7713911e2a1ec14bc75bd4b3
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/chain-different-as.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
M llvm/test/CodeGen/NVPTX/demote-vars.ll
M llvm/test/CodeGen/NVPTX/extractelement.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
M llvm/test/CodeGen/NVPTX/fma-relu-fma-intrinsic.ll
M llvm/test/CodeGen/NVPTX/fma-relu-instruction-flag.ll
M llvm/test/CodeGen/NVPTX/i1-load-lower.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test2.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/misched_func_call.ll
M llvm/test/CodeGen/NVPTX/pr13291-i1-store.ll
M llvm/test/CodeGen/NVPTX/reg-types.ll
M llvm/test/CodeGen/NVPTX/unfold-masked-merge-vector-variablemask.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vector-returns.ll
Log Message:
-----------
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
Avoid introducing `ProxyReg` and `MOV` nodes during ISel when lowering
`bitconvert` or similar operations. These nodes are all erased by a
later pass but not introducing them in the first place is simpler and
likely saves compile time.
Also remove redundant `MOV` instruction definitions.
Commit: b0a4b5b35ab1951d0a4fa95ff58d96e902aa8b1e
https://github.com/llvm/llvm-project/commit/b0a4b5b35ab1951d0a4fa95ff58d96e902aa8b1e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#120532)
Commit: d56edc14d8f7e6f0a43f488ef8c2457e1c0cad91
https://github.com/llvm/llvm-project/commit/d56edc14d8f7e6f0a43f488ef8c2457e1c0cad91
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Bump the Docker image used in the CI (#120248)
This switches to using a slightly newer CMake version in our CI.
Commit: cc246d4a29a0ece8470d2baa1f98245446051fe3
https://github.com/llvm/llvm-project/commit/cc246d4a29a0ece8470d2baa1f98245446051fe3
Author: Abhay Kanhere <abhay at kanhere.net>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
A llvm/test/Transforms/HotColdSplit/outline-inner-region-stacktoocomplex.ll
Log Message:
-----------
[Transforms][CodeExtraction] bug fix regions with stackrestore (#118564)
Ensure code extraction for outlining to a function does not create a function with stacksave of caller to restore stack (e.g. tail call).
Commit: 4039a79de71bd969ef5bf944fd9f46430338ff7e
https://github.com/llvm/llvm-project/commit/4039a79de71bd969ef5bf944fd9f46430338ff7e
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
A libcxx/test/std/containers/sequences/vector.bool/assign_iter_iter.pass.cpp
A libcxx/test/std/containers/sequences/vector.bool/assign_size_value.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.cons/assign_iter_iter.pass.cpp
Log Message:
-----------
[libc++][test] Improve tests for assign in std::vector and vector<bool> (#119163)
This PR enhances the test coverage for std::vector::assign by adding new
tests for several important test cases that were previously missing, as
shown in the following table:
| test cases | forward_iterator | input_iterator |
|-----------------------------------|------------------|----------------|
| new_size > capacity() | Yes | Yes |
| size() < new_size <= capacity() | No | No |
| new_size <= size() | No | No |
Similarly, no tests have previously covered `assign(InputIterator, InputIterator)`
and `assign(size_type, const value_type&)` for `vector<bool>`.
With this patch applied, all missing tests are covered.
Commit: 2b6713d3b87d6e0bf562cf10ef620a12328c4106
https://github.com/llvm/llvm-project/commit/2b6713d3b87d6e0bf562cf10ef620a12328c4106
Author: Nico Weber <thakis at chromium.org>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/test/COFF/start-lib.ll
Log Message:
-----------
[lld/coff] Fix assert on /start-lib foo.obj /end-lib during eager loads (#120292)
If foo.obj is eagerly loaded (due to a prior undef referencing one if
its symbols) and has more than one symbol, we used to assert:
SymbolTable::addLazyObject() for the first symbol would set `lazy` to
false and load all symbols from the file, but the outer
ObjFile::parseLazy() loop would continue to run and call addLazyObject()
for the second symbol, which would assert.
Instead, just stop adding lazy symbols if the file got loaded for real
while adding a symbol.
(The ELF port has a similar early exit in `ObjFile<ELFT>::parseLazy()`.)
Commit: b05071de89e9c26ef8b3f7ab2ff6a56241b54ea8
https://github.com/llvm/llvm-project/commit/b05071de89e9c26ef8b3f7ab2ff6a56241b54ea8
Author: Nico Weber <thakis at chromium.org>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
A lld/test/ELF/Inputs/eager.s
A lld/test/ELF/lto/Inputs/eager.ll
M lld/test/ELF/lto/start-lib.ll
M lld/test/ELF/start-lib.s
Log Message:
-----------
[lld/ELF] Add tests for start-lib / end-lib with eager loads (#120294)
Contains tests for the scenarios fixed in lld/COFF in #120292. They pass
without code changes, but I didn't see existing tests for this.
Commit: f8bcd93224283291534d75a61cc7e5d8fbf0d311
https://github.com/llvm/llvm-project/commit/f8bcd93224283291534d75a61cc7e5d8fbf0d311
Author: Nico Weber <thakis at chromium.org>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M lld/COFF/SymbolTable.cpp
M lld/test/COFF/start-lib.ll
Log Message:
-----------
[lld/COFF] Fix -start-lib / -end-lib after reviews.llvm.org/D116434 (#120452)
That change forgot to set `lazy` to false before calling `addFile()` in
`forceLazy()` which caused `addFile()` to parse the file we want to
force a load for to be added as a lazy object again instead of adding
the file to `ctx.objFileInstances`.
This is caught by a pretty simple test (included).
Commit: e6b24955455d74ee748d1e9986d67de6d40ed22e
https://github.com/llvm/llvm-project/commit/e6b24955455d74ee748d1e9986d67de6d40ed22e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[SelectionDAG] Split SDNode::use_iterator into user_iterator and use_iterator. (#120531)
SDNode::use_iterator now returns an SDUse& when dereferenced.
SDNode::user_iterator returns SDNode*. SDNode::use_begin/use_end/uses
work on use_iterator. SDNode::user_begin/user_end/users work on
user_iterator.
We can now write range based for loops using SDUse& and SDNode::uses().
I've converted many of these in this patch. I didn't update loops that
have additional variables updated in their for statement.
Some loops use SDNode::use_iterator::getOperandNo() which also prevents
using range based for loops. I plan to move this into SDUse in a follow
up patch.
Commit: fafdf97047b1d9622ffbb59919d2422e062882f2
https://github.com/llvm/llvm-project/commit/fafdf97047b1d9622ffbb59919d2422e062882f2
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M libcxx/include/__vector/vector_bool.h
A libcxx/test/std/containers/sequences/vector.bool/flip.pass.cpp
Log Message:
-----------
[libc++] Simplify vector<bool>::flip() and add new tests (#119607)
This PR simplifies the internal bitwise logic of the `flip()` function
for `vector<bool>`, and creates new tests to validate the changes.
Commit: 145ddf7ede28d9131a65b7f86ad07736a824ee21
https://github.com/llvm/llvm-project/commit/145ddf7ede28d9131a65b7f86ad07736a824ee21
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/M68k/M68kISelLowering.cpp
Log Message:
-----------
[M68k] Fix build after splitting SDNode::use_iterator.
Commit: 527595f92789f9701a4b91ab32b792034352f78d
https://github.com/llvm/llvm-project/commit/527595f92789f9701a4b91ab32b792034352f78d
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M lldb/test/API/macosx/lc-note/firmware-corefile/create-empty-corefile.cpp
Log Message:
-----------
[lldb][Mach-O] Initialize cputype/cpusubtype in test corefiles (#120518)
TestFirmwareCorefiles.py has a helper utility,
create-empty-corefile.cpp, which creates corefiles with different
metadata to specify the binary that should be loaded. It normally uses
an actual binary's UUID for the metadata, and it uses the binary's
cputype/cpusubtype for the corefile's mach header.
There is one test where it creates a corefile with metadata for a UUID
that cannot be found -- it is given no binary -- and in that case, the
cputype/cpusubtype it sets in the core file mach header was
uninitialized data. Through luck, on Darwin systems, the uninitialized
data typically matched a CPU_TYPE from machine.h and the test would
work. But when the value doens't match one of thoes defines, lldb would
reject the corefile entirely, and the test would fail. This has been an
infrequent failure on the CI bots for a while and I couldn't ever repo
it. There's a recent configuration where it was happening every time and
I was able to track it down.
rdar://141727563
Commit: 2b9abf0db2d106c7208b4372e662ef5df869e6f1
https://github.com/llvm/llvm-project/commit/2b9abf0db2d106c7208b4372e662ef5df869e6f1
Author: Thurston Dang <thurston at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/include/clang/AST/AttrIterator.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/Analysis/CFG.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
R clang/test/Analysis/cxx23-assume-attribute.cpp
M clang/test/Analysis/out-of-bounds-new.cpp
Log Message:
-----------
Revert "[analyzer] Handle [[assume(cond)]] as __builtin_assume(cond) (#116462)"
This reverts commit 89da344e5879e5347b5057520d5230e40ae24831.
Reason: buildbot breakages e.g., https://lab.llvm.org/buildbot/#/builders/55/builds/4556 (for which the reverted patch is the only code change)
Commit: f139bde8d85e4f7666f2fd739b61894fa58f2f18
https://github.com/llvm/llvm-project/commit/f139bde8d85e4f7666f2fd739b61894fa58f2f18
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[SelectionDAG] Move SDNode::use_iterator::getOperandNo to SDUse. (#120536)
This allows us to write more range based for loops because we no
longer need the iterator. It also matches IR's Use class.
Commit: 4044886c7c6f75a6d7d0205f8a33d9f404f7832f
https://github.com/llvm/llvm-project/commit/4044886c7c6f75a6d7d0205f8a33d9f404f7832f
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
Log Message:
-----------
Revert "[AMDGPU][True16][MC] true16 for v_minmax/maxmin_f16 (#119586)" (#120594)
This reverts commit e0526b0780f56eede09b05a859a93626ecdc6e4d.
The `v_minmax/maxmin_f16`(GFX11) needs to be updated to t16 with
`v_minmax/maxmin_num_f16`(GFX12) together since they share the same
codegen pattern. Revert the old patch and resubmit
Commit: c2dd61279764c9e525b73d37dae58ed77b773b1d
https://github.com/llvm/llvm-project/commit/c2dd61279764c9e525b73d37dae58ed77b773b1d
Author: Nico Weber <thakis at chromium.org>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M lld/test/COFF/thin-archive.s
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
M llvm/lib/ToolDrivers/llvm-lib/Options.td
Log Message:
-----------
[llvm-lib] Add /llvmlibindex:no to disable writing an index (#120596)
This can be used with /llvmlibthin to create thin archives without an
index, which is a prerequisite for porting
https://reviews.llvm.org/D117284 to lld-link.
Creating files like this is already possible with `llvm-ar rcS`, so this
doesn't add additional problems.
Commit: 434819c35f4e0168248a30677077fe7c8c8ab29c
https://github.com/llvm/llvm-project/commit/434819c35f4e0168248a30677077fe7c8c8ab29c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
A llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
Log Message:
-----------
[PhaseOrdering][X86] Add test coverage for #34072
Add tests for horizontal add patterns with missing/undemanded elements - which typically prevents folding to the (add (shuffle a, b),(shuffle a, b)) optimal pattern
Commit: 01b96385fd8760d1fc79c35d1f980c9b64d03599
https://github.com/llvm/llvm-project/commit/01b96385fd8760d1fc79c35d1f980c9b64d03599
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/zbb-logic-neg-imm.ll
Log Message:
-----------
[RISCV][test] Add zbb-logic-neg-imm.ll
Commit: 254ba78495100d9f20c4fa9802395f11c6d3cef1
https://github.com/llvm/llvm-project/commit/254ba78495100d9f20c4fa9802395f11c6d3cef1
Author: MagentaTreehouse <99200384+MagentaTreehouse at users.noreply.github.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/include/llvm/Support/GenericDomTree.h
Log Message:
-----------
[GenericDomTree][NFC] Remove unnecessary `const_cast`s (#97638)
Commit: 46e782300765eeac8026377bf30d5f08888c2b25
https://github.com/llvm/llvm-project/commit/46e782300765eeac8026377bf30d5f08888c2b25
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M lldb/source/Plugins/Architecture/AArch64/ArchitectureAArch64.cpp
M lldb/test/API/commands/register/register/register_command/TestRegisters.py
A lldb/test/API/macosx/sme-registers/Makefile
A lldb/test/API/macosx/sme-registers/TestSMERegistersDarwin.py
A lldb/test/API/macosx/sme-registers/main.c
M lldb/tools/debugserver/source/DNBDefs.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/MacOSX/MachThread.cpp
M lldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.cpp
M lldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.h
A lldb/tools/debugserver/source/MacOSX/arm64/sme_thread_status.h
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb][debugserver] Read/write SME registers on arm64 (#119171)
**Note:** The register reading and writing depends on new register
flavor support in thread_get_state/thread_set_state in the kernel, which
will be first available in macOS 15.4.
The Apple M4 line of cores includes the Scalable Matrix Extension (SME)
feature. The M4s do not implement Scalable Vector Extension (SVE),
although the processor is in Streaming SVE Mode when the SME is being
used. The most obvious side effects of being in SSVE Mode are that (on
the M4 cores) NEON instructions cannot be used, and watchpoints may get
false positives, the address comparisons are done at a lowered
granularity.
When SSVE mode is enabled, the kernel will provide the Streaming Vector
Length register, which is a maximum of 64 bytes with the M4. Also
provided are SVCR (with bits indicating if SSVE mode and SME mode are
enabled), TPIDR2, SVL. Then the SVE registers Z0..31 (SVL bytes long),
P0..15 (SVL/8 bytes), the ZA matrix register (SVL*SVL bytes), and the M4
supports SME2, so the ZT0 register (64 bytes).
When SSVE/SME are disabled, none of these registers are provided by the
kernel - reads and writes of them will fail.
Unlike Linux, lldb cannot modify the SVL through a thread_set_state
call, or change the processor state's SSVE/SME status. There is also no
way for a process to request a lowered SVL size today, so the work that
David did to handle VL/SVL changing while stepping through a process is
not an issue on Darwin today. But debugserver should be providing
everything necessary so we can reuse all of David's work on resizing the
register contexts in lldb if it happens in the future. debugbserver
sends svl, svcr, and tpidr2 in the expedited registers when a thread
stops, if SSVE|SME mode are enabled (if the kernel allows it to read the
ARM_SME_STATE register set).
While the maximum SVL is 64 bytes on M4, the AArch64 maximum possible
SVL is 256; this would give us a 64k ZA register. If debugserver sized
all of its register contexts assuming the largest possible SVL, we could
easily use 2MB more memory for the register contexts of all threads in a
process -- and on iOS et al, processes must run within a small memory
allotment and this would push us over that.
Much of the work in debugserver was changing the arm64 register context
from being a static compile-time array of register sets, to being
initialized at runtime if debugserver is running on a machine with SME.
The ZA is only created to the machine's actual maximum SVL. The size of
the 32 SVE Z registers is less significant so I am statically allocating
those to the architecturally largest possible SVL value today.
Also, debugserver includes information about registers that share the
same part of the register file. e.g. S0 and D0 are the lower parts of
the NEON 128-bit V0 register. And when running on an SME machine, v0 is
the lower 128 bits of the SVE Z0 register. So the register maps used
when defining the VFP registers must differ depending on the
capabilities of the cpu at runtime.
I also changed register reading in debugserver, where formerly when
debugserver was asked to read a register, and the thread_get_state read
of that register failed, it would return all zero's. This is necessary
when constructing a `g` packet that gets all registers - because there
is no separation between register bytes, the offsets are fixed. But when
we are asking for a single register (e.g. Z0) when not in SSVE/SME mode,
this should return an error.
This does mean that when you're running on an SME capabable machine, but
not in SME mode, and do `register read -a`, lldb will report that 48 SVE
registers were unavailable and 5 SME registers were unavailable. But
that's only when `-a` is used.
The register reading and writing depends on new register flavor support
in thread_get_state/thread_set_state in the kernel, which is not yet in
a release. The test case I wrote is skipped on current OSes. I pilfered
the SME register setup from some of David's existing SME test files;
there were a few Linux specific details in those tests that they weren't
easy to reuse on Darwin.
rdar://121608074
Commit: a03343daa6e7a44531e06c8897d6c6d4a46cd430
https://github.com/llvm/llvm-project/commit/a03343daa6e7a44531e06c8897d6c6d4a46cd430
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
R llvm/test/Transforms/PGOProfile/Inputs/memprof_missing_leaf.exe
R llvm/test/Transforms/PGOProfile/Inputs/memprof_missing_leaf.memprofraw
M llvm/test/Transforms/PGOProfile/Inputs/update_memprof_inputs.sh
M llvm/test/Transforms/PGOProfile/memprof_missing_leaf.ll
Log Message:
-----------
[memprof] YAMLify the profile for memprof_missing_leaf.ll (NFC) (#120488)
This patch converts the profile for memprof_missing_leaf.ll to the
recently introduced YAML-based text format.
Commit: e504ece6c15fa5b347a4d8ff7e6fc98ee109660e
https://github.com/llvm/llvm-project/commit/e504ece6c15fa5b347a4d8ff7e6fc98ee109660e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
Log Message:
-----------
[LLVMIR] Migrate away from PointerUnion::{is,get} (NFC) (#120530)
Note that PointerUnion::{is,get} have been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
I'm not touching PointerUnion::dyn_cast for now because it's a bit
complicated; we could blindly migrate it to dyn_cast_if_present, but
we should probably use dyn_cast when the operand is known to be
non-null.
Commit: 37100505664a4c451eb530bc899de204adb80a13
https://github.com/llvm/llvm-project/commit/37100505664a4c451eb530bc899de204adb80a13
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
Log Message:
-----------
[RISCV][VLOPT] Set CommonVL as the largest of the users (#120349)
Prior to this patch, we required that all users had the same VL in order
to optimize. But as the FIXME said, we can use the largest VL to
optimize, as long as we can determine what the largest is. This patch
implements the FIXME.
Commit: 28865769440756138a88a9c8e8b72b1f5d8db715
https://github.com/llvm/llvm-project/commit/28865769440756138a88a9c8e8b72b1f5d8db715
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] clang-format MemProf-related files (NFC) (#120504)
Commit: 21684e38ee65c89d1d0b399c938a83fba5e5c04e
https://github.com/llvm/llvm-project/commit/21684e38ee65c89d1d0b399c938a83fba5e5c04e
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M bolt/lib/Rewrite/LinuxKernelRewriter.cpp
Log Message:
-----------
[BOLT][Linux] Refactor reading of PC-relative addresses. NFCI (#120491)
Fix evaluation order problem identified in
https://github.com/llvm/llvm-project/pull/119088.
Commit: b71c44b9be17dc6295eb733d685b38e797f3c846
https://github.com/llvm/llvm-project/commit/b71c44b9be17dc6295eb733d685b38e797f3c846
Author: ChiaHungDuan <chiahungduan at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/release.h
Log Message:
-----------
[scudo] Add the record of number of attempted page release (#120497)
This also removes the `RangesReleased` which doesn't give much insight
to whether we should adjust the heuristic of doing page release.
Commit: 1808255a44e67446715cb6b16df49c6cec41b0b4
https://github.com/llvm/llvm-project/commit/1808255a44e67446715cb6b16df49c6cec41b0b4
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/test/tools/llvm-dwarfdump/X86/verify_no_overlap_error_icf.yaml
Log Message:
-----------
[DWARFVerifier] Fix and enable broken test llvm-dwarfdump/X86/verify_no_overlap_error_icf.yaml (#120330)
Fixing broken test - calling `sed` in a cross-platform compatible way.
Verified to pass on Mac (which uses BSD sed).
Commit: 395a369056e1a9b55015b81a8667f39f1f48457f
https://github.com/llvm/llvm-project/commit/395a369056e1a9b55015b81a8667f39f1f48457f
Author: Sylvestre Ledru <sylvestre at debian.org>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
Log Message:
-----------
[Xtensa] Fix build after splitting SDNode::use_iterator
Same as: 145ddf7ede28d9131a65b7f86ad07736a824ee21
Commit: 98c97d4a19412a76f7279003af6cb219dea1f0c3
https://github.com/llvm/llvm-project/commit/98c97d4a19412a76f7279003af6cb219dea1f0c3
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/ref-cntbl-crtp-base-no-virtual-dtor.cpp
Log Message:
-----------
[WebKit checkers] Recognize adoptRef as a safe function (#119846)
adoptRef in WebKit constructs Ref/RefPtr so treat it as such in
isCtorOfRefCounted. Also removed the support for makeRef and makeRefPtr
as they don't exist any more.
Commit: aa07f922103ebe8e78c8da4c754b43af3c129f3e
https://github.com/llvm/llvm-project/commit/aa07f922103ebe8e78c8da4c754b43af3c129f3e
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-lib.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-ps.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/BufferStore-errors.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
M llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll
M llvm/test/CodeGen/DirectX/CreateHandle.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
M llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
M llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
M llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
Log Message:
-----------
[DirectX][SPIRV] Consistent names for HLSL resource intrinsics (#120466)
Rename HLSL resource-related intrinsics to be consistent with the naming
conventions discussed in [wg-hlsl:0014].
This is an entirely mechanical change, consisting of the following
commands and automated formatting.
```sh
git grep -l handle.fromBinding | xargs perl -pi -e \
's/(dx|spv)(.)handle.fromBinding/$1$2resource$2handlefrombinding/g'
git grep -l typedBufferLoad_checkbit | xargs perl -pi -e \
's/(dx|spv)(.)typedBufferLoad_checkbit/$1$2resource$2loadchecked$2typedbuffer/g'
git grep -l typedBufferLoad | xargs perl -pi -e \
's/(dx|spv)(.)typedBufferLoad/$1$2resource$2load$2typedbuffer/g'
git grep -l typedBufferStore | xargs perl -pi -e \
's/(dx|spv)(.)typedBufferStore/$1$2resource$2store$2typedbuffer/g'
git grep -l bufferUpdateCounter | xargs perl -pi -e \
's/(dx|spv)(.)bufferUpdateCounter/$1$2resource$2updatecounter/g'
git grep -l cast_handle | xargs perl -pi -e \
's/(dx|spv)(.)cast.handle/$1$2resource$2casthandle/g'
```
[wg-hlsl:0014]: https://github.com/llvm/wg-hlsl/blob/main/proposals/0014-consistent-naming-for-dx-intrinsics.md
Commit: d3508ccd1512c57094ec7b321d147aa72c9fbc7e
https://github.com/llvm/llvm-project/commit/d3508ccd1512c57094ec7b321d147aa72c9fbc7e
Author: Konstantina Mitropoulou <44334539+kmitropoulou at users.noreply.github.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
A llvm/test/CodeGen/AMDGPU/uniform_branch_with_floating_point_cond.ll
Log Message:
-----------
[AMDGPU] Emit S_CBRANCH_SCC for floating-point conditions. (#120588)
- **[AMDGPU] Add new test.**
- **[AMDGPU] Emit S_CBRANCH_SCC for floating-point conditions.**
---------
Co-authored-by: Konstantina Mitropoulou <KonstantinaMitropoulou at amd.com>
Commit: b5d02786be31f45ca5919b3b73e99d8958330f78
https://github.com/llvm/llvm-project/commit/b5d02786be31f45ca5919b3b73e99d8958330f78
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/ref-cntbl-crtp-base-no-virtual-dtor.cpp
Log Message:
-----------
Revert "[WebKit checkers] Recognize adoptRef as a safe function" (#120626)
Reverts llvm/llvm-project#119846. Introduced a failing test.
Commit: 45c01e8a33bbb1790ea16577e47b1e6a34fa1548
https://github.com/llvm/llvm-project/commit/45c01e8a33bbb1790ea16577e47b1e6a34fa1548
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
Log Message:
-----------
[NFC][TargetTransformInfo][VectorUtils] Consolidate `isVectorIntrinsic...` api (#117635)
- update `VectorUtils:isVectorIntrinsicWithScalarOpAtArg` to use TTI for
all uses, to allow specifiction of target specific intrinsics
- add TTI to the `isVectorIntrinsicWithStructReturnOverloadAtField` api
- update TTI api to provide `isTargetIntrinsicWith...` functions and
consistently name them
- move `isTriviallyScalarizable` to VectorUtils
- update all uses of the api and provide the TTI parameter
Resolves #117030
Commit: e3b571e632855386908c5cea310f5056d31d6df8
https://github.com/llvm/llvm-project/commit/e3b571e632855386908c5cea310f5056d31d6df8
Author: Niels Dekker <N.Dekker at lumc.nl>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ContainerSizeEmptyCheck.h
Log Message:
-----------
[clang-tidy][NFC] Sync ContainerSizeEmptyCheck with container-size-empty doc (#118459)
Brought the class documentation in sync with the user documentation at
container-size-empty.rst:
https://github.com/llvm/llvm-project/blob/bfb26202e05ee2932b4368b5fca607df01e8247f/clang-tools-extra/docs/clang-tidy/checks/readability/container-size-empty.rst#L7-L14
Commit: 10d054e95413f0e98e4aeed9dbd4605f6f03b3fa
https://github.com/llvm/llvm-project/commit/10d054e95413f0e98e4aeed9dbd4605f6f03b3fa
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Introduce IndexedCallstackIdConveter (NFC) (#120540)
This patch introduces IndexedCallstackIdConveter as a convenience
wrapper around FrameIdConverter and CallStackIdConverter just for
tests.
With the new wrapper, we get to replace idioms like:
FrameIdConverter<decltype(MemProfData.Frames)> FrameIdConv(
MemProfData.Frames);
CallStackIdConverter<decltype(MemProfData.CallStacks)> CSIdConv(
MemProfData.CallStacks, FrameIdConv);
with:
IndexedCallstackIdConveter CSIdConv(MemProfData);
Unfortunately, this exact pattern occurs in tests only; the
combinations of the frame ID converter and call stack ID converter are
diverse in production code.
Commit: 4bbdb018a6cb564783cfb9c65ca82b81c6006bb6
https://github.com/llvm/llvm-project/commit/4bbdb018a6cb564783cfb9c65ca82b81c6006bb6
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/include/clang-c/Index.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/AST/ast-print-openacc-init-construct.cpp
A clang/test/AST/ast-print-openacc-shutdown-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/SemaOpenACC/combined-construct-async-clause.cpp
M clang/test/SemaOpenACC/combined-construct-wait-clause.cpp
M clang/test/SemaOpenACC/compute-construct-async-clause.cpp
M clang/test/SemaOpenACC/compute-construct-num_gangs-clause.cpp
M clang/test/SemaOpenACC/compute-construct-num_workers-clause.cpp
M clang/test/SemaOpenACC/compute-construct-private-clause.c
M clang/test/SemaOpenACC/compute-construct-reduction-clause.c
M clang/test/SemaOpenACC/compute-construct-vector_length-clause.cpp
M clang/test/SemaOpenACC/compute-construct-wait-clause.cpp
A clang/test/SemaOpenACC/init-construct-ast.cpp
A clang/test/SemaOpenACC/init-construct.cpp
A clang/test/SemaOpenACC/shutdown-construct-ast.cpp
A clang/test/SemaOpenACC/shutdown-construct.cpp
M clang/test/SemaOpenACC/wait-construct.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[OpenACC] Implement 'init' and 'shutdown' constructs
These two constructs are very simple and similar, and only support 3
different clauses, two of which are already implemented. This patch
adds AST nodes for both constructs, and leaves the device_num clause
unimplemented, but enables the other two.
Commit: bdf255530821201c9febf9fdb42b91082656dc94
https://github.com/llvm/llvm-project/commit/bdf255530821201c9febf9fdb42b91082656dc94
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/AST/ast-print-openacc-init-construct.cpp
M clang/test/AST/ast-print-openacc-shutdown-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/init-construct-ast.cpp
M clang/test/SemaOpenACC/init-construct.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
M clang/test/SemaOpenACC/shutdown-construct-ast.cpp
M clang/test/SemaOpenACC/shutdown-construct.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC] Implement 'device_num' clause sema for 'init'/'shutdown'
This is a very simple sema implementation, and just required AST node
plus the existing diagnostics. This patch adds tests and adds the AST
node required, plus enables it for 'init' and 'shutdown' (only!)
Commit: 1fcb6a9754a8db057e18f629cb90011b638901e7
https://github.com/llvm/llvm-project/commit/1fcb6a9754a8db057e18f629cb90011b638901e7
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/ConvertVariable.h
M flang/include/flang/Optimizer/Builder/Runtime/Derived.h
M flang/include/flang/Runtime/derived-api.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.h
M flang/lib/Optimizer/Builder/Runtime/Derived.cpp
M flang/runtime/derived-api.cpp
M flang/runtime/derived.cpp
M flang/runtime/derived.h
A flang/test/Lower/OpenMP/derived-type-allocatable.f90
Log Message:
-----------
[flang][OpenMP] Initialize allocatable members of derived types (#120295)
Allocatable members of privatized derived types must be allocated,
with the same bounds as the original object, whenever that member
is also allocated in it, but Flang was not performing such
initialization.
The `Initialize` runtime function can't perform this task unless
its signature is changed to receive an additional parameter, the
original object, that is needed to find out which allocatable
members, with their bounds, must also be allocated in the clone.
As `Initialize` is used not only for privatization, sometimes this
other object won't even exist, so this new parameter would need
to be optional.
Because of this, it seemed better to add a new runtime function:
`InitializeClone`.
To avoid unnecessary calls, lowering inserts a call to it only for
privatized items that are derived types with allocatable members.
Fixes https://github.com/llvm/llvm-project/issues/114888
Fixes https://github.com/llvm/llvm-project/issues/114889
Commit: 4797437463e63ee289a1ff1904cfb7b2fe6cb4c2
https://github.com/llvm/llvm-project/commit/4797437463e63ee289a1ff1904cfb7b2fe6cb4c2
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/include/clang/AST/Stmt.h
Log Message:
-----------
[clang][NFC] Increase NumStmtBits by 1 as we are approaching the limit (#120341)
We have already hit the limit of NumStmtBits downstream after
010d0115fc8e3834fc6f747f0841f3b1e467c4da, which adds 4 new StmtNodes.
Commit: 6e7312bda60249c25e2ae9078d9f70bc2a65838c
https://github.com/llvm/llvm-project/commit/6e7312bda60249c25e2ae9078d9f70bc2a65838c
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/test/CodeGen/RISCV/pr84653_pr85190.ll
M llvm/test/CodeGen/RISCV/zbb-logic-neg-imm.ll
Log Message:
-----------
[RISCV] Select and/or/xor with certain constants to Zbb ANDN/ORN/XNOR (#120221)
(and X, (C<<12|0xfff)) -> (ANDN X, ~C<<12)
(or X, (C<<12|0xfff)) -> (ORN X, ~C<<12)
(xor X, (C<<12|0xfff)) -> (XNOR X, ~C<<12)
Emits better code, typically by avoiding an `ADDI HI, -1` instruction.
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 7009b0699343a7eb87e77d8e13f7c70a02ebed5f
https://github.com/llvm/llvm-project/commit/7009b0699343a7eb87e77d8e13f7c70a02ebed5f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Semantics/cuf09.cuf
Log Message:
-----------
[flang][cuda] Allow STOP in device context (#120625)
STOP statement is allowed in device procedure
Commit: cb8a90b7d17f851dec9c1c2d429622909aa5b605
https://github.com/llvm/llvm-project/commit/cb8a90b7d17f851dec9c1c2d429622909aa5b605
Author: Thurston Dang <thurston at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGen/bounds-checking.c
M clang/test/CodeGen/ubsan-trap-merge.c
Log Message:
-----------
[ubsan] Remove -ubsan-unique-traps (replace with -fno-sanitize-merge) (#120613)
-fno-sanitize-merge (introduced in
https://github.com/llvm/llvm-project/pull/120511) duplicates the
functionality of -ubsan-unique-traps but also allows individual checks
to be specified e.g.,
* "-fno-sanitize-merge" without arguments is equivalent to
-ubsan-unique-traps
* "-fno-sanitize-merge=bool,enum" will apply it only to those two checks
Additionally, the naming is more consistent with the rest of the
-fsanitize- family.
This patch therefore removes -ubsan-unique-traps. This breaks backwards
compatibility; we hope that this is acceptable since '-mllvm
-ubsan-unique-traps' was an experimental flag.
This patch also adds negative test examples to bounds-checking.c, and
strengthens the NOOPTARRAY assertion to prevent spurious matches.
"-bounds-checking-unique-traps" is unaffected by this patch.
Commit: 8dfae0c462e9558df77c83c97d89b4b83ed1baff
https://github.com/llvm/llvm-project/commit/8dfae0c462e9558df77c83c97d89b4b83ed1baff
Author: Nico Weber <thakis at chromium.org>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M libcxx/src/include/overridable_function.h
M libcxx/src/new.cpp
M libcxxabi/src/stdlib_new_delete.cpp
Log Message:
-----------
Revert "[libcxx] Use alias for detecting overriden function (#114961)"
This reverts commit 62bd10f7d18ca6f544286767cae2c9026d493888.
Breaks building with -flto=thin, see
https://github.com/llvm/llvm-project/pull/114961#issuecomment-2555754056
Commit: 5b5b241edf78bd8e34ccf1ce352e86e571a32b4c
https://github.com/llvm/llvm-project/commit/5b5b241edf78bd8e34ccf1ce352e86e571a32b4c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#120619)
Commit: 34e0f9cd36e9d4eb7fd153f536c811ec668be458
https://github.com/llvm/llvm-project/commit/34e0f9cd36e9d4eb7fd153f536c811ec668be458
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_fallbacks.h
R libcxx/include/__locale_dir/locale_guard.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/include/__support/xlocale/__nop_locale_mgmt.h
M libcxx/include/module.modulemap
M libcxx/src/iostream.cpp
M libcxx/src/support/win32/locale_win32.cpp
Log Message:
-----------
[libc++] Remove the need for `uselocale()` (#120158)
Instead of requiring `uselocale()` as part of the base locale API,
define __locale_guard in the few places that need it directly, without
making __locale_guard part of the base API.
In practice, most mainstream platforms never used __locale_guard, so
they also didn't need to define uselocale(), and after this patch they
actually don't define it anymore.
Commit: c2830b218017dd9e2fca843e81baec1d71306b07
https://github.com/llvm/llvm-project/commit/c2830b218017dd9e2fca843e81baec1d71306b07
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
A llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s
Log Message:
-----------
[AMDGPU][True16][MC] added fake16 for gfx12 alias MC test (#120624)
This is a NFC.
Duplicate gfx12_asm_vop3_alias.s file to true16/fake16 version and
update `real-true16` flag on it.
This is preparing the upcoming changes for true16
Commit: 0a94ee694fbe1a17c5a948fbe86b881527f81343
https://github.com/llvm/llvm-project/commit/0a94ee694fbe1a17c5a948fbe86b881527f81343
Author: Michael Jones <michaelrj at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M libc/docs/dev/index.rst
M libc/docs/full_host_build.rst
Log Message:
-----------
[libc] update host build docs (#120147)
Update the host build docs to better reflect the current recommended
process.
Commit: f000c053bfa6f86f5ffac9e1177e6c88f18ae1bd
https://github.com/llvm/llvm-project/commit/f000c053bfa6f86f5ffac9e1177e6c88f18ae1bd
Author: David Green <david.green at arm.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
Log Message:
-----------
[VectorCombine] Add test coverage to shuffleToIdentity for fp casts. NFC
Commit: 4c3e13ebca560cd2377dfeb0c7b9186bd6c96ae1
https://github.com/llvm/llvm-project/commit/4c3e13ebca560cd2377dfeb0c7b9186bd6c96ae1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 34e0f9cd36e9
Commit: 9e322c56f7b3637377855c59b9665d5b299cba7b
https://github.com/llvm/llvm-project/commit/9e322c56f7b3637377855c59b9665d5b299cba7b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/lib/CodeGen/SanitizerMetadata.cpp
A clang/test/CodeGen/sanitize-type-globals.cpp
Log Message:
-----------
[TySan] Don't report globals with external storage. (#120565)
Globals with external storage should have been initialized where they
are defined.
Fixes https://github.com/llvm/llvm-project/issues/120448
PR: https://github.com/llvm/llvm-project/pull/120565
Commit: d33a2c58112bdd74225b0ff4f07acc49bed7e6ea
https://github.com/llvm/llvm-project/commit/d33a2c58112bdd74225b0ff4f07acc49bed7e6ea
Author: Thurston Dang <thurston at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/test/CodeGen/bounds-checking.c
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
Log Message:
-----------
[BoundsSan] Update BoundsChecking.cpp to use no-merge attribute where applicable (#120620)
https://github.com/llvm/llvm-project/pull/65972 introduced
-ubsan-unique-traps and -bounds-checking-unique-traps, which attach the
function size to the ubsantrap intrinsic.
https://github.com/llvm/llvm-project/pull/117651 changed
ubsan-unique-traps to use nomerge instead of the function size, but did
not update -bounds-checking-unique-traps. This patch adds nomerge to
bounds-checking-unique-traps.
Commit: 5f096fd2216001296b809002ee474ee6d7f06e0e
https://github.com/llvm/llvm-project/commit/5f096fd2216001296b809002ee474ee6d7f06e0e
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
R llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
R llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
R llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
R llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
R llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
Log Message:
-----------
Revert "[LoopVectorizer] Add support for partial reductions (#92418)"
This reverts commit 060d62b48aeb5080ffcae1dc56e41a06c6f56701.
It looks like this is triggering an assertion when build llvm-test-suite
on ARM64 macOS.
Reproducer from MultiSource/Benchmarks/Ptrdist/bc/number.c
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
define void @test(i64 %idx.neg, i8 %0) #0 {
entry:
br label %while.body
while.body: ; preds = %while.body, %entry
%n1ptr.0.idx131 = phi i64 [ %n1ptr.0.add, %while.body ], [ %idx.neg, %entry ]
%n2ptr.0.idx130 = phi i64 [ %n2ptr.0.add, %while.body ], [ 0, %entry ]
%sum.1129 = phi i64 [ %add99, %while.body ], [ 0, %entry ]
%n1ptr.0.add = add i64 %n1ptr.0.idx131, 1
%conv = sext i8 %0 to i64
%n2ptr.0.add = add i64 %n2ptr.0.idx130, 1
%1 = load i8, ptr null, align 1
%conv97 = sext i8 %1 to i64
%mul = mul i64 %conv97, %conv
%add99 = add i64 %mul, %sum.1129
%cmp94 = icmp ugt i64 %n1ptr.0.idx131, 0
%cmp95 = icmp ne i64 %n2ptr.0.idx130, -1
%2 = and i1 %cmp94, %cmp95
br i1 %2, label %while.body, label %while.end.loopexit
while.end.loopexit: ; preds = %while.body
%add99.lcssa = phi i64 [ %add99, %while.body ]
ret void
}
attributes #0 = { "target-cpu"="apple-m1" }
> opt -p loop-vectorize
Assertion failed: ((VF.isScalar() || V->getType()->isVectorTy()) && "scalar values must be stored as (0, 0)"), function set, file VPlan.h, line 284.
Commit: 0517772b4ac20c5d3a0de0d4703354a179833248
https://github.com/llvm/llvm-project/commit/0517772b4ac20c5d3a0de0d4703354a179833248
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
R llvm/include/llvm/Transforms/Instrumentation/PoisonChecking.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Instrumentation/CMakeLists.txt
R llvm/lib/Transforms/Instrumentation/PoisonChecking.cpp
R llvm/test/Instrumentation/PoisonChecking/basic-flag-validation.ll
R llvm/test/Instrumentation/PoisonChecking/ub-checks.ll
M llvm/utils/gn/secondary/llvm/lib/Transforms/Instrumentation/BUILD.gn
Log Message:
-----------
Delete unused PoisonChecking utility pass
This was introduced ~5yrs ago (by me), and has never really gotten
any adoption. By now, it's significantly out of sync with new/changed
poison propoagation rules. The idea is still reasonable, but the
imagined use case is largely covered by alive2 these days anyways.
Commit: 6a01ac7d06df875206f746fc982f58c161249285
https://github.com/llvm/llvm-project/commit/6a01ac7d06df875206f746fc982f58c161249285
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M clang/lib/AST/Type.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
A clang/test/AST/HLSL/is_structured_resource_element_compatible_concept.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
Log Message:
-----------
[HLSL] Add concepts for Structured buffers (#119643)
This PR adds concept validation to structured buffers, in the same way
that it was done for typed buffers (like RWBuffer) in
https://github.com/llvm/llvm-project/pull/116413.
This PR should also be responsible for introducing rejection of 0 size
elements for structured buffers.
Fixes https://github.com/llvm/llvm-project/issues/117406
Commit: af5a65685964e064704b46947ab0102d41caa785
https://github.com/llvm/llvm-project/commit/af5a65685964e064704b46947ab0102d41caa785
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M llvm/include/llvm/IR/InstIterator.h
Log Message:
-----------
[IR] Remove unused method InstIterator::atEnd (#120611)
Commit: 6f983f88537415952ec528c42f89f1d5b620fe68
https://github.com/llvm/llvm-project/commit/6f983f88537415952ec528c42f89f1d5b620fe68
Author: Brad Smith <brad at comstyle.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M compiler-rt/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Set the default C++ library to libc++ on OpenBSD (#107694)
Commit: 0665d11228b4097c4788dd34d496676d9dbd0c3e
https://github.com/llvm/llvm-project/commit/0665d11228b4097c4788dd34d496676d9dbd0c3e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-12-19 (Thu, 19 Dec 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M bolt/lib/Rewrite/LinuxKernelRewriter.cpp
M clang-tools-extra/clang-tidy/readability/ContainerSizeEmptyCheck.h
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-type-vararg.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang-c/Index.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/arm_sve_sme_incl.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/SanitizerArgs.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
A clang/include/clang/StaticAnalyzer/Core/PathSensitive/APSIntPtr.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/MemRegion.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.h
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundCheckerV2.cpp
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
M clang/lib/StaticAnalyzer/Checkers/BitwiseShiftChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp
M clang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/Iterator.cpp
M clang/lib/StaticAnalyzer/Checkers/IteratorModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/MmapWriteExecChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
M clang/lib/StaticAnalyzer/Core/BasicValueFactory.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
M clang/lib/StaticAnalyzer/Core/SVals.cpp
M clang/lib/StaticAnalyzer/Core/SimpleConstraintManager.cpp
M clang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
M clang/lib/StaticAnalyzer/Core/SymbolManager.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
A clang/test/AST/HLSL/is_structured_resource_element_compatible_concept.hlsl
A clang/test/AST/ast-print-openacc-init-construct.cpp
A clang/test/AST/ast-print-openacc-shutdown-construct.cpp
A clang/test/CodeGen/AArch64/fmv-mix-explicit-implicit-default.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1_single.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
A clang/test/CodeGen/atomic-test-and-set.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGen/bounds-checking.c
A clang/test/CodeGen/sanitize-type-globals.cpp
M clang/test/CodeGen/ubsan-trap-debugloc.c
M clang/test/CodeGen/ubsan-trap-merge.c
M clang/test/CodeGenCXX/fmv-namespace.cpp
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-lib.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-ps.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
M clang/test/Driver/fsanitize.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/sanitizer-ld.c
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/Sema/atomic-ops.c
M clang/test/Sema/attr-target-version.c
A clang/test/Sema/builtin-assume-aligned-downgrade.c
M clang/test/Sema/builtin-assume-aligned.c
M clang/test/Sema/tautological-pointer-comparison.c
M clang/test/SemaCXX/attr-target-version.cpp
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
M clang/test/SemaOpenACC/combined-construct-async-clause.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
M clang/test/SemaOpenACC/combined-construct-wait-clause.cpp
M clang/test/SemaOpenACC/compute-construct-async-clause.cpp
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-num_gangs-clause.cpp
M clang/test/SemaOpenACC/compute-construct-num_workers-clause.cpp
M clang/test/SemaOpenACC/compute-construct-private-clause.c
M clang/test/SemaOpenACC/compute-construct-reduction-clause.c
M clang/test/SemaOpenACC/compute-construct-vector_length-clause.cpp
M clang/test/SemaOpenACC/compute-construct-wait-clause.cpp
A clang/test/SemaOpenACC/init-construct-ast.cpp
A clang/test/SemaOpenACC/init-construct.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
A clang/test/SemaOpenACC/shutdown-construct-ast.cpp
A clang/test/SemaOpenACC/shutdown-construct.cpp
M clang/test/SemaOpenACC/wait-construct.cpp
M clang/test/SemaTemplate/pack-deduction.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/utils/TableGen/SveEmitter.cpp
M compiler-rt/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/release.h
M compiler-rt/test/hwasan/TestCases/sizes.cpp
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/ConvertVariable.h
M flang/include/flang/Optimizer/Builder/Runtime/Derived.h
M flang/include/flang/Runtime/derived-api.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.h
M flang/lib/Optimizer/Builder/Runtime/Derived.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/runtime/derived-api.cpp
M flang/runtime/derived.cpp
M flang/runtime/derived.h
M flang/test/Fir/CUDA/cuda-code-gen.mlir
A flang/test/Lower/OpenMP/derived-type-allocatable.f90
M flang/test/Semantics/cuf09.cuf
M libc/docs/dev/index.rst
M libc/docs/full_host_build.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_fallbacks.h
R libcxx/include/__locale_dir/locale_guard.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/include/__support/xlocale/__nop_locale_mgmt.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/module.modulemap
M libcxx/src/include/overridable_function.h
M libcxx/src/iostream.cpp
M libcxx/src/new.cpp
M libcxx/src/support/win32/locale_win32.cpp
A libcxx/test/std/containers/sequences/vector.bool/assign_iter_iter.pass.cpp
A libcxx/test/std/containers/sequences/vector.bool/assign_size_value.pass.cpp
A libcxx/test/std/containers/sequences/vector.bool/flip.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.cons/assign_iter_iter.pass.cpp
M libcxxabi/src/stdlib_new_delete.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/SymbolTable.cpp
M lld/test/COFF/start-lib.ll
M lld/test/COFF/thin-archive.s
A lld/test/ELF/Inputs/eager.s
A lld/test/ELF/lto/Inputs/eager.ll
M lld/test/ELF/lto/start-lib.ll
M lld/test/ELF/start-lib.s
M lldb/include/lldb/Host/HostGetOpt.h
M lldb/include/lldb/Host/common/GetOptInc.h
M lldb/source/Host/posix/ProcessLauncherPosixFork.cpp
M lldb/source/Plugins/Architecture/AArch64/ArchitectureAArch64.cpp
M lldb/test/API/commands/register/register/register_command/TestRegisters.py
M lldb/test/API/macosx/lc-note/firmware-corefile/create-empty-corefile.cpp
A lldb/test/API/macosx/sme-registers/Makefile
A lldb/test/API/macosx/sme-registers/TestSMERegistersDarwin.py
A lldb/test/API/macosx/sme-registers/main.c
M lldb/tools/debugserver/source/DNBDefs.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/MacOSX/MachThread.cpp
M lldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.cpp
M lldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.h
A lldb/tools/debugserver/source/MacOSX/arm64/sme_thread_status.h
M lldb/tools/debugserver/source/RNBRemote.cpp
M llvm/Maintainers.md
M llvm/cmake/modules/AddLLVM.cmake
M llvm/docs/Coroutines.rst
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/SPIRVUsage.rst
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/IR/InstIterator.h
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/Support/GenericDomTree.h
R llvm/include/llvm/Transforms/Instrumentation/PoisonChecking.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
A llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86RegisterInfo.td
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
M llvm/lib/ToolDrivers/llvm-lib/Options.td
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Instrumentation/CMakeLists.txt
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
R llvm/lib/Transforms/Instrumentation/PoisonChecking.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-cast.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/AArch64/sve-trunc.ll
M llvm/test/Analysis/CostModel/X86/reduction.ll
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-int-fp.ll
A llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-to-int.ll
A llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-int-to-fp.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-to-fp.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
A llvm/test/CodeGen/AMDGPU/uniform_branch_with_floating_point_cond.ll
M llvm/test/CodeGen/DirectX/BufferLoad.ll
M llvm/test/CodeGen/DirectX/BufferStore-errors.ll
M llvm/test/CodeGen/DirectX/BufferStore.ll
M llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll
M llvm/test/CodeGen/DirectX/CreateHandle.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
M llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
M llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
M llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll
A llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
A llvm/test/CodeGen/LoongArch/lsx/fpowi.ll
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/chain-different-as.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
M llvm/test/CodeGen/NVPTX/demote-vars.ll
M llvm/test/CodeGen/NVPTX/extractelement.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
M llvm/test/CodeGen/NVPTX/fma-relu-fma-intrinsic.ll
M llvm/test/CodeGen/NVPTX/fma-relu-instruction-flag.ll
M llvm/test/CodeGen/NVPTX/i1-load-lower.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test2.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/misched_func_call.ll
M llvm/test/CodeGen/NVPTX/pr13291-i1-store.ll
M llvm/test/CodeGen/NVPTX/reg-types.ll
M llvm/test/CodeGen/NVPTX/unfold-masked-merge-vector-variablemask.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vector-returns.ll
A llvm/test/CodeGen/RISCV/machine-pipeliner.ll
M llvm/test/CodeGen/RISCV/pr84653_pr85190.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpowi.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
A llvm/test/CodeGen/RISCV/zbb-logic-neg-imm.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferDynIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferNonUniformIdx.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
A llvm/test/CodeGen/Thumb2/bf16-instructions.ll
M llvm/test/CodeGen/X86/apx/mul-i1024.ll
M llvm/test/Instrumentation/BoundsChecking/runtimes.ll
R llvm/test/Instrumentation/PoisonChecking/basic-flag-validation.ll
R llvm/test/Instrumentation/PoisonChecking/ub-checks.ll
M llvm/test/MC/AArch64/SVE/bfcvtnt-diagnostics.s
M llvm/test/MC/AArch64/SVE/bfcvtnt.s
M llvm/test/MC/AArch64/arm64-elf-relocs.s
M llvm/test/MC/AArch64/ilp32-diagnostics.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
A llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/ELF/noexec.s
A llvm/test/Transforms/HotColdSplit/outline-inner-region-stacktoocomplex.ll
A llvm/test/Transforms/InstCombine/select-with-extreme-eq-cond.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
R llvm/test/Transforms/PGOProfile/Inputs/memprof_missing_leaf.exe
R llvm/test/Transforms/PGOProfile/Inputs/memprof_missing_leaf.memprofraw
M llvm/test/Transforms/PGOProfile/Inputs/update_memprof_inputs.sh
M llvm/test/Transforms/PGOProfile/memprof_missing_leaf.ll
A llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/tools/llvm-dwarfdump/X86/verify_no_overlap_error_icf.yaml
A llvm/test/tools/llvm-mca/RISCV/MIPS/p8700.s
R llvm/test/tools/llvm-mca/RISCV/SiFive7/reductions.s
R llvm/test/tools/llvm-mca/RISCV/SiFive7/strided-load-store.s
R llvm/test/tools/llvm-mca/RISCV/SiFive7/strided-load-x0.s
R llvm/test/tools/llvm-mca/RISCV/SiFive7/vector-integer-arithmetic.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/different-lmul-instruments.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/different-sew-instruments.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/disable-im.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/fractional-lmul-data.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/lmul-instrument-at-start.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/lmul-instrument-in-middle.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/lmul-instrument-in-region.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/lmul-instrument-straddles-region.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/multiple-same-lmul-instruments.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/multiple-same-sew-instruments.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/needs-sew-but-only-lmul.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/no-vsetvli-to-start.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/reductions.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/riscv-lmul-instrument-no-data-is-err.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/riscv-sew-instrument-no-data-is-err.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-at-start.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-in-middle.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-in-region.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/sew-instrument-straddles-region.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/strided-load-store.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/strided-load-x0.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/unknown-instrument-is-err.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/unknown-lmul-is-err.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/unknown-sew-is-err.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vector-integer-arithmetic.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vle-vse.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetivli-lmul-instrument.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetivli-lmul-sew-instrument.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetvli-lmul-instrument.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveX280/vsetvli-lmul-sew-instrument.s
R llvm/test/tools/llvm-mca/RISCV/different-lmul-instruments.s
R llvm/test/tools/llvm-mca/RISCV/different-sew-instruments.s
R llvm/test/tools/llvm-mca/RISCV/disable-im.s
R llvm/test/tools/llvm-mca/RISCV/fractional-lmul-data.s
R llvm/test/tools/llvm-mca/RISCV/lmul-instrument-at-start.s
R llvm/test/tools/llvm-mca/RISCV/lmul-instrument-in-middle.s
R llvm/test/tools/llvm-mca/RISCV/lmul-instrument-in-region.s
R llvm/test/tools/llvm-mca/RISCV/lmul-instrument-straddles-region.s
R llvm/test/tools/llvm-mca/RISCV/multiple-same-lmul-instruments.s
R llvm/test/tools/llvm-mca/RISCV/multiple-same-sew-instruments.s
R llvm/test/tools/llvm-mca/RISCV/needs-sew-but-only-lmul.s
R llvm/test/tools/llvm-mca/RISCV/no-vsetvli-to-start.s
R llvm/test/tools/llvm-mca/RISCV/riscv-lmul-instrument-no-data-is-err.s
R llvm/test/tools/llvm-mca/RISCV/riscv-sew-instrument-no-data-is-err.s
R llvm/test/tools/llvm-mca/RISCV/sew-instrument-at-start.s
R llvm/test/tools/llvm-mca/RISCV/sew-instrument-in-middle.s
R llvm/test/tools/llvm-mca/RISCV/sew-instrument-in-region.s
R llvm/test/tools/llvm-mca/RISCV/sew-instrument-straddles-region.s
R llvm/test/tools/llvm-mca/RISCV/unknown-instrument-is-err.s
R llvm/test/tools/llvm-mca/RISCV/unknown-lmul-is-err.s
R llvm/test/tools/llvm-mca/RISCV/unknown-sew-is-err.s
R llvm/test/tools/llvm-mca/RISCV/vle-vse.s
R llvm/test/tools/llvm-mca/RISCV/vsetivli-lmul-instrument.s
R llvm/test/tools/llvm-mca/RISCV/vsetivli-lmul-sew-instrument.s
R llvm/test/tools/llvm-mca/RISCV/vsetvli-lmul-instrument.s
R llvm/test/tools/llvm-mca/RISCV/vsetvli-lmul-sew-instrument.s
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/ScopedHashTableTest.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/targets_with_exegesis.gni
M llvm/utils/gn/secondary/llvm/lib/Transforms/Instrumentation/BUILD.gn
A llvm/utils/gn/secondary/llvm/tools/llvm-exegesis/lib/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
M mlir/cmake/modules/MLIRDetectPythonEnv.cmake
M mlir/include/mlir/Bindings/Python/IRTypes.h
M mlir/include/mlir/Bindings/Python/NanobindAdaptors.h
M mlir/include/mlir/Bindings/Python/PybindAdaptors.h
M mlir/lib/Bindings/Python/Globals.h
M mlir/lib/Bindings/Python/IRAffine.cpp
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRInterfaces.cpp
M mlir/lib/Bindings/Python/IRModule.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/Bindings/Python/IRTypes.cpp
M mlir/lib/Bindings/Python/MainModule.cpp
A mlir/lib/Bindings/Python/NanobindUtils.h
M mlir/lib/Bindings/Python/Pass.cpp
M mlir/lib/Bindings/Python/Pass.h
R mlir/lib/Bindings/Python/PybindUtils.h
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/Bindings/Python/Rewrite.h
M mlir/lib/Dialect/GPU/Pipelines/GPUToNVVMPipeline.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/python/CMakeLists.txt
M mlir/python/requirements.txt
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/python/ir/symbol_table.py
M utils/bazel/WORKSPACE
M utils/bazel/llvm-project-overlay/lld/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
rebase
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/e0b8571e5af1...0665d11228b4
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