[all-commits] [llvm/llvm-project] eb812d: [X86] Put R20/R21/R28/R29 later in GR64 list (#120...

[Feng Zou via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: eb812d28f542bf0de54c157a7391e446739570cc
      https://github.com/llvm/llvm-project/commit/eb812d28f542bf0de54c157a7391e446739570cc
  Author: Feng Zou <feng.zou at intel.com>
  Date:   2024-12-19 (Thu, 19 Dec 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86RegisterInfo.td
    M llvm/test/CodeGen/X86/apx/mul-i1024.ll

  Log Message:
  -----------
  [X86] Put R20/R21/R28/R29 later in GR64 list (#120510)

Because these registers require an extra byte to encode in certain
memory form. Putting them later in the list will reduce code size when
EGPR is enabled. And align the same order in GR8, GR16 and GR32 lists.
Example:

    movq (%r20), %r11  # encoding: [0xd5,0x1c,0x8b,0x1c,0x24]
    movq (%r22), %r11  # encoding: [0xd5,0x1c,0x8b,0x1e]



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