[all-commits] [llvm/llvm-project] 9fa109: Revert "[RISCV] Add scheduling model for mips p870...

[Djordje Todorovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9fa109a5088bff9e8eabf6d67d0650fbd3db27cb
      https://github.com/llvm/llvm-project/commit/9fa109a5088bff9e8eabf6d67d0650fbd3db27cb
  Author: Djordje Todorovic <djordje.todorovic at htecgroup.com>
  Date:   2024-12-19 (Thu, 19 Dec 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/RISCV/RISCVProcessors.td
    R llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
    R llvm/test/tools/llvm-mca/RISCV/MIPS/p8700.s

  Log Message:
  -----------
  Revert "[RISCV] Add scheduling model for mips p8700 CPU" (#120537)

Reverts llvm/llvm-project#119885

llvm-project/llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td:20:5:
error: Processor does not define resources for WriteFCvtF32ToF16
def MIPSP8700Model : SchedMachineModel {



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