[all-commits] [llvm/llvm-project] 0f9257: [RISCV] Add scheduling model for mips p8700 CPU (#...

[Djordje Todorovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0f9257b9abab72afdc210412a21c628f2df1a1f0
      https://github.com/llvm/llvm-project/commit/0f9257b9abab72afdc210412a21c628f2df1a1f0
  Author: Djordje Todorovic <djordje.todorovic at htecgroup.com>
  Date:   2024-12-19 (Thu, 19 Dec 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/RISCV/RISCVProcessors.td
    A llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
    A llvm/test/tools/llvm-mca/RISCV/MIPS/p8700.s

  Log Message:
  -----------
  [RISCV] Add scheduling model for mips p8700 CPU (#119885)

Depends on #119882.



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