[all-commits] [llvm/llvm-project] 4c6e13: [flang] Add cmake error if building with clang-cl ...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Wed Dec 18 10:36:53 PST 2024
Branch: refs/heads/users/vitalybuka/spr/driver-fix-sanitizer-libc-runtime-linking
Home: https://github.com/llvm/llvm-project
Commit: 4c6e13f64462872196fcb4828e68093c6db1af00
https://github.com/llvm/llvm-project/commit/4c6e13f64462872196fcb4828e68093c6db1af00
Author: David Truby <david.truby at arm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M flang/CMakeLists.txt
Log Message:
-----------
[flang] Add cmake error if building with clang-cl and MSVC 17.12 (#120114)
Commit: 67c55b1ffc0b09cac66d8b18ada1e876d9312173
https://github.com/llvm/llvm-project/commit/67c55b1ffc0b09cac66d8b18ada1e876d9312173
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/test/CodeGen/AMDGPU/group-image-instructions.ll
M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
Log Message:
-----------
[AMDGPU] Make max dwords of memory cluster configurable (#119342)
We find it helpful to increase the value for graphics workload. Make it
configurable so we can experiment with a different value.
Commit: 1ef5b987a464611a60e873650726b5e02fda0feb
https://github.com/llvm/llvm-project/commit/1ef5b987a464611a60e873650726b5e02fda0feb
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/test/ELF/aarch64-got-relocations-pauth.s
Log Message:
-----------
[PAC][lld][AArch64][ELF] Support signed GOT with tiny code model (#113816)
Depends on #114525
Support `R_AARCH64_AUTH_GOT_ADR_PREL_LO21` and `R_AARCH64_AUTH_GOT_LD_PREL19`
GOT-generating relocations. A corresponding `RE_AARCH64_AUTH_GOT_PC` member
of `RelExpr` is added, which is an AUTH-specific variant of `R_GOT_PC`.
Commit: 99c2e3b78210a345afb1b5121f12b0e7bf923543
https://github.com/llvm/llvm-project/commit/99c2e3b78210a345afb1b5121f12b0e7bf923543
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-divergent.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
Log Message:
-----------
[NFC][AMDGPU] Pre-commit clang and llvm tests for dynamic allocas (#120063)
For #119822
Commit: b6ad231666fa8be41e2f357f53072238fdb4059e
https://github.com/llvm/llvm-project/commit/b6ad231666fa8be41e2f357f53072238fdb4059e
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
[MachineSink] Use `RegisterClassInfo::getRegPressureSetLimit` (#119830)
`RegisterClassInfo::getRegPressureSetLimit` is a wrapper of
`TargetRegisterInfo::getRegPressureSetLimit` with some logics to
adjust the limit by removing reserved registers.
It seems that we shouldn't use
`TargetRegisterInfo::getRegPressureSetLimit`
directly, just like the comment "This limit must be adjusted
dynamically for reserved registers" said.
Separate from https://github.com/llvm/llvm-project/pull/118787
Commit: d6e8ab1fa6a7a08d77c4c663ee494449b4b88bcd
https://github.com/llvm/llvm-project/commit/d6e8ab1fa6a7a08d77c4c663ee494449b4b88bcd
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-divergent.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
Log Message:
-----------
Revert "[NFC][AMDGPU] Pre-commit clang and llvm tests for dynamic allocas" (#120369)
Reverts llvm/llvm-project#120063 due to build-bot failures
Commit: 1235a93fae60bed5814e918dd8608097d9302a59
https://github.com/llvm/llvm-project/commit/1235a93fae60bed5814e918dd8608097d9302a59
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/MachinePipeliner.cpp
Log Message:
-----------
[MachinePipeliner] Use `RegisterClassInfo::getRegPressureSetLimit` (#119827)
`RegisterClassInfo::getRegPressureSetLimit` is a wrapper of
`TargetRegisterInfo::getRegPressureSetLimit` with some logics to
adjust the limit by removing reserved registers.
It seems that we shouldn't use
`TargetRegisterInfo::getRegPressureSetLimit`
directly, just like the comment "This limit must be adjusted
dynamically for reserved registers" said.
Thus we should use `RegisterClassInfo::getRegPressureSetLimit` and
remove replicated code.
Separate from https://github.com/llvm/llvm-project/pull/118787
Commit: d9f3fae2fbabe0046bfb5888a71cf878830fddc1
https://github.com/llvm/llvm-project/commit/d9f3fae2fbabe0046bfb5888a71cf878830fddc1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-12-17 (Tue, 17 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
Log Message:
-----------
[RISCV] Add NoStdExtZfa predicates to BuildPairF64Pseudo and SplitF64Pseudo.
The makes the priority of the Zfa patterns of the pseudos explicit.
Previously the priority only worked because instructions with
usesCustomInserter=1 have lower priority.
Commit: 3666de9c8e3bfd3a3b604e0e434341ec49cb3a6d
https://github.com/llvm/llvm-project/commit/3666de9c8e3bfd3a3b604e0e434341ec49cb3a6d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/IR/LLVMContext.cpp
Log Message:
-----------
LLVMContext: Cleanup registration of known bundle IDs (#120359)
Commit: 44aa476aa1468adbbbca79cc77cfb5905f5fd3d6
https://github.com/llvm/llvm-project/commit/44aa476aa1468adbbbca79cc77cfb5905f5fd3d6
Author: David Truby <david.truby at arm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/Target.cpp
A flang/test/Fir/struct-passing-aarch64-byval.fir
Log Message:
-----------
[flang] AArch64 ABI for BIND(C) VALUE parameters (#118305)
This patch adds handling for derived type VALUE parameters in BIND(C)
functions for AArch64.
Commit: b7a8d9584c787b95ddf6931e915fb643b28f91e1
https://github.com/llvm/llvm-project/commit/b7a8d9584c787b95ddf6931e915fb643b28f91e1
Author: hanbeom <kese111 at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/extract-fneg-insert.ll
Log Message:
-----------
[VectorCombine] Combine scalar fneg with insert/extract to vector fneg when length is different (#115209)
insertelt DestVec, (fneg (extractelt SrcVec, Index)), Index
-> shuffle DestVec, (shuffle (fneg SrcVec), poison, SrcMask), Mask
Original combining left the combine between vectors of different lengths as a TODO.
Commit: e532241b021cd48bad303721757c1194bc844775
https://github.com/llvm/llvm-project/commit/e532241b021cd48bad303721757c1194bc844775
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
A flang/include/flang/Lower/DirectivesCommon.h
M flang/lib/Lower/Bridge.cpp
R flang/lib/Lower/DirectivesCommon.h
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
A flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
A offload/test/offloading/fortran/explicit-and-implicit-record-field-mapping.f90
A offload/test/offloading/fortran/implicit-record-field-mapping.f90
Log Message:
-----------
Re-apply (#117867): [flang][OpenMP] Implicitly map allocatable record fields (#120374)
This re-applies #117867 with a small fix that hopefully prevents build
bot failures. The fix is avoiding `dyn_cast` for the result of
`getOperation()`. Instead we can assign the result to `mlir::ModuleOp`
directly since the type of the operation is known statically (`OpT` in
`OperationPass`).
Commit: d9703501b037b012b887ceade77f6a7c392d0524
https://github.com/llvm/llvm-project/commit/d9703501b037b012b887ceade77f6a7c392d0524
Author: Florian Mayer <fmayer at google.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
[MTE] [NFC] use vector to collect globals to tag (#120283)
The same pattern caused test failures in the HWASan pass, so is brittle.
Let's go for the easier approach.
Commit: ccb66bff3ccbaade2d2bc62985939866edb4f1f7
https://github.com/llvm/llvm-project/commit/ccb66bff3ccbaade2d2bc62985939866edb4f1f7
Author: Peter Smith <peter.smith at arm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/docs/Security.rst
Log Message:
-----------
[DOCS] Rename LLVM Security Group to LLVM Security Response Group. (#116986)
Rename LLVM Security Group to LLVM Security Response Group. Take the
opportunity to canonicalise security group and Security Group to LLVM
Security Response Group.
At the 2024-11-19 LLVM Security Group meeting [1] we discussed that in
practice the LLVM Security Group was performing an incident response
role, but it was not proactively adding additional testing, fuzzing and
hardening. We do not want projects that use LLVM to see the LLVM
Security Group as guaranteeing security for LLVM.
We decided that it would be useful to rename the group to LLVM Security
Response Group as that reflects the work that it is doing.
There may be a case for a proactive security group with a different
remit, but this is out of scope of this commit.
[1]
https://discourse.llvm.org/t/llvm-security-group-public-sync-ups/62735/32
Commit: 0e324b3f953d62527690b1cb44d95fcb3ec0512c
https://github.com/llvm/llvm-project/commit/0e324b3f953d62527690b1cb44d95fcb3ec0512c
Author: Peter Smith <peter.smith at arm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/docs/Security.rst
Log Message:
-----------
[DOCS] Remove bullet point on improving security over time. (#116980)
Remove the 6th bullet point "Strive to improve security over time, for
example by adding additional testing, fuzzing and hardening after fixing
issues."
At the security group meeting on 2024-11-19 we discussed the role the
security group was performing in practice. We are in effect acting as a
security response group, dealing with issues raised via the process
given in the LLVM Security group page. We are not proactively adding
additional testing fuzzing and hardening. While this could be considered
an aspirational goal, it may give the implication that the LLVM Security
Group is handling or at worst guaranteeing security for the LLVM project
when in practice it is not.
Meeting notes:
https://discourse.llvm.org/t/llvm-security-group-public-sync-ups/62735/32
Commit: 3bcfa1a579e7ab2c7a5051d897c572da05d83fd6
https://github.com/llvm/llvm-project/commit/3bcfa1a579e7ab2c7a5051d897c572da05d83fd6
Author: Nathan Gauër <brioche at google.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
[Github] Add LLVM Premerge Checks to the watchlist (#120230)
LLVM Premerge Checks is running on the new GCP cluster. Tracking its
metrics will allow us to determine the stability of the presubmit and
make sure the new infra is working as intended.
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: 3ed2a81358e11a582eb5cc3edf711447767036e6
https://github.com/llvm/llvm-project/commit/3ed2a81358e11a582eb5cc3edf711447767036e6
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[SPIR-V] Fix issue #120078 and simplifies parsing of floating point decoration tips in demangled function name (#120128)
This PR fixes https://github.com/llvm/llvm-project/issues/120078 and
improves/simplifies parsing of demangled function name that aims to
detect a tip for floating point decorations. The latter improvement
fixes also a complaint from `LLVM_USE_SANITIZER=Address`.
Commit: 96bb281b636a30f5896c48035cca55807f105a56
https://github.com/llvm/llvm-project/commit/96bb281b636a30f5896c48035cca55807f105a56
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
M llvm/test/CodeGen/AArch64/vecreduce-bool.ll
M llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
Log Message:
-----------
[AArch64] Prevent unnecessary truncation in bool vector reduce code generation (#120096)
Prevent unnecessarily truncating results of 128 bit wide vector
comparisons to 64 bit wide vector values in boolean vector reduce
operations.
Commit: 13107cb09441dfeab24fcbcae9f4d3ba4cfc2703
https://github.com/llvm/llvm-project/commit/13107cb09441dfeab24fcbcae9f4d3ba4cfc2703
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/multi_early_exit.ll
M llvm/test/Transforms/LoopVectorize/multi_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
A llvm/test/Transforms/LoopVectorize/single_early_exit_with_outer_loop.ll
Log Message:
-----------
[LoopVectorize] Enable more early exit vectorisation tests (#117008)
PR #112138 introduced initial support for dispatching to
multiple exit blocks via split middle blocks. This patch
fixes a few issues so that we can enable more tests to use
the new enable-early-exit-vectorization flag. Fixes are:
1. The code to bail out for any loop live-out values happens
too late. This is because collectUsersInExitBlocks ignores
induction variables, which get dealt with in fixupIVUsers.
I've moved the check much earlier in processLoop by looking
for outside users of loop-defined values.
2. We shouldn't yet be interleaving when vectorising loops
with uncountable early exits, since we've not added support
for this yet.
3. Similarly, we also shouldn't be creating vector epilogues.
4. Similarly, we shouldn't enable tail-folding.
5. The existing implementation doesn't yet support loops
that require scalar epilogues, although I plan to add that
as part of PR #88385.
6. The new split middle blocks weren't being added to the
parent loop.
Commit: 1d4453a6711394b368995c0f761015c1f6d27250
https://github.com/llvm/llvm-project/commit/1d4453a6711394b368995c0f761015c1f6d27250
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
A flang/test/HLFIR/order_assignments/forall-issue120190.fir
Log Message:
-----------
[flang][HLFIR] fix FORALL issue 120190 (#120236)
Fix #120190.
The hlfir.forall lowering code was not properly checking for forall
index reference in mask value computation before trying to hoist it: it
was only looking at the ops directly nested in the hlfir.forall_mask
region, but not the operation indirectly nested. This caused triggered
bogus hoisting in #120190 leading to undefined behavior (reference to
uinitialized data). The added regression test would die at compile time
with a dominance error.
Fix this by doing a deep walk of the region operation instead. Also
clean-up the region cloning to use without_terminator.
Commit: 5fc8062f5d9b0c62bdb3c817182d7275d27f7527
https://github.com/llvm/llvm-project/commit/5fc8062f5d9b0c62bdb3c817182d7275d27f7527
Author: Elizaveta Noskova <159026035+enoskova-sc at users.noreply.github.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[llvm][RISCV] Set ScalableVector stack id in proper place (#117862)
Without this patch ScalableVector frame index property is used before
assignment. More precisely, let's take a look at
RISCVFrameLowering::assignCalleeSavedSpillSlots. In this function we
divide callee saved registers on scalar and vector ones, based on
ScalableVector property of their frame indexes:
```
...
const auto &UnmanagedCSI = getUnmanagedCSI(*MF, CSI);
const auto &RVVCSI = getRVVCalleeSavedInfo(*MF, CSI);
...
```
But we assign ScalableVector property several lines below:
```
...
auto storeRegToStackSlot = [&](decltype(UnmanagedCSI) CSInfo) {
for (auto &CS : CSInfo) {
// Insert the spill to the stack frame.
Register Reg = CS.getReg();
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
TII.storeRegToStackSlot(MBB, MI, Reg, !MBB.isLiveIn(Reg),
CS.getFrameIdx(), RC, TRI, Register());
}
};
storeRegToStackSlot(UnmanagedCSI);
...
```
Due to it, list of RVV callee saved registers will always be empty.
Currently this problem doesn't appear, but if you slightly change the
code and, for example, put some instructions between scalar and vector
spills, the resulting code will be ill formed.
Commit: 3e02038948abf60d5c9a600f0a08a2dd9223982a
https://github.com/llvm/llvm-project/commit/3e02038948abf60d5c9a600f0a08a2dd9223982a
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
Log Message:
-----------
[LV] Fixup check lines after 13107cb09441.
Commit: 66bdbfbaa08fa3d8e64a7fe136a8fb717f5cdbb7
https://github.com/llvm/llvm-project/commit/66bdbfbaa08fa3d8e64a7fe136a8fb717f5cdbb7
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M lldb/source/Host/posix/MainLoopPosix.cpp
Log Message:
-----------
[lldb][NFC] clang-format MainLoopPosix.cpp
Since AIX support is about to change this.
Commit: db93ef14aef9c572e02bc842762bc4d0278148f9
https://github.com/llvm/llvm-project/commit/db93ef14aef9c572e02bc842762bc4d0278148f9
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang-tools-extra/clangd/unittests/DumpASTTests.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Expr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp
M clang/test/CXX/drs/cwg28xx.cpp
M clang/test/CodeGenCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/ms-property.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Implement CWG2813: Class member access with prvalues (#120223)
This is a rebase of #95112 with my own feedback apply as @MitalAshok has
been inactive for a while.
It's fairly important this makes clang 20 as it is a blocker for #107451
---
[CWG2813](https://cplusplus.github.io/CWG/issues/2813.html)
prvalue.member_fn(expression-list) now will not materialize a temporary
for prvalue if member_fn is an explicit object member function, and
prvalue will bind directly to the object parameter.
The E1 in E1.static_member is now a discarded-value expression, so if E1
was a call to a [[nodiscard]] function, there will now be a warning.
This also affects C++98 with [[gnu::warn_unused_result]] functions.
This should not affect C where TemporaryMaterializationConversion is a
no-op.
Closes #100314
Fixes #100341
---------
Co-authored-by: Mital Ashok <mital at mitalashok.co.uk>
Commit: 16c02df8caae7b03fef4bc56759c342e7ff42d8b
https://github.com/llvm/llvm-project/commit/16c02df8caae7b03fef4bc56759c342e7ff42d8b
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M .git-blame-ignore-revs
Log Message:
-----------
[lldb] Add lldb/source/Host/posix/MainLoopPosix.cpp to git blame ignores
Commit: 1ee740a79620aa680f68d873d6a7b5cfa1df7b19
https://github.com/llvm/llvm-project/commit/1ee740a79620aa680f68d873d6a7b5cfa1df7b19
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
A llvm/include/llvm/IR/VectorTypeUtils.h
M llvm/lib/IR/CMakeLists.txt
M llvm/lib/IR/VFABIDemangler.cpp
A llvm/lib/IR/VectorTypeUtils.cpp
M llvm/unittests/IR/CMakeLists.txt
M llvm/unittests/IR/VFABIDemanglerTest.cpp
A llvm/unittests/IR/VectorTypeUtilsTest.cpp
Log Message:
-----------
[VFABI] Add support for vector functions that return struct types (#119000)
This patch updates the `VFABIDemangler` to support vector functions that
return struct types. For example, a vector variant of `sincos` that
returns a vector of sine values and a vector of cosine values within a
struct.
This patch also adds some helpers for vectorizing types (including
struct types). Some of these are used in the `VFABIDemangler`, and
others will be used in subsequent patches, so this patch simply adds
tests for them.
Commit: 0b4ee8d4ee4be78e90fd7c4dc4a8f05e6b1a091e
https://github.com/llvm/llvm-project/commit/0b4ee8d4ee4be78e90fd7c4dc4a8f05e6b1a091e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-bugfix-26264.ll
M llvm/test/CodeGen/X86/avx512-masked-memop-64-32.ll
M llvm/test/CodeGen/X86/pr33349.ll
M llvm/test/CodeGen/X86/pr34177.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/CodeGen/X86/vector-compress.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
Log Message:
-----------
[X86] combineKSHIFT - fold kshiftr(kshiftr/extract_subvector(X,C1),C2) --> kshiftr(X,C1+C2) (#115528)
Merge serial KSHIFTR nodes, possibly separated by EXTRACT_SUBVECTOR, to allow mask instructions to be computed in parallel.
Commit: 31239540b09bf5315b3a795160cf47d4c4edcd4e
https://github.com/llvm/llvm-project/commit/31239540b09bf5315b3a795160cf47d4c4edcd4e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
Log Message:
-----------
[gn build] Port 1ee740a79620
Commit: 7e49ada9a3c0f8228c79de7f65d3255916087bb0
https://github.com/llvm/llvm-project/commit/7e49ada9a3c0f8228c79de7f65d3255916087bb0
Author: Vladislav Khmelevsky <och95 at yandex.ru>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[github/CODEOWNERS] Add yota9 as BOLT reviewer
Commit: f8d270474c14c6705c77971494505dbe4b6d55ae
https://github.com/llvm/llvm-project/commit/f8d270474c14c6705c77971494505dbe4b6d55ae
Author: Vladi Krapp <vladi.krapp at arm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/test/Transforms/LoopUnroll/ARM/lob-unroll.ll
Log Message:
-----------
[ARM] Reduce loop unroll when low overhead branching is available (#120065)
For processors with low overhead branching (LOB), runtime unrolling the
innermost loop is often detrimental to performance. In these cases the
loop remainder gets unrolled into a series of compare-and-jump blocks,
which in deeply nested loops get executed multiple times, negating the
benefits of LOB.
This is particularly noticable when the loop trip count of the innermost
loop varies within the outer loop, such as in the case of triangular
matrix decompositions.
In these cases we will prefer to not unroll the innermost loop, with the
intention for it to be executed as a low overhead loop.
Commit: b3eede5e1fa7ab742b86e9be22db7bccd2505b8a
https://github.com/llvm/llvm-project/commit/b3eede5e1fa7ab742b86e9be22db7bccd2505b8a
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/include/llvm/CodeGen/ComplexDeinterleavingPass.h
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/complex-deinterleaving-cdot.ll
Log Message:
-----------
Add support for single reductions in ComplexDeinterleavingPass (#112875)
The Complex Deinterleaving pass assumes that all values emitted will
result in complex numbers, this patch aims to remove that assumption and
adds support for emitting just the real or imaginary components, not
both.
Commit: 9daf10ff8f29ba3a88a105aaa9d2379c21b77d35
https://github.com/llvm/llvm-project/commit/9daf10ff8f29ba3a88a105aaa9d2379c21b77d35
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/CXX/temp/temp.res/p4.cpp
M clang/test/CodeGenCXX/default-arguments.cpp
Log Message:
-----------
Reland [Clang] skip default argument instantiation for non-defining friend declarations to meet [dcl.fct.default] p4 (#115487)
This fixes a crash when instantiating default arguments for templated
friend function declarations which lack a definition.
There are implementation limits which prevents us from finding the
pattern for such functions, and this causes difficulties
setting up the instantiation scope for the function parameters.
This patch skips instantiating the default argument in these cases,
which causes a minor regression in error recovery, but otherwise avoids
the crash.
The previous attempt #113777 accidentally skipped all default argument
constructions, causing some regressions. This patch resolves that by
moving the guard to InstantiateDefaultArgument() where the handling of
templates takes place.
Fixes https://github.com/llvm/llvm-project/issues/113324
Commit: 414c462a839edbcbed217b8d695e71f2ede7f952
https://github.com/llvm/llvm-project/commit/414c462a839edbcbed217b8d695e71f2ede7f952
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-divergent.ll
Log Message:
-----------
[AMDGPU] Modify Dyn Alloca test to account for Machine-Verifier bug (#120393)
Machine-Verifier crashes in kernel functions,
but fails gracefully in device functions.
This is due to the buffer resource descriptor selected
during G-ISEL, before the fallback path.
Device functions use `$sgpr0_sgpr1_sgpr2_sgpr3`.
while Kernel functions select `$private_rsrc_reg`
where machine-verifier complains:
`$private_rsrc_reg is not a SReg_128 register.`
Modifying test case to capture both behaviors, this is related to
https://github.com/llvm/llvm-project/pull/120063
Commit: 222dd235ffc39b3695a3c002593097bec216a8fa
https://github.com/llvm/llvm-project/commit/222dd235ffc39b3695a3c002593097bec216a8fa
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/IncludeCleanerCheck.cpp
M clang-tools-extra/clang-tidy/readability/InconsistentDeclarationParameterNameCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/argument-comment-strict.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-type-const-cast.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-type-static-cast-downcast.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/unused-parameters-strict.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-format.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print-absl.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print.cpp
M clang-tools-extra/unittests/clang-tidy/IncludeCleanerTest.cpp
Log Message:
-----------
[clang-tidy] use local config (#120004)
follow up patch for #119948.
Commit: 41c1992a16997229469aa08bc195919e96d18211
https://github.com/llvm/llvm-project/commit/41c1992a16997229469aa08bc195919e96d18211
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/CodeGen/NVPTX/nvcl-param-align.ll
Log Message:
-----------
[NVPTX] fix nvcl-param-align.ll
fix for f9c8c01d38f8fbea81db99ab90b7d0f2bdcc8b4d
Commit: 7384d8bc18535286a24b4422f6661109d127e8fd
https://github.com/llvm/llvm-project/commit/7384d8bc18535286a24b4422f6661109d127e8fd
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
Log Message:
-----------
SourceCoverageViewHTML.cpp: Reformat JS
Commit: 5a5838fba37153adb7885c897131dda09227eb2d
https://github.com/llvm/llvm-project/commit/5a5838fba37153adb7885c897131dda09227eb2d
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang/lib/CodeGen/CoverageMappingGen.cpp
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
Log Message:
-----------
Introduce CounterMappingRegion::isBranch(). NFC.
Commit: a9df1f6cb0dcdd808abc25f7fa1555e9e0ec6a9f
https://github.com/llvm/llvm-project/commit/a9df1f6cb0dcdd808abc25f7fa1555e9e0ec6a9f
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/tools/llvm-cov/SourceCoverageViewText.cpp
Log Message:
-----------
llvm-cov: Refactor SourceCoverageView::renderBranchView().
NFC except for calculating `Total`. I've replaced
`(uint64_t)+(uint64_t)` with `(double)+(double)`.
This is still inexact with large numbers `(1LL << 53)` but will be expected to prevent possible overflow.
Commit: 95eb49a0905568a13c840b7866ce5d9c47e022f0
https://github.com/llvm/llvm-project/commit/95eb49a0905568a13c840b7866ce5d9c47e022f0
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/LoopAccessAnalysis/nusw-predicates.ll
Log Message:
-----------
[SCEV] Bail out on mixed int/pointer in SCEVWrapPredicate::implies.
Fixes a crash when trying to extend the pointer start value to a narrow
integer type after b6c29fdffd65.
Commit: 9826201093f047164733982492e25151b28404df
https://github.com/llvm/llvm-project/commit/9826201093f047164733982492e25151b28404df
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/IR/LLVMContext.cpp
Log Message:
-----------
LLVMContext: rem constexpr to unblock build w/ gcc (#120402)
Address issues observed in buildbots with older GCC versions:
https://lab.llvm.org/buildbot/#/builders/140/builds/13302
Commit: dd8e1adbf22f9b84e9fc5ed65530df55a3c3b693
https://github.com/llvm/llvm-project/commit/dd8e1adbf22f9b84e9fc5ed65530df55a3c3b693
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vec_shift6.ll
M llvm/test/CodeGen/X86/vector-fshl-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-sub128.ll
Log Message:
-----------
[X86] LowerShift - track the number and location of constant shift elements. (#120270)
We have several vector shift lowering strategies that have to analyse
the distribution of non-uniform constant vector shift amounts, at the
moment there is very little sharing of data between these analysis.
This patch creates a SmallDenseMap of the different LEGAL constant shift
amounts used, with a mask of which elements they are used in. So far
I've only updated the shuffle(immshift(x,c1),immshift(x,c2)) lowering
pattern to use it for clarity, there's several more that can be done in
followups. Its hoped that the proposed patch #117980 can be simplified
after this patch as well.
vec_shift6.ll - the existing shuffle(immshift(x,c1),immshift(x,c2))
lowering bails on out of range shift amounts, while this patch now skips
them and treats them as UNDEF - this means we manage to fold more cases
that before would have to lower to a SHL->MUL pattern, including some
legalized cases.
Commit: 1941f341722178390f71e07502e08a2250a704c7
https://github.com/llvm/llvm-project/commit/1941f341722178390f71e07502e08a2250a704c7
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[TableGen][GISel] Import more "multi-level" patterns (#120332)
Previously, if the destination DAG has an untyped leaf, we would import
the pattern only if that leaf is defined by the *top-level* source DAG.
This is an unnecessary restriction.
Here is an example of such pattern:
```
def : Pat<(add (mul v8i16:$vA, v8i16:$vB), v8i16:$vC),
(VMLADDUHM $vA, $vB, $vC)>;
```
Previously, it failed to import because `add` doesn't define neither
`$vA` nor `$vB`.
This change reduces the number of skipped patterns as follows:
```
AArch64: 8695 -> 8548 (-147)
AMDGPU: 11333 -> 11240 (-93)
ARM: 4297 -> 4278 (-1)
PowerPC: 3955 -> 3010 (-945)
```
Other GISel-enabled targets are unaffected.
Commit: 3146911eb0eee821535444aa207a4ec5020c9c6a
https://github.com/llvm/llvm-project/commit/3146911eb0eee821535444aa207a4ec5020c9c6a
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/IR/Constants.cpp
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-splat-vector.ll
Log Message:
-----------
[LLVM][AsmPrinter] Add vector ConstantInt/FP support to emitGlobalConstantImpl. (#120077)
The fixes a failure path for fixed length vector globals when
ConstantInt/FP is used to represent splats instead of
ConstantDataVector.
Commit: bc3eee11ea6f771bf007c4921a34c1dfee040471
https://github.com/llvm/llvm-project/commit/bc3eee11ea6f771bf007c4921a34c1dfee040471
Author: AnastasiyaChernikova <anastasiya.chernikova at syntacore.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
A llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-A.s
A llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-C.s
A llvm/test/tools/llvm-exegesis/RISCV/latency-by-opcode-name-FADD_D.s
M llvm/tools/llvm-exegesis/lib/CMakeLists.txt
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
A llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
A llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
M llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
M llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
[Exegesis][RISCV] Add RISCV support for llvm-exegesis (#89047)
This patch also makes following amendments to core exegesis:
* Added distinction between regular registers aliasing check and
registers used as memory address in instruction.
* Added scratch memory space pointer register.
* General exegesis options were amended:
* mattr - new option to pass a list of enabled target features
Llvm-exegesis RISCV port is a result of team effort. Below everyone
involved listed.
Co-authored-by: Konstantin Vladimirov
<konstantin.vladimirov at syntacore.com>
Co-authored-by: Dmitrii Petrov <dmitrii.petrov at syntacore.com>
Co-authored-by: Dmitry Bushev <dmitry.bushev at syntacore.com>
Co-authored-by: Mark Goncharov <mark.goncharov at syntacore.com>
Co-authored-by: Anastasiya Chernikova
<anastasiya.chernikova at syntacore.com>
---------
Co-authored-by: Dmitry Bushev <dmitry.bushev at syntacore.com>
Commit: f270c9a7d0add028bcb80df5a3d73b85b0ebe7f4
https://github.com/llvm/llvm-project/commit/f270c9a7d0add028bcb80df5a3d73b85b0ebe7f4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll
Log Message:
-----------
[X86] urem-seteq-illegal-types.ll - regenerate VPTERNLOG comment
Commit: 2fa4b502d1910b8f134e01274d3898a265b0c88b
https://github.com/llvm/llvm-project/commit/2fa4b502d1910b8f134e01274d3898a265b0c88b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
Log Message:
-----------
Fix unused variable warning. NFC.
Commit: bf62ea40eee82794abc8ed767c150d6c8d0c0b0a
https://github.com/llvm/llvm-project/commit/bf62ea40eee82794abc8ed767c150d6c8d0c0b0a
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
R llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-A.s
R llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-C.s
R llvm/test/tools/llvm-exegesis/RISCV/latency-by-opcode-name-FADD_D.s
M llvm/tools/llvm-exegesis/lib/CMakeLists.txt
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
R llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
R llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
M llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
M llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
Revert "[Exegesis][RISCV] Add RISCV support for llvm-exegesis (#89047)"
This reverts commit bc3eee11ea6f771bf007c4921a34c1dfee040471.
These tests are failing because of no `REQUIRES`.
Commit: c6967efe780d6cc5d70fc8cadbd227353b6768f1
https://github.com/llvm/llvm-project/commit/c6967efe780d6cc5d70fc8cadbd227353b6768f1
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
A llvm/test/MC/Disassembler/Xtensa/code_density.txt
A llvm/test/MC/Disassembler/Xtensa/lit.local.cfg
M llvm/test/MC/Xtensa/Relocations/fixups.s
M llvm/test/MC/Xtensa/Relocations/relocations.s
A llvm/test/MC/Xtensa/code_density-invalid.s
A llvm/test/MC/Xtensa/code_density.s
Log Message:
-----------
[Xtensa] Implement Code Density Option. (#119639)
The Code Density option adds 16-bit encoding for frequently used
instructions.
Commit: 6f68010f9123aae9f6f105d7a11af22458518ad7
https://github.com/llvm/llvm-project/commit/6f68010f9123aae9f6f105d7a11af22458518ad7
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/icmp-logical.ll
Log Message:
-----------
[InstCombine] Drop samesign flags in `foldLogOpOfMaskedICmps_NotAllZeros_BMask_Mixed` (#120373)
Counterexamples: https://alive2.llvm.org/ce/z/6Ks8Qz
Closes https://github.com/llvm/llvm-project/issues/120361.
Commit: 0c6860622c249ae7adc784c66a8d0b1335a9e7df
https://github.com/llvm/llvm-project/commit/0c6860622c249ae7adc784c66a8d0b1335a9e7df
Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
M lldb/test/Shell/ObjectFile/XCOFF/basic-info.yaml
Log Message:
-----------
[lldb][AIX] Header Parsing for XCOFF Object File in AIX (#116338)
This PR is in reference to porting LLDB on AIX.
Link to discussions on llvm discourse and github:
1. https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640
2. https://github.com/llvm/llvm-project/issues/101657
The complete changes for porting are present in this draft PR:
https://github.com/llvm/llvm-project/pull/102601
Added XCOFF Object File Header Parsing for AIX.
Details about XCOFF file format on AIX:
[XCOFF](https://www.ibm.com/docs/en/aix/7.3?topic=formats-xcoff-object-file-format)
Commit: 0446990cc7af4e2b794660a98214edb401d6c50a
https://github.com/llvm/llvm-project/commit/0446990cc7af4e2b794660a98214edb401d6c50a
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-divergent.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
Log Message:
-----------
Reapply "[NFC][AMDGPU] Pre-commit clang and llvm tests for dynamic allocas" (#120410)
This reapplies commit https://github.com/llvm/llvm-project/pull/120063.
A machine-verifier bug was causing a crash in the previous commit.
This has been addressed in
https://github.com/llvm/llvm-project/pull/120393.
Commit: 6da676ad35863ecea004ffa4059297a5c86dc6b2
https://github.com/llvm/llvm-project/commit/6da676ad35863ecea004ffa4059297a5c86dc6b2
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx950_asm_read_tr.s
M llvm/test/MC/AMDGPU/gfx950_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx950_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx950_invalid_encoding.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_ds_read_tr.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_xdlops.txt
Log Message:
-----------
[AMDGPU] Use -triple instead of -arch in MC tests
Commit: e7303fe80a0bea124422219356c1c9e845110a77
https://github.com/llvm/llvm-project/commit/e7303fe80a0bea124422219356c1c9e845110a77
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/utils/extract_symbols.py
Log Message:
-----------
[Python] Use raw string literals for regexes (#120401)
Previously these backslashes were not followed by a valid escape
sequence character so were treated as literal backslashes, which was the
intended behaviour of the code. However python as of 3.12 has started
warning about these, so we should use raw string literals for regexes so
that backslashes are always interpreted literally. I've done this for
every regex in this file for consistency, including the ones which do
not contain backslashes.
Commit: 4b56345895729fda3bc3c094bc3f237ba3a49686
https://github.com/llvm/llvm-project/commit/4b56345895729fda3bc3c094bc3f237ba3a49686
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
Log Message:
-----------
[mlir][SCF] Unify tileUsingFor and tileReductionUsingFor implementation (#120115)
This patch unifies the tiling implementation for tileUsingFor and
tileReductionUsingFor. This is done by passing an addition option to
SCFTilingOptions, allowing it to set how reduction dimensions should be
tiled. Currently, there are 3 different options for reduction tiling:
FullReduction (old tileUsingFor), PartialReductionOuterReduction (old
tileReductionUsingFor) and PartialReductionOuterParallel
(linalg::tileReductionUsingForall, this isn't implemented in this
patch).
The patch makes tileReductionUsingFor use the tileUsingFor
implementation with the new reduction tiling options.
There are no test changes because the implementation was doing almost
the exactly same thing. This was also tested in IREE (which uses both
these APIs heavily) and there were no test changes.
Commit: fbc18b85d6ce5ab6489a2b08f9b38d446fe9d6f6
https://github.com/llvm/llvm-project/commit/fbc18b85d6ce5ab6489a2b08f9b38d446fe9d6f6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/extract-fneg-insert.ll
Log Message:
-----------
Revert "[VectorCombine] Combine scalar fneg with insert/extract to vector fneg when length is different" (#120422)
Reverts llvm/llvm-project#115209 - investigating a reported regression
Commit: 0e8d022ffe008dd7afffa5140c4d87ce3d77902d
https://github.com/llvm/llvm-project/commit/0e8d022ffe008dd7afffa5140c4d87ce3d77902d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
Log Message:
-----------
[VPlan] Handle exit phis with multiple operands in addUsersInExitBlocks. (#120260)
Currently the addUsersInExitBlocks incorrectly assumes exit phis only
have a single operand, which may not be the case for loops with early
exits when they share a common exit block.
Also further relax the assertion in fixupIVUsers to allow exit values if
they come from theloop latch/middle.block.
PR: https://github.com/llvm/llvm-project/pull/120260
Commit: 6f0e9c4a5611d21cbcac4bb4f16dc90674838e1e
https://github.com/llvm/llvm-project/commit/6f0e9c4a5611d21cbcac4bb4f16dc90674838e1e
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/test/OpenMP/declare_mapper_codegen.cpp
M clang/test/OpenMP/target_map_names.cpp
M clang/test/OpenMP/target_map_names_attr.cpp
M clang/test/OpenMP/target_map_nest_defalut_mapper_codegen.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMP][Clang] Migrate OpenMP UserDefinedMapper from Clang to OMPIRBuilder (#110001)
This patch migrates the OpenMP UserDefinedMapper codegen from Clang to
the OpenMPIRBuilder. I will be adding further patches in the near future
so that OpenMP dialect in MLIR can make use of these.
Commit: fc97d2e68b03bc2979395e84b645e5b3ba35aecd
https://github.com/llvm/llvm-project/commit/fc97d2e68b03bc2979395e84b645e5b3ba35aecd
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/docs/Extensions.md
A flang/docs/Unsigned.md
M flang/docs/index.md
M flang/include/flang/Common/Fortran-consts.h
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Common/Fortran.h
M flang/include/flang/Evaluate/complex.h
M flang/include/flang/Evaluate/expression.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/integer.h
M flang/include/flang/Evaluate/real.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/ISO_Fortran_binding.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Dialect/CanonicalizationPatterns.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Optimizer/Support/Utils.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/cpp-type.h
M flang/include/flang/Runtime/matmul-instances.inc
M flang/include/flang/Runtime/numeric.h
M flang/include/flang/Runtime/reduce.h
M flang/include/flang/Runtime/reduction.h
M flang/include/flang/Semantics/expression.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Common/default-kinds.cpp
M flang/lib/Evaluate/expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/fold-matmul.h
M flang/lib/Evaluate/fold-reduction.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/target.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertType.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/Mangler.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Reduction.cpp
M flang/lib/Optimizer/Builder/Runtime/Transformational.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Parser/type-parsers.h
M flang/lib/Semantics/check-arithmeticif.cpp
M flang/lib/Semantics/check-case.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/scope.cpp
M flang/lib/Semantics/tools.cpp
M flang/module/iso_c_binding.f90
M flang/module/iso_fortran_env.f90
M flang/module/iso_fortran_env_impl.f90
M flang/runtime/Float128Math/random.cpp
M flang/runtime/descriptor-io.h
M flang/runtime/dot-product.cpp
M flang/runtime/edit-input.cpp
M flang/runtime/edit-input.h
M flang/runtime/edit-output.cpp
M flang/runtime/edit-output.h
M flang/runtime/extrema.cpp
M flang/runtime/findloc.cpp
M flang/runtime/io-api-minimal.cpp
M flang/runtime/matmul.cpp
M flang/runtime/numeric.cpp
M flang/runtime/product.cpp
M flang/runtime/random-templates.h
M flang/runtime/random.cpp
M flang/runtime/reduce.cpp
M flang/runtime/reduction-templates.h
M flang/runtime/reduction.cpp
M flang/runtime/sum.cpp
M flang/runtime/tools.h
M flang/runtime/type-code.cpp
M flang/runtime/type-info.cpp
A flang/test/Evaluate/fold-unsigned.f90
M flang/test/Lower/Intrinsics/shifta.f90
M flang/test/Lower/allocatable-polymorphic.f90
A flang/test/Lower/unsigned-ops.f90
M flang/test/Semantics/complex01.f90
M flang/test/Semantics/typeinfo01.f90
M flang/test/Semantics/typeinfo08.f90
A flang/test/Semantics/unsigned-errors.f90
M flang/unittests/Evaluate/real.cpp
Log Message:
-----------
[flang] Add UNSIGNED (#113504)
Implement the UNSIGNED extension type and operations under control of a
language feature flag (-funsigned).
This is nearly identical to the UNSIGNED feature that has been available
in Sun Fortran for years, and now implemented in GNU Fortran for
gfortran 15, and proposed for ISO standardization in J3/24-116.txt.
See the new documentation for details; but in short, this is C's
unsigned type, with guaranteed modular arithmetic for +, -, and *, and
the related transformational intrinsic functions SUM & al.
Commit: 76714be5fd4ace66dd9e19ce706c2e2149dd5716
https://github.com/llvm/llvm-project/commit/76714be5fd4ace66dd9e19ce706c2e2149dd5716
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/include/llvm/CodeGen/ComplexDeinterleavingPass.h
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
R llvm/test/CodeGen/AArch64/complex-deinterleaving-cdot.ll
Log Message:
-----------
Revert "Add support for single reductions in ComplexDeinterleavingPass (#112875)"
This reverts commit b3eede5e1fa7ab742b86e9be22db7bccd2505b8a.
This has been breaking most AArch64 stage2 builds for 4+ hours,
reverting to get the bots back to green.
https://lab.llvm.org/buildbot/#/builders/41/builds/4172
https://lab.llvm.org/buildbot/#/builders/4/builds/4281
https://lab.llvm.org/buildbot/#/builders/199/builds/263
https://lab.llvm.org/buildbot/#/builders/198/builds/334
https://lab.llvm.org/buildbot/#/builders/143/builds/4276
https://lab.llvm.org/buildbot/#/builders/17/builds/4725
Commit: 6993d32c77a78ac0e6eee0e4bffd714a455e776b
https://github.com/llvm/llvm-project/commit/6993d32c77a78ac0e6eee0e4bffd714a455e776b
Author: Bushev Dmitry <111585886+dybv-sc at users.noreply.github.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
A llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-A.s
A llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-C.s
A llvm/test/tools/llvm-exegesis/RISCV/latency-by-opcode-name-FADD_D.s
A llvm/test/tools/llvm-exegesis/RISCV/lit.local.cfg
M llvm/tools/llvm-exegesis/lib/CMakeLists.txt
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
A llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
A llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
M llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
[Exegesis][RISCV] Add RISCV support for llvm-exegesis (#120419)
This patch also makes following amendments to core exegesis:
* Added distinction between regular registers aliasing check and
registers used as memory address in instruction.
* Added scratch memory space pointer register.
* General exegesis options were amended:
* mattr - new option to pass a list of enabled target features
Llvm-exegesis RISCV port is a result of team effort. Below everyone
involved listed.
Co-authored-by: Konstantin Vladimirov
<konstantin.vladimirov at syntacore.com>
Co-authored-by: Dmitrii Petrov <dmitrii.petrov at syntacore.com>
Co-authored-by: Dmitry Bushev <dmitry.bushev at syntacore.com>
Co-authored-by: Mark Goncharov <mark.goncharov at syntacore.com>
Co-authored-by: Anastasiya Chernikova
<anastasiya.chernikova at syntacore.com>
---------
Co-authored-by: Anastasiya Chernikova <anastasiya.chernikova at syntacore.com>
Commit: aadf606d9046c16b86f17ed0d2778749922bac2e
https://github.com/llvm/llvm-project/commit/aadf606d9046c16b86f17ed0d2778749922bac2e
Author: Akash Banerjee <Akash.Banerjee at amd.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
Fix #110001 build error.
Commit: d3750412aa37ac982ef65bde84fed9bdff763996
https://github.com/llvm/llvm-project/commit/d3750412aa37ac982ef65bde84fed9bdff763996
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir
M llvm/test/TableGen/GlobalISelEmitter-nested-subregs.td
M llvm/test/TableGen/GlobalISelEmitterRegSequence.td
M llvm/test/TableGen/GlobalISelEmitterSubreg.td
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[TableGen][GISel] Improve dead register handling (#120426)
A dead implicit def wasn't marked as dead if it is also an implicit use.
The new approach should also be more straightforward and simplifies
future changes for supporting optional defs and physical register defs.
Pull Request: https://github.com/llvm/llvm-project/pull/120426
Commit: 3eca15cbb9888a992749ddd24f0fb666dad733bf
https://github.com/llvm/llvm-project/commit/3eca15cbb9888a992749ddd24f0fb666dad733bf
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/lib/Analysis/Analysis.cpp
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/DirectX/DXILFinalizeLinkage.cpp
M llvm/lib/Target/DirectX/DXILFinalizeLinkage.h
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/unittests/Analysis/DXILResourceTest.cpp
Log Message:
-----------
[DirectX] Split resource info into type and binding info. NFC (#119773)
This splits the DXILResourceAnalysis pass into TypeAnalysis and
BindingAnalysis passes. The type analysis pass is made immutable and
populated lazily so that it can be used earlier in the pipeline without
needing to carefully maintain the invariants of the binding analysis.
Fixes #118400
Commit: 49fd2dde21655f95309abb17ad1d3392afe4985f
https://github.com/llvm/llvm-project/commit/49fd2dde21655f95309abb17ad1d3392afe4985f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-sdiv.ll
M llvm/test/CodeGen/X86/lower-vec-shift.ll
M llvm/test/CodeGen/X86/vec_shift6.ll
M llvm/test/CodeGen/X86/widen_arith-4.ll
Log Message:
-----------
[X86] LowerShift - don't prematurely lower to x86 vector shift imm instructions (#120282)
When splitting 2 unique amount shifts to shuffle(shift(x,c1),shift(x,c2)), don't use getTargetVShiftByConstNode directly to lower, use generic shifts to ensure we make use of any further canonicalization: shl(X,1) to add(X,X) etc. - this can have notably better throughput on some x86 targets.
Noticed on #120270
Commit: 72e58e00c27c7f4dd9502c719ddd13dcfef33e85
https://github.com/llvm/llvm-project/commit/72e58e00c27c7f4dd9502c719ddd13dcfef33e85
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Lexer/cxx-features.cpp
Log Message:
-----------
[Clang] Set `__cpp_explicit_this_parameter` (#107451)
There are not a lot of outstanding known issues
with deducing this (besides #95112), so it
seems reasonable to claim full support.
Fixes #82780
Commit: 2b932bc111c0d96db7044b0a854d7ad763710df2
https://github.com/llvm/llvm-project/commit/2b932bc111c0d96db7044b0a854d7ad763710df2
Author: Paul Kirth <paulkirth at google.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/test/clang-doc/builtin_types.cpp
M clang-tools-extra/test/clang-doc/templates.cpp
M clang-tools-extra/unittests/clang-doc/SerializeTest.cpp
Log Message:
-----------
[clang-doc] Use LangOpts when printing types (#120308)
The implementation in the clang-doc serializer failed to take in the
LangOpts from the declaration. As a result, we'd do things like print
`_Bool` instead of `bool`, even in C++ code.
Fixes #62970
Commit: 5717a99d8de458a0d74a8167c8d7aa751c1e4008
https://github.com/llvm/llvm-project/commit/5717a99d8de458a0d74a8167c8d7aa751c1e4008
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
A llvm/include/llvm/Passes/DroppedVariableStats.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/Passes/CMakeLists.txt
A llvm/lib/Passes/DroppedVariableStats.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/DroppedVariableStatsIRTest.cpp
R llvm/unittests/IR/DroppedVariableStatsTest.cpp
Log Message:
-----------
Reland 2de78815604e9027efd93cac27c517bf732587d2 (#119650) (#120454)
[NFC] Move DroppedVariableStats to its own file and redesign it to be
extensible. (#115563)
Move DroppedVariableStats code to its own file and change the class to
have an extensible design so that we can use it to add dropped
statistics to MIR passes and the instruction selector.
Commit: d2413d44136f4f7cdb35c3a52ce6adbeb230f1e1
https://github.com/llvm/llvm-project/commit/d2413d44136f4f7cdb35c3a52ce6adbeb230f1e1
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M libc/docs/headers/stdio.rst
A libc/utils/docgen/stdio.yaml
Log Message:
-----------
[libc][docs] convert stdio.h to docgen (#120334)
Add info from n3220 and POSIX.1-2024.
Commit: 21de514872fc80424fbfd159485d71978b973c73
https://github.com/llvm/llvm-project/commit/21de514872fc80424fbfd159485d71978b973c73
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
Log Message:
-----------
[flang][NFC] static assert intrinsic table is sorted (#120399)
This invariant is used below when searching for intrinsic
implementation. Currently, if the map is not sorted, the compiler will
just silently assume there is no such implementation.
Commit: 0fca76d576da6b26379b9754178263685b077610
https://github.com/llvm/llvm-project/commit/0fca76d576da6b26379b9754178263685b077610
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/DirectX/CMakeLists.txt
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/lib/Target/DirectX/DXILResourceAccess.h
M llvm/lib/Target/DirectX/DirectX.h
M llvm/lib/Target/DirectX/DirectXPassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
A llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
Log Message:
-----------
[DirectX] Introduce the DXILResourceAccess pass (#116726)
This pass transforms resource access via `llvm.dx.resource.getpointer`
into buffer loads and stores.
Fixes #114848.
Commit: 79e859e049c77b5190a54fc1ecf1d262e3ef9f11
https://github.com/llvm/llvm-project/commit/79e859e049c77b5190a54fc1ecf1d262e3ef9f11
Author: Max <xpy66swsry at gmail.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
A lld/Common/BPSectionOrdererBase.cpp
M lld/Common/CMakeLists.txt
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/BPSectionOrderer.h
M lld/MachO/CMakeLists.txt
A lld/include/lld/Common/BPSectionOrdererBase.h
Log Message:
-----------
[lld] Move BPSectionOrderer from MachO to Common for reuse in ELF (#117514)
Add lld/Common/BPSectionOrdererBase from MachO for reuse in ELF
Commit: 0e2466f62491a2623e61a81f17e4c0f2c15cb8ba
https://github.com/llvm/llvm-project/commit/0e2466f62491a2623e61a81f17e4c0f2c15cb8ba
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
A llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll
M llvm/unittests/Analysis/DXILResourceTest.cpp
Log Message:
-----------
[DirectX] Create symbols for resource handles (#119775)
We need to create symbols with "the original shape of resource and
element type" to put in the resource metadata in order to generate valid
DXIL.
Note that DXC generally doesn't emit an actual symbol outside of library
shaders (it emits an undef of a pointer to the type), but since we have
to deal with opaque pointers we would need a way to smuggle the type
through to match that. Instead, we simply emit symbols for now.
Fixed #116849
Commit: 08849083a797b03c93487d177f6019d709d44d93
https://github.com/llvm/llvm-project/commit/08849083a797b03c93487d177f6019d709d44d93
Author: Thurston Dang <thurston at google.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
R llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-A.s
R llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-C.s
R llvm/test/tools/llvm-exegesis/RISCV/latency-by-opcode-name-FADD_D.s
R llvm/test/tools/llvm-exegesis/RISCV/lit.local.cfg
M llvm/tools/llvm-exegesis/lib/CMakeLists.txt
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
R llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
R llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
M llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
Revert "[Exegesis][RISCV] Add RISCV support for llvm-exegesis (#120419)"
This reverts commit 6993d32c77a78ac0e6eee0e4bffd714a455e776b.
Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/51/builds/7908)
CCACHE_CPP2=yes CCACHE_HASHDIR=yes /usr/bin/ccache /home/b/sanitizer-aarch64-linux/build/llvm_build0/bin/clang++ -DGTEST_HAS_RTTI=0 -DLLVM_BUILD_STATIC -D_DEBUG -D_GLIBCXX_ASSERTIONS -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/home/b/sanitizer-aarch64-linux/build/build_default/tools/llvm-exegesis/lib/RISCV -I/home/b/sanitizer-aarch64-linux/build/llvm-project/llvm/tools/llvm-exegesis/lib/RISCV -I/home/b/sanitizer-aarch64-linux/build/build_default/include -I/home/b/sanitizer-aarch64-linux/build/llvm-project/llvm/include -I/home/b/sanitizer-aarch64-linux/build/llvm-project/llvm/lib/Target/RISCV -I/home/b/sanitizer-aarch64-linux/build/build_default/lib/Target/RISCV -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror -Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic -Wno-long-long -Wc++98-compat-extra-semi -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion -Wmisleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -O3 -DNDEBUG -std=c++17 -fno-exceptions -funwind-tables -fno-rtti -UNDEBUG -MD -MT tools/llvm-exegesis/lib/RISCV/CMakeFiles/LLVMExegesisRISCV.dir/Target.cpp.o -MF tools/llvm-exegesis/lib/RISCV/CMakeFiles/LLVMExegesisRISCV.dir/Target.cpp.o.d -o tools/llvm-exegesis/lib/RISCV/CMakeFiles/LLVMExegesisRISCV.dir/Target.cpp.o -c /home/b/sanitizer-aarch64-linux/build/llvm-project/llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
In file included from /home/b/sanitizer-aarch64-linux/build/llvm-project/llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp:139:
/home/b/sanitizer-aarch64-linux/build/build_default/lib/Target/RISCV/RISCVGenAsmMatcher.inc:239:19: error: unused function 'MatchRegisterName' [-Werror,-Wunused-function]
239 | static MCRegister MatchRegisterName(StringRef Name) {
| ^~~~~~~~~~~~~~~~~
/home/b/sanitizer-aarch64-linux/build/build_default/lib/Target/RISCV/RISCVGenAsmMatcher.inc:568:19: error: unused function 'MatchRegisterAltName' [-Werror,-Wunused-function]
568 | static MCRegister MatchRegisterAltName(StringRef Name) {
| ^~~~~~~~~~~~~~~~~~~~
Commit: 5270e63cdc8f744003608fcc40f4549339e6b517
https://github.com/llvm/llvm-project/commit/5270e63cdc8f744003608fcc40f4549339e6b517
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] test update for v_ldexp_f16 in true16 (#119313)
This is a NFC change. Update mc test for v_ldexp_f16 in true16 format.
MC source change was done by previous patch and automatically enabled by
t16 pesudo
Commit: c3241a9a4de3ef71a82f9434f84fa7437fe43f9a
https://github.com/llvm/llvm-project/commit/c3241a9a4de3ef71a82f9434f84fa7437fe43f9a
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] test update for v_subrev_f16 in true16 (#119315)
This is a NFC change. Update mc test for v_subrev_f16 in true16 format.
MC source change was done by previous patch and automatically enabled by
t16 pesudo
Commit: 23a239267e8a1d20ed10d3545feaf2a2bb70b085
https://github.com/llvm/llvm-project/commit/23a239267e8a1d20ed10d3545feaf2a2bb70b085
Author: Alexander Kornienko <alexfh at google.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/union-tbaa1.c
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/InstCombine/load-cmp.ll
M llvm/test/Transforms/InstCombine/memcpy-addrspace.ll
M llvm/test/Transforms/InstCombine/memcpy-from-global.ll
M llvm/test/Transforms/InstCombine/stpcpy-1.ll
M llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll
M llvm/test/Transforms/InstCombine/strlen-1.ll
M llvm/test/Transforms/InstCombine/strlen-4.ll
M llvm/test/Transforms/InstCombine/strncat-2.ll
M llvm/test/Transforms/InstCombine/strnlen-3.ll
M llvm/test/Transforms/InstCombine/strnlen-4.ll
M llvm/test/Transforms/InstCombine/strnlen-5.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
M llvm/test/Transforms/InstCombine/wcslen-1.ll
M llvm/test/Transforms/InstCombine/wcslen-3.ll
M llvm/test/Transforms/InstCombine/wcslen-5.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/non-const-n.ll
M llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll
M llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll
Log Message:
-----------
Revert "[InstCombine] Infer nuw for gep inbounds from base of object" (#120460)
Reverts llvm/llvm-project#119225 due to the lack of sanitizer support,
large potential of breaking code containing latent UB, non-trivial
localization and investigation, and what seems to be a bad interaction
with msan (a test is in the works).
Related discussions:
https://github.com/llvm/llvm-project/pull/119225#issuecomment-2551904822
https://github.com/llvm/llvm-project/pull/118472#issuecomment-2549986255
Commit: 0987fcce18becc6980ddf61dd6c2af494c4ddf63
https://github.com/llvm/llvm-project/commit/0987fcce18becc6980ddf61dd6c2af494c4ddf63
Author: Mark Danial <118996571+madanial0 at users.noreply.github.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
Log Message:
-----------
[NFC] update gfx12 vop test to use sed instead of grep (#120458)
changes from https://github.com/llvm/llvm-project/pull/119778 breaks the
AIX clang ppc64 bot:
https://lab.llvm.org/buildbot/#/builders/64/builds/1714 as `grep -o` is
not supported on AIX and is not POSIX compatible as per:
https://www.unix.com/man-page/posix/1p/grep/
Co-authored-by: Mark Danial <mark.danial at ibm.com>
Commit: e6a63513a22e17c193a4912ee6bc23a636d25bcf
https://github.com/llvm/llvm-project/commit/e6a63513a22e17c193a4912ee6bc23a636d25bcf
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll
Log Message:
-----------
[PhaseOrdering] Update test for #120460
Commit: 1f09dbabe736698da17461e111b7f03fa51185f8
https://github.com/llvm/llvm-project/commit/1f09dbabe736698da17461e111b7f03fa51185f8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-12-18 (Wed, 18 Dec 2024)
Changed paths:
M .ci/metrics/metrics.py
M .git-blame-ignore-revs
M .github/CODEOWNERS
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-tidy/misc/IncludeCleanerCheck.cpp
M clang-tools-extra/clang-tidy/readability/InconsistentDeclarationParameterNameCheck.h
M clang-tools-extra/clangd/unittests/DumpASTTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-doc/builtin_types.cpp
M clang-tools-extra/test/clang-doc/templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/argument-comment-strict.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-type-const-cast.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-type-static-cast-downcast.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/unused-parameters-strict.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-format.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print-absl.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print.cpp
M clang-tools-extra/unittests/clang-doc/SerializeTest.cpp
M clang-tools-extra/unittests/clang-tidy/IncludeCleanerTest.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Driver/Options.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Expr.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp
M clang/test/CXX/drs/cwg28xx.cpp
M clang/test/CXX/temp/temp.res/p4.cpp
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGenCXX/cxx2b-deducing-this.cpp
M clang/test/CodeGenCXX/default-arguments.cpp
M clang/test/Driver/sanitizer-ld.c
M clang/test/Lexer/cxx-features.cpp
M clang/test/OpenMP/declare_mapper_codegen.cpp
M clang/test/OpenMP/target_map_names.cpp
M clang/test/OpenMP/target_map_names_attr.cpp
M clang/test/OpenMP/target_map_nest_defalut_mapper_codegen.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/ms-property.cpp
M clang/www/cxx_dr_status.html
M flang/CMakeLists.txt
M flang/docs/Extensions.md
A flang/docs/Unsigned.md
M flang/docs/index.md
M flang/include/flang/Common/Fortran-consts.h
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Common/Fortran.h
M flang/include/flang/Evaluate/complex.h
M flang/include/flang/Evaluate/expression.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/integer.h
M flang/include/flang/Evaluate/real.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/ISO_Fortran_binding.h
A flang/include/flang/Lower/DirectivesCommon.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Dialect/CanonicalizationPatterns.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Optimizer/Support/Utils.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/cpp-type.h
M flang/include/flang/Runtime/matmul-instances.inc
M flang/include/flang/Runtime/numeric.h
M flang/include/flang/Runtime/reduce.h
M flang/include/flang/Runtime/reduction.h
M flang/include/flang/Semantics/expression.h
M flang/lib/Common/Fortran-features.cpp
M flang/lib/Common/default-kinds.cpp
M flang/lib/Evaluate/expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/fold-matmul.h
M flang/lib/Evaluate/fold-reduction.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/target.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertType.cpp
R flang/lib/Lower/DirectivesCommon.h
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/Mangler.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Reduction.cpp
M flang/lib/Optimizer/Builder/Runtime/Transformational.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Parser/type-parsers.h
M flang/lib/Semantics/check-arithmeticif.cpp
M flang/lib/Semantics/check-case.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/scope.cpp
M flang/lib/Semantics/tools.cpp
M flang/module/iso_c_binding.f90
M flang/module/iso_fortran_env.f90
M flang/module/iso_fortran_env_impl.f90
M flang/runtime/Float128Math/random.cpp
M flang/runtime/descriptor-io.h
M flang/runtime/dot-product.cpp
M flang/runtime/edit-input.cpp
M flang/runtime/edit-input.h
M flang/runtime/edit-output.cpp
M flang/runtime/edit-output.h
M flang/runtime/extrema.cpp
M flang/runtime/findloc.cpp
M flang/runtime/io-api-minimal.cpp
M flang/runtime/matmul.cpp
M flang/runtime/numeric.cpp
M flang/runtime/product.cpp
M flang/runtime/random-templates.h
M flang/runtime/random.cpp
M flang/runtime/reduce.cpp
M flang/runtime/reduction-templates.h
M flang/runtime/reduction.cpp
M flang/runtime/sum.cpp
M flang/runtime/tools.h
M flang/runtime/type-code.cpp
M flang/runtime/type-info.cpp
A flang/test/Evaluate/fold-unsigned.f90
A flang/test/Fir/struct-passing-aarch64-byval.fir
A flang/test/HLFIR/order_assignments/forall-issue120190.fir
M flang/test/Lower/Intrinsics/shifta.f90
M flang/test/Lower/allocatable-polymorphic.f90
A flang/test/Lower/unsigned-ops.f90
M flang/test/Semantics/complex01.f90
M flang/test/Semantics/typeinfo01.f90
M flang/test/Semantics/typeinfo08.f90
A flang/test/Semantics/unsigned-errors.f90
A flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
M flang/unittests/Evaluate/real.cpp
M libc/docs/headers/stdio.rst
A libc/utils/docgen/stdio.yaml
A lld/Common/BPSectionOrdererBase.cpp
M lld/Common/CMakeLists.txt
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/BPSectionOrderer.h
M lld/MachO/CMakeLists.txt
A lld/include/lld/Common/BPSectionOrdererBase.h
M lld/test/ELF/aarch64-got-relocations-pauth.s
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
M lldb/test/Shell/ObjectFile/XCOFF/basic-info.yaml
M llvm/docs/Security.rst
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
A llvm/include/llvm/IR/VectorTypeUtils.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
A llvm/include/llvm/Passes/DroppedVariableStats.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/lib/Analysis/Analysis.cpp
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/CMakeLists.txt
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/LLVMContext.cpp
M llvm/lib/IR/VFABIDemangler.cpp
A llvm/lib/IR/VectorTypeUtils.cpp
M llvm/lib/Passes/CMakeLists.txt
A llvm/lib/Passes/DroppedVariableStats.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/CMakeLists.txt
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/DirectX/DXILFinalizeLinkage.cpp
M llvm/lib/Target/DirectX/DXILFinalizeLinkage.h
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
A llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/lib/Target/DirectX/DXILResourceAccess.h
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/DirectX/DirectX.h
M llvm/lib/Target/DirectX/DirectXPassRegistry.def
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
A llvm/test/Analysis/LoopAccessAnalysis/nusw-predicates.ll
M llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/vecreduce-bool.ll
M llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-divergent.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/group-image-instructions.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
A llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/CodeGen/NVPTX/nvcl-param-align.ll
M llvm/test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir
M llvm/test/CodeGen/X86/avx512-bugfix-26264.ll
M llvm/test/CodeGen/X86/avx512-masked-memop-64-32.ll
M llvm/test/CodeGen/X86/combine-sdiv.ll
M llvm/test/CodeGen/X86/lower-vec-shift.ll
M llvm/test/CodeGen/X86/pr33349.ll
M llvm/test/CodeGen/X86/pr34177.ll
M llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/X86/vec_shift6.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/CodeGen/X86/vector-compress.ll
M llvm/test/CodeGen/X86/vector-fshl-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-sub128.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
M llvm/test/CodeGen/X86/widen_arith-4.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx950_asm_read_tr.s
M llvm/test/MC/AMDGPU/gfx950_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx950_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx950_invalid_encoding.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_ds_read_tr.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_xdlops.txt
A llvm/test/MC/Disassembler/Xtensa/code_density.txt
A llvm/test/MC/Disassembler/Xtensa/lit.local.cfg
M llvm/test/MC/Xtensa/Relocations/fixups.s
M llvm/test/MC/Xtensa/Relocations/relocations.s
A llvm/test/MC/Xtensa/code_density-invalid.s
A llvm/test/MC/Xtensa/code_density.s
M llvm/test/TableGen/GlobalISelEmitter-nested-subregs.td
M llvm/test/TableGen/GlobalISelEmitterRegSequence.td
M llvm/test/TableGen/GlobalISelEmitterSubreg.td
M llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/InstCombine/icmp-logical.ll
M llvm/test/Transforms/InstCombine/load-cmp.ll
M llvm/test/Transforms/InstCombine/memcpy-addrspace.ll
M llvm/test/Transforms/InstCombine/memcpy-from-global.ll
M llvm/test/Transforms/InstCombine/stpcpy-1.ll
M llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll
M llvm/test/Transforms/InstCombine/strlen-1.ll
M llvm/test/Transforms/InstCombine/strlen-4.ll
M llvm/test/Transforms/InstCombine/strncat-2.ll
M llvm/test/Transforms/InstCombine/strnlen-3.ll
M llvm/test/Transforms/InstCombine/strnlen-4.ll
M llvm/test/Transforms/InstCombine/strnlen-5.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
M llvm/test/Transforms/InstCombine/wcslen-1.ll
M llvm/test/Transforms/InstCombine/wcslen-3.ll
M llvm/test/Transforms/InstCombine/wcslen-5.ll
M llvm/test/Transforms/LoopUnroll/ARM/lob-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/multi_early_exit.ll
M llvm/test/Transforms/LoopVectorize/multi_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
M llvm/test/Transforms/LoopVectorize/non-const-n.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
A llvm/test/Transforms/LoopVectorize/single_early_exit_with_outer_loop.ll
M llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/tools/llvm-cov/SourceCoverageViewText.cpp
M llvm/unittests/Analysis/DXILResourceTest.cpp
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/DroppedVariableStatsIRTest.cpp
R llvm/unittests/IR/DroppedVariableStatsTest.cpp
M llvm/unittests/IR/VFABIDemanglerTest.cpp
A llvm/unittests/IR/VectorTypeUtilsTest.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/extract_symbols.py
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
A offload/test/offloading/fortran/explicit-and-implicit-record-field-mapping.f90
A offload/test/offloading/fortran/implicit-record-field-mapping.f90
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